Searched defs:TOP_CKG_SM_CA0_CLK_27M_D2 (Results 1 – 14 of 14) sorted by relevance
| /utopia/UTPA2-700.0.x/modules/sc/hal/maserati/sc/ |
| H A D | regSC.h | 427 #define TOP_CKG_SM_CA0_CLK_27M_D2 BITS(11:10, 1) // 13.5MHz macro
|
| /utopia/UTPA2-700.0.x/modules/sc/hal/M7621/sc/ |
| H A D | regSC.h | 427 #define TOP_CKG_SM_CA0_CLK_27M_D2 BITS(11:10, 1) // 13.5MHz macro
|
| /utopia/UTPA2-700.0.x/modules/sc/hal/maldives/sc/ |
| H A D | regSC.h | 420 #define TOP_CKG_SM_CA0_CLK_27M_D2 BITS(11:10, 1) // 13.5MHz macro
|
| /utopia/UTPA2-700.0.x/modules/sc/hal/mainz/sc/ |
| H A D | regSC.h | 427 #define TOP_CKG_SM_CA0_CLK_27M_D2 BITS(11:10, 1) // 13.5MHz macro
|
| /utopia/UTPA2-700.0.x/modules/sc/hal/mustang/sc/ |
| H A D | regSC.h | 420 #define TOP_CKG_SM_CA0_CLK_27M_D2 BITS(11:10, 1) // 13.5MHz macro
|
| /utopia/UTPA2-700.0.x/modules/sc/hal/messi/sc/ |
| H A D | regSC.h | 427 #define TOP_CKG_SM_CA0_CLK_27M_D2 BITS(11:10, 1) // 13.5MHz macro
|
| /utopia/UTPA2-700.0.x/modules/sc/hal/manhattan/sc/ |
| H A D | regSC.h | 427 #define TOP_CKG_SM_CA0_CLK_27M_D2 BITS(11:10, 1) // 13.5MHz macro
|
| /utopia/UTPA2-700.0.x/modules/sc/hal/macan/sc/ |
| H A D | regSC.h | 427 #define TOP_CKG_SM_CA0_CLK_27M_D2 BITS(11:10, 1) // 13.5MHz macro
|
| /utopia/UTPA2-700.0.x/modules/sc/hal/M7821/sc/ |
| H A D | regSC.h | 427 #define TOP_CKG_SM_CA0_CLK_27M_D2 BITS(11:10, 1) // 13.5MHz macro
|
| /utopia/UTPA2-700.0.x/modules/sc/hal/maxim/sc/ |
| H A D | regSC.h | 427 #define TOP_CKG_SM_CA0_CLK_27M_D2 BITS(11:10, 1) // 13.5MHz macro
|
| /utopia/UTPA2-700.0.x/modules/sc/hal/curry/sc/ |
| H A D | regSC.h | 521 #define TOP_CKG_SM_CA0_CLK_27M_D2 BITS(3:2, 1) // 13.5MHz macro
|
| /utopia/UTPA2-700.0.x/modules/sc/hal/kano/sc/ |
| H A D | regSC.h | 521 #define TOP_CKG_SM_CA0_CLK_27M_D2 BITS(3:2, 1) // 13.5MHz macro
|
| /utopia/UTPA2-700.0.x/modules/sc/hal/k6lite/sc/ |
| H A D | regSC.h | 607 #define TOP_CKG_SM_CA0_CLK_27M_D2 BITS(3:2, 1) // 13.5MHz macro
|
| /utopia/UTPA2-700.0.x/modules/sc/hal/k6/sc/ |
| H A D | regSC.h | 597 #define TOP_CKG_SM_CA0_CLK_27M_D2 BITS(3:2, 1) // 13.5MHz macro
|