1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2021 Rockchip Electronics Co. Ltd. 4 * 5 * Author: Dingxian Wen <shawn.wen@rock-chips.com> 6 */ 7 8 #ifndef _LT6911UXC_H_ 9 #define _LT6911UXC_H_ 10 11 #define LT6911UXC_FW_VERSION 0x2005 12 #define LT6911UXC_CHIPID 0x0417 13 14 #define I2C_ENABLE 0x1 15 #define I2C_DISABLE 0x0 16 17 #define AD_LMTX_WRITE_CLK 0x1b 18 #define RECEIVED_INT 1 19 20 // -------------- regs --------------- 21 #define I2C_EN_REG 0x80EE 22 23 #define CHIPID_H 0x8101 24 #define CHIPID_L 0x8100 25 #define FW_VER_A 0x86a7 26 #define FW_VER_B 0x86a8 27 #define FW_VER_C 0x86a9 28 #define FW_VER_D 0x86aa 29 30 #define HTOTAL_H 0x867c 31 #define HTOTAL_L 0x867d 32 #define HACT_H 0x8680 33 #define HACT_L 0x8681 34 #define VTOTAL_H 0x867a 35 #define VTOTAL_L 0x867b 36 #define VACT_H 0x867e 37 #define VACT_L 0x867f 38 39 #define HFP_H 0x8678 40 #define HFP_L 0x8679 41 #define HS_H 0x8672 42 #define HS_L 0x8673 43 #define HBP_H 0x8676 44 #define HBP_L 0x8677 45 #define VBP 0x8674 46 #define VFP 0x8675 47 #define VS 0x8671 48 49 #define HDMI_VERSION 0xb0a2 50 #define TMDS_CLK_H 0x8750 51 #define TMDS_CLK_M 0x8751 52 #define TMDS_CLK_L 0x8752 53 54 #define MIPI_LANES 0x86a2 55 56 #define FM1_DET_CLK_SRC_SEL 0x8540 57 #define FREQ_METER_H 0x8548 58 #define FREQ_METER_M 0x8549 59 #define FREQ_METER_L 0x854a 60 61 #define INT_COMPARE_REG 0x86a6 62 #define INT_STATUS_86A3 0x86a3 63 #define INT_STATUS_86A5 0x86a5 64 #define AUDIO_IN_STATUS 0xb081 65 #define AUDIO_SAMPLE_RATAE_H 0xb0aa 66 #define AUDIO_SAMPLE_RATAE_L 0xb0ab 67 68 #endif 69