1 /* 2 * rk_aiq_algo_amerge_hw.h 3 * 4 * Copyright (c) 2019 Rockchip Corporation 5 * 6 * Licensed under the Apache License, Version 2.0 (the "License"); 7 * you may not use this file except in compliance with the License. 8 * You may obtain a copy of the License at 9 * 10 * http://www.apache.org/licenses/LICENSE-2.0 11 * 12 * Unless required by applicable law or agreed to in writing, software 13 * distributed under the License is distributed on an "AS IS" BASIS, 14 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 * See the License for the specific language governing permissions and 16 * limitations under the License. 17 * 18 */ 19 20 #ifndef _RK_AIQ_ALGO_AMERGE_HW_H_ 21 #define _RK_AIQ_ALGO_AMERGE_HW_H_ 22 23 #define HDRMGE_V10_OE_CURVE_NUM (17) 24 #define HDRMGE_V10_MD_CURVE_NUM (17) 25 #define HDRMGE_V11_OE_CURVE_NUM HDRMGE_V10_OE_CURVE_NUM 26 #define HDRMGE_V11_MD_CURVE_NUM HDRMGE_V10_MD_CURVE_NUM 27 #define HDRMGE_V12_OE_CURVE_NUM HDRMGE_V10_OE_CURVE_NUM 28 #define HDRMGE_V12_MD_CURVE_NUM HDRMGE_V10_MD_CURVE_NUM 29 30 typedef struct MgeProcResV10_s { 31 unsigned char sw_hdrmge_mode; 32 unsigned short sw_hdrmge_gain0_inv; 33 unsigned short sw_hdrmge_gain0; 34 unsigned short sw_hdrmge_gain1_inv; 35 unsigned short sw_hdrmge_gain1; 36 unsigned char sw_hdrmge_gain2; 37 unsigned char sw_hdrmge_ms_dif_0p8; 38 unsigned char sw_hdrmge_lm_dif_0p9; 39 unsigned char sw_hdrmge_ms_dif_0p15; 40 unsigned char sw_hdrmge_lm_dif_0p15; 41 unsigned short sw_hdrmge_l0_y[HDRMGE_V10_MD_CURVE_NUM]; 42 unsigned short sw_hdrmge_l1_y[HDRMGE_V10_MD_CURVE_NUM]; 43 unsigned short sw_hdrmge_e_y[HDRMGE_V10_OE_CURVE_NUM]; 44 } MgeProcResV10_t; 45 46 typedef struct MgeProcResV11_s { 47 unsigned char sw_hdrmge_s_base; 48 unsigned char sw_hdrmge_mode; 49 unsigned short sw_hdrmge_gain0_inv; 50 unsigned short sw_hdrmge_gain0; 51 unsigned short sw_hdrmge_gain1_inv; 52 unsigned short sw_hdrmge_gain1; 53 unsigned char sw_hdrmge_gain2; 54 unsigned char sw_hdrmge_ms_dif_0p8; 55 unsigned char sw_hdrmge_lm_dif_0p9; 56 unsigned char sw_hdrmge_ms_dif_0p15; 57 unsigned char sw_hdrmge_lm_dif_0p15; 58 unsigned short sw_hdrmge_l0_y[HDRMGE_V11_MD_CURVE_NUM]; 59 unsigned short sw_hdrmge_l1_y[HDRMGE_V11_MD_CURVE_NUM]; 60 unsigned short sw_hdrmge_e_y[HDRMGE_V11_OE_CURVE_NUM]; 61 unsigned short sw_hdrmge_ms_thd1; 62 unsigned short sw_hdrmge_ms_thd0; 63 unsigned short sw_hdrmge_ms_scl; 64 unsigned short sw_hdrmge_lm_thd1; 65 unsigned short sw_hdrmge_lm_thd0; 66 unsigned short sw_hdrmge_lm_scl; 67 } MgeProcResV11_t; 68 69 typedef struct MgeProcResV12_s { 70 unsigned char s_base; 71 unsigned char mode; 72 unsigned char dbg_mode; 73 unsigned char each_raw_en; 74 unsigned char lm_dif_0p15; 75 unsigned char lm_dif_0p9; 76 unsigned char ms_dif_0p15; 77 unsigned char ms_dif_0p8; 78 unsigned short gain0_inv; 79 unsigned short gain0; 80 unsigned short gain1_inv; 81 unsigned short gain1; 82 unsigned char gain2; 83 unsigned short ms_thd1; 84 unsigned short ms_thd0; 85 unsigned short ms_scl; 86 unsigned short lm_thd1; 87 unsigned short lm_thd0; 88 unsigned short lm_scl; 89 unsigned short l0_y[HDRMGE_V12_MD_CURVE_NUM]; 90 unsigned short l1_y[HDRMGE_V12_MD_CURVE_NUM]; 91 unsigned short e_y[HDRMGE_V12_OE_CURVE_NUM]; 92 unsigned short l_raw0[HDRMGE_V12_OE_CURVE_NUM]; 93 unsigned short l_raw1[HDRMGE_V12_OE_CURVE_NUM]; 94 unsigned short each_raw_gain0; 95 unsigned short each_raw_gain1; 96 } MgeProcResV12_t; 97 98 typedef struct RkAiqAmergeProcResult_s { 99 #if RKAIQ_HAVE_MERGE_V10 100 MgeProcResV10_t Merge_v10; 101 #endif 102 #if RKAIQ_HAVE_MERGE_V11 103 MgeProcResV11_t Merge_v11; 104 #endif 105 #if RKAIQ_HAVE_MERGE_V12 106 MgeProcResV12_t Merge_v12; 107 #endif 108 } RkAiqAmergeProcResult_t; 109 110 #endif //_RK_AIQ_ALGO_AMERGE_HW_H_ 111