1 /* 2 * cnr_uapi_head_v2.h 3 * 4 * Copyright (c) 2022 Rockchip Corporation 5 * 6 * Licensed under the Apache License, Version 2.0 (the "License"); 7 * you may not use this file except in compliance with the License. 8 * You may obtain a copy of the License at 9 * 10 * http://www.apache.org/licenses/LICENSE-2.0 11 * 12 * Unless required by applicable law or agreed to in writing, software 13 * distributed under the License is distributed on an "AS IS" BASIS, 14 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 15 * See the License for the specific language governing permissions and 16 * limitations under the License. 17 * 18 */ 19 20 #ifndef __CALIBDBV2_UAPI_CNRV2_HEADER_H__ 21 #define __CALIBDBV2_UAPI_CNRV2_HEADER_H__ 22 23 #include "rk_aiq_comm.h" 24 25 RKAIQ_BEGIN_DECLARE 26 27 #define RKCNR_V2_SGM_ADJ_TABLE_LEN 13 28 29 typedef struct RK_CNR_Params_V2_Select_s 30 { 31 // M4_BOOL_DESC("enable", "1") 32 int enable; 33 34 35 // M4_BOOL_DESC("hf_bypass", "0") 36 int hf_bypass; 37 // M4_BOOL_DESC("lf_bypass", "0") 38 int lf_bypass; 39 40 // M4_NUMBER_DESC("global_gain", "f32", M4_RANGE(0.0, 64.0), "1.0", M4_DIGIT(2), M4_HIDE(0)) 41 float global_gain; 42 // M4_NUMBER_DESC("global_gain_alpha", "f32", M4_RANGE(0.0, 1.0), "0.0", M4_DIGIT(2), M4_HIDE(0)) 43 float global_gain_alpha; 44 // M4_NUMBER_DESC("local_gain_scale", "f32", M4_RANGE(0.0, 128.0), "1.0", M4_DIGIT(2), M4_HIDE(0)) 45 float local_gain_scale; 46 47 48 // M4_ARRAY_DESC("gain_adj_strength_ratio", "f32", M4_SIZE(1,13), M4_RANGE(0.0, 255.0), "1.0", M4_DIGIT(2), M4_DYNAMIC(0)) 49 int gain_adj_strength_ratio[RKCNR_V2_SGM_ADJ_TABLE_LEN]; 50 51 // M4_NUMBER_DESC("color_sat_adj", "f32", M4_RANGE(1, 255.0), "40.0", M4_DIGIT(2)) 52 float color_sat_adj; 53 // M4_NUMBER_DESC("color_sat_adj_alpha", "f32", M4_RANGE(0.0, 1.0), "0.8", M4_DIGIT(2)) 54 float color_sat_adj_alpha; 55 56 57 // M4_NUMBER_DESC("hf_spikes_reducion_strength", "f32", M4_RANGE(0.0, 1.0), "0.5", M4_DIGIT(2)) 58 float hf_spikes_reducion_strength; 59 // M4_NUMBER_DESC("hf_denoise_strength", "f32", M4_RANGE(1, 1023.0), "10", M4_DIGIT(2)) 60 float hf_denoise_strength; 61 // M4_NUMBER_DESC("hf_color_sat", "f32", M4_RANGE(0.0, 8.0), "1.5", M4_DIGIT(2)) 62 float hf_color_sat; 63 // M4_NUMBER_DESC("hf_denoise_alpha", "f32", M4_RANGE(0.0, 1.0), "0.0", M4_DIGIT(2)) 64 float hf_denoise_alpha; 65 // M4_NUMBER_DESC("hf_bf_wgt_clip", "u32", M4_RANGE(0, 255), "0", M4_DIGIT(0), M4_HIDE(0)) 66 int hf_bf_wgt_clip; 67 68 69 70 // M4_NUMBER_DESC("thumb_spikes_reducion_strength", "f32", M4_RANGE(0.0, 1.0), "0.2", M4_DIGIT(2)) 71 float thumb_spikes_reducion_strength; 72 // M4_NUMBER_DESC("thumb_denoise_strength", "f32", M4_RANGE(1, 1023), "4.0", M4_DIGIT(2)) 73 float thumb_denoise_strength; 74 // M4_NUMBER_DESC("thumb_color_sat", "f32", M4_RANGE(0.0, 8.0), "4.0", M4_DIGIT(2)) 75 float thumb_color_sat; 76 77 78 // M4_NUMBER_DESC("lf_denoise_strength", "f32", M4_RANGE(1.0, 1023.0), "4.0", M4_DIGIT(2)) 79 float lf_denoise_strength; 80 // M4_NUMBER_DESC("lf_color_sat", "f32", M4_RANGE(0.0, 8.0), "2.0", M4_DIGIT(2)) 81 float lf_color_sat; 82 // M4_NUMBER_DESC("lf_denoise_alpha", "f32", M4_RANGE(0.0, 1.0), "1.0", M4_DIGIT(2)) 83 float lf_denoise_alpha; 84 85 // M4_ARRAY_DESC("kernel_5x5", "f32", M4_SIZE(1,5), M4_RANGE(0.0, 1.0), "[1.0000,0.8825,0.7788,0.6065,0.3679]", M4_DIGIT(6), M4_DYNAMIC(0)) 86 float kernel_5x5[5]; 87 88 } RK_CNR_Params_V2_Select_t; 89 90 typedef struct AcnrV2_ExpInfo_s { 91 92 // M4_NUMBER_DESC("hdr_mode", "u8", M4_RANGE(0, 2), "0", M4_DIGIT(0)) 93 int hdr_mode; 94 95 // M4_NUMBER_DESC("snr_mode", "s8", M4_RANGE(0, 2), "0", M4_DIGIT(0)) 96 int snr_mode; 97 98 // M4_ARRAY_DESC("time", "f32", M4_SIZE(1,3), M4_RANGE(0, 1024), "0.01", M4_DIGIT(6)) 99 float arTime[3]; 100 // M4_ARRAY_DESC("again", "f32", M4_SIZE(1,3), M4_RANGE(0, 204800), "1", M4_DIGIT(3)) 101 float arAGain[3]; 102 // M4_ARRAY_DESC("dgain", "f32", M4_SIZE(1,3), M4_RANGE(0, 204800), "1", M4_DIGIT(3)) 103 float arDGain[3]; 104 // M4_ARRAY_DESC("iso", "u32", M4_SIZE(1,3), M4_RANGE(0, 204800), "1", M4_DIGIT(0)) 105 int arIso[3]; 106 107 // M4_NUMBER_DESC("isoLow", "u32", M4_RANGE(0, 204800), "50", M4_DIGIT(0)) 108 int isoLow; 109 // M4_NUMBER_DESC("isoHigh", "u32", M4_RANGE(0, 204800), "50", M4_DIGIT(0)) 110 int isoHigh; 111 112 // M4_NUMBER_DESC("rawWidth", "s32", M4_RANGE(0, 65535), "0", M4_DIGIT(0)) 113 int rawWidth; 114 // M4_NUMBER_DESC("rawHeight", "s32", M4_RANGE(0, 65535), "0", M4_DIGIT(0)) 115 int rawHeight; 116 } AcnrV2_ExpInfo_t; 117 118 typedef struct rk_aiq_cnr_info_v2_s { 119 // M4_ARRAY_TABLE_DESC("sync", "array_table_ui", "none", "1") 120 rk_aiq_uapi_sync_t sync; 121 // M4_NUMBER_DESC("iso", "u32", M4_RANGE(0, 204800), "50", M4_DIGIT(0), "0", "0") 122 int iso; 123 // M4_ARRAY_TABLE_DESC("expo_info", "normal_ui_style", "none", "0", "0") 124 AcnrV2_ExpInfo_t expo_info; 125 } rk_aiq_cnr_info_v2_t; 126 127 128 RKAIQ_END_DECLARE 129 130 #endif 131