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Searched defs:R0_SC_PHYPLL2_MODE_SW (Results 1 – 4 of 4) sorted by relevance

/rk3399_ARM-atf/plat/mediatek/mt8195/drivers/spm/
H A Dpcm_def.h44 #define R0_SC_PHYPLL2_MODE_SW (1U << 29) macro
/rk3399_ARM-atf/plat/mediatek/mt8192/drivers/spm/
H A Dpcm_def.h44 #define R0_SC_PHYPLL2_MODE_SW (1U << 29) macro
/rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8188/
H A Dpcm_def.h44 #define R0_SC_PHYPLL2_MODE_SW (1U << 29) macro
/rk3399_ARM-atf/plat/mediatek/mt8186/drivers/spm/
H A Dpcm_def.h44 #define R0_SC_PHYPLL2_MODE_SW (1U << 29) macro