1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /****************************************************************************** 3 * 4 * Copyright(c) Semiconductor - 2017 Realtek Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of version 2 of the GNU General Public License as 8 * published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 *****************************************************************************/ 16 #ifndef __INC_RA_H 17 #define __INC_RA_H 18 19 /* rate adaptive define */ 20 #define PERENTRY 23 21 #define RETRYSIZE 5 22 #define RATESIZE 28 23 #define TX_RPT2_ITEM_SIZE 8 24 25 #define DM_RA_RATE_UP 1 26 #define DM_RA_RATE_DOWN 2 27 28 #define AP_USB_SDIO ((DM_ODM_SUPPORT_TYPE == ODM_AP) && ((DEV_BUS_TYPE == RT_USB_INTERFACE) || (DEV_BUS_TYPE == RT_SDIO_INTERFACE))) 29 30 #if (DM_ODM_SUPPORT_TYPE != ODM_WIN) 31 /* 32 * TX report 2 format in Rx desc 33 * */ 34 #define GET_TX_RPT2_DESC_PKT_LEN_88E(__prx_status_desc) LE_BITS_TO_4BYTE(__prx_status_desc, 0, 9) 35 #define GET_TX_RPT2_DESC_MACID_VALID_1_88E(__prx_status_desc) LE_BITS_TO_4BYTE(__prx_status_desc + 16, 0, 32) 36 #define GET_TX_RPT2_DESC_MACID_VALID_2_88E(__prx_status_desc) LE_BITS_TO_4BYTE(__prx_status_desc + 20, 0, 32) 37 38 #define GET_TX_REPORT_TYPE1_RERTY_0(__paddr) LE_BITS_TO_4BYTE(__paddr, 0, 16) 39 #define GET_TX_REPORT_TYPE1_RERTY_1(__paddr) LE_BITS_TO_1BYTE(__paddr + 2, 0, 8) 40 #define GET_TX_REPORT_TYPE1_RERTY_2(__paddr) LE_BITS_TO_1BYTE(__paddr + 3, 0, 8) 41 #define GET_TX_REPORT_TYPE1_RERTY_3(__paddr) LE_BITS_TO_1BYTE(__paddr + 4, 0, 8) 42 #define GET_TX_REPORT_TYPE1_RERTY_4(__paddr) LE_BITS_TO_1BYTE(__paddr + 4 + 1, 0, 8) 43 #define GET_TX_REPORT_TYPE1_DROP_0(__paddr) LE_BITS_TO_1BYTE(__paddr + 4 + 2, 0, 8) 44 #define GET_TX_REPORT_TYPE1_DROP_1(__paddr) LE_BITS_TO_1BYTE(__paddr + 4 + 3, 0, 8) 45 #endif 46 47 enum phydm_rateid_idx_88e_e { /*Copy From SD4 _RATR_TABLE_MODE*/ 48 PHYDM_RAID_88E_NGB = 0, /* BGN 40 Mhz 2SS 1SS */ 49 PHYDM_RAID_88E_NG = 1, /* GN or N */ 50 PHYDM_RAID_88E_NB = 2, /* BGN 20 Mhz 2SS 1SS or BN */ 51 PHYDM_RAID_88E_N = 3, 52 PHYDM_RAID_88E_GB = 4, 53 PHYDM_RAID_88E_G = 5, 54 PHYDM_RAID_88E_B = 6, 55 PHYDM_RAID_88E_MC = 7, 56 PHYDM_RAID_88E_AC_N = 8 57 }; 58 59 /* End rate adaptive define */ 60 61 extern void phydm_tx_stats_rst(struct dm_struct *dm); 62 63 void odm_ra_support_init(struct dm_struct *dm); 64 65 void odm_ra_info_init_all(struct dm_struct *dm); 66 67 int odm_ra_info_init(struct dm_struct *dm, u32 mac_id); 68 69 u8 odm_ra_get_sgi_8188e(struct dm_struct *dm, u8 mac_id); 70 71 u8 odm_ra_get_decision_rate_8188e(struct dm_struct *dm, u8 mac_id); 72 73 u8 odm_ra_get_hw_pwr_status_8188e(struct dm_struct *dm, u8 mac_id); 74 75 u8 phydm_get_rate_id_88e(void *dm_void, u8 macid); 76 77 void phydm_ra_update_8188e(struct dm_struct *dm, u8 mac_id, u8 rate_id, 78 u32 rate_mask, u8 sgi_enable); 79 80 void odm_ra_set_rssi_8188e(struct dm_struct *dm, u8 mac_id, u8 rssi); 81 82 void odm_ra_tx_rpt2_handle_8188e(struct dm_struct *dm, u8 *tx_rpt_buf, 83 u16 tx_rpt_len, u32 mac_id_valid_entry0, 84 u32 mac_id_valid_entry1); 85 86 void odm_ra_set_tx_rpt_time(struct dm_struct *dm, u16 min_rpt_time); 87 #endif 88