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MStar hereby reserves the 91 // rights to any and all damages, losses, costs and expenses resulting therefrom. 92 //////////////////////////////////////////////////////////////////////////////// 93 94 #ifndef _DAC_PRIV_H_ 95 #define _DAC_PRIV_H_ 96 #include "UFO.h" 97 #include "utopia_relation.h" 98 //////////////////////////////////////////////////////////////////////////////// 99 /// @file drvBDMA.h 100 /// @author MStar Semiconductor Inc. 101 /// @brief Byte DMA control driver 102 //////////////////////////////////////////////////////////////////////////////// 103 104 //////////////////////////////////////////////////////////////////////////////// 105 // Header Files 106 //////////////////////////////////////////////////////////////////////////////// 107 #ifdef __cplusplus 108 extern "C" 109 { 110 #endif 111 112 #define DAC_TABLE_TYPE_NUM 16 113 114 typedef APIDAC_Result (*IOCTL_DAC_GET_LIBVER) (void*, const MSIF_Version **); 115 typedef const DAC_ApiInfo * (*IOCTL_DAC_GET_INFO) (void*); 116 typedef MS_BOOL (*IOCTL_DAC_GET_STATUS) (void*, DAC_ApiStatus *); 117 typedef MS_BOOL (*IOCTL_DAC_SET_DBG_LEVEL) (void*, MS_U16); 118 typedef MS_BOOL (*IOCTL_DAC_INIT) (void*); 119 typedef void (*IOCTL_DAC_ENABLE) (void*, MS_BOOL, MS_BOOL); 120 typedef void (*IOCTL_DAC_SET_CLKINV) (void*, MS_BOOL, MS_BOOL); 121 typedef void (*IOCTL_DAC_SET_YPBPR_OUTPUTTIMING) (void*, E_OUTPUT_VIDEO_TIMING_TYPE); 122 typedef void (*IOCTL_DAC_SET_OUTPUT_SOURCE) (void*, E_DAC_OUTPUT_TYPE, MS_BOOL); 123 typedef void (*IOCTL_DAC_SET_OUTPUT_LEVE) (void*, E_DAC_MAX_OUTPUT_LEVEL, MS_BOOL); 124 typedef void (*IOCTL_DAC_SET_OUTPUT_SWAPSEL) (void*, E_DAC_SWAP_SEL, MS_BOOL); 125 typedef void (*IOCTL_DAC_ONOFF_SD) (void*, E_DAC_SD_ENABLE_CTRL); 126 typedef E_DAC_SD_ENABLE_CTRL (*IOCTL_DAC_GET_SD_STATUS) (void*); 127 typedef void (*IOCTL_DAC_ONOFF_HD) (void*, E_DAC_HD_ENABLE_CTRL); 128 typedef E_DAC_HD_ENABLE_CTRL (*IOCTL_DAC_GET_HD_STATUS) (void*); 129 typedef void (*IOCTL_DAC_CLKSEL) (void*, E_OUTPUT_VIDEO_TIMING_TYPE, E_OUTPUT_BIT_TYPE); 130 typedef void (*IOCTL_DAC_DUMP_TABLE) (void*, MS_U8 *, MS_U8); 131 typedef void (*IOCTL_DAC_EXIT) (void*); 132 typedef void (*IOCTL_DAC_SET_IHALF_OUTPUT) (void*, MS_BOOL, MS_BOOL); 133 typedef void (*IOCTL_DAC_SET_QUART_OUTPUT) (void*, MS_BOOL, MS_BOOL); 134 typedef void (*IOCTL_DAC_SET_DAC_STATE) (void*, MS_BOOL, MS_BOOL); 135 typedef MS_BOOL (*IOCTL_DAC_HOTPLUG_DETECT) (void*, E_DAC_DETECT, E_DAC_DETECT_TYPE, MS_BOOL *); 136 typedef MS_U32 (*IOCTL_DAC_SET_POWER_STATE) (void*, E_DAC_POWER_MODE); 137 #ifdef UFO_XC_GETOUTPUTINTELACETIMING 138 typedef MS_BOOL (*IOCTL_DAC_GET_OUTPUT_INTERLACETIMING) (void*); 139 #endif 140 typedef MS_BOOL (*IOCTL_DAC_SET_WSS_ONOFF) (void*, MS_BOOL, MS_BOOL); 141 typedef MS_BOOL (*IOCTL_DAC_GET_WSS_STATUS) (void*, MS_BOOL, MS_BOOL *, DAC_SETWSS_INFO *); 142 typedef MS_BOOL (*IOCTL_DAC_RESET_WSSDATA) (void*, MS_BOOL); 143 typedef MS_BOOL (*IOCTL_DAC_SET_WSS_OUTPUT) (void*, MS_BOOL, MS_BOOL, DAC_SETWSS_INFO); 144 typedef MS_BOOL (*IOCTL_DAC_ENABLE_ICT) (void*, MS_BOOL); 145 typedef void (*IOCTL_DAC_SET_VGA_HSYNCVSYNC) (void*, MS_BOOL); 146 147 typedef enum 148 { 149 E_DAC_POOL_ID_INTERNAL_VARIABLE = 0, 150 E_DAC_POOL_ID_MAX, 151 } E_DAC_POOL_ID; 152 153 typedef struct __attribute__((__packed__)) 154 { 155 MS_BOOL bDACIsYPbPr; 156 157 E_OUTPUT_VIDEO_TIMING_TYPE OutputVideoTimingType_now; 158 E_OUTPUT_VIDEO_TIMING_TYPE OutputVideoTimingType_SC0; 159 E_OUTPUT_VIDEO_TIMING_TYPE OutputVideoTimingType_SC1; 160 E_OUTPUT_BIT_TYPE OutputBitType; 161 162 //Enable 163 MS_BOOL bSDDACEnable; 164 MS_BOOL bHDDACEnable; 165 //OutputType 166 MS_U8 SDOutputType; 167 MS_U8 HDOutputType; 168 //SwapSEL 169 MS_U8 SDSwapSEL; 170 MS_U8 HDSwapSEL; 171 //MaxOutputLevel 172 MS_U8 SDMaxOutputLevel; 173 MS_U8 HDMaxOutputLevel; 174 //EnableCtrl 175 E_DAC_SD_ENABLE_CTRL SD_EnableCtrl; 176 E_DAC_HD_ENABLE_CTRL HD_EnableCtrl; 177 178 E_DAC_DETECT_TYPE DetectType; 179 E_DAC_DETECT Detect; 180 181 //DAC table 182 MS_VIRT DACTable[DAC_TABLE_TYPE_NUM]; 183 #if !defined (__aarch64__) 184 MS_U32 u32AlignmentDummy0[DAC_TABLE_TYPE_NUM]; 185 #endif 186 MS_U8 u8DACtype[DAC_TABLE_TYPE_NUM]; 187 188 MS_VIRT u32NPMBase; 189 MS_VIRT u32PMBase; 190 } MS_DAC_Info; 191 192 typedef struct __attribute__((__packed__)) 193 { 194 // flow control related 195 DAC_ApiInfo _cstDac_ApiInfo; 196 #if !defined (__aarch64__) 197 MS_U32 u32AlignDummy0; //align size for MI init share mem size check fail 198 #endif 199 DAC_ApiStatus _stDac_ApiStatus; 200 #if !defined (__aarch64__) 201 MS_U32 u32AlignDummy1; //align size for MI init share mem size check fail 202 #endif 203 MS_U16 _u16DbgSwitch; 204 MS_DAC_Info _stDac_DacPowerState; 205 } ST_API_DAC; 206 207 typedef struct __attribute__((__packed__)) 208 { 209 // flow control related 210 MS_BOOL bResourceRegistered; 211 ST_API_DAC stapiDAC; 212 } DAC_RESOURCE_PRIVATE; 213 214 typedef struct _DAC_INSTANT_PRIVATE 215 { 216 IOCTL_DAC_GET_LIBVER fpDACGetLibVer; 217 IOCTL_DAC_GET_INFO fpDACGetInfo; 218 IOCTL_DAC_GET_STATUS fpDACGetStatus; 219 IOCTL_DAC_SET_DBG_LEVEL fpDACSetDbgLevel; 220 IOCTL_DAC_INIT fpDACInit; 221 IOCTL_DAC_ENABLE fpDACEnable; 222 IOCTL_DAC_SET_CLKINV fpDACSetClkInv; 223 IOCTL_DAC_SET_YPBPR_OUTPUTTIMING fpDACSetYPbPrOutputTiming; 224 IOCTL_DAC_SET_OUTPUT_SOURCE fpDACSetOutputSource; 225 IOCTL_DAC_SET_OUTPUT_LEVE fpDACSetOutputLevel; 226 IOCTL_DAC_SET_OUTPUT_SWAPSEL fpDACSetOutputSwapSel; 227 IOCTL_DAC_ONOFF_SD fpDACOnOffSD; 228 IOCTL_DAC_GET_SD_STATUS fpDACGetSDStatus; 229 IOCTL_DAC_ONOFF_HD fpDACOnOffHD; 230 IOCTL_DAC_GET_HD_STATUS fpDACGetHDStatus; 231 IOCTL_DAC_CLKSEL fpDACClkSel; 232 IOCTL_DAC_DUMP_TABLE fpDACDumpTable; 233 IOCTL_DAC_EXIT fpDACExit; 234 IOCTL_DAC_SET_IHALF_OUTPUT fpDACSetIHalfOutput; 235 IOCTL_DAC_SET_QUART_OUTPUT fpDACSetQuartOutput; 236 IOCTL_DAC_SET_DAC_STATE fpDACSetDacState; 237 IOCTL_DAC_HOTPLUG_DETECT fpDACHotPlugDetect; 238 IOCTL_DAC_SET_POWER_STATE fpDACSetPowerState; 239 #ifdef UFO_XC_GETOUTPUTINTELACETIMING 240 IOCTL_DAC_GET_OUTPUT_INTERLACETIMING fpDACGetOutputInterlaceTiming; 241 #endif 242 IOCTL_DAC_SET_WSS_ONOFF fpDACSetWSSOnOff; 243 IOCTL_DAC_GET_WSS_STATUS fpDACGetWSSStatus; 244 IOCTL_DAC_RESET_WSSDATA fpDACResetWSSData; 245 IOCTL_DAC_SET_WSS_OUTPUT fpDACSetWSSOutput; 246 IOCTL_DAC_ENABLE_ICT fpDACEnableICT; 247 IOCTL_DAC_SET_VGA_HSYNCVSYNC fpDACSetVGAHsyncVsync; 248 }DAC_INSTANT_PRIVATE; 249 250 //////////////////////////////////////////////////////////////////////////////// 251 // Reduce driver code size 252 //////////////////////////////////////////////////////////////////////////////// 253 #define _MODULE_DAC_U1_U2_RELATION \ 254 URELATION(fpDACGetLibVer,(IOCTL_DAC_GET_LIBVER)MApi_DAC_GetLibVer_U2,MApi_DAC_GetLibVer) \ 255 URELATION(fpDACGetInfo,(IOCTL_DAC_GET_INFO)MApi_DAC_GetInfo_U2,MApi_DAC_GetInfo) \ 256 URELATION(fpDACGetStatus,(IOCTL_DAC_GET_STATUS)MApi_DAC_GetStatus_U2,MApi_DAC_GetStatus) \ 257 URELATION(fpDACSetDbgLevel,(IOCTL_DAC_SET_DBG_LEVEL)MApi_DAC_SetDbgLevel_U2,MApi_DAC_SetDbgLevel) \ 258 URELATION(fpDACInit,(IOCTL_DAC_INIT)MApi_DAC_Init_U2,MApi_DAC_Init) \ 259 URELATION(fpDACEnable,(IOCTL_DAC_ENABLE)MApi_DAC_Enable_U2,MApi_DAC_Enable) \ 260 URELATION(fpDACSetClkInv,(IOCTL_DAC_SET_CLKINV)MApi_DAC_SetClkInv_U2,MApi_DAC_SetClkInv) \ 261 URELATION(fpDACSetYPbPrOutputTiming,(IOCTL_DAC_SET_YPBPR_OUTPUTTIMING)MApi_DAC_SetYPbPrOutputTiming_U2,MApi_DAC_SetYPbPrOutputTiming) \ 262 URELATION(fpDACSetOutputSource,(IOCTL_DAC_SET_OUTPUT_SOURCE)MApi_DAC_SetOutputSource_U2,MApi_DAC_SetOutputSource) \ 263 URELATION(fpDACSetOutputLevel,(IOCTL_DAC_SET_OUTPUT_LEVE)MApi_DAC_SetOutputLevel_U2,MApi_DAC_SetOutputLevel) \ 264 URELATION(fpDACSetOutputSwapSel,(IOCTL_DAC_SET_OUTPUT_SWAPSEL)MApi_DAC_SetOutputSwapSel_U2,MApi_DAC_SetOutputSwapSel) \ 265 URELATION(fpDACOnOffSD,(IOCTL_DAC_ONOFF_SD)MApi_DAC_OnOffSD_U2,MApi_DAC_OnOffSD) \ 266 URELATION(fpDACGetSDStatus,(IOCTL_DAC_GET_SD_STATUS)MApi_DAC_GetSDStatus_U2,MApi_DAC_GetSDStatus) \ 267 URELATION(fpDACOnOffHD,(IOCTL_DAC_ONOFF_HD)MApi_DAC_OnOffHD_U2,MApi_DAC_OnOffHD) \ 268 URELATION(fpDACGetHDStatus,(IOCTL_DAC_GET_HD_STATUS)MApi_DAC_GetHDStatus_U2,MApi_DAC_GetHDStatus) \ 269 URELATION(fpDACClkSel,(IOCTL_DAC_CLKSEL)MApi_DAC_ClkSel_U2,MApi_DAC_ClkSel) \ 270 URELATION(fpDACDumpTable,(IOCTL_DAC_DUMP_TABLE)MApi_DAC_DumpTable_U2,MApi_DAC_DumpTable) \ 271 URELATION(fpDACExit,(IOCTL_DAC_EXIT)MApi_DAC_Exit_U2,MApi_DAC_Exit) \ 272 URELATION(fpDACSetIHalfOutput,(IOCTL_DAC_SET_IHALF_OUTPUT)MApi_DAC_SetIHalfOutput_U2,MApi_DAC_SetIHalfOutput) \ 273 URELATION(fpDACSetQuartOutput,(IOCTL_DAC_SET_QUART_OUTPUT)MApi_DAC_SetQuartOutput_U2,MApi_DAC_SetQuartOutput) \ 274 URELATION(fpDACSetDacState,(IOCTL_DAC_SET_DAC_STATE)MApi_DAC_SetDacState_U2,MApi_DAC_SetDacState) \ 275 URELATION(fpDACHotPlugDetect,(IOCTL_DAC_HOTPLUG_DETECT)MApi_DAC_HotPlugDetect_U2,MApi_DAC_HotPlugDetect) \ 276 URELATION(fpDACSetPowerState,(IOCTL_DAC_SET_POWER_STATE)Mapi_DAC_SetPowerState_U2,Mapi_DAC_SetPowerState) \ 277 URELATION(fpDACSetWSSOnOff,(IOCTL_DAC_SET_WSS_ONOFF)MApi_DAC_SetWSSOnOff_U2,MApi_DAC_SetWSSOnOff) \ 278 URELATION(fpDACGetWSSStatus,(IOCTL_DAC_GET_WSS_STATUS)MApi_DAC_GetWSSStatus_U2,MApi_DAC_GetWSSStatus) \ 279 URELATION(fpDACResetWSSData,(IOCTL_DAC_RESET_WSSDATA)MApi_DAC_ResetWSSData_U2,MApi_DAC_ResetWSSData) \ 280 URELATION(fpDACSetWSSOutput,(IOCTL_DAC_SET_WSS_OUTPUT)MApi_DAC_SetWSSOutput_U2,MApi_DAC_SetWSSOutput) \ 281 URELATION(fpDACEnableICT,(IOCTL_DAC_ENABLE_ICT)MApi_DAC_EnableICT_U2,MApi_DAC_EnableICT)\ 282 URELATION(fpDACSetVGAHsyncVsync,(IOCTL_DAC_SET_VGA_HSYNCVSYNC)MApi_DAC_SetVGAHsyncVsync_U2,MApi_DAC_SetVGAHsyncVsync) 283 284 typedef struct 285 { 286 MS_U32 DAC_Reg[2]; 287 }DAC_REGS_SAVE_AREA; 288 289 APIDAC_Result MApi_DAC_GetLibVer_U2(void* pInstance, const MSIF_Version **ppVersion); 290 const DAC_ApiInfo * MApi_DAC_GetInfo_U2(void* pInstance); 291 MS_BOOL MApi_DAC_GetStatus_U2(void* pInstance, DAC_ApiStatus *pDacStatus); 292 MS_BOOL MApi_DAC_SetDbgLevel_U2(void* pInstance, MS_U16 u16DbgSwitch); 293 MS_BOOL MApi_DAC_Init_U2(void* pInstance); 294 #ifdef UFO_XC_GETOUTPUTINTELACETIMING 295 MS_BOOL MApi_DAC_GetOutputInterlaceTiming_U2(void* pInstance); 296 #endif 297 void MApi_DAC_Enable_U2(void* pInstance, MS_BOOL bEnable, MS_BOOL bIsYPbPr); 298 void MApi_DAC_SetClkInv_U2(void* pInstance, MS_BOOL bEnable, MS_BOOL bIsYPbPr); 299 void MApi_DAC_SetYPbPrOutputTiming_U2(void* pInstance, E_OUTPUT_VIDEO_TIMING_TYPE eTiming); 300 void MApi_DAC_SetOutputSource_U2(void* pInstance, E_DAC_OUTPUT_TYPE enOutputType, MS_BOOL bIsYPbPr); 301 void MApi_DAC_SetOutputLevel_U2(void* pInstance, E_DAC_MAX_OUTPUT_LEVEL enLevel, MS_BOOL bIsYPbPr); 302 void MApi_DAC_SetOutputSwapSel_U2(void* pInstance, E_DAC_SWAP_SEL enSwap,MS_BOOL bIsYPbPr); 303 void MApi_DAC_OnOffSD_U2(void* pInstance, E_DAC_SD_ENABLE_CTRL enBit); 304 E_DAC_SD_ENABLE_CTRL MApi_DAC_GetSDStatus_U2(void* pInstance); 305 void MApi_DAC_OnOffHD_U2(void* pInstance, E_DAC_HD_ENABLE_CTRL enBit); 306 E_DAC_HD_ENABLE_CTRL MApi_DAC_GetHDStatus_U2(void* pInstance); 307 void MApi_DAC_ClkSel_U2(void* pInstance, E_OUTPUT_VIDEO_TIMING_TYPE eTiming, E_OUTPUT_BIT_TYPE ebits); 308 void MApi_DAC_DumpTable_U2(void* pInstance, MS_U8 *pDACTable, MS_U8 u8DACtype); 309 void MApi_DAC_Exit_U2(void* pInstance); 310 void MApi_DAC_SetIHalfOutput_U2(void* pInstance, MS_BOOL bEnable, MS_BOOL bIsYPbPr); 311 void MApi_DAC_SetQuartOutput_U2(void* pInstance, MS_BOOL bEnable,MS_BOOL bIsYPbPr); 312 void MApi_DAC_SetDacState_U2(void* pInstance, MS_BOOL bEnabled, MS_BOOL bIsYPbPr); 313 MS_BOOL MApi_DAC_HotPlugDetect_U2(void* pInstance, E_DAC_DETECT SelDAC,E_DAC_DETECT_TYPE DetectType, MS_BOOL *State); 314 MS_U32 Mapi_DAC_SetPowerState_U2(void* pInstance, E_DAC_POWER_MODE PowerState); 315 MS_BOOL MApi_DAC_SetWSSOnOff_U2(void* pInstance, MS_BOOL bEnable, MS_BOOL bIsYPbPr); 316 MS_BOOL MApi_DAC_GetWSSStatus_U2(void* pInstance, MS_BOOL bIsYPbPr, MS_BOOL *pEnable, DAC_SETWSS_INFO *pSetWSS_Data); 317 MS_BOOL MApi_DAC_ResetWSSData_U2(void* pInstance, MS_BOOL bIsYPbPr); 318 MS_BOOL MApi_DAC_SetWSSOutput_U2(void* pInstance, MS_BOOL bEnable, MS_BOOL bIsYPbPr, DAC_SETWSS_INFO SetWSS_Data); 319 MS_BOOL MApi_DAC_EnableICT_U2(void* pInstance, MS_BOOL bEnable); 320 void MApi_DAC_SetVGAHsyncVsync_U2(void* pInstance, MS_BOOL bEnable); 321 322 void DACRegisterToUtopia(void); 323 MS_U32 DACOpen(void** ppInstance, const void* const pAttribute); 324 MS_U32 DACClose(void* pInstance); 325 MS_U32 DACIoctl(void* pInstance, MS_U32 u32Cmd, void* pArgs); 326 327 #ifdef __cplusplus 328 } 329 #endif 330 #endif // _DRVBDMA_PRIV_H_ 331