1 /* SPDX-License-Identifier: Apache-2.0 */ 2 /* 3 * Copyright (c) 2025 Rockchip Electronics Co., Ltd. 4 */ 5 6 #ifndef __OSD3_TEST_H__ 7 #define __OSD3_TEST_H__ 8 9 #include "rk_venc_cmd.h" 10 11 #define SMPTE_BAR_CNT (8) 12 #define OSD_PATTERN_WIDTH (128) 13 #define OSD_PATTERN_HEIGHT (128) 14 15 typedef enum RangeTransMode_e { 16 FULL_TO_LIMIT = 0, 17 LIMIT_TO_FULL = 1, 18 } RangeTransMode; 19 20 typedef enum OsdQPAdjustMode_e { 21 QP_RELATIVE = 0, 22 QP_ABSOLUTE, 23 } OsdQPAdjustMode; 24 25 typedef enum OsdAlphaSource_e { 26 FROM_DDR = 0, 27 FROM_LUT, 28 FROM_REG 29 } OsdAlphaSource; 30 31 /** 32 * @brief Format translation mode select 33 * 0 -- average a 2x2 block 34 * 1 -- drop, 35 */ 36 typedef enum DownscaleMode_t { 37 AVERAGE, 38 DROP 39 } DownsampleMode; 40 typedef enum OsdTestCase_e { 41 OSD_CASE_FMT_ARGB8888 = 0, 42 OSD_CASE_FMT_RGBA8888, 43 OSD_CASE_FMT_BGRA8888, 44 OSD_CASE_FMT_ABGR8888, 45 OSD_CASE_FMT_ARGB1555, 46 OSD_CASE_FMT_ABGR1555, 47 OSD_CASE_FMT_RGBA5551, 48 OSD_CASE_FMT_BGRA5551, 49 OSD_CASE_FMT_ARGB4444, 50 OSD_CASE_FMT_ABGR4444, 51 OSD_CASE_FMT_RGBA4444, 52 OSD_CASE_FMT_BGRA4444, 53 OSD_CASE_FMT_AYUV2BPP, 54 OSD_CASE_FMT_AYUV1BPP, 55 OSD_CASE_FG_ALPAH_SEL, 56 OSD_CASE_CH_DS_MODE, 57 OSD_CASE_RANGE_TRNS_SEL, 58 OSD_CASE_MAX_REGINON_NUM, 59 OSD_CASE_BUTT, 60 } OsdTestCase; 61 62 typedef enum OsdFmt_e { 63 OSD_FMT_ARGB8888 = 0, 64 OSD_FMT_RGBA8888, 65 OSD_FMT_BGRA8888, 66 OSD_FMT_ABGR8888, 67 OSD_FMT_ARGB1555, 68 OSD_FMT_ABGR1555, 69 OSD_FMT_RGBA5551, 70 OSD_FMT_BGRA5551, 71 OSD_FMT_ARGB4444, 72 OSD_FMT_ABGR4444, 73 OSD_FMT_RGBA4444, 74 OSD_FMT_BGRA4444, 75 OSD_FMT_AYUV2BPP, 76 OSD_FMT_AYUV1BPP, 77 OSD_FMT_BUTT, 78 } OsdFmt; 79 80 typedef struct OsdCaseCfg_t { 81 OsdTestCase type; 82 OsdFmt fmt; 83 char name[100]; 84 MPP_RET (*func)(MppEncOSDData3 *osd_data); 85 } OsdCaseCfg; 86 87 MPP_RET osd3_gen_smpte_bar_argb(RK_U8 **dst); 88 MPP_RET osd3_get_test_case(MppEncOSDData3 *osd_data, RK_U8 *base_pattern, 89 RK_U32 case_idx, KmppBuffer *osd_buffer); 90 #endif /* __OSD3_TEST_H__ */ 91