1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 * 19 ******************************************************************************/ 20 21 #ifndef __ODM_REGDEFINE11AC_H__ 22 #define __ODM_REGDEFINE11AC_H__ 23 24 //2 RF REG LIST 25 26 27 28 //2 BB REG LIST 29 //PAGE 8 30 #define ODM_REG_CCK_RPT_FORMAT_11AC 0x804 31 #define ODM_REG_BB_RX_PATH_11AC 0x808 32 #define ODM_REG_BB_TX_PATH_11AC 0x80c 33 #define ODM_REG_BB_ATC_11AC 0x860 34 #define ODM_REG_EDCCA_POWER_CAL 0x8dc 35 #define ODM_REG_DBG_RPT_11AC 0x8fc 36 //PAGE 9 37 #define ODM_REG_EDCCA_DOWN_OPT 0x900 38 #define ODM_REG_ACBB_EDCCA_ENHANCE 0x944 39 #define ODM_ADC_TRIGGER_Jaguar2 0x95C /*ADC sample mode*/ 40 #define ODM_REG_OFDM_FA_RST_11AC 0x9A4 41 #define ODM_REG_CCX_PERIOD_11AC 0x990 42 #define ODM_REG_NHM_TH9_TH10_11AC 0x994 43 #define ODM_REG_CLM_11AC 0x994 44 #define ODM_REG_NHM_TH3_TO_TH0_11AC 0x998 45 #define ODM_REG_NHM_TH7_TO_TH4_11AC 0x99c 46 #define ODM_REG_NHM_TH8_11AC 0x9a0 47 #define ODM_REG_NHM_9E8_11AC 0x9e8 48 #define ODM_REG_CSI_CONTENT_VALUE 0x9b4 49 //PAGE A 50 #define ODM_REG_CCK_CCA_11AC 0xA0A 51 #define ODM_REG_CCK_FA_RST_11AC 0xA2C 52 #define ODM_REG_CCK_FA_11AC 0xA5C 53 //PAGE B 54 #define ODM_REG_RST_RPT_11AC 0xB58 55 //PAGE C 56 #define ODM_REG_TRMUX_11AC 0xC08 57 #define ODM_REG_IGI_A_11AC 0xC50 58 //PAGE E 59 #define ODM_REG_IGI_B_11AC 0xE50 60 #define ODM_REG_TRMUX_11AC_B 0xE08 61 //PAGE F 62 #define ODM_REG_CCK_CRC32_CNT_11AC 0xF04 63 #define ODM_REG_CCK_CCA_CNT_11AC 0xF08 64 #define ODM_REG_VHT_CRC32_CNT_11AC 0xF0c 65 #define ODM_REG_HT_CRC32_CNT_11AC 0xF10 66 #define ODM_REG_OFDM_CRC32_CNT_11AC 0xF14 67 #define ODM_REG_OFDM_FA_11AC 0xF48 68 #define ODM_REG_RPT_11AC 0xfa0 69 #define ODM_REG_CLM_RESULT_11AC 0xfa4 70 #define ODM_REG_NHM_CNT_11AC 0xfa8 71 #define ODM_REG_NHM_DUR_READY_11AC 0xfb4 72 73 #define ODM_REG_NHM_CNT7_TO_CNT4_11AC 0xfac 74 #define ODM_REG_NHM_CNT11_TO_CNT8_11AC 0xfb0 75 #define ODM_REG_OFDM_FA_TYPE2_11AC 0xFD0 76 //PAGE 18 77 #define ODM_REG_IGI_C_11AC 0x1850 78 //PAGE 1A 79 #define ODM_REG_IGI_D_11AC 0x1A50 80 81 //2 MAC REG LIST 82 #define ODM_REG_RESP_TX_11AC 0x6D8 83 84 85 86 //DIG Related 87 #define ODM_BIT_IGI_11AC 0xFFFFFFFF 88 #define ODM_BIT_CCK_RPT_FORMAT_11AC BIT16 89 #define ODM_BIT_BB_RX_PATH_11AC 0xF 90 #define ODM_BIT_BB_TX_PATH_11AC 0xF 91 #define ODM_BIT_BB_ATC_11AC BIT14 92 93 #endif 94 95