1 /* 2 * Copyright 2020 Rockchip Electronics Co. LTD 3 * 4 * Licensed under the Apache License, Version 2.0 (the "License"); 5 * you may not use this file except in compliance with the License. 6 * You may obtain a copy of the License at 7 * 8 * http://www.apache.org/licenses/LICENSE-2.0 9 * 10 * Unless required by applicable law or agreed to in writing, software 11 * distributed under the License is distributed on an "AS IS" BASIS, 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13 * See the License for the specific language governing permissions and 14 * limitations under the License. 15 */ 16 17 #ifndef __MPP_DEC_CFG_H__ 18 #define __MPP_DEC_CFG_H__ 19 20 #include "mpp_frame.h" 21 #include "rk_vdec_cmd.h" 22 23 typedef enum MppDecCfgChange_e { 24 MPP_DEC_CFG_CHANGE_TYPE = (1 << 0), 25 MPP_DEC_CFG_CHANGE_CODING = (1 << 1), 26 MPP_DEC_CFG_CHANGE_HW_TYPE = (1 << 2), 27 MPP_DEC_CFG_CHANGE_BATCH_MODE = (1 << 3), 28 29 MPP_DEC_CFG_CHANGE_OUTPUT_FORMAT = (1 << 8), 30 MPP_DEC_CFG_CHANGE_FAST_OUT = (1 << 9), 31 MPP_DEC_CFG_CHANGE_FAST_PARSE = (1 << 10), 32 MPP_DEC_CFG_CHANGE_SPLIT_PARSE = (1 << 11), 33 MPP_DEC_CFG_CHANGE_INTERNAL_PTS = (1 << 12), 34 MPP_DEC_CFG_CHANGE_SORT_PTS = (1 << 13), 35 MPP_DEC_CFG_CHANGE_DISABLE_ERROR = (1 << 14), 36 MPP_DEC_CFG_CHANGE_ENABLE_VPROC = (1 << 15), 37 MPP_DEC_CFG_CHANGE_ENABLE_FAST_PLAY = (1 << 16), 38 MPP_DEC_CFG_CHANGE_ENABLE_HDR_META = (1 << 17), 39 MPP_DEC_CFG_CHANGE_ENABLE_THUMBNAIL = (1 << 18), 40 MPP_DEC_CFG_CHANGE_ENABLE_MVC = (1 << 19), 41 /* disable dpb discontinuous check */ 42 MPP_DEC_CFG_CHANGE_DISABLE_DPB_CHECK = (1 << 20), 43 /* reserve high bit for global config */ 44 MPP_DEC_CFG_CHANGE_DISABLE_THREAD = (1 << 28), 45 MPP_DEC_CFG_CHANGE_CODEC_MODE = (1 << 29), 46 MPP_DEC_CFG_CHANGE_DIS_ERR_CLR_MARK = (1 << 30), 47 48 MPP_DEC_CFG_CHANGE_ALL = (0xFFFFFFFF), 49 } MppDecCfgChange; 50 51 typedef enum MppVprocMode_e { 52 MPP_VPROC_MODE_NONE = 0, 53 /* 54 * Deinterlacing interlaced video stream only. 55 * If video is marked as progressive, it won't be deinterlaced. 56 */ 57 MPP_VPROC_MODE_DEINTELACE = (1 << 0), 58 /* 59 * Both interlaced and progressive video will be sending to Vproc for Detection. 60 * - For progressive vide, output directly during detection and adjust later 61 * according to IEP result. 62 * - For interlaced video, interlaceing directly and adjust later according to 63 * IEP result. 64 */ 65 MPP_VPROC_MODE_DETECTION = (1 << 1), 66 MPP_VPROC_MODE_ALL = (0xFFFFFFFF), 67 } MppVprocMode; 68 69 typedef enum FastPlayMode_e { 70 MPP_DISABLE_FAST_PLAY, 71 MPP_ENABLE_FAST_PLAY, 72 // first gop fast play when poc include negative value, otherwise enable fast play all time 73 MPP_ENABLE_FAST_PLAY_ONCE, 74 } FastPlayMode; 75 76 typedef struct MppDecBaseCfg_t { 77 RK_U64 change; 78 79 MppCtxType type; 80 MppCodingType coding; 81 RK_S32 hw_type; 82 RK_U32 batch_mode; 83 84 MppFrameFormat out_fmt; 85 RK_U32 fast_out; 86 RK_U32 fast_parse; 87 RK_U32 split_parse; 88 RK_U32 internal_pts; 89 RK_U32 sort_pts; 90 RK_U32 disable_error; 91 RK_U32 enable_vproc; /* MppVprocMode */ 92 RK_U32 enable_fast_play; 93 RK_U32 enable_hdr_meta; 94 RK_U32 enable_thumbnail; 95 RK_U32 enable_mvc; 96 RK_U32 disable_dpb_chk; 97 RK_U32 disable_thread; 98 RK_U32 codec_mode; 99 RK_U32 dis_err_clr_mark; 100 } MppDecBaseCfg; 101 102 typedef enum MppDecCbCfgChange_e { 103 MPP_DEC_CB_CFG_CHANGE_PKT_RDY = (1 << 0), 104 MPP_DEC_CB_CFG_CHANGE_FRM_RDY = (1 << 1), 105 106 MPP_DEC_CB_CFG_CHANGE_ALL = (0xFFFFFFFF), 107 } MppDecCbCfgChange; 108 109 typedef struct MppDecCbCfg_t { 110 RK_U64 change; 111 112 /* notify packet process done and can accept new packet */ 113 MppExtCbFunc pkt_rdy_cb; 114 MppExtCbCtx pkt_rdy_ctx; 115 RK_S32 pkt_rdy_cmd; 116 117 /* notify frame ready for output */ 118 MppExtCbFunc frm_rdy_cb; 119 MppExtCbCtx frm_rdy_ctx; 120 RK_S32 frm_rdy_cmd; 121 } MppDecCbCfg; 122 123 typedef struct MppDecStatusCfg_t { 124 RK_U32 hal_support_fast_mode; 125 RK_U32 hal_task_count; 126 RK_U32 vproc_task_count; 127 } MppDecStatusCfg; 128 129 typedef struct MppDecCfgSet_t { 130 MppDecBaseCfg base; 131 MppDecStatusCfg status; 132 MppDecCbCfg cb; 133 } MppDecCfgSet; 134 135 #ifdef __cplusplus 136 extern "C" { 137 #endif 138 139 rk_s32 mpp_dec_cfg_set_default(void *entry, KmppObj obj, const char *caller); 140 141 #ifdef __cplusplus 142 } 143 #endif 144 145 #endif /* __MPP_DEC_CFG_H__ */ 146