1 //<MStar Software>
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77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
79 //
80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
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92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95 ///////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// drvMVOP.c
98 /// @brief MPEG Video Output Processor (MVOP)
99 /// @author MStarSemi Inc.
100 ///
101 /// Display controller(DC) unit (also called Video Output Processor(VOP)).
102 /// DC read DRAM MVD decode data and send it to back-end processor.
103 /// The frame rate could be programmed by registers.
104 /// The sync. generator(SG) generates the SYNC signal like HSYNC, VSYNC, FIELD.
105 /// It also generate the standard CCIR656 data.
106 ///
107 /// Features
108 /// - Output mode : interlace or progressive
109 /// - Maximum Display resolution 1920x1080
110 /// - Support MVD interlace or progressive YUV420 image
111 /// - one read channel to MIU , each request always work with 16 words( 8Y8UV)
112 /// - high MIU read priority when UV buffer data depth under 32 or 16.
113 /// - CCIR656 support
114 /// - Horizontal, Vertical duplicate support.
115 /// - MVD Image size resize mode
116 ///
117 ///////////////////////////////////////////////////////////////////////////////////////////////////
118
119
120 //-------------------------------------------------------------------------------------------------
121 // Include Files
122 //-------------------------------------------------------------------------------------------------
123 // Common Definition
124 #include "MsCommon.h"
125 #include "MsVersion.h"
126 #include "MsDevice.h"
127 #include "utopia.h"
128 #ifdef MSOS_TYPE_LINUX_KERNEL
129 #include <linux/string.h>
130 #include <linux/uaccess.h>
131 #else
132 #include <string.h>
133 #endif
134 #include "drvMVOP.h"
135
136 // Internal Definition
137 #include "regMVOP.h"
138
139 #define MVOP_ENABLE_LINK_WEAK_SYMBOL 1
140 #if MVOP_ENABLE_LINK_WEAK_SYMBOL
141 #include "_drvMVOP_weak.h"
142 #else
143 #include "halMVOP.h"
144 #endif
145
146 #if ENABLE_UTOPIA2_INTERFACE
147 #include "drvMVOP_v2.h"
148 #include "utopia.h"
149 #endif
150
151 #include "drvMMIO.h"
152 #include "drvMIU.h"
153 #include "osalMVOP.h"
154 #include "drvSYS.h"
155 #include "utopia_dapi.h"
156 //-------------------------------------------------------------------------------------------------
157 // Driver Compiler Options
158 //-------------------------------------------------------------------------------------------------
159 //#define _ENABLE_DC1_FRAMESYNC //Notice: Scaler should disable auto-detection when using this.
160
161
162 //-------------------------------------------------------------------------------------------------
163 // Local Defines
164 //-------------------------------------------------------------------------------------------------
165 #define ENABLE_EXTRA_BLANKING 0
166 // define MAX blanking area reserved for video shift down right for frame bufferless usage
167 #if ENABLE_EXTRA_BLANKING
168 #define EXTRA_H_BLANKING 0
169 #define EXTRA_V_BLANKING 64
170 #else
171 #define EXTRA_H_BLANKING 0
172 #define EXTRA_V_BLANKING 0
173 #endif
174
175 #define MVOP_VBlank_Min 45
176 #define MVOP_HBlank_Min 32
177 //for variable v/h blanking
178 #if 0
179 #define MVOP_VBlank 45
180 #define MVOP_HBlank_SD 200
181 #define MVOP_HBlank_HD 300
182 #endif
183 #define DC_BaseClock 86400 //86.4*1000
184
185 #define HSize_4K 3840
186 #define VSize_4K 2160
187 #define FrameRate_60000 60000
188 #define FrameRate_59940 59940
189 #define FrameRate_50000 50000
190 #define FrameRate_48000 48000
191 #define FrameRate_30000 30000
192 #define FrameRate_29970 29970
193 #define FrameRate_25000 25000
194 #define FrameRate_24000 24000
195 #define FrameRate_23976 23976
196
197 #define Optimized_VBlank_4K_60000 53
198 #define Optimized_VBlank_4K_59940 70
199 #define Optimized_VBlank_4K_50000 340
200 #define Optimized_VBlank_4K_48000 282
201 #define Optimized_VBlank_4K_23976 257
202
203 #define MIN_MVOP_FREQ 27000000ul
204 #define MAX_MVOP_FREQ 86400000ul
205 #define MVOP_FREQ_144M 144000000ul
206 #define MVOP_FREQ_160M 160000000ul
207 #define MVOP_FREQ_320M 320000000ul
208 #define MIN_MVOP_FREERUN_FREQ 31000000ul
209 #if defined(STB_DC_MODE)||(STB_DC)
210 #define STB_OUTPUT_MAX_FPS 60000
211 #endif
212
213 #define MVOP_MIN_FRAMERATE 1000 //1 frame/second
214
215 #define MVOP_VBlank_Min_P 20
216 #define MVOP_VBlank_Min_I 35
217
218 #define ALIGN_UPTO_16(x) ((((x) + 15) >> 4) << 4)
219 #define ALIGN_UPTO_4(x) ((((x) + 3) >> 2) << 2)
220 #define ALIGN_UPTO_2(x) ((((x) + 1) >> 1) << 1)
221 #define ALIGN_DOWNTO_8(x) (((x) >> 3) << 3)
222 #define ALIGN_DOWNTO_4(x) (((x) >> 2) << 2)
223
224 #ifndef UNUSED
225 #define UNUSED(x) (void)(x)
226 #endif
227
228 #if 1
229 #include "ULog.h"
230 #define DMVOP_PRINTF(format, args...) ULOGD("Utopia", format, ##args)
231 #define IMVOP_PRINTF(format, args...) ULOGI("Utopia", format, ##args)
232 #define EMVOP_PRINTF(format, args...) ULOGE("Utopia", format, ##args)
233 #define MVOP_PRINTF(format, args...) ULOGE("Utopia", format, ##args)
234 #else
235
236 #ifndef ANDROID
237 #define MVOP_PRINTF printf
238 #else
239 #include <sys/mman.h>
240 #include <cutils/ashmem.h>
241 #include <cutils/log.h>
242
243 #define MVOP_PRINTF ALOGD
244 #endif
245 #endif
246
247 //-------------------------------------------------------------------------------------------------
248 // Local Structurs
249 //-------------------------------------------------------------------------------------------------
250
251
252 //-------------------------------------------------------------------------------------------------
253 // Global Variables
254 //-------------------------------------------------------------------------------------------------
255 MS_U16 MVOP_HBlank_HD = 300;
256 MS_U16 MVOP_HBlank_SD = 200;
257 MS_U16 MVOP_VBlank = 45;
258 MS_BOOL EnablePresetTable = FALSE;
259 //-------------------------------------------------------------------------------------------------
260 // Local Variables
261 //-------------------------------------------------------------------------------------------------
262 /// Version string
263 static MSIF_Version _drv_mvop_version =
264 {
265 .DDI = { MVOP_DRV_VERSION },
266 };
267
268 typedef MS_BOOL (*HAL_SetU16Para)(MS_U16 u16Para);
269 typedef void (*HAL_RegSetBase)(MS_VIRT u32Base);
270
271 typedef struct __attribute__((packed))
272 {
273 MVOP_DrvStatus _stMVOPDrvStat;
274 MVOP_Timing _mvopTiming;
275 MS_U16 _u16FixVtt;
276 MS_U16 _u16SrcHSize; //source width (may be unaligned)
277 MS_U16 _u16SrcVSize; //source height(may be unaligned)
278 MS_U16 _u16InsVBlank; //inserted V-Blank between 3D L & R
279 MS_BOOL _bEnableFreerunMode;
280 MS_BOOL _bEnMinVSize576; //used by MVOP_AutoGenMPEGTiming
281 MS_BOOL _bEnVSizeDup; //used by MVOP_AutoGenMPEGTiming
282 MS_BOOL _bEnVSizex4Dup; //used by MVOP_AutoGenMPEGTiming
283 MS_BOOL _bEnHSizex4Dup; //used by MVOP_AutoGenMPEGTiming
284 MVOP_RgbFormat _eRgbFmt;
285 MVOP_InputSel _eInputSel;
286 HAL_SetU16Para _fpHalSet3DLRInsVBlank;
287 #if !defined (__aarch64__)
288 MS_U32 u32AlignDummy;
289 #endif
290 MVOP_InputCfg _mvopInputCfg;
291 MVOP_ComdFlag _mvopComdFlag;
292 MVOP_VidStat _mvopOutputCfg;
293 MS_BOOL _bEnHx2Dup;
294 MS_BOOL _bEnHDS;
295 MS_BOOL _bEn265DV;
296 MS_BOOL _bGOPPatch;
297 MS_BOOL _bIsDVDual;
298 }
299 MVOP_DrvCtrlSt;
300
301 static MS_U8 _u8DebugMsgLevel = 0;
302
303 typedef struct __attribute__((packed))
304 {
305 MVOP_DrvCtrlSt _stMVOPDrvCtrl[HAL_MVOP_MODULE_CNT];
306 MVOP_DrvInfo _stMVOPDrvInfo;
307 #if defined(STB_DC_MODE)||(STB_DC)
308 MS_BOOL _bRegSizeFromMVDStatus;
309 MS_U8 reserved8_1[3];
310 MS_U16 _u16Width;
311 MS_U16 _u16Height;
312 #endif
313 MS_U8 _u8DebugMsgLevel;
314 MS_U8 reserved8_0[3];
315 #ifdef SUPPORT_KERNAL_STR
316 MVOP_STR_SAVE_AREA pMVOP_STRPrivate;
317 // if pointer need it
318 //#if !defined (__aarch64__)
319 //MS_U32 u32AlignDummy;
320 //#endif
321 #endif
322 }
323 MVOP_CTX_DRV;
324
325 static MVOP_CTX_DRV *p_gDrvMVOPCtx = NULL;
326 static MVOP_CTX_DRV *p_gDrvSubMVOPCtx = NULL;
327
328 #ifndef MSOS_TYPE_LINUX
329 static MVOP_CTX_DRV g_stmvopDrvCtx;
330 static MVOP_CTX_DRV g_stsubmvopDrvCtx;
331 #endif
332
333
334 #if 0
335 static MVOP_DrvCtrlSt _stMVOPDrvCtrl[HAL_MVOP_MODULE_CNT];
336 static MVOP_DrvInfo _stMVOPDrvInfo;
337 #if STB_DC
338 static MS_BOOL _bRegSizeFromMVDStatus =TRUE;
339 static MS_U16 _u16Width = 0;
340 static MS_U16 _u16Height = 0;
341 #endif
342 #endif
343
344 #define MVOP_GetDrvCtrl(_eDevID) ((_eDevID < HAL_MVOP_MODULE_CNT) ? (&p_gDrvMVOPCtx->_stMVOPDrvCtrl[(_eDevID)]) : NULL)
345 #define MVOP_GetSubDrvCtrl(_eDevID) ((_eDevID < HAL_MVOP_MODULE_CNT) ? (&p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[(_eDevID)]) : NULL)
346
347 #define MVOP_IsInit()((NULL == p_gDrvMVOPCtx)?FALSE:(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._stMVOPDrvStat.bIsInit == TRUE))
348 #define MVOP_CheckIsInit() \
349 do { \
350 if (!MVOP_IsInit()) \
351 { \
352 MVOP_DBG(MVOP_PRINTF("%s: drvMVOP is not init!\n", __FUNCTION__);) \
353 return; \
354 } \
355 } while(0)
356
357 #if 1//MVOP_SUPPORT_SUB
358 #define MVOP_SubIsInit()(((MVOP_SUPPORT_SUB == 1) && (NULL !=p_gDrvSubMVOPCtx))?(p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._stMVOPDrvStat.bIsInit == TRUE):FALSE)
359 #define MVOP_SubCheckIsInit() \
360 do { \
361 if (!MVOP_SubIsInit()) \
362 { \
363 MVOP_DBG(MVOP_PRINTF("%s: drvMVOPSub is not init!\n", __FUNCTION__);) \
364 return; \
365 } \
366 } while(0)
367 #define MVOP_SubCheckIsInit_RetZero() \
368 do { \
369 if (!MVOP_SubIsInit()) \
370 { \
371 MVOP_DBG(MVOP_PRINTF("%s: drvMVOPSub is not init!\n", __FUNCTION__);) \
372 return 0; \
373 } \
374 } while(0)
375 #endif
376
377 #if 1//MVOP_SUPPORT_3RD
378 #define MVOP_EX_IsInit(_eDevID) (((MVOP_GetDrvCtrl(_eDevID))&&(NULL != p_gDrvMVOPCtx)) ? (p_gDrvMVOPCtx->_stMVOPDrvCtrl[_eDevID]._stMVOPDrvStat.bIsInit == TRUE) : FALSE)
379 #define MVOP_EX_CheckIsInit(_eDevID) \
380 do { \
381 if (!MVOP_EX_IsInit(_eDevID)) \
382 { \
383 MVOP_DBG(MVOP_PRINTF("%s: drvMVOP3rd is not init!\n", __FUNCTION__);) \
384 return E_MVOP_NOT_INIT; \
385 } \
386 } while(0)
387 #endif
388
389 typedef enum
390 {
391 E_MVOP_INIT_OK = 0,
392 E_MVOP_INIT_FAIL = 1,
393 E_MVOP_INIT_ALREADY_EXIST = 2
394 } MVOP_DrvInitCtxResults;
395
396 //Utopia 2.0
397 #define MVOP_MAX_SUPPORT_STREAM_NUM 1
398 void* pu32MVOP_Inst[MVOP_MAX_SUPPORT_STREAM_NUM] = {NULL};
399
400 //Utopia Kernel Mode
401 #ifdef MVOP_UTOPIA2K
402 #define MVOP_DRIVER_BASE KERNEL_MODE
403 #else
404 #define MVOP_DRIVER_BASE 0
405 #endif
406
407 //-------------------------------------------------------------------------------------------------
408 // Debug Functions
409 //-------------------------------------------------------------------------------------------------
410 #if 1
411 #define MVOP_DBG(x) if (_u8DebugMsgLevel>0) { D##x };
412 #define MVOP_TIMING_DBG(x) if (_u8DebugMsgLevel>1) { D##x };
413 #define MVOP_INPUT_DBG(x) if (_u8DebugMsgLevel>2) { D##x };
414 #define MVOP_DBG_VERBAL(x) if (_u8DebugMsgLevel>3) { D##x };
415 #define MVOP_DBG_TRACE(x) if (_u8DebugMsgLevel>8) { I##x };
416 #define MVOP_ERR(x) { E##x };
417 #else
418 #define MVOP_DBG(x) if (_u8DebugMsgLevel>0) { x };
419 #define MVOP_TIMING_DBG(x) if (_u8DebugMsgLevel>1) { x };
420 #define MVOP_INPUT_DBG(x) if (_u8DebugMsgLevel>2) { x };
421 #define MVOP_DBG_VERBAL(x) if (_u8DebugMsgLevel>3) { x };
422 #define MVOP_DBG_TRACE(x) if (_u8DebugMsgLevel>8) { x };
423 #define MVOP_ERR(x) { x };
424 #endif
425 //---------------------------------- Mutex settings -----------------------------------------
426 #ifdef ENABLE_MUTEX
427 #if MVOP_SUPPORT_SUB
428 static MS_S32 s32MVOPMutexID[HAL_MVOP_MODULE_CNT] = {-1,-1};
429 static MS_U8 _u8MVOP_Mutex[HAL_MVOP_MODULE_CNT][32] = { "MVOP_Mutex","MVOP_SubMutex"};
430 #elif MVOP_SUPPORT_3RD
431 static MS_S32 s32MVOPMutexID[HAL_MVOP_MODULE_CNT] = {-1,-1,-1};
432 static MS_U8 _u8MVOP_Mutex[HAL_MVOP_MODULE_CNT][32] = { "MVOP_Mutex","MVOP_SubMutex","MVOP_3rdMutex" };
433 #else
434 static MS_S32 s32MVOPMutexID[HAL_MVOP_MODULE_CNT] = {-1};
435 static MS_U8 _u8MVOP_Mutex[HAL_MVOP_MODULE_CNT][32] = { "MVOP_Mutex" };
436 #endif
437
438 #define _DRV_MVOP_MutexCreate(_eDevID) \
439 do \
440 { \
441 if (s32MVOPMutexID[_eDevID] < 0) \
442 { \
443 s32MVOPMutexID[_eDevID] = OSAL_MVOP_MutexCreate(_u8MVOP_Mutex[_eDevID]); \
444 } \
445 } while (0)
446
447 #define _DRV_MVOP_MutexDelete(_eDevID) \
448 do \
449 { \
450 if (s32MVOPMutexID[_eDevID] >= 0) \
451 { \
452 OSAL_MVOP_MutexDelete(s32MVOPMutexID[_eDevID]); \
453 s32MVOPMutexID[_eDevID] = -1; \
454 } \
455 } while (0)
456
457 #define _DRV_MVOP_Entry(_eDevID) \
458 do \
459 { \
460 if (s32MVOPMutexID[_eDevID] >= 0) \
461 { \
462 if (!OSAL_MVOP_MutexObtain(s32MVOPMutexID[_eDevID], OSAL_MVOP_MUTEX_TIMEOUT)) \
463 { \
464 MVOP_PRINTF("[HAL MVOP][%06d] Mutex taking timeout\n", __LINE__); \
465 } \
466 } \
467 } while (0)
468
469 #define _DRV_MVOP_Return(_eDevID,_ret_) \
470 do \
471 { \
472 if (s32MVOPMutexID[_eDevID] >= 0) \
473 { \
474 OSAL_MVOP_MutexRelease(s32MVOPMutexID[_eDevID]); \
475 } \
476 return _ret_; \
477 } while(0)
478
479 #define _DRV_MVOP_Release(_eDevID) \
480 do \
481 { \
482 if (s32MVOPMutexID[_eDevID] >= 0) \
483 { \
484 OSAL_MVOP_MutexRelease(s32MVOPMutexID[_eDevID]); \
485 } \
486 } while (0)
487
488 #else
489
490 #define _DRV_MVOP_MutexCreate(_eDevID)
491 #define _DRV_MVOP_MutexDelete(_eDevID)
492 #define _DRV_MVOP_Entry(_eDevID)
493 #define _DRV_MVOP_Return(_eDevID,_ret) {return _ret;}
494 #define _DRV_MVOP_Release(_eDevID)
495
496 #endif
497 //-------------------------------------------------------------------------------------------------
498 // Local Functions
499 //-------------------------------------------------------------------------------------------------
_MVOP_SubInit_Context(MS_BOOL * pbFirstDrvInstant)500 MVOP_DrvInitCtxResults _MVOP_SubInit_Context(MS_BOOL *pbFirstDrvInstant)
501 {
502 MS_BOOL bNeedInitShared = FALSE;
503
504 if (p_gDrvSubMVOPCtx)
505 {
506 // The context instance has been created already
507 // before somewhere sometime in the same process.
508 *pbFirstDrvInstant = bNeedInitShared;
509 return E_MVOP_INIT_OK;
510 }
511
512 #if defined(MSOS_TYPE_LINUX) || defined(MSOS_TYPE_LINUX_KERNEL)
513
514 MS_U32 u32ShmId;
515 MS_VIRT u32Addr;
516 MS_U32 u32BufSize;
517
518 //MsOS_SHM_Init(); init in msos_init
519 if (FALSE == MsOS_SHM_GetId((MS_U8*)"Linux Sub MVOP DRV driver", sizeof(MVOP_CTX_DRV), &u32ShmId, &u32Addr, &u32BufSize, MSOS_SHM_QUERY))
520 {
521 if (FALSE == MsOS_SHM_GetId((MS_U8*)"Linux Sub MVOP DRV driver", sizeof(MVOP_CTX_DRV), &u32ShmId, &u32Addr, &u32BufSize, MSOS_SHM_CREATE))
522 {
523 MVOP_DBG(MVOP_PRINTF("MVOP: SHM allocation failed!\n"););
524
525 return E_MVOP_INIT_FAIL;
526 }
527 else
528 {
529 #if defined (__aarch64__)
530 MVOP_DBG(MVOP_PRINTF("MVOP: [%s][%d] This is first initial 0x%lx\n", __FUNCTION__, __LINE__, u32Addr););
531 #else
532 MVOP_DBG(MVOP_PRINTF("MVOP: [%s][%d] This is first initial 0x%x\n", __FUNCTION__, __LINE__, (int)u32Addr););
533 #endif
534 //memset((MS_U8 *)u32Addr, 0, sizeof(MVOP_CTX_DRV));
535 bNeedInitShared = TRUE;
536 p_gDrvSubMVOPCtx = (MVOP_CTX_DRV *)u32Addr;
537 memset(p_gDrvSubMVOPCtx, 0, sizeof(*p_gDrvMVOPCtx));
538 }
539 }
540 else
541 {
542 p_gDrvSubMVOPCtx = (MVOP_CTX_DRV *)u32Addr;
543 bNeedInitShared = TRUE;
544 *pbFirstDrvInstant = bNeedInitShared;
545
546 return E_MVOP_INIT_ALREADY_EXIST;
547 }
548 #else
549 p_gDrvSubMVOPCtx = &g_stsubmvopDrvCtx;
550 bNeedInitShared = TRUE;
551 #endif
552 *pbFirstDrvInstant = bNeedInitShared;
553 if (bNeedInitShared)
554 {
555 memset(p_gDrvSubMVOPCtx, 0, sizeof(*p_gDrvMVOPCtx));
556 }
557 //init MVOP Value
558
559 return E_MVOP_INIT_OK;
560 }
561
562 #if MVOP_SUPPORT_SUB
_MVOP_SubInitVar(MVOP_DevID eID)563 static void _MVOP_SubInitVar(MVOP_DevID eID)
564 {
565 if (NULL == p_gDrvSubMVOPCtx)
566 {
567 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
568 return;
569 }
570 MVOP_DrvCtrlSt* pstDrvCtrl = MVOP_GetSubDrvCtrl(eID);
571 MVOP_DrvStatus* pstDrvStat = NULL;
572 #if defined(STB_DC_MODE)||(STB_DC)
573 p_gDrvSubMVOPCtx->_bRegSizeFromMVDStatus =TRUE;
574 p_gDrvSubMVOPCtx->_u16Width = 0;
575 p_gDrvSubMVOPCtx->_u16Height = 0;
576 #endif
577 //p_gDrvMVOPCtx->_u8DebugMsgLevel = &_u8DebugMsgLevel_tmp;
578
579 if (pstDrvCtrl)
580 {
581 pstDrvStat = &pstDrvCtrl->_stMVOPDrvStat;
582 pstDrvStat->bIsInit = FALSE;
583 pstDrvStat->bIsEnable = FALSE;
584 pstDrvStat->bIsUVShift = FALSE;
585 pstDrvStat->bIsBlackBG = FALSE;
586 pstDrvStat->bIsMonoMode = FALSE;
587 pstDrvStat->bIsSetTiming = FALSE;
588 pstDrvCtrl->_bEnableFreerunMode = FALSE;
589 pstDrvCtrl->_bEnMinVSize576 = TRUE;
590 pstDrvCtrl->_bEnVSizeDup = FALSE;
591 pstDrvCtrl->_bEnVSizex4Dup = FALSE;
592 pstDrvCtrl->_bEnHSizex4Dup = FALSE;
593 pstDrvCtrl->_u16FixVtt = 0;
594 memset(&pstDrvCtrl->_mvopTiming, 0, sizeof(MVOP_Timing));
595 pstDrvCtrl->_u16SrcHSize = 0;
596 pstDrvCtrl->_u16SrcVSize = 0;
597 pstDrvCtrl->_u16InsVBlank= 0;
598 pstDrvCtrl->_eRgbFmt = E_MVOP_RGB_NONE;
599 pstDrvCtrl->_eInputSel = MVOP_INPUT_UNKNOWN;
600 memset(&pstDrvCtrl->_mvopOutputCfg, 0, sizeof(MVOP_VidStat));
601 pstDrvCtrl->_bEnHx2Dup = FALSE;
602 pstDrvCtrl->_bEnHDS = FALSE;
603 pstDrvCtrl->_bEn265DV = FALSE;
604 pstDrvCtrl->_bGOPPatch = TRUE;
605 pstDrvCtrl->_bIsDVDual = TRUE;
606
607 #if SUPPORT_3DLR_INST_VBLANK
608 HAL_SetU16Para fpSetU16Para = NULL;
609 switch (eID)
610 {
611 case E_MVOP_DEV_0:
612 fpSetU16Para = HAL_MVOP_Set3DLRInsVBlank;
613 break;
614 case E_MVOP_DEV_1:
615 fpSetU16Para = HAL_MVOP_SubSet3DLRInsVBlank;
616 break;
617 case E_MVOP_DEV_2:
618 fpSetU16Para = HAL_MVOP_EX_Set3DLRInsVBlank;
619 break;
620 default:
621 fpSetU16Para = HAL_MVOP_Set3DLRInsVBlank;
622 break;
623 }
624 pstDrvCtrl->_fpHalSet3DLRInsVBlank = fpSetU16Para;
625 #endif
626 }
627 }
628 #endif
629
_MVOP_Init_Context(MS_BOOL * pbFirstDrvInstant)630 MVOP_DrvInitCtxResults _MVOP_Init_Context(MS_BOOL *pbFirstDrvInstant)
631 {
632 MS_BOOL bNeedInitShared = FALSE;
633
634 #if 0
635 if (p_gDrvMVOPCtx)
636 {
637 // The context instance has been created already
638 // before somewhere sometime in the same process.
639 *pbFirstDrvInstant = bNeedInitShared;
640 return E_MVOP_INIT_OK;
641 }
642 #endif
643
644 #if defined(MSOS_TYPE_LINUX) || defined(MSOS_TYPE_LINUX_KERNEL)
645
646 MS_U32 u32ShmId;
647 MS_VIRT u32Addr;
648 MS_U32 u32BufSize;
649
650 //MsOS_SHM_Init(); init in msos_init
651 if (FALSE == MsOS_SHM_GetId((MS_U8*)"Linux MVOP DRV driver", sizeof(MVOP_CTX_DRV), &u32ShmId, &u32Addr, &u32BufSize, MSOS_SHM_QUERY))
652 {
653 if (FALSE == MsOS_SHM_GetId((MS_U8*)"Linux MVOP DRV driver", sizeof(MVOP_CTX_DRV), &u32ShmId, &u32Addr, &u32BufSize, MSOS_SHM_CREATE))
654 {
655 MVOP_DBG(MVOP_PRINTF("MVOP: SHM allocation failed!\n"););
656
657 return E_MVOP_INIT_FAIL;
658 }
659 else
660 {
661 #if defined (__aarch64__)
662 MVOP_DBG(MVOP_PRINTF("MVOP: [%s][%d] This is first initial 0x%lx\n", __FUNCTION__, __LINE__, u32Addr););
663 #else
664 MVOP_DBG(MVOP_PRINTF("MVOP: [%s][%d] This is first initial 0x%x\n", __FUNCTION__, __LINE__, (int)u32Addr););
665 #endif
666 //memset( (MS_U8*)u32Addr, 0, sizeof(MVOP_CTX_DRV));
667 bNeedInitShared = TRUE;
668 p_gDrvMVOPCtx = (MVOP_CTX_DRV *)u32Addr;
669 memset(p_gDrvMVOPCtx, 0, sizeof(*p_gDrvMVOPCtx));
670 }
671 }
672 else
673 {
674 MVOP_DBG(MVOP_PRINTF("MVOP: Not first initialized\n");)
675 p_gDrvMVOPCtx = (MVOP_CTX_DRV *)u32Addr;
676 bNeedInitShared = FALSE;
677 *pbFirstDrvInstant = bNeedInitShared;
678
679 return E_MVOP_INIT_ALREADY_EXIST;
680 }
681 #else
682 p_gDrvMVOPCtx = &g_stmvopDrvCtx;
683 bNeedInitShared = TRUE;
684 #endif
685 *pbFirstDrvInstant = bNeedInitShared;
686 if (bNeedInitShared)
687 {
688 memset(p_gDrvMVOPCtx, 0, sizeof(*p_gDrvMVOPCtx));
689 }
690
691 return E_MVOP_INIT_OK;
692 }
693
_MVOP_InitVar(MVOP_DevID eID)694 static void _MVOP_InitVar(MVOP_DevID eID)
695 {
696 if (NULL == p_gDrvMVOPCtx)
697 {
698 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
699 return;
700 }
701 MVOP_DrvCtrlSt* pstDrvCtrl = MVOP_GetDrvCtrl(eID);
702 MVOP_DrvStatus* pstDrvStat = NULL;
703 #if defined(STB_DC_MODE)||(STB_DC)
704 p_gDrvMVOPCtx->_bRegSizeFromMVDStatus =TRUE;
705 p_gDrvMVOPCtx->_u16Width = 0;
706 p_gDrvMVOPCtx->_u16Height = 0;
707 #endif
708 //p_gDrvMVOPCtx->_u8DebugMsgLevel = &_u8DebugMsgLevel_tmp;
709
710 if (pstDrvCtrl)
711 {
712 pstDrvStat = &pstDrvCtrl->_stMVOPDrvStat;
713 pstDrvStat->bIsInit = FALSE;
714 pstDrvStat->bIsEnable = FALSE;
715 pstDrvStat->bIsUVShift = FALSE;
716 pstDrvStat->bIsBlackBG = FALSE;
717 pstDrvStat->bIsMonoMode = FALSE;
718 pstDrvStat->bIsSetTiming = FALSE;
719 pstDrvCtrl->_bEnableFreerunMode = FALSE;
720 pstDrvCtrl->_bEnMinVSize576 = TRUE;
721 pstDrvCtrl->_bEnVSizeDup = FALSE;
722 pstDrvCtrl->_bEnVSizex4Dup = FALSE;
723 pstDrvCtrl->_bEnHSizex4Dup = FALSE;
724 pstDrvCtrl->_u16FixVtt = 0;
725 memset(&pstDrvCtrl->_mvopTiming, 0, sizeof(MVOP_Timing));
726 pstDrvCtrl->_u16SrcHSize = 0;
727 pstDrvCtrl->_u16SrcVSize = 0;
728 pstDrvCtrl->_u16InsVBlank= 0;
729 pstDrvCtrl->_eRgbFmt = E_MVOP_RGB_NONE;
730 pstDrvCtrl->_eInputSel = MVOP_INPUT_UNKNOWN;
731 memset(&pstDrvCtrl->_mvopOutputCfg, 0, sizeof(MVOP_VidStat));
732 pstDrvCtrl->_bEnHx2Dup = FALSE;
733 pstDrvCtrl->_bGOPPatch = TRUE;
734 pstDrvCtrl->_bIsDVDual = TRUE;
735
736 #if SUPPORT_3DLR_INST_VBLANK
737 HAL_SetU16Para fpSetU16Para = NULL;
738 switch (eID)
739 {
740 case E_MVOP_DEV_0:
741 fpSetU16Para = HAL_MVOP_Set3DLRInsVBlank;
742 break;
743 case E_MVOP_DEV_1:
744 fpSetU16Para = HAL_MVOP_SubSet3DLRInsVBlank;
745 break;
746 case E_MVOP_DEV_2:
747 fpSetU16Para = HAL_MVOP_EX_Set3DLRInsVBlank;
748 break;
749 default:
750 fpSetU16Para = HAL_MVOP_Set3DLRInsVBlank;
751 break;
752 }
753 pstDrvCtrl->_fpHalSet3DLRInsVBlank = fpSetU16Para;
754 #endif
755 }
756 }
757
MVOP_SetRegBaseAdd(HAL_RegSetBase fpRegSetBase)758 static MS_BOOL MVOP_SetRegBaseAdd(HAL_RegSetBase fpRegSetBase)
759 {
760 MS_VIRT u32NonPMBankAdd;
761 MS_PHY u32NonPMBankSize;
762
763 if (TRUE == MDrv_MMIO_GetBASE(&u32NonPMBankAdd, &u32NonPMBankSize, MS_MODULE_MVOP))
764 {
765 #if defined (__aarch64__)
766 MVOP_DBG(MVOP_PRINTF("%s u32RiuBaseAdd = %lx\n", __FUNCTION__, u32NonPMBankAdd););
767 #else
768 MVOP_DBG(MVOP_PRINTF("%s u32RiuBaseAdd = %x\n", __FUNCTION__, (int)u32NonPMBankAdd););
769 #endif
770
771 if (fpRegSetBase)
772 {
773 fpRegSetBase(u32NonPMBankAdd);
774 return TRUE;
775 }
776 else
777 {
778 MVOP_DBG(MVOP_PRINTF("%s IOMap failure due to null fptr\n", __FUNCTION__););
779 }
780 }
781 else
782 {
783 MVOP_DBG(MVOP_PRINTF("%s IOMap failure due to MDrv_MMIO_GetBASE\n", __FUNCTION__););
784 }
785 return FALSE;
786 }
787
MVOP_CalculateHSize(MS_U16 * pu16SrcHSize,MS_U16 u16OriHSize,MS_U16 u16HOffset)788 static MS_U16 MVOP_CalculateHSize(MS_U16* pu16SrcHSize, MS_U16 u16OriHSize, MS_U16 u16HOffset)
789 {
790 MS_U16 u16HSize = 0;
791
792 if (pu16SrcHSize == NULL)
793 {
794 return 0;
795 }
796
797 #if (MVOP_BUS_WIDTH == _MVOP_128BIT_BUS)
798 {
799 u16HSize = ALIGN_UPTO_16(u16OriHSize);
800 if (u16HSize != u16OriHSize)
801 {
802 *pu16SrcHSize = u16OriHSize;
803 }
804 }
805 #else
806 {
807 u16HSize = ALIGN_DOWNTO_8(u16OriHSize);
808 }
809 #endif
810
811 #ifdef _SUPPORT_IMG_OFFSET_
812 u16HSize += (u16HOffset * 2);
813 #endif
814
815 return u16HSize;
816 }
817
MVOP_NeedAdjustVSize(MVOP_DevID eID)818 static MS_BOOL MVOP_NeedAdjustVSize(MVOP_DevID eID)
819 {
820 MVOP_DrvMirror eMir = E_VOPMIRROR_NONE;
821 MVOP_DrvCtrlSt* pstDrvCtrl = NULL;
822 MS_BOOL bNeedAdjust = FALSE;
823
824 if(eID == E_MVOP_DEV_0)
825 {
826 if (NULL == p_gDrvMVOPCtx)
827 {
828 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
829 return FALSE;
830 }
831 }
832 else if(eID == E_MVOP_DEV_1)
833 {
834 if (NULL == p_gDrvSubMVOPCtx)
835 {
836 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
837 return FALSE;
838 }
839 }
840 if(eID == E_MVOP_DEV_0)
841 pstDrvCtrl = MVOP_GetDrvCtrl(eID);
842 else if(eID ==E_MVOP_DEV_1)
843 pstDrvCtrl = MVOP_GetSubDrvCtrl(eID);
844
845 if (NULL == pstDrvCtrl)
846 {
847 MVOP_DBG(MVOP_PRINTF("%s null pstDrvCtrl for eID=%x\n", __FUNCTION__, eID););
848 return bNeedAdjust;
849 }
850
851 if (HAL_MVOP_GetMirrorMode)
852 {
853 eMir = HAL_MVOP_GetMirrorMode(eID);
854 }
855
856 //For MCU mode and VMirror is on, VSize need to be 4 multiple.
857 bNeedAdjust = ( ((MVOP_INPUT_DRAM == pstDrvCtrl->_eInputSel) ||
858 (MVOP_INPUT_DRAM_3DLR == pstDrvCtrl->_eInputSel)) &&
859 ((E_VOPMIRROR_VERTICAL == eMir) || (E_VOPMIRROR_HVBOTH == eMir)) );
860
861 return bNeedAdjust;
862 }
863
MVOP_CalculateVSize(MVOP_DevID eID,MS_U16 * pu16SrcVSize,MS_U16 u16OriVSize,MS_U16 u16VOffset)864 static MS_U16 MVOP_CalculateVSize(MVOP_DevID eID, MS_U16* pu16SrcVSize, MS_U16 u16OriVSize, MS_U16 u16VOffset)
865 {
866 MS_U16 u16VSize = 0;
867
868 if (pu16SrcVSize == NULL)
869 {
870 return 0;
871 }
872
873 if (TRUE == MVOP_NeedAdjustVSize(eID))
874 {
875 u16VSize = ALIGN_UPTO_4(u16OriVSize);
876 if (u16VSize != u16OriVSize)
877 {
878 *pu16SrcVSize = u16OriVSize;
879 }
880 MVOP_DBG(MVOP_PRINTF("%s %d %d\n", __FUNCTION__, u16OriVSize, u16VSize););
881 }
882 else
883 {
884 u16VSize = u16OriVSize;
885 }
886
887 #ifdef _SUPPORT_IMG_OFFSET_
888 u16VSize += (u16VOffset * 2);
889 #endif
890
891 return u16VSize;
892 }
893
894 //-------------------------------------------------------------------------------------------------
895 // Calculate MaxFactor.
896 // @return MaxFactor
897 //-------------------------------------------------------------------------------------------------
_MaxFactor(MS_U32 u32Num1,MS_U32 u32Num2)898 static MS_U32 _MaxFactor(MS_U32 u32Num1, MS_U32 u32Num2)
899 {
900 MS_U32 remainder, quotient;
901
902 #if defined (__aarch64__)
903 MVOP_DBG_VERBAL(MVOP_PRINTF("u32Num1=%x u32Num2=%x\n", u32Num1, u32Num2);)
904 #else
905 MVOP_DBG_VERBAL(MVOP_PRINTF("u32Num1=%x u32Num2=%x\n", (int)u32Num1, (int)u32Num2);)
906 #endif
907 MS_ASSERT(u32Num1 != 0);
908 if (u32Num1 == 0) //no need to check u32Num2 because u32Num2 is always 86400
909 {
910 MVOP_ERR(MVOP_PRINTF("%s(%d): invalid parameter!\n", __FILE__, __LINE__);)
911 return 0; //to avoid infinite loop
912 }
913
914 while (1)
915 {
916 if (u32Num1 > u32Num2)
917 {
918 if ((u32Num1%u32Num2) == 0)
919 {
920 #if defined (__aarch64__)
921 MVOP_DBG_VERBAL(MVOP_PRINTF("ret0 u32Num1=%x u32Num2=%x\n", u32Num1, u32Num2);)
922 #else
923 MVOP_DBG_VERBAL(MVOP_PRINTF("ret0 u32Num1=%x u32Num2=%x\n", (int)u32Num1, (int)u32Num2);)
924 #endif
925 return u32Num2;
926 }
927 else
928 {
929 quotient = u32Num1/u32Num2;
930 remainder = u32Num1- (u32Num2*quotient);
931
932 u32Num1= u32Num2;
933 u32Num2= remainder;
934 }
935 }
936 else
937 {
938 if ((u32Num2%u32Num1) == 0)
939 {
940 #if defined (__aarch64__)
941 MVOP_DBG_VERBAL(MVOP_PRINTF("ret1 u32Num1=%x u32Num2=%x\n", u32Num1, u32Num2);)
942 #else
943 MVOP_DBG_VERBAL(MVOP_PRINTF("ret1 u32Num1=%x u32Num2=%x\n", (int)u32Num1, (int)u32Num2);)
944 #endif
945 return u32Num1;
946 }
947 else
948 {
949 quotient = u32Num2/u32Num1;
950 remainder = u32Num2 - (u32Num1*quotient);
951
952 u32Num2 = u32Num1;
953 u32Num1 = remainder;
954 }
955 }
956 }
957 }
958
MVOP_GetMaxVOffset(MVOP_DevID eID,HALMVOPFREQUENCY eFreq,MS_U16 u16HSize,MS_U16 u16VSize,MS_U16 u16Fps)959 static MS_U16 MVOP_GetMaxVOffset(MVOP_DevID eID, HALMVOPFREQUENCY eFreq, MS_U16 u16HSize, MS_U16 u16VSize, MS_U16 u16Fps)
960 {
961 MS_U16 u16VttMax, u16OffsetMax = 0;
962 MS_U16* pu16FixVtt = NULL;
963
964 if(eID >= HAL_MVOP_MODULE_CNT)
965 {
966 MVOP_DBG(MVOP_PRINTF("%s MVOP Device ID is out of MVOP module number\n", __FUNCTION__);)
967 return 0;
968 }
969 else if(eID == E_MVOP_DEV_0)
970 {
971 if (p_gDrvMVOPCtx == NULL)
972 {
973 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
974 return 0;
975 }
976 }
977 #if MVOP_SUPPORT_SUB
978 else if(eID == E_MVOP_DEV_1)
979 {
980 if (p_gDrvSubMVOPCtx == NULL)
981 {
982 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
983 return 0;
984 }
985 }
986 #endif
987
988 else if((u16Fps == 0) || (u16HSize == 0) || (u16VSize == 0))
989 {
990 MVOP_DBG(MVOP_PRINTF("[WARNING]%s framerate/Hsize/Vsize is 0\n", __FUNCTION__);)
991 return 0;
992 }
993
994 if(eID == E_MVOP_DEV_0)
995 pu16FixVtt = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._u16FixVtt;
996 #if MVOP_SUPPORT_SUB
997 else if(eID == E_MVOP_DEV_1)
998 pu16FixVtt = &p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[eID]._u16FixVtt;
999 #endif
1000
1001 if(pu16FixVtt == NULL)
1002 {
1003 MVOP_ERR(MVOP_PRINTF("Err: FATAL deference problem in MVOP_EX_AutoGenTiming[%d]!\n",__LINE__);)
1004 return 0; //CID 53640
1005 }
1006 if(*pu16FixVtt > 0)
1007 {
1008 u16VttMax = *pu16FixVtt;
1009 }
1010 else
1011 {
1012 u16VttMax = eFreq / u16Fps*1000 / (u16HSize + MVOP_HBlank_HD);
1013 }
1014 if(u16VttMax < (MVOP_VBlank + u16VSize))
1015 {
1016 MVOP_DBG(MVOP_PRINTF("[WARNING]%s The mvop clk is not support\n", __FUNCTION__);)
1017 return 0;
1018 }
1019 u16OffsetMax = (u16VttMax - MVOP_VBlank - u16VSize)/2;
1020
1021 //MVOP_PRINTF("V_OffsetMax=%d\n", u16OffsetMax);
1022 return u16OffsetMax;
1023 }
1024
MVOP_EX_AutoGenTiming(MVOP_DevID eID,MVOP_Timing * pVOPTiming,MVOP_VidStat * pstVideoStatus,HALMVOPFREQUENCY eClkFreq,MS_BOOL bEn3DLR)1025 static void MVOP_EX_AutoGenTiming(MVOP_DevID eID,
1026 MVOP_Timing *pVOPTiming,
1027 MVOP_VidStat *pstVideoStatus,
1028 HALMVOPFREQUENCY eClkFreq,
1029 MS_BOOL bEn3DLR)
1030 {
1031 MS_U16 u16HSize;
1032 MS_U16 u16VSize;
1033 MS_U16 bInterlace;
1034 MS_U16 VB0, VB1;
1035 MS_U16 u8VSyncOffset = 10;
1036 MS_S16 iVBlank = 0;
1037 MS_U16 *pu16SrcHSize = NULL;
1038 MS_U16 *pu16SrcVSize = NULL;
1039 MS_U16* pu16FixVtt = NULL;
1040
1041 if(eID >= HAL_MVOP_MODULE_CNT)
1042 {
1043 MVOP_DBG(MVOP_PRINTF("%s MVOP Device ID is out of MVOP module number\n", __FUNCTION__);)
1044 return;
1045 }
1046 else if(eID == E_MVOP_DEV_0)
1047 {
1048 if (p_gDrvMVOPCtx == NULL)
1049 {
1050 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
1051 return;
1052 }
1053 }
1054 #if MVOP_SUPPORT_SUB
1055 else if(eID == E_MVOP_DEV_1)
1056 {
1057 if (p_gDrvSubMVOPCtx == NULL)
1058 {
1059 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
1060 return;
1061 }
1062 }
1063 #endif
1064
1065 if(eID == E_MVOP_DEV_0)
1066 {
1067 pu16SrcHSize = & p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._u16SrcHSize;
1068 pu16SrcVSize = & p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._u16SrcVSize;
1069 }
1070 #if MVOP_SUPPORT_SUB
1071 else if(eID == E_MVOP_DEV_1)
1072 {
1073 pu16SrcHSize = & p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[eID]._u16SrcHSize;
1074 pu16SrcVSize = & p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[eID]._u16SrcVSize;
1075 }
1076 #endif
1077
1078 u16HSize = MVOP_CalculateHSize(pu16SrcHSize, pstVideoStatus->u16HorSize, pstVideoStatus->u16HorOffset);
1079 u16VSize = MVOP_CalculateVSize(eID, pu16SrcVSize, pstVideoStatus->u16VerSize, pstVideoStatus->u16VerOffset);
1080 pVOPTiming->u16Width = u16HSize;
1081 pVOPTiming->u16Height = u16VSize;
1082
1083 if(pstVideoStatus->u8Interlace > E_MVOP_PRO)
1084 bInterlace = TRUE;
1085 else
1086 bInterlace = FALSE;
1087
1088 MS_ASSERT(pstVideoStatus->u16FrameRate!=0);
1089 if(pstVideoStatus->u16FrameRate == 0)// for parasoft check divide by zero.
1090 {
1091 return;
1092 }
1093
1094 {
1095 //to avoid (Vtotal-Vde)>(Vde/10) for scaler FBL mode.
1096 if(eID == E_MVOP_DEV_0)
1097 pu16FixVtt = & p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._u16FixVtt;
1098 #if MVOP_SUPPORT_SUB
1099 else if(eID == E_MVOP_DEV_1)
1100 pu16FixVtt = & p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[eID]._u16FixVtt;
1101 #endif
1102
1103 if(pu16FixVtt == NULL)
1104 {
1105 MVOP_ERR(MVOP_PRINTF("Err: FATAL deference problem in MVOP_EX_AutoGenTiming[%d]!\n",__LINE__);)
1106 return;
1107 }
1108 if(*pu16FixVtt > 0)
1109 {
1110 pVOPTiming->u16V_TotalCount = *pu16FixVtt;
1111 *pu16FixVtt = 0;
1112 }
1113 else
1114 {
1115 pVOPTiming->u16V_TotalCount = u16VSize + MVOP_VBlank;
1116 }
1117
1118 pVOPTiming->u16H_TotalCount = (MS_U32)eClkFreq / pstVideoStatus->u16FrameRate
1119 *1000 / pVOPTiming->u16V_TotalCount;
1120 pVOPTiming->u16H_TotalCount = (pVOPTiming->u16H_TotalCount + 0x1) & ~0x1;
1121 pVOPTiming->u16HActive_Start = pVOPTiming->u16H_TotalCount - u16HSize;
1122 //MVOP_PRINTF("=== Htt=%d Has=%d Hsize=%d\n", pVOPTiming->u16H_TotalCount, pVOPTiming->u16HActive_Start, u16HSize);
1123 //Aiken's protection for FBL ZOOM, Horizontal Blanking can not less than MVOP_HBlank_Min
1124 if((int)pVOPTiming->u16HActive_Start < MVOP_HBlank_Min) // avoid unsigned rounding, may be negative
1125 {
1126 MVOP_ERR(MVOP_PRINTF(" Error !! Horizontal Blanking can not less than %d \n", MVOP_HBlank_Min);)
1127 pVOPTiming->u16HActive_Start = MVOP_HBlank_Min;
1128 pVOPTiming->u16H_TotalCount = pVOPTiming->u16HActive_Start + u16HSize;
1129 pVOPTiming->u16V_TotalCount = (MS_U32)eClkFreq / pstVideoStatus->u16FrameRate * 1000 / pVOPTiming->u16H_TotalCount;
1130 iVBlank = pVOPTiming->u16V_TotalCount - u16VSize;
1131 // interlace video need ensure thant VB = VB0 + VB1
1132 // here, also need ensure vop's freqency should less than VOP_FREQ_144M/VOP_FREQ_160M
1133 if(bInterlace && ((iVBlank & 0x1) == 0))
1134 {
1135 pVOPTiming->u16V_TotalCount--;
1136 iVBlank--;
1137 }
1138 if(iVBlank < MVOP_VBlank_Min)
1139 {
1140 MVOP_ERR(MVOP_PRINTF(" Error !! Vertical Blanking can not less than %d \n", MVOP_VBlank_Min);)
1141 u16VSize = u16VSize - (MVOP_VBlank_Min - iVBlank);
1142 pVOPTiming->u16Height = u16VSize;
1143 }
1144 }
1145 #ifdef _SUPPORT_IMG_OFFSET_
1146 pVOPTiming->u16HImg_Start = pVOPTiming->u16HActive_Start + pstVideoStatus->u16HorOffset;
1147 //MVOP_PRINTF("=== His=%d\n", pVOPTiming->u16HImg_Start);
1148 #endif
1149 if(pVOPTiming->u16H_TotalCount >= 4095)
1150 MVOP_PRINTF("[Warning] xc support pVOPTiming->u16H_TotalCount >= 4095 after CL 712803\n");
1151 }
1152
1153 if(pstVideoStatus->u8Interlace > E_MVOP_PRO)
1154 pVOPTiming->bInterlace = TRUE;
1155 else
1156 pVOPTiming->bInterlace = FALSE;
1157
1158 if (bInterlace)
1159 {
1160 VB0 = (pVOPTiming->u16V_TotalCount - u16VSize) / 2 + 1; // VOP_VBlank/2+1 + EXTRA_V_BLANKING/2;
1161 VB1 = VB0 - 1;
1162
1163 if (ENABLE == bEn3DLR)
1164 {
1165 VB1 = VB0;
1166 pVOPTiming->u16V_TotalCount++;
1167 MVOP_DBG(MVOP_PRINTF("%s 3DLR interlace: force VB0=VB1=0x%x, Vtt+1=0x%x\n", __FUNCTION__, VB1, pVOPTiming->u16V_TotalCount);)
1168 }
1169
1170 pVOPTiming->u16VBlank0_Start = 1;
1171 pVOPTiming->u16VBlank0_End = pVOPTiming->u16VBlank0_Start + VB0;
1172 pVOPTiming->u16VBlank1_Start = pVOPTiming->u16VBlank0_End + (u16VSize/2);
1173 pVOPTiming->u16VBlank1_End = pVOPTiming->u16VBlank1_Start + VB1;
1174 }
1175 else
1176 {
1177 VB1 = VB0 = (pVOPTiming->u16V_TotalCount - u16VSize); //VB1 = VB0 for progressive
1178 pVOPTiming->u16VBlank0_Start = 1;
1179 pVOPTiming->u16VBlank0_End = pVOPTiming->u16VBlank0_Start + VB0;
1180 pVOPTiming->u16VBlank1_Start = 1;
1181 pVOPTiming->u16VBlank1_End = pVOPTiming->u16VBlank1_Start + VB1;
1182 }
1183 #ifdef _SUPPORT_IMG_OFFSET_
1184 if (bInterlace)
1185 {
1186 pVOPTiming->u16VImg_Start0 = pVOPTiming->u16VBlank0_End + pstVideoStatus->u16VerOffset/2;
1187 pVOPTiming->u16VImg_Start1 = pVOPTiming->u16VBlank1_End + pstVideoStatus->u16VerOffset/2;
1188 }
1189 else
1190 {
1191 pVOPTiming->u16VImg_Start0 = pVOPTiming->u16VBlank0_End + pstVideoStatus->u16VerOffset;
1192 pVOPTiming->u16VImg_Start1 = pVOPTiming->u16VBlank1_End + pstVideoStatus->u16VerOffset;
1193 }
1194 #endif
1195 pVOPTiming->u16TopField_VS = pVOPTiming->u16VBlank0_Start + u8VSyncOffset;
1196 pVOPTiming->u16BottomField_VS = pVOPTiming->u16VBlank1_Start + u8VSyncOffset;
1197 if (pVOPTiming->bInterlace)
1198 {
1199 //Do not adjust BottomField_VStart for 3D L/R interlace source
1200 if (ENABLE != bEn3DLR)
1201 {
1202 pVOPTiming->u16BottomField_VS -=1;
1203 }
1204 }
1205
1206 pVOPTiming->u16TopField_Start = pVOPTiming->u16TopField_VS;
1207 pVOPTiming->u16BottomField_Start = pVOPTiming->u16BottomField_VS;
1208
1209 // u8Framerate & u16H_Freq will be assigned to g_SrcInfo.*
1210 // in other place and cannot be removed
1211 pVOPTiming->u8Framerate = pstVideoStatus->u16FrameRate/1000;
1212 pVOPTiming->u16ExpFrameRate = pstVideoStatus->u16FrameRate;
1213
1214 // u16H_Freq (unit: 100Hz)
1215 pVOPTiming->u16H_Freq = (MS_U16)
1216 ((MS_U32)pVOPTiming->u16V_TotalCount *
1217 (MS_U32)pstVideoStatus->u16FrameRate/100000);
1218
1219 // for dc1 ...
1220 pVOPTiming->u16Num = 1;
1221 pVOPTiming->u16Den = 1;
1222
1223 MVOP_TIMING_DBG(MVOP_PRINTF("\n>>>>> MVOP_EX output eClkFreq=%d\n", eClkFreq);)
1224 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> w=%d, h=%d, i=%d, fr=%d\n", pVOPTiming->u16Width,
1225 pVOPTiming->u16Height, pVOPTiming->bInterlace, pVOPTiming->u16ExpFrameRate);)
1226 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> hTotal=%d, vTotal=%d\n",
1227 pVOPTiming->u16H_TotalCount, pVOPTiming->u16V_TotalCount);)
1228 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> hActive=%d VB0=%d VB1=%d\n",
1229 pVOPTiming->u16HActive_Start, VB0, VB1);)
1230 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> ImgHSt=%d ImgVSt0=%d ImgVSt1=%d\n", pVOPTiming->u16HImg_Start, pVOPTiming->u16VImg_Start0, pVOPTiming->u16VImg_Start1);)
1231 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> hOffset=%d vOffset=%d\n", pstVideoStatus->u16HorOffset, pstVideoStatus->u16VerOffset);)
1232 }
1233
1234
MVOP_AutoGenTiming(MS_BOOL bIsMain,MVOP_Timing * pVOPTiming,MVOP_VidStat * pstVideoStatus,MS_U64 u64CLK,MS_BOOL b4k2k2p)1235 static void MVOP_AutoGenTiming(MS_BOOL bIsMain,
1236 MVOP_Timing *pVOPTiming,
1237 MVOP_VidStat *pstVideoStatus,
1238 MS_U64 u64CLK,
1239 MS_BOOL b4k2k2p)
1240 {
1241 #ifdef _ENABLE_DC1_FRAMESYNC
1242 MS_U32 u32R, u32Q;
1243 MS_U32 u32MaxFactor;
1244 MS_U32 MVOP_Clock;
1245 #endif
1246 #if ENABLE_3D_LR_MODE
1247 MS_BOOL b3DTB = DISABLE;
1248 #endif
1249 MS_U16 u16HSize;
1250 MS_U16 u16VSize;
1251 MS_U16 bInterlace;
1252 MS_U16 VB0, VB1;
1253 MS_U16 u8VSyncOffset = 10;
1254 MS_S16 iVBlank = 0;
1255 MVOP_DevID eID = E_MVOP_DEV_0;
1256 MS_U16 *pu16SrcHSize = NULL;
1257 MS_U16 *pu16SrcVSize = NULL;
1258 MS_U16 *pu16FixVtt = NULL;
1259 MS_U32 u32MVOPCLK = 0;
1260 MS_U16 u16HSizeTiming = 0;
1261
1262
1263 #if MVOP_SUPPORT_SUB
1264 if (FALSE == bIsMain)
1265 {
1266 eID = E_MVOP_DEV_1;
1267 }
1268 #endif
1269
1270 if(eID == E_MVOP_DEV_0)
1271 {
1272 if (p_gDrvMVOPCtx == NULL)
1273 {
1274 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
1275 return;
1276 }
1277 }
1278 #if MVOP_SUPPORT_SUB
1279 else if(eID == E_MVOP_DEV_1)
1280 {
1281 if (p_gDrvSubMVOPCtx == NULL)
1282 {
1283 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
1284 return;
1285 }
1286 }
1287 #endif
1288
1289 if(eID == E_MVOP_DEV_0)
1290 {
1291 pu16SrcHSize = & p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._u16SrcHSize;
1292 pu16SrcVSize = & p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._u16SrcVSize;
1293 }
1294 #if MVOP_SUPPORT_SUB
1295 else if(eID == E_MVOP_DEV_1)
1296 {
1297 pu16SrcHSize = & p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[eID]._u16SrcHSize;
1298 pu16SrcVSize = & p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[eID]._u16SrcVSize;
1299 }
1300 #endif
1301
1302 u16HSize = MVOP_CalculateHSize(pu16SrcHSize, pstVideoStatus->u16HorSize, pstVideoStatus->u16HorOffset);
1303 u16VSize = MVOP_CalculateVSize(eID, pu16SrcVSize, pstVideoStatus->u16VerSize, pstVideoStatus->u16VerOffset);
1304 pVOPTiming->u16Width = u16HSize;
1305 pVOPTiming->u16Height = u16VSize;
1306 pVOPTiming->bHDuplicate = 0;
1307 if(pstVideoStatus->u8Interlace > E_MVOP_PRO)
1308 bInterlace = TRUE;
1309 else
1310 bInterlace = FALSE;
1311 u32MVOPCLK = (MS_U32)u64CLK;
1312 if(b4k2k2p)
1313 u16HSizeTiming = u16HSize >> 1;
1314 else
1315 u16HSizeTiming = u16HSize;
1316
1317 MS_ASSERT(pstVideoStatus->u16FrameRate!=0);
1318 if(pstVideoStatus->u16FrameRate == 0)// for parasoft check divide by zero.
1319 {
1320 return;
1321 }
1322
1323 {
1324 //to avoid (Vtotal-Vde)>(Vde/10) for scaler FBL mode.
1325
1326 if(eID == E_MVOP_DEV_0)
1327 pu16FixVtt = & p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._u16FixVtt;
1328 #if MVOP_SUPPORT_SUB
1329 else if(eID == E_MVOP_DEV_1)
1330 pu16FixVtt = & p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[eID]._u16FixVtt;
1331 #endif
1332
1333 if(*pu16FixVtt > 0)
1334 {
1335 pVOPTiming->u16V_TotalCount = *pu16FixVtt;
1336 *pu16FixVtt = 0;
1337 }
1338 else
1339 {
1340 pVOPTiming->u16V_TotalCount = u16VSize + MVOP_VBlank;
1341 }
1342 if (bIsMain)
1343 {
1344 if(EnablePresetTable)
1345 {
1346 pVOPTiming->u16H_TotalCount = u32MVOPCLK*10/ pstVideoStatus->u16FrameRate
1347 *100 / pVOPTiming->u16V_TotalCount;
1348 }
1349 else
1350
1351 {
1352 pVOPTiming->u16H_TotalCount = u32MVOPCLK / pstVideoStatus->u16FrameRate
1353 *1000 / pVOPTiming->u16V_TotalCount;
1354 }
1355 }
1356 else
1357 {
1358 #if MVOP_SUPPORT_SUB
1359 pVOPTiming->u16H_TotalCount = u32MVOPCLK / pstVideoStatus->u16FrameRate
1360 *1000 / pVOPTiming->u16V_TotalCount;
1361 #else
1362 MVOP_ERR(MVOP_PRINTF("Err: Not support SubMVOP!\n");)
1363 #endif
1364 }
1365 pVOPTiming->u16H_TotalCount = (pVOPTiming->u16H_TotalCount + 0x1) & ~0x1;
1366 //MVOP HW Htt/Vtt limitation = 0x1fff
1367 if(pVOPTiming->u16H_TotalCount > 8190)
1368 {
1369 pVOPTiming->u16H_TotalCount = 8190;
1370 pVOPTiming->u16V_TotalCount = u32MVOPCLK / pstVideoStatus->u16FrameRate
1371 *1000 / pVOPTiming->u16H_TotalCount;
1372 }
1373 pVOPTiming->u16HActive_Start = pVOPTiming->u16H_TotalCount - u16HSizeTiming;
1374 //MVOP_PRINTF("=== Htt=%d Has=%d Hsize=%d\n", pVOPTiming->u16H_TotalCount, pVOPTiming->u16HActive_Start, u16HSize);
1375 //Aiken's protection for FBL ZOOM, Horizontal Blanking can not less than MVOP_HBlank_Min
1376 if((int)pVOPTiming->u16HActive_Start < MVOP_HBlank_Min) // avoid unsigned rounding, may be negative
1377 {
1378 if(pVOPTiming->u16H_TotalCount == 8190)
1379 {
1380 MVOP_PRINTF(" Error !! Horizontal Blanking can not less than %d \n", MVOP_HBlank_Min);
1381 return;
1382 }
1383 pVOPTiming->u16HActive_Start = MVOP_HBlank_Min;
1384 pVOPTiming->u16H_TotalCount = pVOPTiming->u16HActive_Start + u16HSizeTiming;
1385 if (bIsMain)
1386 {
1387 pVOPTiming->u16V_TotalCount = u32MVOPCLK / pstVideoStatus->u16FrameRate * 1000 / pVOPTiming->u16H_TotalCount;
1388 }
1389 else
1390 {
1391 #if MVOP_SUPPORT_SUB
1392 pVOPTiming->u16V_TotalCount = u32MVOPCLK / pstVideoStatus->u16FrameRate * 1000 / pVOPTiming->u16H_TotalCount;
1393 #else
1394 MVOP_ERR(MVOP_PRINTF("Err: Not support SubMVOP!\n");)
1395 #endif
1396 }
1397 if(pVOPTiming->u16V_TotalCount > 8191)
1398 {
1399 MVOP_ERR(MVOP_PRINTF("Err: Vtt overflow -- maybe resolution too large or framerate too low!!\n");)
1400 }
1401 iVBlank = pVOPTiming->u16V_TotalCount - u16VSize;
1402 // interlace video need ensure thant VB = VB0 + VB1
1403 // here, also need ensure vop's freqency should less than VOP_FREQ_144M/VOP_FREQ_160M
1404 if(bInterlace && ((iVBlank & 0x1) == 0))
1405 {
1406 pVOPTiming->u16V_TotalCount--;
1407 iVBlank--;
1408 }
1409 if(iVBlank < MVOP_VBlank_Min)
1410 {
1411 MVOP_ERR(MVOP_PRINTF(" Error !! Vertical Blanking can not less than %d \n", MVOP_VBlank_Min);)
1412 u16VSize = u16VSize - (MVOP_VBlank_Min - iVBlank);
1413 pVOPTiming->u16Height = u16VSize;
1414 }
1415 }
1416 #ifdef _SUPPORT_IMG_OFFSET_
1417 pVOPTiming->u16HImg_Start = pVOPTiming->u16HActive_Start + pstVideoStatus->u16HorOffset;
1418 //MVOP_PRINTF("=== His=%d\n", pVOPTiming->u16HImg_Start);
1419 #endif
1420 if(pVOPTiming->u16H_TotalCount >= 4095)
1421 MVOP_ERR(MVOP_PRINTF("[Warning] xc support pVOPTiming->u16H_TotalCount >= 4095 after CL 712830\n");)
1422 }
1423
1424 if(pstVideoStatus->u8Interlace > E_MVOP_PRO)
1425 pVOPTiming->bInterlace = TRUE;
1426 else
1427 pVOPTiming->bInterlace = FALSE;
1428
1429 if (bInterlace)
1430 {
1431 VB0 = (pVOPTiming->u16V_TotalCount - u16VSize) / 2 + 1; // VOP_VBlank/2+1 + EXTRA_V_BLANKING/2;
1432 VB1 = VB0 - 1;
1433
1434 #if ENABLE_3D_LR_MODE
1435 if (TRUE == bIsMain)
1436 {
1437 b3DTB = (HAL_MVOP_GetOutput3DType() == E_MVOP_OUTPUT_3D_TB);
1438 }
1439 else
1440 {
1441 #if MVOP_SUPPORT_SUB
1442 if (HAL_MVOP_SubGetOutput3DType)
1443 {
1444 b3DTB = (HAL_MVOP_SubGetOutput3DType() == E_MVOP_OUTPUT_3D_TB);
1445 }
1446 #endif
1447 }
1448
1449 if (ENABLE == b3DTB)
1450 {
1451 VB1 = VB0;
1452 pVOPTiming->u16V_TotalCount++;
1453 MVOP_DBG(MVOP_PRINTF("%s 3DLR interlace: force VB0=VB1=0x%x, Vtt+1=0x%x\n", __FUNCTION__, VB1, pVOPTiming->u16V_TotalCount);)
1454 }
1455 #endif
1456
1457 pVOPTiming->u16VBlank0_Start = 1;
1458 pVOPTiming->u16VBlank0_End = pVOPTiming->u16VBlank0_Start + VB0;
1459 pVOPTiming->u16VBlank1_Start = pVOPTiming->u16VBlank0_End + (u16VSize/2);
1460 pVOPTiming->u16VBlank1_End = pVOPTiming->u16VBlank1_Start + VB1;
1461 }
1462 else
1463 {
1464 VB1 = VB0 = (pVOPTiming->u16V_TotalCount - u16VSize); //VB1 = VB0 for progressive
1465 pVOPTiming->u16VBlank0_Start = 1;
1466 pVOPTiming->u16VBlank0_End = pVOPTiming->u16VBlank0_Start + VB0;
1467 pVOPTiming->u16VBlank1_Start = 1;
1468 pVOPTiming->u16VBlank1_End = pVOPTiming->u16VBlank1_Start + VB1;
1469 }
1470 #ifdef _SUPPORT_IMG_OFFSET_
1471 if (bInterlace)
1472 {
1473 pVOPTiming->u16VImg_Start0 = pVOPTiming->u16VBlank0_End + pstVideoStatus->u16VerOffset/2;
1474 pVOPTiming->u16VImg_Start1 = pVOPTiming->u16VBlank1_End + pstVideoStatus->u16VerOffset/2;
1475 }
1476 else
1477 {
1478 pVOPTiming->u16VImg_Start0 = pVOPTiming->u16VBlank0_End + pstVideoStatus->u16VerOffset;
1479 pVOPTiming->u16VImg_Start1 = pVOPTiming->u16VBlank1_End + pstVideoStatus->u16VerOffset;
1480 }
1481 #endif
1482 pVOPTiming->u16TopField_VS = pVOPTiming->u16VBlank0_Start + u8VSyncOffset;
1483 pVOPTiming->u16BottomField_VS = pVOPTiming->u16VBlank1_Start + u8VSyncOffset;
1484 if (pVOPTiming->bInterlace)
1485 {
1486 #if ENABLE_3D_LR_MODE
1487 //Do not adjust BottomField_VStart for 3D L/R interlace source
1488 if (ENABLE != b3DTB)
1489 #endif
1490 {
1491 pVOPTiming->u16BottomField_VS -=1;
1492 }
1493 }
1494
1495 pVOPTiming->u16TopField_Start = pVOPTiming->u16TopField_VS;
1496 pVOPTiming->u16BottomField_Start = pVOPTiming->u16BottomField_VS;
1497
1498 // u8Framerate & u16H_Freq will be assigned to g_SrcInfo.*
1499 // in other place and cannot be removed
1500 pVOPTiming->u8Framerate = pstVideoStatus->u16FrameRate/1000;
1501 pVOPTiming->u16ExpFrameRate = pstVideoStatus->u16FrameRate;
1502
1503 // u16H_Freq (unit: 100Hz)
1504 pVOPTiming->u16H_Freq = (MS_U16)
1505 ((MS_U32)pVOPTiming->u16V_TotalCount *
1506 (MS_U32)pstVideoStatus->u16FrameRate/100000);
1507
1508 #ifndef _ENABLE_DC1_FRAMESYNC
1509 // for dc1 ...
1510 pVOPTiming->u16Num = 1;
1511 pVOPTiming->u16Den = 1;
1512 #else //calculate clock for dc1 synthesizer
1513 //calculate clock
1514 MS_U32 u32tmp_num, u32tmp_den;
1515 u32R = (MS_U32)pVOPTiming->u16H_TotalCount*(MS_U32)pVOPTiming->u16V_TotalCount%1000;
1516 u32Q = (MS_U32)pVOPTiming->u16H_TotalCount*(MS_U32)pVOPTiming->u16V_TotalCount/1000;
1517 u32R *= pstVideoStatus->u16FrameRate; // frameratex1000
1518 u32Q *= pstVideoStatus->u16FrameRate; // frameratex1000
1519 u32Q += u32R/1000;
1520 MVOP_Clock = u32Q;
1521 u32MaxFactor = _MaxFactor(MVOP_Clock, DC_BaseClock*1000);
1522
1523 if (u32MaxFactor == 1)
1524 {
1525 pVOPTiming->u16Num = (MS_U16)(MVOP_Clock/2000);
1526 pVOPTiming->u16Den = (MS_U16)(DC_BaseClock/2);
1527 }
1528 else if (u32MaxFactor != 0)
1529 {
1530 u32tmp_num = (MS_U16)(MVOP_Clock/u32MaxFactor);
1531 u32tmp_den = (MS_U16)(DC_BaseClock*1000/u32MaxFactor);
1532 while(u32tmp_den > 65535)
1533 {
1534 u32tmp_den = u32tmp_den >> 1;
1535 u32tmp_num = u32tmp_num >> 1;
1536
1537 }
1538 pVOPTiming->u16Num = (MS_U16)(u32tmp_num);
1539 pVOPTiming->u16Den = (MS_U16)(u32tmp_den);
1540 }
1541 else
1542 {
1543 pVOPTiming->u16Num = 0;
1544 pVOPTiming->u16Den = 0;
1545 }
1546 #if 0
1547 //calculate clock
1548 u32R = (MS_U32)pVOPTiming->u16H_TotalCount*(MS_U32)pVOPTiming->u16V_TotalCount%1000;
1549 u32Q = (MS_U32)pVOPTiming->u16H_TotalCount*(MS_U32)pVOPTiming->u16V_TotalCount/1000;
1550 u32R *= pstVideoStatus->u16FrameRate;
1551 u32Q *= pstVideoStatus->u16FrameRate;
1552 u32Q += u32R/1000;
1553 u32Q /= 1000; // u32Q is the result
1554 MVOP_Clock = u32Q;
1555 u32MaxFactor = _MaxFactor(MVOP_Clock, DC_BaseClock);
1556
1557 if (u32MaxFactor == 1)
1558 {
1559 pVOPTiming->u16Num = (MS_U16)(MVOP_Clock/2);
1560 pVOPTiming->u16Den = (MS_U16)(DC_BaseClock/2);
1561 }
1562 else if (u32MaxFactor != 0)
1563 {
1564 pVOPTiming->u16Num = (MS_U16)(MVOP_Clock/u32MaxFactor);
1565 pVOPTiming->u16Den = (MS_U16)(DC_BaseClock/u32MaxFactor);
1566 }
1567 else
1568 {
1569 pVOPTiming->u16Num = 0;
1570 pVOPTiming->u16Den = 0;
1571 }
1572 #endif
1573 #endif
1574
1575 MVOP_TIMING_DBG(MVOP_PRINTF("\n>>>>> MVOP output 50/60\n");)
1576 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> w=%d, h=%d, i=%d, fr=%d w_timing=%d\n", pVOPTiming->u16Width,
1577 pVOPTiming->u16Height, pVOPTiming->bInterlace, pVOPTiming->u16ExpFrameRate, u16HSizeTiming);)
1578 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> hTotal=%d, vTotal=%d\n",
1579 pVOPTiming->u16H_TotalCount, pVOPTiming->u16V_TotalCount);)
1580 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> hActive=%d VB0=%d VB1=%d\n",
1581 pVOPTiming->u16HActive_Start, VB0, VB1);)
1582 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> ImgHSt=%d ImgVSt0=%d ImgVSt1=%d\n", pVOPTiming->u16HImg_Start, pVOPTiming->u16VImg_Start0, pVOPTiming->u16VImg_Start1);)
1583 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> hOffset=%d vOffset=%d\n", pstVideoStatus->u16HorOffset, pstVideoStatus->u16VerOffset);)
1584 }
1585
MVOP_CalculatePixClk(MVOP_DevID eID,MVOP_Timing * pVOPTiming,MVOP_VidStat * pstVideoStatus,MS_BOOL bEnHDup,EN_MVOP_Output_3D_TYPE en3DType)1586 static MS_U32 MVOP_CalculatePixClk(MVOP_DevID eID,
1587 MVOP_Timing *pVOPTiming,
1588 MVOP_VidStat *pstVideoStatus,
1589 MS_BOOL bEnHDup,
1590 EN_MVOP_Output_3D_TYPE en3DType)
1591 {
1592 MS_U32 u32PixClk = 0;
1593 MS_U32 u32R, u32Q;
1594 MS_U16 u16HSize;
1595 MS_U16 u16VSize;
1596 MS_U16 V_Blanking = MVOP_VBlank+EXTRA_V_BLANKING;
1597 MS_U16 u16MinVBlank = 0;
1598 #ifdef _SUPPORT_IMG_OFFSET_
1599 MS_U16 u16HMaxOffset = 0;
1600 MS_U16 u16VMaxOffset = 0;
1601 #endif
1602 MS_U16* pu16FixVtt = NULL;
1603 MS_BOOL* pbEnMinVSize576 = NULL;
1604 MS_BOOL bEnVDup = FALSE;
1605 MS_BOOL bEnVx4Dup = FALSE;
1606 MS_BOOL bEnHx4Dup = FALSE;
1607 MVOP_DrvCtrlSt* pstDrvCtrl = NULL;
1608
1609 if(eID == E_MVOP_DEV_0)
1610 {
1611 if (p_gDrvMVOPCtx == NULL)
1612 {
1613 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
1614 return 0;
1615 }
1616 pstDrvCtrl = MVOP_GetDrvCtrl(eID);
1617 }
1618 #if MVOP_SUPPORT_SUB
1619 else if(eID == E_MVOP_DEV_1)
1620 {
1621 if (p_gDrvSubMVOPCtx == NULL)
1622 {
1623 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
1624 return 0;
1625 }
1626 pstDrvCtrl = MVOP_GetSubDrvCtrl(eID);
1627 }
1628 #endif
1629 if (pstDrvCtrl == NULL)
1630 {
1631 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> NULL pstDrvCtrl!\n");)
1632 return 0;
1633 }
1634
1635 //MS_BOOL* pbIsSetTiming = &pstDrvCtrl->_stMVOPDrvStat.bIsSetTiming;
1636
1637 pu16FixVtt = &pstDrvCtrl->_u16FixVtt;
1638 pbEnMinVSize576 = &pstDrvCtrl->_bEnMinVSize576;
1639 bEnVDup = pstDrvCtrl->_bEnVSizeDup;
1640 bEnVx4Dup = pstDrvCtrl->_bEnVSizex4Dup;
1641 bEnHx4Dup = pstDrvCtrl->_bEnHSizex4Dup;
1642
1643 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> MVOP in\n");)
1644 MVOP_TIMING_DBG(MVOP_PRINTF(">>> HOffset=%d VOffset=%d fixVtt=%d EnMinVSize576=%x bEnVDup=%x bEnVx4Dup=%x bEnHx4Dup=%x\n",
1645 pstVideoStatus->u16HorOffset, pstVideoStatus->u16VerOffset,
1646 *pu16FixVtt, *pbEnMinVSize576, bEnVDup, bEnVx4Dup, bEnHx4Dup);)
1647 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> w=%d, h=%d, i=%d, fr=%d\n",
1648 pstVideoStatus->u16HorSize, pstVideoStatus->u16VerSize,
1649 pstVideoStatus->u8Interlace, pstVideoStatus->u16FrameRate);)
1650
1651 MS_ASSERT(pstVideoStatus->u16FrameRate != 0);
1652 if (pstVideoStatus->u16FrameRate == 0)
1653 {
1654 MVOP_PRINTF(">>>>> MVOP fr==0!\n");
1655 return 0;
1656 }
1657
1658 #if ENABLE_3D_LR_MODE
1659 if (E_MVOP_OUTPUT_3D_TB == en3DType)
1660 {
1661 pstVideoStatus->u16VerSize *= 2;
1662 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> 3D L/R enable, multiple VSize=%d\n", pstVideoStatus->u16VerSize);)
1663 }
1664 #if SUPPORT_3DLR_ALT_SBS
1665 else if (E_MVOP_OUTPUT_3D_SBS == en3DType)
1666 {
1667 pstVideoStatus->u16HorSize *= 2;
1668 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> 3D L/R enable, Side By Side output, multiple HSize=%d\n", pstVideoStatus->u16HorSize);)
1669 }
1670 #endif
1671 #endif
1672
1673 #ifdef _SUPPORT_IMG_OFFSET_
1674 if ((pstVideoStatus->u16HorOffset%2) != 0)
1675 {
1676 //HorOffset needs to be even, or video color will be very strange.
1677 pstVideoStatus->u16HorOffset += 1;
1678 MVOP_TIMING_DBG(MVOP_PRINTF(">>>> Change HOffset as %d \n\n", pstVideoStatus->u16HorOffset);)
1679 }
1680 if(E_MVOP_DEV_0 == eID)
1681 {
1682 #if defined(STB_DC_MODE)||(STB_DC)
1683 if((E_MVOP_OUTPUT_3D_NONE != en3DType) || (HAL_MVOP_GetIsCurrentXCGenTiming && (HAL_MVOP_GetIsCurrentXCGenTiming(E_MVOP_DEV_0) == FALSE)))
1684 u16HMaxOffset = MDrv_MVOP_GetMaxHOffset(pstVideoStatus->u16HorSize,pstVideoStatus->u16VerSize,pstVideoStatus->u16FrameRate);
1685 else
1686 u16HMaxOffset = MDrv_MVOP_GetMaxHOffset(pstVideoStatus->u16HorSize,pstVideoStatus->u16VerSize,STB_OUTPUT_MAX_FPS);
1687 #else
1688 u16HMaxOffset = MDrv_MVOP_GetMaxHOffset(pstVideoStatus->u16HorSize,pstVideoStatus->u16VerSize,pstVideoStatus->u16FrameRate);
1689 #endif
1690 }
1691 #if MVOP_SUPPORT_SUB
1692 else if (E_MVOP_DEV_1 == eID)
1693 {
1694 #if defined(STB_DC_MODE)||(STB_DC)
1695 if((E_MVOP_OUTPUT_3D_NONE != en3DType) || (HAL_MVOP_GetIsCurrentXCGenTiming && (HAL_MVOP_GetIsCurrentXCGenTiming(E_MVOP_DEV_0) == FALSE)))
1696 u16HMaxOffset = MDrv_MVOP_SubGetMaxHOffset(pstVideoStatus->u16HorSize,pstVideoStatus->u16VerSize,pstVideoStatus->u16FrameRate);
1697 else
1698 u16HMaxOffset = MDrv_MVOP_SubGetMaxHOffset(pstVideoStatus->u16HorSize,pstVideoStatus->u16VerSize,STB_OUTPUT_MAX_FPS);
1699 #else
1700 u16HMaxOffset = MDrv_MVOP_SubGetMaxHOffset(pstVideoStatus->u16HorSize,pstVideoStatus->u16VerSize,pstVideoStatus->u16FrameRate);
1701 #endif
1702 }
1703 #endif
1704 HALMVOPFREQUENCY eFreq = HALMVOP_160MHZ;
1705 if (E_MVOP_DEV_0 == eID)
1706 {
1707 if(HALMVOP_NOT_SUPPORT != HAL_MVOP_Get4k2kClk())
1708 {
1709 eFreq = HAL_MVOP_Get4k2kClk();
1710 }
1711 else
1712 {
1713 eFreq = HAL_MVOP_GetMaxFreerunClk();
1714 }
1715 }
1716 #if MVOP_SUPPORT_SUB
1717 else if (E_MVOP_DEV_1 == eID)
1718 {
1719 if(HALMVOP_NOT_SUPPORT != HAL_MVOP_SubGet4k2kClk())
1720 {
1721 eFreq = HAL_MVOP_SubGet4k2kClk();
1722 }
1723 else if (HAL_MVOP_SubGetMaxFreerunClk)
1724 {
1725 eFreq = HAL_MVOP_SubGetMaxFreerunClk();
1726 }
1727 }
1728 #endif
1729 #if MVOP_SUPPORT_3RD
1730 else if (E_MVOP_DEV_2 == eID)
1731 {
1732 if (HAL_MVOP_EX_GetMaxFreerunClk)
1733 {
1734 eFreq = HAL_MVOP_EX_GetMaxFreerunClk(eID);
1735 }
1736 }
1737 #endif
1738 else
1739 {
1740 MVOP_PRINTF("%s invalid eID %x\n", __FUNCTION__, eID);
1741 return 0;
1742 }
1743 if(HAL_MVOP_SetEnable4k2k2P)
1744 {
1745 #if defined(STB_DC_MODE)||(STB_DC)
1746 if((E_MVOP_OUTPUT_3D_NONE != en3DType) || (HAL_MVOP_GetIsCurrentXCGenTiming && (HAL_MVOP_GetIsCurrentXCGenTiming(E_MVOP_DEV_0) == FALSE)))
1747 u16VMaxOffset = MVOP_GetMaxVOffset(eID, eFreq, (pstVideoStatus->u16HorSize/2),pstVideoStatus->u16VerSize,pstVideoStatus->u16FrameRate);
1748 else
1749 u16VMaxOffset = MVOP_GetMaxVOffset(eID, eFreq, (pstVideoStatus->u16HorSize/2),pstVideoStatus->u16VerSize,STB_OUTPUT_MAX_FPS);
1750 #else
1751 u16VMaxOffset = MVOP_GetMaxVOffset(eID, eFreq, (pstVideoStatus->u16HorSize/2),pstVideoStatus->u16VerSize,pstVideoStatus->u16FrameRate);
1752 #endif
1753 }
1754 else
1755 {
1756 #if defined(STB_DC_MODE)||(STB_DC)
1757 if((E_MVOP_OUTPUT_3D_NONE != en3DType) || (HAL_MVOP_GetIsCurrentXCGenTiming && (HAL_MVOP_GetIsCurrentXCGenTiming(E_MVOP_DEV_0) == FALSE)))
1758 u16VMaxOffset = MVOP_GetMaxVOffset(eID, eFreq, pstVideoStatus->u16HorSize,pstVideoStatus->u16VerSize,pstVideoStatus->u16FrameRate);
1759 else
1760 u16VMaxOffset = MVOP_GetMaxVOffset(eID, eFreq, pstVideoStatus->u16HorSize,pstVideoStatus->u16VerSize,STB_OUTPUT_MAX_FPS);
1761 #else
1762 u16VMaxOffset = MVOP_GetMaxVOffset(eID, eFreq, pstVideoStatus->u16HorSize,pstVideoStatus->u16VerSize,pstVideoStatus->u16FrameRate);
1763 #endif
1764 }
1765 if (pstVideoStatus->u16HorOffset > u16HMaxOffset)
1766 {
1767 MVOP_TIMING_DBG(MVOP_PRINTF("Change HorOffset %d --> %d\n", pstVideoStatus->u16HorOffset, u16HMaxOffset);)
1768 pstVideoStatus->u16HorOffset = u16HMaxOffset;
1769 }
1770 if (pstVideoStatus->u16VerOffset > u16VMaxOffset)
1771 {
1772 MVOP_TIMING_DBG(MVOP_PRINTF("Change u16VerOffset %d --> %d\n", pstVideoStatus->u16VerOffset, u16VMaxOffset);)
1773 pstVideoStatus->u16VerOffset = u16VMaxOffset;
1774 }
1775 #endif
1776
1777 MS_U16* pu16SrcHSize = NULL;
1778 MS_U16* pu16SrcVSize = NULL;
1779
1780 if(eID == E_MVOP_DEV_0)
1781 {
1782 pu16SrcHSize = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._u16SrcHSize;
1783 pu16SrcVSize = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._u16SrcVSize;
1784 }
1785 #if MVOP_SUPPORT_SUB
1786 else if(eID == E_MVOP_DEV_1)
1787 {
1788 pu16SrcHSize = &p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[eID]._u16SrcHSize;
1789 pu16SrcVSize = &p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[eID]._u16SrcVSize;
1790 }
1791 #endif
1792 u16HSize = MVOP_CalculateHSize(pu16SrcHSize, pstVideoStatus->u16HorSize, pstVideoStatus->u16HorOffset);
1793 u16VSize = MVOP_CalculateVSize(eID, pu16SrcVSize, pstVideoStatus->u16VerSize, pstVideoStatus->u16VerOffset);
1794
1795 if ((TRUE == *pbEnMinVSize576) && (u16VSize < 576) && (576 - u16VSize > V_Blanking))
1796 {
1797 V_Blanking = 576 - u16VSize;
1798 }
1799
1800 //*pbIsSetTiming = TRUE;
1801
1802 if (pstVideoStatus->u8Interlace >= E_MVOP_INT_TB_ONE_FRAME)
1803 {
1804 u16MinVBlank = MVOP_VBlank_Min_I;
1805 }
1806 else
1807 {
1808 u16MinVBlank = MVOP_VBlank_Min_P;
1809 }
1810
1811 if((u16VSize >= *pu16FixVtt) || ((*pu16FixVtt - u16VSize) < u16MinVBlank))
1812 {
1813 // Restore to original flow
1814 *pu16FixVtt = 0;
1815 MVOP_DBG(MVOP_PRINTF("fix vtt feature is not enabled\n");)
1816 }
1817
1818 if(bEnHDup && (u16HSize < 704))
1819 {
1820 u16HSize *= 2;
1821 pVOPTiming->bHDuplicate = 1;
1822 }
1823 else
1824 {
1825 pVOPTiming->bHDuplicate = 0;
1826 }
1827
1828 if (bEnVDup)
1829 {
1830 u16VSize *= 2;
1831 MVOP_DBG(MVOP_PRINTF("VDup VSize*2=>%d\n", u16VSize);)
1832 }
1833
1834 if (bEnVx4Dup)
1835 {
1836 u16VSize *= 4;
1837 MVOP_DBG(MVOP_PRINTF("VDup VSize*4=>%d\n", u16VSize);)
1838 }
1839
1840 if (bEnHx4Dup)
1841 {
1842 u16HSize *= 4;
1843 MVOP_DBG(MVOP_PRINTF("VDup HSize*4=>%d\n", u16HSize);)
1844 }
1845
1846 pVOPTiming->u16Width = u16HSize;
1847 pVOPTiming->u16Height = u16VSize;
1848
1849 if (u16HSize > 720) // HD
1850 {
1851 pVOPTiming->u16H_TotalCount = u16HSize + MVOP_HBlank_HD+EXTRA_H_BLANKING*2;
1852 pVOPTiming->u16HActive_Start = MVOP_HBlank_HD+EXTRA_H_BLANKING*2;
1853 }
1854 else //SD
1855 {
1856 pVOPTiming->u16H_TotalCount = u16HSize + MVOP_HBlank_SD+EXTRA_H_BLANKING*2;
1857 pVOPTiming->u16HActive_Start = MVOP_HBlank_SD+EXTRA_H_BLANKING*2;
1858 }
1859 if(*pu16FixVtt > 0)
1860 {
1861 pVOPTiming->u16V_TotalCount = *pu16FixVtt;
1862 }
1863 else
1864 {
1865 pVOPTiming->u16V_TotalCount = u16VSize + V_Blanking;
1866
1867 #if (ENABLE_3D_LR_MODE && SUPPORT_3DLR_INST_VBLANK)
1868 MS_U16 u16InsVBlank = 0;
1869 if (E_MVOP_OUTPUT_3D_TB == en3DType)
1870 {
1871 if(eID == E_MVOP_DEV_0)
1872 u16InsVBlank = p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._u16InsVBlank;
1873 #if MVOP_SUPPORT_SUB
1874 else if(eID == E_MVOP_DEV_1)
1875 u16InsVBlank = p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[eID]._u16InsVBlank;
1876 #endif
1877 if (u16InsVBlank != 0)
1878 {
1879 pVOPTiming->u16V_TotalCount += u16InsVBlank;
1880 if(eID == E_MVOP_DEV_0)
1881 {
1882 if (p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._fpHalSet3DLRInsVBlank)
1883 {
1884 p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._fpHalSet3DLRInsVBlank(u16InsVBlank);
1885 }
1886 }
1887 #if MVOP_SUPPORT_SUB
1888 else if(eID == E_MVOP_DEV_1)
1889 {
1890 if (p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[eID]._fpHalSet3DLRInsVBlank)
1891 {
1892 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[eID]._fpHalSet3DLRInsVBlank(u16InsVBlank);
1893 }
1894 }
1895 #endif
1896 MVOP_DBG(MVOP_PRINTF(">>>>> 3D L/R enable, Vtt => %d, InsVB=%d\n", pVOPTiming->u16V_TotalCount, u16InsVBlank);)
1897 }
1898 }
1899 #endif
1900
1901 }
1902
1903 u32Q = (MS_U32)pVOPTiming->u16H_TotalCount * (MS_U32)pVOPTiming->u16V_TotalCount;
1904 u32R = u32Q % 1000;
1905 u32Q = u32Q / 1000;
1906 #if defined(STB_DC_MODE)||(STB_DC)
1907 if((E_MVOP_OUTPUT_3D_NONE != en3DType) || (HAL_MVOP_GetIsCurrentXCGenTiming && (HAL_MVOP_GetIsCurrentXCGenTiming(E_MVOP_DEV_0) == FALSE)))
1908 {
1909 u32PixClk = u32Q * (MS_U32)pstVideoStatus->u16FrameRate +
1910 u32R * (MS_U32)pstVideoStatus->u16FrameRate / 1000;
1911 }
1912 else
1913 {
1914 u32PixClk = u32Q * (MS_U32)STB_OUTPUT_MAX_FPS +
1915 u32R * (MS_U32)STB_OUTPUT_MAX_FPS / 1000;
1916 }
1917 #else
1918 u32PixClk = u32Q * (MS_U32)pstVideoStatus->u16FrameRate +
1919 u32R * (MS_U32)pstVideoStatus->u16FrameRate / 1000;
1920 #endif
1921 #if defined (__aarch64__)
1922 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> u32PixClk=%d, Htt=%d, Vtt=%d\n", u32PixClk,
1923 pVOPTiming->u16H_TotalCount, pVOPTiming->u16V_TotalCount);)
1924 #else
1925 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> u32PixClk=%d, Htt=%d, Vtt=%d\n", (int)u32PixClk,
1926 pVOPTiming->u16H_TotalCount, pVOPTiming->u16V_TotalCount);)
1927 #endif
1928
1929 return u32PixClk;
1930 }
1931
1932
MVOP_AutoGenMPEGTiming(MS_BOOL bIsMain,MVOP_Timing * pVOPTiming,MVOP_VidStat * pstVideoStatus,MS_BOOL bEnHDup)1933 static MS_BOOL MVOP_AutoGenMPEGTiming(MS_BOOL bIsMain,
1934 MVOP_Timing *pVOPTiming,
1935 MVOP_VidStat *pstVideoStatus,
1936 MS_BOOL bEnHDup)
1937 {
1938 MS_U32 u32R, u32Q;
1939 MS_U32 u32MaxFactor;
1940 MS_U32 MVOP_Clock;
1941 MS_U16 bInterlace;
1942 MS_U16 VB0, VB1;
1943 MS_U16 u8VSyncOffset;
1944 MS_U16* pu16FixVtt = NULL;
1945 MS_BOOL bFreerunMode = FALSE;
1946 MVOP_DevID eID = E_MVOP_DEV_0;
1947 MS_BOOL bRefTSPCW = TRUE;
1948 #if ENABLE_3D_LR_MODE
1949 MS_BOOL b3DTB = DISABLE;
1950 #endif
1951
1952 if (FALSE == bIsMain)
1953 {
1954 #if MVOP_SUPPORT_SUB
1955 eID = E_MVOP_DEV_1;
1956 #else
1957 MVOP_ERR(MVOP_PRINTF("Err no sub-mvop!\n");)
1958 return FALSE;
1959 #endif
1960 }
1961 /*Check initialization*/
1962 if(eID == E_MVOP_DEV_0)
1963 {
1964 if (p_gDrvMVOPCtx == NULL)
1965 {
1966 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
1967 return FALSE;
1968 }
1969 }
1970 #if MVOP_SUPPORT_SUB
1971 else if(eID == E_MVOP_DEV_1)
1972 {
1973 if (p_gDrvSubMVOPCtx == NULL)
1974 {
1975 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
1976 return FALSE;
1977 }
1978 }
1979 #endif
1980 //Just return if framerate is zero, because the pixel clock cannot be calculated.
1981 if (pstVideoStatus->u16FrameRate == 0)
1982 {
1983 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> MVOP fr==0!\n");)
1984 return FALSE;
1985 }
1986
1987 EN_MVOP_Output_3D_TYPE en3DType = E_MVOP_OUTPUT_3D_NONE;
1988
1989 #if ENABLE_3D_LR_MODE
1990 if (TRUE == bIsMain)
1991 {
1992 b3DTB = (HAL_MVOP_GetOutput3DType() == E_MVOP_OUTPUT_3D_TB);
1993 }
1994 #if MVOP_SUPPORT_SUB
1995 else
1996 {
1997 if (HAL_MVOP_SubGetOutput3DType)
1998 {
1999 b3DTB = (HAL_MVOP_SubGetOutput3DType() == E_MVOP_OUTPUT_3D_TB);
2000 }
2001 }
2002 #endif
2003 if (TRUE == bIsMain)
2004 {
2005 if(HAL_MVOP_GetOutput3DType && (HAL_MVOP_GetOutput3DType() <= E_MVOP_OUTPUT_3D_MAXNUM))
2006 {
2007 en3DType = HAL_MVOP_GetOutput3DType();
2008 }
2009 }
2010 #if MVOP_SUPPORT_SUB
2011 else
2012 {
2013 if (HAL_MVOP_SubGetOutput3DType && (HAL_MVOP_SubGetOutput3DType() <= E_MVOP_OUTPUT_3D_MAXNUM))
2014 {
2015 en3DType = HAL_MVOP_SubGetOutput3DType();
2016 }
2017 }
2018 #endif
2019 #endif
2020
2021 //Calculate the pixel clock
2022 MVOP_Clock = MVOP_CalculatePixClk(eID, pVOPTiming, pstVideoStatus, bEnHDup, en3DType);
2023 #if defined(STB_DC_MODE)||(STB_DC)
2024 if(HAL_MVOP_GetIsCurrentXCGenTiming && (HAL_MVOP_GetIsCurrentXCGenTiming(eID) == FALSE) && (MVOP_Clock > MAX_MVOP_FREQ))
2025 {
2026 MVOP_Clock = HAL_MVOP_SetFixClk(eID, MVOP_Clock);
2027 if((MVOP_Clock < HALMVOP_160MHZ) || (MVOP_Clock == HALMVOP_192MHZ))
2028 {
2029 if (bIsMain)
2030 {
2031 //default enable 2p mode: kano clippers
2032 if(HAL_MVOP_SetEnable4k2kClk)
2033 {
2034 HAL_MVOP_SetEnable4k2kClk(FALSE);
2035 }
2036 HAL_MVOP_SetEnable60P(FALSE);
2037 MDrv_MVOP_EnableFreerunMode(FALSE);
2038 }
2039 #if MVOP_SUPPORT_SUB
2040 else
2041 {
2042 if(HAL_MVOP_SubSetEnable4k2kClk)
2043 {
2044 HAL_MVOP_SubSetEnable4k2kClk(FALSE);
2045 }
2046 HAL_MVOP_SubSetEnable60P(FALSE);
2047 MDrv_MVOP_SubEnableFreerunMode(FALSE);
2048 }
2049 #endif
2050 //Need to re-calculate timing.
2051 MVOP_AutoGenTiming(bIsMain, pVOPTiming, pstVideoStatus, MVOP_Clock, TRUE);
2052 #if defined (__aarch64__)
2053 MVOP_TIMING_DBG(MVOP_PRINTF("[MVOP][DBG] Set Fix clk = %d\n",MVOP_Clock);)
2054 #else
2055 MVOP_TIMING_DBG(MVOP_PRINTF("[MVOP][DBG] Set Fix clk = %d\n",(int)MVOP_Clock);)
2056 #endif
2057 return TRUE;
2058 }
2059 }
2060 else if(HAL_MVOP_SetDefaultClk && (MVOP_Clock <= MVOP_FREQ_160M))
2061 {
2062 if(HAL_MVOP_SetDefaultClk(eID) != HALMVOP_SYNCMODE)
2063 {
2064 MVOP_Clock = HAL_MVOP_SetDefaultClk(eID);
2065 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> Set default clock");)
2066 }
2067 }
2068 #endif
2069 #if defined (__aarch64__)
2070 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> calculate need clk = %d\n",MVOP_Clock);)
2071 #else
2072 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> calculate need clk = %d\n",(int)MVOP_Clock);)
2073 #endif
2074 if (0 == MVOP_Clock)
2075 {
2076 MVOP_PRINTF(">>>>> MVOP_Clock==0!\n");
2077 return FALSE;
2078 }
2079
2080 #if defined(CHIP_MONET)|| defined(CHIP_MANHATTAN) || defined(CHIP_MASERATI) || defined(CHIP_MAXIM)
2081 //clear the register setting when the resolution change happens
2082 if (bIsMain)
2083 {
2084 if((HAL_MVOP_GetIsCurrentHSK) && (HAL_MVOP_GetIsCurrentHSK(E_MVOP_DEV_0) == FALSE))
2085 {
2086 if(HAL_MVOP_SetEnable4k2k2P)
2087 {
2088 HAL_MVOP_SetEnable4k2k2P(FALSE);
2089 }
2090 if(HAL_MVOP_SetEnable4k2kClk)
2091 {
2092 HAL_MVOP_SetEnable4k2kClk(FALSE);
2093 }
2094 }
2095 }
2096 #if MVOP_SUPPORT_SUB
2097 else
2098 {
2099 if((HAL_MVOP_GetIsCurrentHSK) && (HAL_MVOP_GetIsCurrentHSK(E_MVOP_DEV_1) == FALSE))
2100 {
2101 if(HAL_MVOP_SubSetEnable4k2k2P)
2102 {
2103 HAL_MVOP_SubSetEnable4k2k2P(FALSE);
2104 }
2105 if(HAL_MVOP_SubSetEnable4k2kClk)
2106 {
2107 HAL_MVOP_SubSetEnable4k2kClk(FALSE);
2108 }
2109 }
2110 }
2111 #endif
2112 #endif
2113
2114 //if pixel clock > synthesizer_max (86.4MHz), use the higher clock (160 or 144).
2115 if(MVOP_Clock >= MVOP_FREQ_320M)
2116 {
2117 if (bIsMain)
2118 {
2119 if(HAL_MVOP_SetEnable4k2k2P && HAL_MVOP_SetEnable4k2kClk)
2120 {
2121 HAL_MVOP_SetEnable4k2kClk(TRUE);
2122 HAL_MVOP_SetEnable4k2k2P(TRUE);
2123 }
2124 else
2125 {
2126 #if defined (__aarch64__)
2127 MVOP_PRINTF("[Warning] MVOP_Clock == %d Not Support!\n",MVOP_Clock);
2128 #else
2129 MVOP_PRINTF("[Warning] MVOP_Clock == %d Not Support!\n",(int)MVOP_Clock);
2130 #endif
2131 return FALSE;
2132 }
2133 HAL_MVOP_SetEnable60P(FALSE);
2134 MDrv_MVOP_EnableFreerunMode(FALSE);
2135 }
2136 #if MVOP_SUPPORT_SUB
2137 else
2138 {
2139 if(HAL_MVOP_SubSetEnable4k2k2P && HAL_MVOP_SubSetEnable4k2kClk)
2140 {
2141 HAL_MVOP_SubSetEnable4k2kClk(TRUE);
2142 HAL_MVOP_SubSetEnable4k2k2P(TRUE);
2143 }
2144 else
2145 {
2146 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> MVOP Not Support 4k2k 30fps!\n");)
2147 return FALSE;
2148 }
2149 HAL_MVOP_SubSetEnable60P(FALSE);
2150 MDrv_MVOP_SubEnableFreerunMode(FALSE);
2151 }
2152 #endif
2153 //Need to re-calculate timing.
2154 MVOP_AutoGenTiming(bIsMain, pVOPTiming, pstVideoStatus, MVOP_FREQ_320M, TRUE);
2155 return TRUE;
2156 }
2157 else if(MVOP_Clock > MVOP_FREQ_160M)
2158 {
2159 MVOP_DBG(MVOP_PRINTF("drvMVOP: Enable clk 320MHz!\n");)
2160 if (bIsMain)
2161 {
2162 if(HAL_MVOP_SetEnable4k2kClk)
2163 {
2164 HAL_MVOP_SetEnable4k2kClk(TRUE);
2165 }
2166 else
2167 {
2168 MVOP_PRINTF(">>>>> MVOP Not Support 320MHz(4k2k 30fps)!\n");
2169 return FALSE;
2170 }
2171 HAL_MVOP_SetEnable60P(FALSE);
2172 MDrv_MVOP_EnableFreerunMode(FALSE);
2173 }
2174 #if MVOP_SUPPORT_SUB
2175 else
2176 {
2177 if(HAL_MVOP_SubSetEnable4k2kClk)
2178 {
2179 HAL_MVOP_SubSetEnable4k2kClk(TRUE);
2180 }
2181 else
2182 {
2183 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> MVOP Not Support 4k2k 30fps!\n");)
2184 return FALSE;
2185 }
2186 HAL_MVOP_SubSetEnable60P(FALSE);
2187 MDrv_MVOP_SubEnableFreerunMode(FALSE);
2188 }
2189 #endif
2190 //Need to re-calculate timing.
2191 MVOP_AutoGenTiming(bIsMain, pVOPTiming, pstVideoStatus, MVOP_FREQ_320M, FALSE);
2192 return TRUE;
2193 }
2194 else if (MVOP_Clock > MAX_MVOP_FREQ && MVOP_Clock <= MVOP_FREQ_160M)
2195 {
2196 MVOP_DBG(MVOP_PRINTF("drvMVOP: Enable clk 160MHz!\n");)
2197 if (bIsMain)
2198 {
2199 if(HAL_MVOP_SetEnable4k2kClk)
2200 {
2201 HAL_MVOP_SetEnable4k2kClk(FALSE);
2202 }
2203 HAL_MVOP_SetEnable60P(TRUE);
2204 MDrv_MVOP_EnableFreerunMode(FALSE);
2205 }
2206 #if MVOP_SUPPORT_SUB
2207 else
2208 {
2209 if(HAL_MVOP_SubSetEnable4k2kClk)
2210 {
2211 HAL_MVOP_SubSetEnable4k2kClk(FALSE);
2212 }
2213 HAL_MVOP_SubSetEnable60P(TRUE);
2214 MDrv_MVOP_SubEnableFreerunMode(FALSE);
2215 }
2216 #endif
2217 //Need to re-calculate timing.
2218 MVOP_AutoGenTiming(bIsMain, pVOPTiming, pstVideoStatus, MVOP_FREQ_160M, FALSE);
2219 return TRUE;
2220 }
2221 else
2222 {
2223 MVOP_DBG(MVOP_PRINTF("drvMVOP: Enable clk Synchronous!\n");)
2224 if (bIsMain)
2225 {
2226 if(HAL_MVOP_SetEnable4k2kClk)
2227 {
2228 HAL_MVOP_SetEnable4k2kClk(FALSE);
2229 }
2230 HAL_MVOP_SetEnable60P(FALSE);
2231 }
2232 #if MVOP_SUPPORT_SUB
2233 else
2234 {
2235 if(HAL_MVOP_SubSetEnable4k2kClk)
2236 {
2237 HAL_MVOP_SubSetEnable4k2kClk(FALSE);
2238 }
2239 HAL_MVOP_SubSetEnable60P(FALSE);
2240 }
2241 #endif
2242
2243 /* If stc cw = 0x0 (TSP has not been initialized), mvop will use freerun clock.*/
2244 if (bIsMain)
2245 {
2246 if(HAL_MVOP_CheckSTCCW)
2247 {
2248 if(FALSE == HAL_MVOP_CheckSTCCW())
2249 {
2250 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> STC cw = 0x0, MVOP enable freerun clock.\n");)
2251 HAL_MVOP_EnableFreerunMode(TRUE);
2252 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bEnableFreerunMode = TRUE;
2253 bRefTSPCW = FALSE;
2254 }
2255 }
2256 }
2257 #if MVOP_SUPPORT_SUB
2258 else
2259 {
2260 if(HAL_MVOP_SubCheckSTCCW)
2261 {
2262 if(FALSE == HAL_MVOP_SubCheckSTCCW())
2263 {
2264 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> STC cw = 0x0, MVOP enable freerun clock.\n");)
2265 HAL_MVOP_SubEnableFreerunMode(TRUE);
2266 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._bEnableFreerunMode = TRUE;
2267 bRefTSPCW = FALSE;
2268 }
2269 }
2270 }
2271 #endif
2272
2273 //reset fixVtt
2274 if(eID == E_MVOP_DEV_0)
2275 pu16FixVtt = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._u16FixVtt;
2276 #if MVOP_SUPPORT_SUB
2277 if(eID == E_MVOP_DEV_1)
2278 pu16FixVtt = &p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[eID]._u16FixVtt;
2279 #endif
2280 if(*pu16FixVtt > 0)
2281 {
2282 *pu16FixVtt = 0;
2283 }
2284 }
2285
2286 #if MVOP_SUPPORT_SUB
2287 if(eID == E_MVOP_DEV_0)
2288 bFreerunMode = p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bEnableFreerunMode;
2289 else if(eID == E_MVOP_DEV_1)
2290 bFreerunMode = p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._bEnableFreerunMode;
2291 #if 0
2292 bFreerunMode = ((TRUE == bIsMain) &&p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bEnableFreerunMode) ||
2293 ((FALSE == bIsMain) && p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._bEnableFreerunMode);
2294 #endif
2295 #else
2296 bFreerunMode = ((TRUE == bIsMain) && p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bEnableFreerunMode);
2297 #endif
2298 if (((!bFreerunMode) && (MVOP_Clock < MIN_MVOP_FREQ))
2299 || (bFreerunMode && (MVOP_Clock < MIN_MVOP_FREERUN_FREQ))
2300 )
2301 {
2302 //finetune Htt & HActiveStart to enlarge pixel clock if pixel clock < min_clk
2303 MS_U32 u32MinMvopFreq = 0;
2304 u32MaxFactor = (MS_U32)(pstVideoStatus->u16FrameRate / 1000)*
2305 (MS_U32)pVOPTiming->u16V_TotalCount;
2306
2307 if (u32MaxFactor == 0)
2308 {
2309 MVOP_PRINTF("%s(%d) u32MaxFactor==0!\n", __FUNCTION__, __LINE__);
2310 return FALSE;
2311 }
2312
2313 if(bFreerunMode)
2314 {
2315 u32MinMvopFreq = MIN_MVOP_FREERUN_FREQ;
2316 }
2317 else
2318 {
2319 u32MinMvopFreq = MIN_MVOP_FREQ;
2320 }
2321
2322 u32Q = u32MinMvopFreq / u32MaxFactor;
2323 u32R = u32MinMvopFreq % u32MaxFactor;
2324 pVOPTiming->u16H_TotalCount = (MS_U16)(u32Q);
2325 if (u32R != 0)
2326 pVOPTiming->u16H_TotalCount++;
2327
2328 pVOPTiming->u16H_TotalCount = (pVOPTiming->u16H_TotalCount + 0x1) & ~0x1;
2329
2330 //finetune Vtt if Htt is too large
2331 //xc limitation htt = 4095, but limitation discard after napoli.
2332 #if 0
2333 if(pVOPTiming->u16H_TotalCount > 4094)
2334 {
2335 pVOPTiming->u16H_TotalCount = 4094;
2336 u32MaxFactor = (MS_U32)(pstVideoStatus->u16FrameRate / 1000)*
2337 (MS_U32)pVOPTiming->u16H_TotalCount;
2338 u32Q = u32MinMvopFreq / u32MaxFactor;
2339 u32R = u32MinMvopFreq % u32MaxFactor;
2340 pVOPTiming->u16V_TotalCount = (MS_U16)(u32Q);
2341 if (u32R != 0)
2342 pVOPTiming->u16V_TotalCount++;
2343
2344 }
2345 #endif
2346 //MVOP HW Htt/Vtt limitation = 0x1fff
2347 if(pVOPTiming->u16H_TotalCount > 8190)
2348 {
2349 pVOPTiming->u16H_TotalCount = 8190;
2350 u32MaxFactor = (MS_U32)(pstVideoStatus->u16FrameRate / 1000)*
2351 (MS_U32)pVOPTiming->u16H_TotalCount;
2352 u32Q = u32MinMvopFreq / u32MaxFactor;
2353 u32R = u32MinMvopFreq % u32MaxFactor;
2354 pVOPTiming->u16V_TotalCount = (MS_U16)(u32Q);
2355 if (u32R != 0)
2356 pVOPTiming->u16V_TotalCount++;
2357
2358 if(pVOPTiming->u16V_TotalCount > 8191)
2359 MVOP_ERR(MVOP_PRINTF("Err: Vtt overflow -- maybe resolution too large or framerate too low!!\n");)
2360 }
2361 pVOPTiming->u16HActive_Start = pVOPTiming->u16H_TotalCount - pVOPTiming->u16Width;
2362 }
2363 // There are potential risks as setting freerun mode & synchronous clock
2364 MS_ASSERT(!(bFreerunMode && bRefTSPCW));
2365
2366 //determine other timing setting
2367 #ifdef _SUPPORT_IMG_OFFSET_
2368 pVOPTiming->u16HImg_Start = pVOPTiming->u16HActive_Start + pstVideoStatus->u16HorOffset;
2369 #endif
2370
2371 if(pstVideoStatus->u8Interlace > E_MVOP_PRO)
2372 bInterlace = TRUE;
2373 else
2374 bInterlace = FALSE;
2375
2376 MS_U16 u16VSize = pVOPTiming->u16Height;
2377 if (bInterlace)
2378 {
2379 // interlace video need ensure thant VB = VB0 + VB1
2380 if(((pVOPTiming->u16V_TotalCount - u16VSize) & 0x1) == 0)
2381 {
2382 pVOPTiming->u16V_TotalCount++;
2383 }
2384 VB0 = (pVOPTiming->u16V_TotalCount - u16VSize) / 2 + 1;
2385 VB1 = VB0 - 1;
2386 #if ENABLE_3D_LR_MODE
2387 if (ENABLE == b3DTB)
2388 {
2389 VB1 = VB0;
2390 pVOPTiming->u16V_TotalCount++;
2391 MVOP_DBG(MVOP_PRINTF("%s 3DLR interlace: force VB0=VB1=0x%x, Vtt+1=0x%x\n", __FUNCTION__, VB1, pVOPTiming->u16V_TotalCount);)
2392 }
2393 #endif
2394 pVOPTiming->u16VBlank0_Start = 1;
2395 pVOPTiming->u16VBlank0_End = pVOPTiming->u16VBlank0_Start + VB0;
2396 pVOPTiming->u16VBlank1_Start = pVOPTiming->u16VBlank0_End + (u16VSize/2);
2397 pVOPTiming->u16VBlank1_End = pVOPTiming->u16VBlank1_Start + VB1;
2398 pVOPTiming->bInterlace = TRUE;
2399 }
2400 else
2401 {
2402 VB1 = VB0 = (pVOPTiming->u16V_TotalCount - u16VSize);
2403 pVOPTiming->u16VBlank0_Start = 1;
2404 pVOPTiming->u16VBlank0_End = pVOPTiming->u16VBlank0_Start + VB0;
2405 pVOPTiming->u16VBlank1_Start = 1;
2406 pVOPTiming->u16VBlank1_End = pVOPTiming->u16VBlank1_Start + VB1;
2407 pVOPTiming->bInterlace = FALSE;
2408 }
2409
2410 #ifdef _SUPPORT_IMG_OFFSET_
2411 if(bInterlace)
2412 {
2413 pVOPTiming->u16VImg_Start0 = pVOPTiming->u16VBlank0_End + pstVideoStatus->u16VerOffset / 2;
2414 pVOPTiming->u16VImg_Start1 = pVOPTiming->u16VBlank1_End + pstVideoStatus->u16VerOffset / 2;
2415 }
2416 else
2417 {
2418 pVOPTiming->u16VImg_Start0 = pVOPTiming->u16VBlank0_End + pstVideoStatus->u16VerOffset;
2419 pVOPTiming->u16VImg_Start1 = pVOPTiming->u16VBlank1_End + pstVideoStatus->u16VerOffset;
2420 }
2421 #endif
2422
2423 u8VSyncOffset = VB0/2;
2424 pVOPTiming->u16TopField_VS = pVOPTiming->u16VBlank0_Start + u8VSyncOffset;
2425 pVOPTiming->u16BottomField_VS = pVOPTiming->u16VBlank1_Start + u8VSyncOffset;
2426 if (pVOPTiming->bInterlace)
2427 {
2428 #if ENABLE_3D_LR_MODE
2429 if (ENABLE != b3DTB)
2430 #endif
2431 {
2432 pVOPTiming->u16BottomField_VS -=1;
2433 }
2434 }
2435
2436 if((p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._eInputSel == MVOP_INPUT_DRAM) && bInterlace)
2437 {
2438 pVOPTiming->u16TopField_Start = pVOPTiming->u16TopField_VS + 16; //mantis:1147303; for vsync and de being close, avoid xc to sample framerate incorrectly.
2439 pVOPTiming->u16BottomField_Start = pVOPTiming->u16BottomField_VS +16;
2440 }
2441 else
2442 {
2443 pVOPTiming->u16TopField_Start = pVOPTiming->u16TopField_VS;
2444 pVOPTiming->u16BottomField_Start = pVOPTiming->u16BottomField_VS;
2445 }
2446
2447 // u8Framerate & u16H_Freq will be assigned to g_SrcInfo.*
2448 // in other place and cannot be removed
2449 pVOPTiming->u8Framerate = pstVideoStatus->u16FrameRate/1000;
2450 pVOPTiming->u16ExpFrameRate = pstVideoStatus->u16FrameRate;
2451
2452 // u16H_Freq (unit: 100Hz)
2453 pVOPTiming->u16H_Freq = (MS_U16)
2454 ((MS_U32)pVOPTiming->u16V_TotalCount *
2455 (MS_U32)pstVideoStatus->u16FrameRate/100000);
2456
2457 //calculate clock
2458 MS_U32 u32tmp_num, u32tmp_den;
2459 u32R = (MS_U32)pVOPTiming->u16H_TotalCount*(MS_U32)pVOPTiming->u16V_TotalCount%1000;
2460 u32Q = (MS_U32)pVOPTiming->u16H_TotalCount*(MS_U32)pVOPTiming->u16V_TotalCount/1000;
2461 u32R *= pstVideoStatus->u16FrameRate; // frameratex1000
2462 u32Q *= pstVideoStatus->u16FrameRate; // frameratex1000
2463 u32Q += u32R/1000;
2464 MVOP_Clock = u32Q;
2465 u32MaxFactor = _MaxFactor(MVOP_Clock, DC_BaseClock*1000);
2466 #if defined (__aarch64__)
2467 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>u32MaxFactor = %d\n",u32MaxFactor);)
2468 #else
2469 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>u32MaxFactor = %d\n",(int)u32MaxFactor);)
2470 #endif
2471 if (u32MaxFactor == 1)
2472 {
2473 pVOPTiming->u16Num = (MS_U16)(MVOP_Clock/2000);
2474 pVOPTiming->u16Den = (MS_U16)(DC_BaseClock/2);
2475 }
2476 else if (u32MaxFactor != 0)
2477 {
2478 u32tmp_num = MVOP_Clock/u32MaxFactor;
2479 u32tmp_den = DC_BaseClock*1000/u32MaxFactor;
2480 while(u32tmp_den > 65535)
2481 {
2482 u32tmp_den = u32tmp_den >> 1;
2483 u32tmp_num = u32tmp_num >> 1;
2484
2485 }
2486 pVOPTiming->u16Num = (MS_U16)(u32tmp_num);
2487 pVOPTiming->u16Den = (MS_U16)(u32tmp_den);
2488 }
2489 else
2490 {
2491 pVOPTiming->u16Num = 0;
2492 pVOPTiming->u16Den = 0;
2493 }
2494
2495 #if 0
2496 //calculate clock
2497 u32R = (MS_U32)pVOPTiming->u16H_TotalCount*(MS_U32)pVOPTiming->u16V_TotalCount%1000;
2498 u32Q = (MS_U32)pVOPTiming->u16H_TotalCount*(MS_U32)pVOPTiming->u16V_TotalCount/1000;
2499 u32R *= pstVideoStatus->u16FrameRate; // frameratex1000
2500 u32Q *= pstVideoStatus->u16FrameRate; // frameratex1000
2501 u32Q += u32R/1000;
2502 u32Q /= 1000; // u32Q is the result
2503 MVOP_Clock = u32Q;
2504 u32MaxFactor = _MaxFactor(MVOP_Clock, DC_BaseClock);
2505
2506 if (u32MaxFactor == 1)
2507 {
2508 pVOPTiming->u16Num = (MS_U16)(MVOP_Clock/2);
2509 pVOPTiming->u16Den = (MS_U16)(DC_BaseClock/2);
2510 }
2511 else if (u32MaxFactor != 0)
2512 {
2513 pVOPTiming->u16Num = (MS_U16)(MVOP_Clock/u32MaxFactor);
2514 pVOPTiming->u16Den = (MS_U16)(DC_BaseClock/u32MaxFactor);
2515 }
2516 else
2517 {
2518 pVOPTiming->u16Num = 0;
2519 pVOPTiming->u16Den = 0;
2520 }
2521 #endif
2522 MVOP_TIMING_DBG(MVOP_PRINTF("\n>>>>> MVOP output\n");)
2523 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> w=%d, h=%d, i=%d, fr=%d\n", pVOPTiming->u16Width, pVOPTiming->u16Height,
2524 pVOPTiming->bInterlace, pVOPTiming->u16ExpFrameRate);)
2525 MVOP_TIMING_DBG(MVOP_PRINTF(">>>>> hTotal=%d, vTotal=%d\n", pVOPTiming->u16H_TotalCount, pVOPTiming->u16V_TotalCount);)
2526 MVOP_TIMING_DBG(MVOP_PRINTF(">>> ImgHSt=%d ImgVSt0=%d ImgVSt1=%d\n", pVOPTiming->u16HImg_Start, pVOPTiming->u16VImg_Start0, pVOPTiming->u16VImg_Start1);)
2527 return TRUE;
2528 }
2529
_MVOP_MIUtypeSwitchMVOPEnum(eMIU_SelType eMiuSel)2530 HALMVOPMIUSEL _MVOP_MIUtypeSwitchMVOPEnum(eMIU_SelType eMiuSel)
2531 {
2532 HALMVOPMIUSEL eRet = E_MVOP_SEL_NONE;
2533
2534 switch(eMiuSel)
2535 {
2536 case MIU_SELTYPE_MIU0:
2537 eRet = E_MVOP_SEL_MIU0;
2538 break;
2539 case MIU_SELTYPE_MIU1:
2540 eRet = E_MVOP_SEL_MIU1;
2541 break;
2542 case MIU_SELTYPE_MIU2:
2543 eRet = E_MVOP_SEL_MIU2;
2544 break;
2545 case MIU_SELTYPE_MIU3:
2546 eRet = E_MVOP_SEL_MIU3;
2547 break;
2548 case MIU_SELTYPE_MIU_ALL:
2549 eRet = E_MVOP_SEL_NONE;
2550 break;
2551 default:
2552 break;
2553 }
2554
2555 return eRet;
2556
2557 }
2558
2559 //Notice: This function is not supported for T2.
MVOP_MiuSwitch(MS_BOOL bIsMain,MS_U8 u8Miu)2560 static MVOP_Result MVOP_MiuSwitch(MS_BOOL bIsMain, MS_U8 u8Miu)
2561 {
2562 eMIUClientID eCid = MVOP_MIU_CLIENT_MAIN;
2563 eMIU_SelType eMiuSel = MIU_SELTYPE_MIU1;
2564 MVOP_DevID eDevID = E_MVOP_DEV_0;
2565
2566 if (!bIsMain)
2567 {
2568 eCid = MVOP_MIU_CLIENT_SUB;
2569 eDevID = E_MVOP_DEV_1;
2570 }
2571
2572 if (u8Miu == 0)
2573 {
2574 eMiuSel = MIU_SELTYPE_MIU0;
2575 }
2576 else if (u8Miu == 1)
2577 {
2578 //wait for miu kernel mode
2579 #if 1
2580 if (!MDrv_MIU_IsSupportMIU1())
2581 {
2582 return E_MVOP_INVALID_PARAM;
2583 }
2584 #endif
2585 eMiuSel = MIU_SELTYPE_MIU1;
2586 }
2587 else if (u8Miu == 2)
2588 {
2589 eMiuSel = MIU_SELTYPE_MIU2;
2590 }
2591 else if (u8Miu == 3)
2592 {
2593 eMiuSel = MIU_SELTYPE_MIU3;
2594 }
2595 else
2596 {
2597 return E_MVOP_INVALID_PARAM;
2598 }
2599 MVOP_DBG(MVOP_PRINTF("%s eCid = %d, eMiuSel = %d\n",__FUNCTION__,eCid,eMiuSel);)
2600
2601 /* MIU1 Bank MIU_SEL = 1(Group 1 ID 3: 0x100679[3] = 1)
2602 // MIU Switch to IP Control */
2603 if(HAL_MVOP_GetIsMiuIPControl)
2604 {
2605 MIU_ClientInfo stMiuClientInfo;
2606 HALMVOPMIUCLIENTINFO stMvopMiuClientInfo;
2607 HALMVOPMIUSEL eMvopMiuSel = E_MVOP_SEL_MIU1;
2608 MS_BOOL bIsIPCtrl = 0;
2609
2610 //wait for miu kernel mode
2611 MDrv_MIU_GetClientInfo(eMiuSel, eCid, &stMiuClientInfo);
2612 stMvopMiuClientInfo.u8BitPos = stMiuClientInfo.u8BitPos;
2613 stMvopMiuClientInfo.u8Gp = stMiuClientInfo.u8Gp;
2614 MVOP_DBG(MVOP_PRINTF("%s MIU group = %d, bit = %d\n",__FUNCTION__,stMvopMiuClientInfo.u8Gp,stMvopMiuClientInfo.u8BitPos);)
2615
2616 eMvopMiuSel = _MVOP_MIUtypeSwitchMVOPEnum(eMiuSel);
2617
2618 if(HAL_MVOP_GetIsOnlyMiuIPControl)
2619 {
2620 bIsIPCtrl = (HAL_MVOP_GetIsOnlyMiuIPControl() || HAL_MVOP_GetIsMiuIPControl(stMvopMiuClientInfo));
2621 }
2622 else
2623 {
2624 bIsIPCtrl = HAL_MVOP_GetIsMiuIPControl(stMvopMiuClientInfo);
2625 }
2626
2627 if(bIsIPCtrl)
2628 {
2629 //wait for miu kernel mode
2630 MDrv_MIU_SelMIU(eCid, MIU_SELTYPE_MIU_ALL); // enable for only miu IP control
2631 MVOP_DBG(MVOP_PRINTF("MVOP_MiuSwitch IP control\n");)
2632 HAL_MVOP_SelMIU(eDevID, eMvopMiuSel, eMvopMiuSel, eMvopMiuSel, eMvopMiuSel);
2633 return E_MVOP_OK;
2634 }
2635 }
2636
2637 MVOP_DBG(MVOP_PRINTF("MVOP_MiuSwitch eCid=0x%x, eMiuSel=0x%x\n", eCid, eMiuSel);)
2638 //wait for miu kernel mode
2639 MDrv_MIU_SelMIU(eCid, eMiuSel);
2640
2641 return E_MVOP_OK;
2642 }
2643
MVOP_GetStatus(MVOP_DevID eID,MVOP_DrvStatus * pMVOPStat)2644 static MS_BOOL MVOP_GetStatus(MVOP_DevID eID, MVOP_DrvStatus *pMVOPStat)
2645 {
2646 MVOP_DrvStatus *pDrvStat = NULL;
2647
2648 if(eID >= HAL_MVOP_MODULE_CNT)
2649 {
2650 MVOP_DBG(MVOP_PRINTF("%s MVOP Device ID is out of MVOP module number\n", __FUNCTION__);)
2651 return FALSE;
2652 }
2653 else if(eID == E_MVOP_DEV_0)
2654 {
2655 if (p_gDrvMVOPCtx == NULL)
2656 {
2657 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
2658 return FALSE;
2659 }
2660 }
2661 #if MVOP_SUPPORT_SUB
2662 else if(eID == E_MVOP_DEV_1)
2663 {
2664 if (p_gDrvSubMVOPCtx == NULL)
2665 {
2666 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
2667 return FALSE;
2668 }
2669 }
2670 #endif
2671
2672 if(eID == E_MVOP_DEV_0)
2673 pDrvStat = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._stMVOPDrvStat;
2674 #if MVOP_SUPPORT_SUB
2675 else if(eID == E_MVOP_DEV_1)
2676 pDrvStat = &p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[eID]._stMVOPDrvStat;
2677 #endif
2678
2679 if ((pMVOPStat == NULL) || (pDrvStat == NULL))
2680 {
2681 return FALSE;
2682 }
2683
2684 pMVOPStat->bIsInit = pDrvStat->bIsInit;
2685 pMVOPStat->bIsEnable = pDrvStat->bIsEnable;
2686 pMVOPStat->bIsUVShift = pDrvStat->bIsUVShift;
2687 pMVOPStat->bIsBlackBG = pDrvStat->bIsBlackBG;
2688 pMVOPStat->bIsMonoMode = pDrvStat->bIsMonoMode;
2689 return TRUE;
2690 }
2691
MVOP_ResetVar(MVOP_DevID eID)2692 void MVOP_ResetVar(MVOP_DevID eID)
2693 {
2694 MVOP_DrvCtrlSt* pstDrvCtrl;
2695 MS_U16 u16ECOVersion;
2696
2697 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
2698
2699 u16ECOVersion = (MS_U16)MDrv_SYS_GetChipRev();
2700
2701 switch(eID)
2702 {
2703 case E_MVOP_DEV_0:
2704 if (p_gDrvMVOPCtx == NULL)
2705 {
2706 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
2707 return;
2708 }
2709 HAL_MVOP_SetInputMode( VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
2710 pstDrvCtrl = MVOP_GetDrvCtrl(E_MVOP_DEV_0);
2711 MDrv_MVOP_EnableFreerunMode(FALSE);
2712 break;
2713 #if MVOP_SUPPORT_SUB
2714 case E_MVOP_DEV_1:
2715 if (p_gDrvSubMVOPCtx == NULL)
2716 {
2717 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
2718 return;
2719 }
2720 HAL_MVOP_SubSetInputMode( VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
2721 pstDrvCtrl = MVOP_GetSubDrvCtrl(E_MVOP_DEV_1);
2722 MDrv_MVOP_SubEnableFreerunMode(FALSE);
2723 break;
2724 #endif
2725 default:
2726 MVOP_DBG(MVOP_PRINTF("%s MVOP Device ID is out of MVOP module number\n", __FUNCTION__);)
2727 return;
2728 break;
2729 }
2730 pstDrvCtrl->_bEnableFreerunMode = FALSE;
2731 pstDrvCtrl->_bEnMinVSize576 = TRUE;
2732 pstDrvCtrl->_bEnVSizeDup = FALSE;
2733 pstDrvCtrl->_bEnVSizex4Dup = FALSE;
2734 pstDrvCtrl->_bEnHSizex4Dup = FALSE;
2735 pstDrvCtrl->_eRgbFmt = E_MVOP_RGB_NONE;
2736 pstDrvCtrl->_u16FixVtt = 0;
2737 pstDrvCtrl->_u16SrcHSize = 0;
2738 pstDrvCtrl->_u16SrcVSize = 0;
2739 memset(&pstDrvCtrl->_mvopTiming, 0, sizeof(MVOP_Timing));
2740 pstDrvCtrl->_bEnHDS = FALSE;
2741 pstDrvCtrl->_bEn265DV = FALSE;
2742 pstDrvCtrl->_bGOPPatch = TRUE;
2743 HAL_MVOP_ResetReg(eID, u16ECOVersion);
2744
2745 }
2746
2747
2748 //-------------------------------------------------------------------------------------------------
2749 // Global Functions
2750 //-------------------------------------------------------------------------------------------------
2751 ////////////////////////////////////////////////////////////////////////////////
2752 /// This function shows the version of MVOP driver.
2753 ///
2754 /// @param *ppVersion : pointer to the driver version
2755 ////////////////////////////////////////////////////////////////////////////////
MDrv_MVOP_GetLibVer_V2(void * pInstance,const MSIF_Version ** ppVersion)2756 MVOP_Result MDrv_MVOP_GetLibVer_V2(void* pInstance, const MSIF_Version **ppVersion)
2757 {
2758 if (!ppVersion)
2759 return E_MVOP_FAIL;
2760
2761 *ppVersion = &_drv_mvop_version;
2762 return E_MVOP_OK;
2763 }
2764
MDrv_MVOP_GetLibVer(const MSIF_Version ** ppVersion)2765 MVOP_Result MDrv_MVOP_GetLibVer(const MSIF_Version **ppVersion)
2766 {
2767 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
2768 if (!ppVersion)
2769 return E_MVOP_FAIL;
2770
2771 *ppVersion = &_drv_mvop_version;
2772 return E_MVOP_OK;
2773 }
2774
2775 /********************************************************************************/
2776 /// Set detailed level of MVOP driver debug message (level)
2777 /// This function is used for MVOP driver debug message setting
2778 /// @param level \b IN level from 0 to 1
2779 /********************************************************************************/
MDrv_MVOP_SetDbgLevel_V2(void * pInstance,MS_U8 level)2780 void MDrv_MVOP_SetDbgLevel_V2(void* pInstance, MS_U8 level)
2781 {
2782 _u8DebugMsgLevel = level;
2783 return;
2784 }
2785
MDrv_MVOP_SetDbgLevel(MS_U8 level)2786 void MDrv_MVOP_SetDbgLevel(MS_U8 level)
2787 {
2788 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
2789 #if ENABLE_UTOPIA2_INTERFACE
2790 stMVOP_SET_DBG_LEVEL IO_arg;
2791 IO_arg.level = level;
2792
2793 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
2794 {
2795 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
2796 return;
2797 }
2798
2799 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SET_DBG_LEVEL, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
2800 {
2801 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
2802 return ;
2803 }
2804 return;
2805 #else
2806 void* pInstance = NULL;
2807 MDrv_MVOP_SetDbgLevel_V2(pInstance,level));
2808 #endif
2809
2810 }
2811
2812 //-----------------------------------------------------------------------------
2813 /// Get information of MVOP driver.
2814 /// @return driver information
2815 //-----------------------------------------------------------------------------
MDrv_MVOP_GetInfo_V2(void * pInstance)2816 const MVOP_DrvInfo* MDrv_MVOP_GetInfo_V2(void* pInstance)
2817 {
2818 _DRV_MVOP_Entry(E_MVOP_DEV_0);
2819
2820 if (p_gDrvMVOPCtx == NULL)
2821 {
2822 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
2823 _DRV_MVOP_Return(E_MVOP_DEV_0, FALSE);
2824 }
2825
2826 p_gDrvMVOPCtx->_stMVOPDrvInfo.u32MaxSynClk = MAX_MVOP_FREQ;
2827 p_gDrvMVOPCtx->_stMVOPDrvInfo.u32MinSynClk = MIN_MVOP_FREQ;
2828 p_gDrvMVOPCtx->_stMVOPDrvInfo.u32MaxFreerunClk = (MS_U32)(HAL_MVOP_GetMaxFreerunClk());
2829
2830 _DRV_MVOP_Return(E_MVOP_DEV_0, &p_gDrvMVOPCtx->_stMVOPDrvInfo);
2831 }
2832
MDrv_MVOP_GetInfo(void)2833 const MVOP_DrvInfo* MDrv_MVOP_GetInfo(void)
2834 {
2835 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
2836 #if ENABLE_UTOPIA2_INTERFACE
2837 stMVOP_GET_INFO IO_arg;
2838 memset(&IO_arg,0x00,sizeof(stMVOP_GET_INFO)); //CID 51854
2839
2840
2841 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
2842 {
2843 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
2844 return FALSE;
2845 }
2846
2847 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_GET_INFO, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
2848 {
2849 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
2850 return FALSE;
2851 }
2852
2853 return IO_arg.pRet;
2854 #else
2855 void* pInstance = NULL;
2856 return (MDrv_MVOP_GetInfo_V2(pInstance));
2857 #endif
2858 }
2859
2860 //-----------------------------------------------------------------------------
2861 /// Get status of MVOP driver
2862 /// @param -pstatus: driver status
2863 /// @return - TRUE / FALSE
2864 //-----------------------------------------------------------------------------
MDrv_MVOP_GetStatus_V2(void * pInstance,MVOP_DrvStatus * pMVOPStat)2865 MS_BOOL MDrv_MVOP_GetStatus_V2(void* pInstance, MVOP_DrvStatus *pMVOPStat)
2866 {
2867 _DRV_MVOP_Entry(E_MVOP_DEV_0);
2868 _DRV_MVOP_Return(E_MVOP_DEV_0,MVOP_GetStatus(E_MVOP_DEV_0, pMVOPStat));
2869 }
2870
MDrv_MVOP_GetStatus(MVOP_DrvStatus * pMVOPStat)2871 MS_BOOL MDrv_MVOP_GetStatus(MVOP_DrvStatus *pMVOPStat)
2872 {
2873 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
2874 #if ENABLE_UTOPIA2_INTERFACE
2875 stMVOP_GET_STATUS IO_arg;
2876 IO_arg.pMVOPStat = pMVOPStat;
2877 IO_arg.bRet = FALSE;
2878
2879 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
2880 {
2881 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
2882 return IO_arg.bRet;
2883 }
2884
2885 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_GET_STATUS, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
2886 {
2887 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
2888 return IO_arg.bRet;
2889 }
2890 return IO_arg.bRet;
2891
2892 #else
2893 void* pInstance = NULL;
2894 return (MDrv_MVOP_GetStatus_V2(pInstance, pMVOPStat));
2895 #endif
2896 }
2897
2898 /********************************************************************************/
2899 /// Get distance from HSync to DE for Scaler, unit: mvop clock cycle
2900 /// @return HStart
2901 /********************************************************************************/
MDrv_MVOP_GetHStart_V2(void * pInstance)2902 MS_U16 MDrv_MVOP_GetHStart_V2(void* pInstance)
2903 {
2904 _DRV_MVOP_Entry(E_MVOP_DEV_0);
2905 if (p_gDrvMVOPCtx == NULL)
2906 {
2907 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
2908 _DRV_MVOP_Return(E_MVOP_DEV_0, 0);
2909 }
2910 #if defined(STB_DC_MODE)||(STB_DC)
2911 if(HAL_MVOP_GetIsCurrentXCGenTiming && (HAL_MVOP_GetIsCurrentXCGenTiming(E_MVOP_DEV_0) == FALSE))
2912 {
2913 MVOP_DBG(MVOP_PRINTF("%s get h satrt mvop gentiming\n", __FUNCTION__);)
2914 _DRV_MVOP_Return(E_MVOP_DEV_0, (p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16HActive_Start)/2 + 2);
2915 }
2916 else
2917 {
2918 MVOP_DBG(MVOP_PRINTF("%s get h satrt xc gentiming\n", __FUNCTION__);)
2919 _DRV_MVOP_Return(E_MVOP_DEV_0, 0);
2920 }
2921 #else
2922 _DRV_MVOP_Return(E_MVOP_DEV_0, (p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16HActive_Start)/2 + 2);
2923 #endif
2924 }
2925
MDrv_MVOP_GetHStart(void)2926 MS_U16 MDrv_MVOP_GetHStart(void)
2927 {
2928 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
2929 #if ENABLE_UTOPIA2_INTERFACE
2930 stMVOP_GET_HSTART IO_arg;
2931 IO_arg.u16Ret = 0;
2932
2933 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
2934 {
2935 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
2936 return IO_arg.u16Ret;
2937 }
2938
2939 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_GET_HSTART, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
2940 {
2941 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
2942 return IO_arg.u16Ret;
2943 }
2944 return IO_arg.u16Ret;
2945 #else
2946 void* pInstance = NULL;
2947 return (MDrv_MVOP_GetHStart_V2(pInstance));
2948 #endif
2949 }
2950
2951 /********************************************************************************/
2952 /// Get distance from HSync to DE for Scaler, unit: mvop clock cycle
2953 /// @return VStart
2954 /********************************************************************************/
MDrv_MVOP_GetVStart_V2(void * pInstance)2955 MS_U16 MDrv_MVOP_GetVStart_V2(void* pInstance)
2956 {
2957 MS_U16 u16Vst = 0;
2958
2959 _DRV_MVOP_Entry(E_MVOP_DEV_0);
2960
2961 if (p_gDrvMVOPCtx == NULL)
2962 {
2963 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
2964 _DRV_MVOP_Return(E_MVOP_DEV_0, u16Vst);
2965 }
2966 #if defined(STB_DC_MODE)||(STB_DC)
2967 if(HAL_MVOP_GetIsCurrentXCGenTiming && (HAL_MVOP_GetIsCurrentXCGenTiming(E_MVOP_DEV_0) == FALSE))
2968 {
2969 u16Vst = p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16VBlank0_End - p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16TopField_VS;
2970 if (p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.bInterlace==1)
2971 {
2972 u16Vst*=2;
2973 u16Vst-=18;
2974 }
2975 else
2976 {
2977 u16Vst-=5;
2978 }
2979
2980 if (TRUE == MVOP_NeedAdjustVSize(E_MVOP_DEV_0))
2981 {
2982 if (p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._u16SrcVSize != 0)
2983 {
2984 MVOP_DBG(MVOP_PRINTF("_u16SrcVSize = %d, report (VSt Plus N) %d ",
2985 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._u16SrcVSize, u16Vst);)
2986 MS_U16 u16VSize = p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16Height;
2987 u16Vst += (ALIGN_UPTO_4(u16VSize) - u16VSize);
2988 MVOP_DBG(MVOP_PRINTF("==> %d \n", u16Vst);)
2989 }
2990 }
2991
2992 _DRV_MVOP_Return(E_MVOP_DEV_0, u16Vst);
2993 }
2994 else
2995 {
2996 _DRV_MVOP_Return(E_MVOP_DEV_0, u16Vst);
2997 }
2998 #else
2999 u16Vst = p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16VBlank0_End - p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16TopField_VS;
3000 if (p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.bInterlace==1)
3001 {
3002 u16Vst*=2;
3003 u16Vst-=18;
3004 }
3005 else
3006 {
3007 u16Vst-=5;
3008 }
3009
3010 if (TRUE == MVOP_NeedAdjustVSize(E_MVOP_DEV_0))
3011 {
3012 if (p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._u16SrcVSize != 0)
3013 {
3014 MVOP_DBG(MVOP_PRINTF("_u16SrcVSize = %d, report (VSt Plus N) %d ",
3015 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._u16SrcVSize, u16Vst);)
3016 MS_U16 u16VSize = p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16Height;
3017 u16Vst += (ALIGN_UPTO_4(u16VSize) - u16VSize);
3018 MVOP_DBG(MVOP_PRINTF("==> %d \n", u16Vst);)
3019 }
3020 }
3021
3022 _DRV_MVOP_Return(E_MVOP_DEV_0, u16Vst);
3023 #endif
3024 }
3025
MDrv_MVOP_GetVStart(void)3026 MS_U16 MDrv_MVOP_GetVStart(void)
3027 {
3028 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
3029 #if ENABLE_UTOPIA2_INTERFACE
3030 stMVOP_GET_VSTART IO_arg;
3031 IO_arg.u16Ret = 0;
3032
3033 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
3034 {
3035 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
3036 return IO_arg.u16Ret;
3037 }
3038
3039 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_GET_VSTART, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
3040 {
3041 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
3042 return IO_arg.u16Ret;
3043 }
3044 return IO_arg.u16Ret;
3045
3046 #else
3047 void* pInstance = NULL;
3048 return (MDrv_MVOP_GetVStart_V2(pInstance));
3049 #endif
3050 }
3051
3052 /******************************************************************************/
3053 // Set MVOP clock enable
3054 // @param bEnable \b IN
3055 // - # TRUE Enable clock
3056 // - # FALSE Close clock
3057 /******************************************************************************/
MDrv_MVOP_SetClk_V2(void * pInstance,MS_BOOL bEnable)3058 void MDrv_MVOP_SetClk_V2 (void* pInstance, MS_BOOL bEnable )
3059 {
3060 HAL_MVOP_SetDCClk(0, bEnable); //Clk DC0
3061 HAL_MVOP_SetDCClk(1, bEnable); //Clk DC1
3062 if(HAL_MVOP_SetDCSRAMClk)
3063 {
3064 HAL_MVOP_SetDCSRAMClk(0, bEnable); //Clk DC0 sraam clock
3065 }
3066 #ifdef UFO_MVOP_FB_DEC_CLK
3067 if(HAL_MVOP_SetFBDecClk)
3068 {
3069 HAL_MVOP_SetFBDecClk(E_MVOP_DEV_0, bEnable); // clk FBDec
3070 }
3071 #endif
3072 }
3073
MDrv_MVOP_SetClk(MS_BOOL bEnable)3074 static void MDrv_MVOP_SetClk ( MS_BOOL bEnable )
3075 {
3076 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
3077 HAL_MVOP_SetDCClk(0, bEnable); //Clk DC0
3078 HAL_MVOP_SetDCClk(1, bEnable); //Clk DC1
3079 if(HAL_MVOP_SetDCSRAMClk)
3080 {
3081 HAL_MVOP_SetDCSRAMClk(0, bEnable); //Clk DC0 sraam clock
3082 }
3083 #ifdef UFO_MVOP_FB_DEC_CLK
3084 if(HAL_MVOP_SetFBDecClk)
3085 {
3086 HAL_MVOP_SetFBDecClk(E_MVOP_DEV_0, bEnable); // clk FBDec
3087 }
3088 #endif
3089 }
3090
3091 //-----------------------------------------------------------------------------
3092 /// Set MVOP test pattern.
3093 //-----------------------------------------------------------------------------
MDrv_MVOP_SetPattern_V2(void * pInstance,MVOP_Pattern enMVOPPattern)3094 void MDrv_MVOP_SetPattern_V2(void* pInstance, MVOP_Pattern enMVOPPattern)
3095 {
3096 static MVOP_Pattern s_enMVOPPattern = MVOP_PATTERN_NORMAL;
3097
3098 _DRV_MVOP_Entry(E_MVOP_DEV_0);
3099
3100 if (p_gDrvMVOPCtx == NULL)
3101 {
3102 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
3103 _DRV_MVOP_Return(E_MVOP_DEV_0, );
3104 }
3105
3106 if (!MVOP_IsInit())
3107 {
3108 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
3109 _DRV_MVOP_Return(E_MVOP_DEV_0, );
3110 }
3111
3112 if(enMVOPPattern == MVOP_PATTERN_DEFAULT)
3113 {
3114 enMVOPPattern = (MVOP_Pattern)(((MS_U32)(s_enMVOPPattern) + 1) % (MS_U32)MVOP_PATTERN_DEFAULT);
3115 }
3116 HAL_MVOP_SetPattern(enMVOPPattern);
3117 s_enMVOPPattern = enMVOPPattern;
3118
3119 _DRV_MVOP_Release(E_MVOP_DEV_0);
3120 }
3121
MDrv_MVOP_SetPattern(MVOP_Pattern enMVOPPattern)3122 void MDrv_MVOP_SetPattern(MVOP_Pattern enMVOPPattern)
3123 {
3124 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
3125 #if ENABLE_UTOPIA2_INTERFACE
3126 stMVOP_SET_PATTERN IO_arg;
3127 IO_arg.enMVOPPattern = enMVOPPattern;
3128
3129 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
3130 {
3131 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
3132 return;
3133 }
3134
3135 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SET_PATTERN, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
3136 {
3137 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
3138 return;
3139 }
3140
3141 #else
3142 void* pInstance = NULL;
3143 return (MDrv_MVOP_SetPattern_V2(pInstance, enMVOPPattern));
3144 #endif
3145 }
3146
3147 //-----------------------------------------------------------------------------
3148 /// Configure the tile format of the MVOP input.
3149 /// @return TRUE or FALSE
3150 //-----------------------------------------------------------------------------
MDrv_MVOP_SetTileFormat_V2(void * pInstance,MVOP_TileFormat eTileFmt)3151 MS_BOOL MDrv_MVOP_SetTileFormat_V2(void* pInstance, MVOP_TileFormat eTileFmt)
3152 {
3153 MS_BOOL bRet = FALSE;
3154 _DRV_MVOP_Entry(E_MVOP_DEV_0);
3155
3156 if (p_gDrvMVOPCtx == NULL)
3157 {
3158 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
3159 _DRV_MVOP_Return(E_MVOP_DEV_0, FALSE);
3160 }
3161 if (!MVOP_IsInit())
3162 {
3163 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
3164 _DRV_MVOP_Return(E_MVOP_DEV_0, FALSE);
3165 }
3166 bRet = HAL_MVOP_SetTileFormat(eTileFmt);
3167
3168 _DRV_MVOP_Return(E_MVOP_DEV_0, bRet);
3169 //return HAL_MVOP_SetTileFormat(eTileFmt);
3170 }
3171
MDrv_MVOP_SetTileFormat(MVOP_TileFormat eTileFmt)3172 MS_BOOL MDrv_MVOP_SetTileFormat(MVOP_TileFormat eTileFmt)
3173 {
3174 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
3175 #if ENABLE_UTOPIA2_INTERFACE
3176 stMVOP_SET_TILE_FORMAT IO_arg;
3177 IO_arg.eTileFmt = eTileFmt;
3178 IO_arg.bRet = FALSE;
3179
3180 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
3181 {
3182 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
3183 return IO_arg.bRet;
3184 }
3185
3186 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_SET_TILE_FORMAT, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
3187 {
3188 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
3189 return IO_arg.bRet;
3190 }
3191 return IO_arg.bRet;
3192 #else
3193 void* pInstance = NULL;
3194 return (MDrv_MVOP_SetTileFormat_V2(pInstance, eTileFmt));
3195 #endif
3196 }
3197
3198
3199 //-----------------------------------------------------------------------------
3200 /// Set MMIO Base for MVOP.
3201 /// @return TRUE or FALSE
3202 //-----------------------------------------------------------------------------
MDrv_MVOP_SetMMIOMapBase_V2(void * pInstance)3203 MS_BOOL MDrv_MVOP_SetMMIOMapBase_V2(void* pInstance)
3204 {
3205 return MVOP_SetRegBaseAdd(HAL_MVOP_RegSetBase);
3206 }
3207
MDrv_MVOP_SetMMIOMapBase(void)3208 MS_BOOL MDrv_MVOP_SetMMIOMapBase(void)
3209 {
3210 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
3211 return MVOP_SetRegBaseAdd(HAL_MVOP_RegSetBase);
3212 }
3213
3214 /******************************************************************************/
3215 /// Initialize MVOP hardware and set it to hardwire mode
3216 /******************************************************************************/
MDrv_MVOP_Init_V2(void * pInstance)3217 void MDrv_MVOP_Init_V2(void* pInstance)
3218 {
3219
3220 MVOP_DrvInitCtxResults eRet = E_MVOP_INIT_FAIL;
3221 MS_BOOL pbFirstDrvInstant;
3222 MS_U16 u16ECOVersion;
3223
3224 _DRV_MVOP_MutexCreate(E_MVOP_DEV_0);
3225
3226 _DRV_MVOP_Entry(E_MVOP_DEV_0);
3227
3228 eRet = _MVOP_Init_Context(&pbFirstDrvInstant);
3229 if(eRet == E_MVOP_INIT_FAIL)
3230 {
3231 MVOP_DBG(MVOP_PRINTF("[%s] Context Init FAILED!\n",__FUNCTION__);)
3232 _DRV_MVOP_Return(E_MVOP_DEV_0, );
3233 }
3234 else if(eRet == E_MVOP_INIT_ALREADY_EXIST)
3235 {
3236 if(MDrv_MVOP_SetMMIOMapBase() == FALSE)
3237 {
3238 _DRV_MVOP_Return(E_MVOP_DEV_0, );
3239 }
3240 HAL_MVOP_Init();
3241 //1. enable clock
3242 MDrv_MVOP_SetClk(TRUE);
3243 //2. enable sram power
3244 #ifdef CONFIG_MSTAR_SRAMPD
3245 if(HAL_MVOP_SetSramPower)
3246 {
3247 HAL_MVOP_SetSramPower(E_MVOP_DEV_0, TRUE);
3248 }
3249 #endif
3250 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._stMVOPDrvStat.bIsInit = TRUE;
3251 _DRV_MVOP_Return(E_MVOP_DEV_0, );
3252 }
3253 _MVOP_InitVar(E_MVOP_DEV_0);
3254 u16ECOVersion = (MS_U16)MDrv_SYS_GetChipRev();
3255
3256 if(MDrv_MVOP_SetMMIOMapBase() == FALSE)
3257 {
3258 _DRV_MVOP_Return(E_MVOP_DEV_0, );
3259 }
3260
3261 HAL_MVOP_Init();
3262 if(HAL_MVOP_SetECONumber)
3263 {
3264 HAL_MVOP_SetECONumber(u16ECOVersion);
3265 }
3266 //HAL_MVOP_SetInputMode( VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
3267
3268 // Set fld inv & ofld_inv
3269 HAL_MVOP_SetFieldInverse(ENABLE, ENABLE);
3270
3271 // Set Croma weighting off
3272 HAL_MVOP_SetChromaWeighting(ENABLE);
3273 #if 0
3274 #if ENABLE_3D_LR_MODE
3275 HAL_MVOP_Enable3DLR(DISABLE);
3276 #endif
3277 #if SUPPORT_3DLR_ALT_SBS
3278 HAL_MVOP_Set3DLRAltOutput(DISABLE);
3279 HAL_MVOP_Set3DLRAltSBSOutput(DISABLE);
3280 #endif
3281 MDrv_MVOP_EnableFreerunMode(FALSE);
3282 #endif
3283 //1. enable clock
3284 MDrv_MVOP_SetClk(TRUE);
3285 //2. enable sram power
3286 #ifdef CONFIG_MSTAR_SRAMPD
3287 if(HAL_MVOP_SetSramPower)
3288 {
3289 HAL_MVOP_SetSramPower(E_MVOP_DEV_0, TRUE);
3290 }
3291 #endif
3292 HAL_MVOP_LoadReg();
3293
3294 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._stMVOPDrvStat.bIsInit = TRUE;
3295 _DRV_MVOP_Release(E_MVOP_DEV_0);
3296 }
3297
MDrv_MVOP_Init(void)3298 void MDrv_MVOP_Init(void)
3299 {
3300 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
3301 #if ENABLE_UTOPIA2_INTERFACE
3302 void* IO_arg = NULL;
3303
3304 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
3305 {
3306 if(UtopiaOpen(MODULE_MVOP|MVOP_DRIVER_BASE, &pu32MVOP_Inst[E_MVOP_MAIN_STREAM], 0, NULL) != UTOPIA_STATUS_SUCCESS)
3307 {
3308 MVOP_PRINTF("[Fail] UtopiaOpen MVOP failed\n");
3309 return;
3310 }
3311 }
3312
3313 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_INIT, (void*)(IO_arg)) != UTOPIA_STATUS_SUCCESS)
3314 {
3315 MVOP_PRINTF("[Fail] %s,%d\n",__FUNCTION__,__LINE__);
3316 return;
3317 }
3318 #else
3319 void* pInstance = NULL;
3320 MDrv_MVOP_Init_V2(pInstance);
3321 #endif
3322 }
3323
3324 //------------------------------------------------------------------------------
3325 ///Map context for multi process use
3326 //------------------------------------------------------------------------------
MDrv_MVOP_GetConfig(MVOP_Handle * stHd)3327 void MDrv_MVOP_GetConfig(MVOP_Handle* stHd)
3328 {
3329 switch(stHd->eModuleNum)
3330 {
3331 case E_MVOP_MODULE_MAIN:
3332 {
3333 MDrv_MVOP_Init();
3334 break;
3335 }
3336 case E_MVOP_MODULE_SUB:
3337 {
3338 #if MVOP_SUPPORT_SUB
3339 MDrv_MVOP_SubInit();
3340 break;
3341 #endif
3342 }
3343 default:
3344 {
3345 MVOP_DBG(MVOP_PRINTF("\n %s not support MVOP NUM\n", __FUNCTION__);)
3346 break;
3347 }
3348 }
3349 }
3350
3351
3352 /******************************************************************************/
3353 /// Exit MVOP, turn off clock
3354 /******************************************************************************/
MDrv_MVOP_Exit_V2(void * pInstance)3355 void MDrv_MVOP_Exit_V2(void* pInstance)
3356 {
3357 _DRV_MVOP_Entry(E_MVOP_DEV_0);
3358
3359 if (p_gDrvMVOPCtx == NULL)
3360 {
3361 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
3362 _DRV_MVOP_Return(E_MVOP_DEV_0, );
3363 }
3364 if (!MVOP_IsInit())
3365 {
3366 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
3367 _DRV_MVOP_Return(E_MVOP_DEV_0, );
3368 }
3369 //1. disable mvop
3370 HAL_MVOP_SetMIUReqMask(TRUE);
3371 HAL_MVOP_Enable(FALSE, 25);
3372 HAL_MVOP_SetMIUReqMask(FALSE);
3373 if(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bEn265DV)
3374 {
3375 #if MVOP_SUPPORT_SUB
3376 HAL_MVOP_SubSetMIUReqMask(TRUE);
3377 HAL_MVOP_SubEnable(FALSE, 25);
3378 HAL_MVOP_SubSetMIUReqMask(FALSE);
3379 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bIsDVDual = TRUE;
3380 #endif
3381
3382 }
3383 //2.disable mvop sram
3384 #ifdef CONFIG_MSTAR_SRAMPD
3385 if(HAL_MVOP_SetSramPower)
3386 {
3387 HAL_MVOP_SetSramPower(E_MVOP_DEV_0, FALSE);
3388 }
3389 #endif
3390 //3.disable mvop clock
3391 MDrv_MVOP_SetClk(FALSE);
3392 if(HAL_MVOP_Exit)
3393 {
3394 HAL_MVOP_Exit(E_MVOP_DEV_0);
3395 }
3396 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._stMVOPDrvStat.bIsInit = FALSE;
3397
3398 _DRV_MVOP_Release(E_MVOP_DEV_0);
3399 }
3400
MDrv_MVOP_Exit()3401 void MDrv_MVOP_Exit()
3402 {
3403 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
3404 #if ENABLE_UTOPIA2_INTERFACE
3405 void* IO_arg = NULL;
3406
3407 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
3408 {
3409 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
3410 return;
3411 }
3412
3413 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_EXIT, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
3414 {
3415 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
3416 return;
3417 }
3418 #else
3419 void* pInstance = NULL;
3420 MDrv_MVOP_Exit_V2(pInstance);
3421 #endif
3422 }
3423 /******************************************************************************/
3424 /// Enable and Disable MVOP
3425 /// @param bEnable \b IN
3426 /// - # TRUE Enable
3427 /// - # FALSE Disable and reset
3428 /******************************************************************************/
MDrv_MVOP_Enable_V2(void * pInstance,MS_BOOL bEnable)3429 void MDrv_MVOP_Enable_V2 (void* pInstance, MS_BOOL bEnable )
3430 {
3431 _DRV_MVOP_Entry(E_MVOP_DEV_0);
3432 MS_U8 u8FPS = 25; //Default fps = 25, set as normal case;
3433 if (p_gDrvMVOPCtx == NULL)
3434 {
3435 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
3436 _DRV_MVOP_Return(E_MVOP_DEV_0, );
3437 }
3438 if (!MVOP_IsInit())
3439 {
3440 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
3441 _DRV_MVOP_Return(E_MVOP_DEV_0, );
3442 }
3443 if(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u8Framerate != 0)
3444 {
3445 u8FPS = p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u8Framerate;
3446 }
3447
3448 HAL_MVOP_SetMIUReqMask(TRUE);
3449 HAL_MVOP_Enable(bEnable, u8FPS);
3450 HAL_MVOP_SetMIUReqMask(FALSE);
3451
3452 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._stMVOPDrvStat.bIsEnable = bEnable;
3453 if(FALSE == bEnable)
3454 {
3455 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._stMVOPDrvStat.bIsSetTiming = bEnable;
3456 }
3457 _DRV_MVOP_Release(E_MVOP_DEV_0);
3458 }
3459
MDrv_MVOP_Enable(MS_BOOL bEnable)3460 void MDrv_MVOP_Enable ( MS_BOOL bEnable )
3461 {
3462 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d arg:%d\n", __FUNCTION__, __LINE__, bEnable);)
3463 #if ENABLE_UTOPIA2_INTERFACE
3464 stMVOP_ENABLE IO_arg;
3465 IO_arg.bEnable = bEnable;
3466
3467 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
3468 {
3469 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
3470 return;
3471 }
3472
3473 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_ENABLE, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
3474 {
3475 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
3476 return;
3477 }
3478
3479 #else
3480 void* pInstance = NULL;
3481 MDrv_MVOP_Enable_V2(pInstance, bEnable);
3482 #endif
3483 }
3484
3485 /******************************************************************************/
3486 /// Get if MVOP is enable or not.
3487 /// @param pbEnable \b OUT
3488 /// - # TRUE Enable
3489 /// - # FALSE Disable
3490 /******************************************************************************/
MDrv_MVOP_GetIsEnable_V2(void * pInstance,MS_BOOL * pbEnable)3491 MVOP_Result MDrv_MVOP_GetIsEnable_V2 (void* pInstance, MS_BOOL* pbEnable)
3492 {
3493 _DRV_MVOP_Entry(E_MVOP_DEV_0);
3494 if (p_gDrvMVOPCtx == NULL)
3495 {
3496 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
3497 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_FAIL);
3498 }
3499
3500 if ((NULL == pbEnable) || (TRUE != MVOP_IsInit()))
3501 {
3502 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
3503 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_FAIL);
3504 }
3505
3506 *pbEnable = HAL_MVOP_GetEnableState();
3507 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_OK);
3508 }
3509
MDrv_MVOP_GetIsEnable(MS_BOOL * pbEnable)3510 MVOP_Result MDrv_MVOP_GetIsEnable (MS_BOOL* pbEnable)
3511 {
3512 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
3513 #if ENABLE_UTOPIA2_INTERFACE
3514 stMVOP_GET_IS_ENABLE IO_arg;
3515 IO_arg.pbEnable = pbEnable;
3516 IO_arg.eRet = E_MVOP_FAIL;
3517
3518 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
3519 {
3520 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
3521 return IO_arg.eRet;
3522 }
3523
3524 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_GET_IS_ENABLE, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
3525 {
3526 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
3527 return IO_arg.eRet;
3528 }
3529
3530 return IO_arg.eRet;
3531 #else
3532 void* pInstance = NULL;
3533 return (MDrv_MVOP_GetIsEnable_V2(pInstance, pbEnable));
3534 #endif
3535 }
3536 /******************************************************************************/
3537 /// Set enable UVShift
3538 /******************************************************************************/
MDrv_MVOP_EnableUVShift_V2(void * pInstance,MS_BOOL bEnable)3539 void MDrv_MVOP_EnableUVShift_V2(void* pInstance, MS_BOOL bEnable)
3540 {
3541 _DRV_MVOP_Entry(E_MVOP_DEV_0);
3542 if (p_gDrvMVOPCtx == NULL)
3543 {
3544 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
3545 _DRV_MVOP_Return(E_MVOP_DEV_0, );
3546 }
3547 if (!MVOP_IsInit())
3548 {
3549 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
3550 _DRV_MVOP_Return(E_MVOP_DEV_0, );
3551 }
3552 HAL_MVOP_EnableUVShift(bEnable);
3553
3554 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._stMVOPDrvStat.bIsUVShift = bEnable;
3555
3556 _DRV_MVOP_Release(E_MVOP_DEV_0);
3557 }
3558
MDrv_MVOP_EnableUVShift(MS_BOOL bEnable)3559 void MDrv_MVOP_EnableUVShift(MS_BOOL bEnable)
3560 {
3561 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d \n", __FUNCTION__, __LINE__, bEnable);)
3562 #if ENABLE_UTOPIA2_INTERFACE
3563 stMVOP_ENABLE_UV_SHIFT IO_arg;
3564 IO_arg.bEnable = bEnable;
3565
3566 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
3567 {
3568 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
3569 return;
3570 }
3571
3572 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_ENABLE_UV_SHIFT, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
3573 {
3574 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
3575 return;
3576 }
3577 #else
3578 void* pInstance = NULL;
3579 MDrv_MVOP_EnableUVShift_V2(pInstance, bEnable);
3580 #endif
3581 }
3582
3583 /******************************************************************************/
3584 /// Set enable black background
3585 /******************************************************************************/
MDrv_MVOP_EnableBlackBG_V2(void * pInstance)3586 void MDrv_MVOP_EnableBlackBG_V2 ( void* pInstance )
3587 {
3588 _DRV_MVOP_Entry(E_MVOP_DEV_0);
3589
3590 if (p_gDrvMVOPCtx == NULL)
3591 {
3592 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
3593 _DRV_MVOP_Return(E_MVOP_DEV_0, );
3594 }
3595 if (!MVOP_IsInit())
3596 {
3597 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
3598 _DRV_MVOP_Return(E_MVOP_DEV_0, );
3599 }
3600 HAL_MVOP_SetBlackBG();
3601
3602 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._stMVOPDrvStat.bIsBlackBG = TRUE;
3603
3604 _DRV_MVOP_Release(E_MVOP_DEV_0);
3605 }
3606
MDrv_MVOP_EnableBlackBG(void)3607 void MDrv_MVOP_EnableBlackBG ( void )
3608 {
3609 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
3610 #if ENABLE_UTOPIA2_INTERFACE
3611 void* IO_arg = NULL;
3612
3613 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
3614 {
3615 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
3616 return;
3617 }
3618
3619 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_ENABLE_BLACK_BG, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
3620 {
3621 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
3622 return;
3623 }
3624 #else
3625 void* pInstance = NULL;
3626 MDrv_MVOP_EnableBlackBG_V2(pInstance);
3627 #endif
3628 }
3629
3630
3631 /******************************************************************************/
3632 /// Set MVOP output timing
3633 /// @param ptiming \b IN VOP timing setting
3634 /******************************************************************************/
MVOP_DumpOutputTiming(MVOP_Timing * ptiming)3635 static void MVOP_DumpOutputTiming ( MVOP_Timing *ptiming )
3636 {
3637 if (!ptiming)
3638 {
3639 return;
3640 }
3641
3642 MVOP_DBG(MVOP_PRINTF("\nMVOP SetOutputTiming\n");)
3643 MVOP_DBG(MVOP_PRINTF(" VTot=%u,\t",ptiming->u16V_TotalCount);)
3644 MVOP_DBG(MVOP_PRINTF(" HTot=%u,\t",ptiming->u16H_TotalCount);)
3645 MVOP_DBG(MVOP_PRINTF(" I/P=%u\n",ptiming->bInterlace);)
3646 MVOP_DBG(MVOP_PRINTF(" W=%u,\t",ptiming->u16Width);)
3647 MVOP_DBG(MVOP_PRINTF(" H=%u,\t",ptiming->u16Height);)
3648 MVOP_DBG(MVOP_PRINTF(" FRate=%u,\t",ptiming->u8Framerate);)
3649 MVOP_DBG(MVOP_PRINTF(" HFreq=%u\n",ptiming->u16H_Freq);)
3650 MVOP_DBG(MVOP_PRINTF(" Num=0x%x,\t",ptiming->u16Num);)
3651 MVOP_DBG(MVOP_PRINTF(" Den=0x%x,\t",ptiming->u16Den);)
3652 MVOP_DBG(MVOP_PRINTF(" u16HImg_Start=%u\n",ptiming->u16HImg_Start);)
3653 MVOP_DBG(MVOP_PRINTF(" u16VImg_Start0=%u\n",ptiming->u16VImg_Start0);)
3654 MVOP_DBG(MVOP_PRINTF(" u16VImg_Start1=%u\n",ptiming->u16VImg_Start1);)
3655 MVOP_DBG(MVOP_PRINTF(" u16ExpFRate=%u #\n\n", ptiming->u16ExpFrameRate);)
3656 }
3657
3658
3659 /******************************************************************************/
3660 /// MVOP mono mode (fix chroma value)
3661 /******************************************************************************/
MDrv_MVOP_SetMonoMode_V2(void * pInstance,MS_BOOL bEnable)3662 void MDrv_MVOP_SetMonoMode_V2(void* pInstance, MS_BOOL bEnable)
3663 {
3664 _DRV_MVOP_Entry(E_MVOP_DEV_0);
3665
3666 if (p_gDrvMVOPCtx == NULL)
3667 {
3668 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
3669 _DRV_MVOP_Return(E_MVOP_DEV_0, );
3670 }
3671 if (!MVOP_IsInit())
3672 {
3673 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
3674 _DRV_MVOP_Return(E_MVOP_DEV_0, );
3675 }
3676 HAL_MVOP_SetMonoMode(bEnable);
3677
3678 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._stMVOPDrvStat.bIsMonoMode = bEnable;
3679
3680 _DRV_MVOP_Release(E_MVOP_DEV_0);
3681 }
3682
MDrv_MVOP_SetMonoMode(MS_BOOL bEnable)3683 void MDrv_MVOP_SetMonoMode(MS_BOOL bEnable)
3684 {
3685 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d\n", __FUNCTION__, __LINE__, bEnable);)
3686 #if ENABLE_UTOPIA2_INTERFACE
3687 stMVOP_SET_MONO_MODE IO_arg;
3688 IO_arg.bEnable = bEnable;
3689
3690 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
3691 {
3692 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
3693 return;
3694 }
3695
3696 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SET_MONO_MODE, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
3697 {
3698 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
3699 return;
3700 }
3701 #else
3702 void* pInstance = NULL;
3703 MDrv_MVOP_SetMonoMode_V2(pInstance, bEnable);
3704 #endif
3705 }
3706
3707
3708 //-----------------------------------------------------------------------------
3709 /// Configure MVOP input.
3710 /// @return MVOP_Result
3711 //-----------------------------------------------------------------------------
MDrv_MVOP_SetInputCfg_V2(void * pInstance,MVOP_InputSel in,MVOP_InputCfg * pCfg)3712 MVOP_Result MDrv_MVOP_SetInputCfg_V2 (void* pInstance, MVOP_InputSel in, MVOP_InputCfg* pCfg)
3713 {
3714 MVOP_Result bRet = E_MVOP_OK;
3715 MS_U16 u16ECOVersion;
3716
3717 _DRV_MVOP_Entry(E_MVOP_DEV_0);
3718 if (p_gDrvMVOPCtx == NULL)
3719 {
3720 MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);
3721 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_FAIL);
3722 }
3723 MVOP_DrvCtrlSt* pstDrvCtrl = MVOP_GetDrvCtrl(E_MVOP_DEV_0);
3724
3725 if (!MVOP_IsInit())
3726 {
3727 MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);
3728 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_FAIL);
3729 }
3730
3731 //HAL_MVOP_SetMonoMode(FALSE);
3732 u16ECOVersion = (MS_U16)MDrv_SYS_GetChipRev();
3733 if (E_MVOP_RGB_NONE != pstDrvCtrl->_eRgbFmt)
3734 {
3735 if (HAL_MVOP_SetRgbFormat)
3736 {
3737 HAL_MVOP_SetRgbFormat(pstDrvCtrl->_eRgbFmt);
3738 }
3739 else
3740 {
3741 MVOP_ERR(MVOP_PRINTF("%s not support HAL_MVOP_SetRgbFormat\n", __FUNCTION__);)
3742 }
3743 }
3744 MVOP_ResetVar(E_MVOP_DEV_0);
3745
3746 #if STB_DC
3747 _DRV_MVOP_Return(E_MVOP_DEV_0, HAL_MVOP_SetInputCfg( in, pCfg));
3748 #endif
3749
3750 switch (in)
3751 {
3752 #if ENABLE_3D_LR_MODE
3753 case MVOP_INPUT_DRAM_3DLR:
3754 HAL_MVOP_Enable3DLR(ENABLE);
3755 if (!pCfg)
3756 {
3757 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_INVALID_PARAM);
3758 }
3759 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopInputCfg = *pCfg;
3760
3761 HAL_MVOP_SetInputMode(VOPINPUT_MCUCTRL, pCfg, u16ECOVersion);
3762 break;
3763 #endif
3764 case MVOP_INPUT_DRAM:
3765 if (!pCfg)
3766 {
3767 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_INVALID_PARAM);
3768 }
3769 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopInputCfg = *pCfg;
3770
3771 HAL_MVOP_SetInputMode(VOPINPUT_MCUCTRL, pCfg, u16ECOVersion);
3772 break;
3773
3774 #if ENABLE_3D_LR_MODE
3775 case MVOP_INPUT_HVD_3DLR:
3776 HAL_MVOP_Enable3DLR(ENABLE);
3777 HAL_MVOP_SetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
3778 HAL_MVOP_SetH264HardwireMode(u16ECOVersion);
3779 break;
3780 #endif
3781 case MVOP_INPUT_H264:
3782 HAL_MVOP_SetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
3783 HAL_MVOP_SetH264HardwireMode(u16ECOVersion);
3784 break;
3785
3786 #if ENABLE_3D_LR_MODE
3787 case MVOP_INPUT_MVD_3DLR:
3788 HAL_MVOP_Enable3DLR(ENABLE);
3789 HAL_MVOP_SetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
3790 break;
3791 #endif
3792 case MVOP_INPUT_MVD:
3793 HAL_MVOP_SetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
3794 break;
3795 case MVOP_INPUT_RVD:
3796 HAL_MVOP_SetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
3797 HAL_MVOP_SetRMHardwireMode(u16ECOVersion);
3798 break;
3799 case MVOP_INPUT_CLIP:
3800 if (!pCfg)
3801 {
3802 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_INVALID_PARAM);
3803 }
3804 HAL_MVOP_SetCropWindow(pCfg);
3805 break;
3806 case MVOP_INPUT_JPD:
3807 HAL_MVOP_SetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
3808 HAL_MVOP_SetJpegHardwireMode();
3809 break;
3810 #if SUPPORT_EVD_MODE
3811 #if ENABLE_3D_LR_MODE
3812 case MVOP_INPUT_EVD_3DLR:
3813 HAL_MVOP_Enable3DLR(ENABLE);
3814 HAL_MVOP_SetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
3815 HAL_MVOP_SetEVDHardwireMode(u16ECOVersion);
3816 break;
3817 #endif
3818 case MVOP_INPUT_EVD:
3819 HAL_MVOP_SetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
3820 HAL_MVOP_SetEVDHardwireMode(u16ECOVersion);
3821 break;
3822 #endif
3823 #if SUPPORT_VP9_MODE
3824 case MVOP_INPUT_VP9:
3825 HAL_MVOP_SetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
3826 HAL_MVOP_SetVP9HardwireMode(u16ECOVersion);
3827 break;
3828 #endif
3829 #ifdef UFO_MVOP_DOLBY_HDR
3830 case MVOP_INPUT_EVD_DV:
3831 HAL_MVOP_SetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
3832 HAL_MVOP_SetEVDHardwireMode_DV();
3833 if (HAL_MVOP_EnableHDRSetting)
3834 {
3835 HAL_MVOP_EnableHDRSetting(ENABLE);
3836 }
3837 if(TRUE == p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bIsDVDual)
3838 {
3839 MS_BOOL pbFirstDrvInstant;
3840
3841 _MVOP_SubInit_Context(&pbFirstDrvInstant);
3842 _MVOP_SubInitVar(E_MVOP_DEV_1);
3843 if(MDrv_MVOP_SubSetMMIOMapBase() == FALSE)
3844 {
3845 bRet = E_MVOP_INVALID_PARAM;
3846 break;
3847 }
3848 HAL_MVOP_SubInit();
3849 HAL_MVOP_SubSetFieldInverse(ENABLE, ENABLE);
3850 HAL_MVOP_SubSetDCClk(0, TRUE); //Clk DC0
3851 HAL_MVOP_SubSetDCClk(1, TRUE); //Clk DC1
3852 if(HAL_MVOP_SubSetDCSRAMClk)
3853 {
3854 HAL_MVOP_SubSetDCSRAMClk(0, TRUE); //Clk DC1 sraam clock
3855 }
3856 HAL_MVOP_SubLoadReg();
3857 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._stMVOPDrvStat.bIsInit = TRUE;
3858 MVOP_ResetVar(E_MVOP_DEV_1);
3859 HAL_MVOP_SubSetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
3860 HAL_MVOP_SubSetEVDHardwireMode(u16ECOVersion);
3861
3862 if (HAL_MVOP_SubEnableHDRSetting)
3863 {
3864 HAL_MVOP_SubEnableHDRSetting(ENABLE);
3865 }
3866 }
3867 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bEn265DV = TRUE;
3868 break;
3869 #endif
3870 default:
3871 bRet = E_MVOP_INVALID_PARAM;
3872 break;
3873 }
3874
3875 if (E_MVOP_OK == bRet)
3876 {
3877 pstDrvCtrl->_eInputSel = in;
3878 }
3879
3880 _DRV_MVOP_Return(E_MVOP_DEV_0, bRet);
3881 }
3882
MDrv_MVOP_SetInputCfg(MVOP_InputSel in,MVOP_InputCfg * pCfg)3883 MVOP_Result MDrv_MVOP_SetInputCfg (MVOP_InputSel in, MVOP_InputCfg* pCfg)
3884 {
3885 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d\n", __FUNCTION__, __LINE__, in);)
3886 #if ENABLE_UTOPIA2_INTERFACE
3887 stMVOP_SET_INPUTCFG IO_arg;
3888 IO_arg.in = in;
3889 IO_arg.pCfg = pCfg;
3890 IO_arg.eRet = E_MVOP_FAIL;
3891
3892 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
3893 {
3894 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
3895 return IO_arg.eRet;
3896 }
3897
3898 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SET_INPUTCFG, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
3899 {
3900 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
3901 return IO_arg.eRet;
3902 }
3903
3904 return IO_arg.eRet;
3905
3906 #else
3907 void* pInstance = NULL;
3908 return (MDrv_MVOP_SetInputCfg_V2(pInstance, in, pCfg));
3909 #endif
3910 }
3911
MVOP_CheckOutputCfg(MVOP_VidStat * pstVideoStatus)3912 static MS_BOOL MVOP_CheckOutputCfg(MVOP_VidStat *pstVideoStatus)
3913 {
3914 if (pstVideoStatus == NULL)
3915 {
3916 MVOP_ERR(MVOP_PRINTF("%s invalid para NULL Ptr!\n", __FUNCTION__);)
3917 return FALSE;
3918 }
3919
3920 //Designer suggests to set the minimum HSize as 16.
3921 //If supporting HSize<16, miu_request_timeout must be enabled.
3922 if ((pstVideoStatus->u16HorSize < 16) ||
3923 (pstVideoStatus->u16VerSize == 0) ||
3924 (pstVideoStatus->u16FrameRate < MVOP_MIN_FRAMERATE))
3925 {
3926 MVOP_ERR(MVOP_PRINTF("%s invalid para H=%d V=%d FR=%d\n", __FUNCTION__,
3927 pstVideoStatus->u16HorSize, pstVideoStatus->u16VerSize, pstVideoStatus->u16FrameRate);)
3928 return FALSE;
3929 }
3930 else
3931 {
3932 return TRUE;
3933 }
3934 }
3935
3936
3937 //-----------------------------------------------------------------------------
3938 /// Configure MVOP output.
3939 /// @return MVOP_Result
3940 //-----------------------------------------------------------------------------
MDrv_MVOP_SetOutputCfg_V2(void * pInstance,MVOP_VidStat * pstVideoStatus,MS_BOOL bEnHDup)3941 MVOP_Result MDrv_MVOP_SetOutputCfg_V2(void* pInstance, MVOP_VidStat *pstVideoStatus, MS_BOOL bEnHDup)
3942 {
3943 MVOP_Timing* pstTiming = NULL;
3944 MS_U16 u16ECOVersion;
3945
3946 _DRV_MVOP_Entry(E_MVOP_DEV_0);
3947
3948 if (p_gDrvMVOPCtx == NULL)
3949 {
3950 MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);
3951 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_FAIL);
3952 }
3953
3954 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopOutputCfg = *pstVideoStatus;
3955
3956 if(HAL_MVOP_AutoTimingHDS && (HAL_MVOP_AutoTimingHDS(E_MVOP_DEV_0) == TRUE))
3957 {
3958 if(pstVideoStatus->u16HorSize > 2048)
3959 {
3960 pstVideoStatus->u16HorSize >>= 1;
3961 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bEnHDS = TRUE;
3962 }
3963 }
3964
3965 pstTiming = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming;
3966 u16ECOVersion = (MS_U16)MDrv_SYS_GetChipRev();
3967
3968 if (!MVOP_IsInit())
3969 {
3970 MVOP_PRINTF("%s: driver is not initialized!\n", __FUNCTION__);
3971 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_FAIL);
3972 }
3973
3974 if (MVOP_CheckOutputCfg(pstVideoStatus) != TRUE)
3975 {
3976 MVOP_PRINTF("%s: invalid parameter!\n", __FUNCTION__);
3977 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_INVALID_PARAM);
3978 }
3979
3980 MVOP_HBlank_HD = 300;
3981 MVOP_HBlank_SD = 200;
3982 MVOP_VBlank = 45;
3983 EnablePresetTable = FALSE;
3984
3985 if(pstVideoStatus->u16VerSize == VSize_4K)
3986 {
3987 if((pstVideoStatus->u16FrameRate == FrameRate_60000) || (pstVideoStatus->u16FrameRate == FrameRate_30000))
3988 {
3989 EnablePresetTable = TRUE;
3990 MVOP_TIMING_DBG(MVOP_PRINTF("%s: refine 4k 59940 timing\n", __FUNCTION__);)
3991 MVOP_VBlank = Optimized_VBlank_4K_60000;
3992 }
3993 else if((pstVideoStatus->u16FrameRate == FrameRate_59940) || (pstVideoStatus->u16FrameRate == FrameRate_29970))
3994 {
3995 EnablePresetTable = TRUE;
3996 MVOP_TIMING_DBG(MVOP_PRINTF("%s: refine 4k 59940/29970 timing\n", __FUNCTION__);)
3997 MVOP_VBlank = Optimized_VBlank_4K_59940;
3998 }
3999 else if((pstVideoStatus->u16FrameRate == FrameRate_50000) || (pstVideoStatus->u16FrameRate == FrameRate_25000))
4000 {
4001 EnablePresetTable = TRUE;
4002 MVOP_TIMING_DBG(MVOP_PRINTF("%s: refine 4k 50000/25000 timing\n", __FUNCTION__);)
4003 MVOP_VBlank = Optimized_VBlank_4K_50000;
4004 }
4005 else if((pstVideoStatus->u16FrameRate == FrameRate_48000) || (pstVideoStatus->u16FrameRate == FrameRate_24000))
4006 {
4007 EnablePresetTable = TRUE;
4008 MVOP_TIMING_DBG(MVOP_PRINTF("%s: refine 4k 24000/48000 timing\n", __FUNCTION__);)
4009 MVOP_VBlank = Optimized_VBlank_4K_48000;
4010 }
4011
4012 else if(pstVideoStatus->u16FrameRate == FrameRate_23976)
4013 {
4014 EnablePresetTable = TRUE;
4015 MVOP_TIMING_DBG(MVOP_PRINTF("%s: refine 4k 23976 timing\n", __FUNCTION__);)
4016 MVOP_VBlank = Optimized_VBlank_4K_23976;
4017 }
4018
4019 }
4020
4021 if (MVOP_AutoGenMPEGTiming(TRUE, pstTiming, pstVideoStatus, bEnHDup) != TRUE)
4022 {
4023 MVOP_PRINTF("%s: fail to calculate timing!\n", __FUNCTION__);
4024 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_FAIL);
4025 }
4026 #ifdef UFO_MVOP_DOLBY_HDR
4027 HAL_MVOP_Enable(FALSE, 0); // for HAL_MVOP_Enable2DCTimingSync
4028 #endif
4029 if(HAL_MVOP_SetInterlaceType)
4030 {
4031 HAL_MVOP_SetInterlaceType(E_MVOP_DEV_0, u16ECOVersion, pstVideoStatus->u8Interlace);
4032 }
4033
4034 HAL_MVOP_SetOutputInterlace(pstTiming->bInterlace, u16ECOVersion);
4035 HAL_MVOP_SetOutputTiming(pstTiming);
4036 HAL_MVOP_SetSynClk(pstTiming);
4037 #ifdef UFO_MVOP_DOLBY_HDR
4038 if(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bEn265DV && (TRUE == p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bIsDVDual))
4039 {
4040 MVOP_DBG(MVOP_PRINTF("%s dual dolby vision\n", __FUNCTION__);)
4041 HAL_MVOP_SubEnable(FALSE, 0);
4042 HAL_MVOP_SetEnable4k2k2P(TRUE);
4043 HAL_MVOP_SubSetEnable4k2k2P(TRUE);
4044 HAL_MVOP_SubSetOutputInterlace(pstTiming->bInterlace, u16ECOVersion);
4045 HAL_MVOP_SubSetOutputTiming(pstTiming);
4046 HAL_MVOP_SubSetSynClk(pstTiming);
4047 if(HAL_MVOP_Enable2DCTimingSync)
4048 {
4049 HAL_MVOP_Enable2DCTimingSync(TRUE);
4050 }
4051 }
4052 else if(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bEn265DV && (FALSE == p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bIsDVDual))
4053 {
4054 MVOP_DBG(MVOP_PRINTF("%s single dolby vision\n", __FUNCTION__);)
4055 HAL_MVOP_SetEnable4k2k2P(TRUE);
4056 if(HAL_MVOP_Enable2DCTimingSync)
4057 {
4058 HAL_MVOP_Enable2DCTimingSync(FALSE);
4059 }
4060 }
4061 #endif
4062 //For VMirror, use Align4VSize to gen timing, but still report SrvVSize to XC.
4063 if ( p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._u16SrcVSize != 0)
4064 {
4065 MVOP_DBG(MVOP_PRINTF("%s: _mvopTiming.u16Height: %d ==> %d\n", __FUNCTION__,
4066 pstTiming->u16Height, p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._u16SrcVSize);)
4067 pstTiming->u16Height = p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._u16SrcVSize;
4068 }
4069
4070 if ( p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._u16SrcHSize != 0)
4071 {
4072 //report the source width for scaler, intead of the 16-aligned width
4073 //MS_U16 u16Discard_Width = 0;
4074 //u16Discard_Width = _mvopTiming.u16Width - _u16SrcHSize;
4075 MVOP_DBG(MVOP_PRINTF("%s: _mvopTiming.u16Width : %d ==> %d\n", __FUNCTION__,
4076 pstTiming->u16Width, p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._u16SrcHSize);)
4077 pstTiming->u16Width = p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._u16SrcHSize;
4078 #if 0 //for H-mirror ON
4079 if (pstTiming->u16HActive_Start > u16Discard_Width)
4080 {
4081 pstTiming->u16HActive_Start -= u16Discard_Width;
4082 }
4083 else
4084 {
4085 MVOP_PRINTF("Warning: u16HActive_Start(%d) <= u16Discard_Width(%d)\n",
4086 pstTiming->u16HActive_Start, u16Discard_Width);
4087 }
4088 if (pstTiming->u16HImg_Start > u16Discard_Width)
4089 {
4090 pstTiming->u16HImg_Start -= u16Discard_Width;
4091 }
4092 else
4093 {
4094 MVOP_PRINTF("Warning: u16HImg_Start(%d) <= u16Discard_Width(%d)\n",
4095 pstTiming->u16HImg_Start, u16Discard_Width);
4096 }
4097 #endif
4098 }
4099
4100 MVOP_DumpOutputTiming(pstTiming);
4101 MS_BOOL* pbIsSetTiming = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._stMVOPDrvStat.bIsSetTiming;
4102 *pbIsSetTiming = TRUE;
4103 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_OK);
4104 }
4105
MDrv_MVOP_SetOutputCfg(MVOP_VidStat * pstVideoStatus,MS_BOOL bEnHDup)4106 MVOP_Result MDrv_MVOP_SetOutputCfg(MVOP_VidStat *pstVideoStatus, MS_BOOL bEnHDup)
4107 {
4108 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d\n", __FUNCTION__, __LINE__, bEnHDup);)
4109
4110 #if ENABLE_UTOPIA2_INTERFACE
4111 stMVOP_SET_OTPUTCFG IO_arg;
4112 IO_arg.pstVideoStatus = pstVideoStatus;
4113 IO_arg.bEnHDup = bEnHDup;
4114 IO_arg.eRet = E_MVOP_FAIL;
4115
4116 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
4117 {
4118 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4119 return IO_arg.eRet;
4120 }
4121
4122 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SET_OTPUTCFG, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
4123 {
4124 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4125 return IO_arg.eRet;
4126 }
4127
4128 return IO_arg.eRet;
4129 #else
4130 void* pInstance = NULL;
4131 return (MDrv_MVOP_SetOutputCfg_V2(pInstance, pstVideoStatus, bEnHDup));
4132 #endif
4133 }
4134
4135 //-----------------------------------------------------------------------------
4136 /// Get MVOP output timing information.
4137 /// @return MVOP_Result
4138 //-----------------------------------------------------------------------------
MDrv_MVOP_GetOutputTiming_V2(void * pInstance,MVOP_Timing * pMVOPTiming)4139 MVOP_Result MDrv_MVOP_GetOutputTiming_V2(void* pInstance, MVOP_Timing* pMVOPTiming)
4140 {
4141 MVOP_Timing* pstTiming = NULL;
4142
4143 _DRV_MVOP_Entry(E_MVOP_DEV_0);
4144
4145 if (p_gDrvMVOPCtx == NULL)
4146 {
4147 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
4148 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_FAIL);
4149 }
4150
4151 if (!MVOP_IsInit())
4152 {
4153 MVOP_DBG(MVOP_PRINTF("%s: driver is not initialized!\n", __FUNCTION__);)
4154 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_FAIL);
4155 }
4156 if (!p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._stMVOPDrvStat.bIsSetTiming)
4157 {
4158 MVOP_DBG(MVOP_PRINTF("%s: Timing is not set yet!\n", __FUNCTION__);)
4159 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_FAIL);
4160 }
4161
4162 if (!pMVOPTiming)
4163 {
4164 MVOP_DBG(MVOP_PRINTF("%s: invalid parameter!\n", __FUNCTION__);)
4165 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_INVALID_PARAM);
4166 }
4167 pstTiming = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming;
4168
4169 #if !(defined(CHIP_A3) || defined(CHIP_EDISON))
4170 memcpy(pMVOPTiming, pstTiming, sizeof(MVOP_Timing));
4171 #else
4172 pMVOPTiming->u16V_TotalCount = pstTiming->u16V_TotalCount;
4173 pMVOPTiming->u16H_TotalCount = pstTiming->u16H_TotalCount;
4174 pMVOPTiming->u16VBlank0_Start = pstTiming->u16VBlank0_Start;
4175 pMVOPTiming->u16VBlank0_End = pstTiming->u16VBlank0_End;
4176 pMVOPTiming->u16VBlank1_Start = pstTiming->u16VBlank1_Start;
4177 pMVOPTiming->u16VBlank1_End = pstTiming->u16VBlank1_End;
4178 pMVOPTiming->u16TopField_Start = pstTiming->u16TopField_Start;
4179 pMVOPTiming->u16BottomField_Start = pstTiming->u16BottomField_Start;
4180 pMVOPTiming->u16TopField_VS = pstTiming->u16TopField_VS;
4181 pMVOPTiming->u16BottomField_VS = pstTiming->u16BottomField_VS;
4182 pMVOPTiming->u16HActive_Start = pstTiming->u16HActive_Start;
4183
4184 pMVOPTiming->bInterlace = pstTiming->bInterlace;
4185 pMVOPTiming->u8Framerate = pstTiming->u8Framerate;
4186 pMVOPTiming->u16H_Freq = pstTiming->u16H_Freq;
4187 pMVOPTiming->u16Num = pstTiming->u16Num;
4188 pMVOPTiming->u16Den = pstTiming->u16Den;
4189 pMVOPTiming->u8MvdFRCType = pstTiming->u8MvdFRCType;
4190 pMVOPTiming->u16ExpFrameRate = pstTiming->u16ExpFrameRate;
4191 pMVOPTiming->u16Width = pstTiming->u16Width;
4192 pMVOPTiming->u16Height = pstTiming->u16Height;
4193 pMVOPTiming->bHDuplicate = pstTiming->bHDuplicate;
4194 #endif
4195
4196 #if defined(CHIP_KANO)
4197 //patch for GOP: 0x28[7]=1 need to toggle mcu mode, kano HAL_MVOP_Rst doing mcu mode toggling.
4198 if(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bGOPPatch == TRUE)
4199 {
4200 HAL_MVOP_Rst();
4201 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bGOPPatch = FALSE;
4202 }
4203 #endif
4204 _DRV_MVOP_Return(E_MVOP_DEV_0,E_MVOP_OK);
4205 }
4206
MDrv_MVOP_GetOutputTiming(MVOP_Timing * pMVOPTiming)4207 MVOP_Result MDrv_MVOP_GetOutputTiming(MVOP_Timing* pMVOPTiming)
4208 {
4209 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d\n", __FUNCTION__, __LINE__);)
4210 #if ENABLE_UTOPIA2_INTERFACE
4211 stMVOP_GET_OUTPUT_TIMING IO_arg;
4212 IO_arg.pMVOPTiming = pMVOPTiming;
4213 IO_arg.eRet = E_MVOP_FAIL;
4214
4215 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
4216 {
4217 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4218 return IO_arg.eRet;
4219 }
4220
4221 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_GET_OUTPUT_TIMING, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
4222 {
4223 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4224 return IO_arg.eRet;
4225 }
4226
4227 return IO_arg.eRet;
4228 #else
4229 void* pInstance = NULL;
4230 return (MDrv_MVOP_GetOutputTiming_V2(pInstance, pMVOPTiming));
4231 #endif
4232 }
4233
4234
4235 //-----------------------------------------------------------------------------
4236 /// Get Horizontal Size.
4237 /// @return Horizontal Size
4238 //-----------------------------------------------------------------------------
MDrv_MVOP_GetHSize_V2(void * pInstance)4239 MS_U16 MDrv_MVOP_GetHSize_V2(void* pInstance)
4240 {
4241 _DRV_MVOP_Entry(E_MVOP_DEV_0);
4242 if (p_gDrvMVOPCtx == NULL)
4243 {
4244 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
4245 _DRV_MVOP_Return(E_MVOP_DEV_0, 0);
4246 }
4247 _DRV_MVOP_Return(E_MVOP_DEV_0,p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16Width);
4248 }
4249
MDrv_MVOP_GetHSize(void)4250 MS_U16 MDrv_MVOP_GetHSize(void)
4251 {
4252 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d\n", __FUNCTION__, __LINE__);)
4253 #if ENABLE_UTOPIA2_INTERFACE
4254 stMVOP_GET_HSIZE IO_arg;
4255 IO_arg.u16Ret = 0;
4256
4257 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
4258 {
4259 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4260 return IO_arg.u16Ret;
4261 }
4262
4263 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_GET_HSIZE, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
4264 {
4265 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4266 return IO_arg.u16Ret;
4267 }
4268
4269 return IO_arg.u16Ret;
4270 #else
4271 void* pInstance = NULL;
4272 return (MDrv_MVOP_GetHSize_V2(pInstance));
4273 #endif
4274 }
4275
4276
4277 //-----------------------------------------------------------------------------
4278 /// Get Vertical Size.
4279 /// @return Vertical Size
4280 //-----------------------------------------------------------------------------
MDrv_MVOP_GetVSize_V2(void * pInstance)4281 MS_U16 MDrv_MVOP_GetVSize_V2(void* pInstance)
4282 {
4283 _DRV_MVOP_Entry(E_MVOP_DEV_0);
4284 if (p_gDrvMVOPCtx == NULL)
4285 {
4286 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
4287 _DRV_MVOP_Return(E_MVOP_DEV_0, 0);
4288 }
4289 _DRV_MVOP_Return(E_MVOP_DEV_0,p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16Height);
4290 }
4291
MDrv_MVOP_GetVSize(void)4292 MS_U16 MDrv_MVOP_GetVSize(void)
4293 {
4294 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d\n", __FUNCTION__, __LINE__);)
4295 #if ENABLE_UTOPIA2_INTERFACE
4296 stMVOP_GET_VSIZE IO_arg;
4297 IO_arg.u16Ret = 0;
4298
4299 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
4300 {
4301 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4302 return IO_arg.u16Ret;
4303 }
4304
4305 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_GET_VSIZE, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
4306 {
4307 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4308 return IO_arg.u16Ret;
4309 }
4310
4311 return IO_arg.u16Ret;
4312 #else
4313 void* pInstance = NULL;
4314 return (MDrv_MVOP_GetVSize_V2(pInstance));
4315 #endif
4316 }
4317
4318
4319 //-----------------------------------------------------------------------------
4320 /// Get MVOP timing is interlace or progressive.
4321 /// @return TRUE for interlace; FALSE for progressive
4322 //-----------------------------------------------------------------------------
MDrv_MVOP_GetIsInterlace_V2(void * pInstance)4323 MS_BOOL MDrv_MVOP_GetIsInterlace_V2(void* pInstance)
4324 {
4325 _DRV_MVOP_Entry(E_MVOP_DEV_0);
4326 if (p_gDrvMVOPCtx == NULL)
4327 {
4328 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
4329 _DRV_MVOP_Return(E_MVOP_DEV_0, FALSE);
4330 }
4331
4332 _DRV_MVOP_Return(E_MVOP_DEV_0,p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.bInterlace);
4333 }
4334
MDrv_MVOP_GetIsInterlace(void)4335 MS_BOOL MDrv_MVOP_GetIsInterlace(void)
4336 {
4337 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d\n", __FUNCTION__, __LINE__);)
4338 #if ENABLE_UTOPIA2_INTERFACE
4339 stMVOP_GET_IS_INTERLACE IO_arg;
4340 IO_arg.bRet = FALSE;
4341
4342 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
4343 {
4344 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4345 return IO_arg.bRet;
4346 }
4347
4348 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_GET_IS_INTERLACE, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
4349 {
4350 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4351 return IO_arg.bRet;
4352 }
4353
4354 return IO_arg.bRet;
4355 #else
4356 void* pInstance = NULL;
4357 return (MDrv_MVOP_GetIsInterlace_V2(pInstance));
4358 #endif
4359 }
4360
4361
4362 //-----------------------------------------------------------------------------
4363 /// Get MVOP timing is horizontal duplicated or not.
4364 /// @return TRUE for yes; FALSE for not.
4365 //-----------------------------------------------------------------------------
MDrv_MVOP_GetIsHDuplicate_V2(void * pInstance)4366 MS_BOOL MDrv_MVOP_GetIsHDuplicate_V2(void* pInstance)
4367 {
4368 _DRV_MVOP_Entry(E_MVOP_DEV_0);
4369
4370 if (p_gDrvMVOPCtx == NULL)
4371 {
4372 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
4373 _DRV_MVOP_Return(E_MVOP_DEV_0, FALSE);
4374 }
4375
4376 _DRV_MVOP_Return(E_MVOP_DEV_0,p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.bHDuplicate);
4377 }
4378
MDrv_MVOP_GetIsHDuplicate(void)4379 MS_BOOL MDrv_MVOP_GetIsHDuplicate(void)
4380 {
4381 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d\n", __FUNCTION__, __LINE__);)
4382 #if ENABLE_UTOPIA2_INTERFACE
4383 stMVOP_GET_IS_HDUPLICATE IO_arg;
4384 IO_arg.bRet = FALSE;
4385
4386 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
4387 {
4388 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4389 return IO_arg.bRet;
4390 }
4391
4392 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_GET_IS_HDUPLICATE, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
4393 {
4394 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4395 return IO_arg.bRet;
4396 }
4397
4398 return IO_arg.bRet;
4399 #else
4400 void* pInstance = NULL;
4401 return (MDrv_MVOP_GetIsHDuplicate_V2(pInstance));
4402 #endif
4403 }
4404
4405 /******************************************************************************************/
4406 /// This function is used for dectection of MVOP's Capability
4407 /// @param u16HSize \b IN
4408 /// @param u16VSize \b IN
4409 /// @param u16Fps \b IN
4410 /// @return TRUE if MVOP's frequency can support this video source, otherwise return FASLE
4411 /******************************************************************************************/
MDrv_MVOP_CheckCapability_V2(void * pInstance,MS_U16 u16HSize,MS_U16 u16VSize,MS_U16 u16Fps)4412 MS_BOOL MDrv_MVOP_CheckCapability_V2(void* pInstance, MS_U16 u16HSize, MS_U16 u16VSize, MS_U16 u16Fps)
4413 {
4414 return ((MS_U32)((u16HSize + MVOP_HBlank_Min) * (u16VSize + MVOP_VBlank_Min)* u16Fps) <= (MS_U32)(HAL_MVOP_GetMaxFreerunClk()));
4415 }
4416
MDrv_MVOP_CheckCapability(MS_U16 u16HSize,MS_U16 u16VSize,MS_U16 u16Fps)4417 MS_BOOL MDrv_MVOP_CheckCapability(MS_U16 u16HSize, MS_U16 u16VSize, MS_U16 u16Fps)
4418 {
4419 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d arg1:%d, arg2:%d, arg3:%d\n", __FUNCTION__, __LINE__, u16HSize, u16VSize, u16Fps);)
4420 return ((MS_U32)((u16HSize + MVOP_HBlank_Min) * (u16VSize + MVOP_VBlank_Min)* u16Fps) <= (MS_U32)(HAL_MVOP_GetMaxFreerunClk()));
4421 }
4422
MDrv_MVOP_GetMaxHOffset_V2(void * pInstance,MS_U16 u16HSize,MS_U16 u16VSize,MS_U16 u16Fps)4423 MS_U16 MDrv_MVOP_GetMaxHOffset_V2(void* pInstance, MS_U16 u16HSize, MS_U16 u16VSize, MS_U16 u16Fps)
4424 {
4425 MS_U16 u16HttMax, u16OffsetMax = 0;
4426
4427 u16HttMax = HAL_MVOP_GetMaxFreerunClk() / u16Fps*1000 / (u16VSize + MVOP_VBlank);
4428 u16OffsetMax = (u16HttMax - MVOP_HBlank_HD - u16HSize)/2;
4429 u16OffsetMax = u16OffsetMax & ~1;
4430
4431 return u16OffsetMax;
4432 }
4433
MDrv_MVOP_GetMaxHOffset(MS_U16 u16HSize,MS_U16 u16VSize,MS_U16 u16Fps)4434 MS_U16 MDrv_MVOP_GetMaxHOffset(MS_U16 u16HSize, MS_U16 u16VSize, MS_U16 u16Fps)
4435 {
4436 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d arg1:%d, arg2:%d, arg3:%d\n", __FUNCTION__, __LINE__, u16HSize, u16VSize, u16Fps);)
4437 MS_U16 u16HttMax, u16OffsetMax = 0;
4438
4439 u16HttMax = HAL_MVOP_GetMaxFreerunClk() / u16Fps*1000 / (u16VSize + MVOP_VBlank);
4440 u16OffsetMax = (u16HttMax - MVOP_HBlank_HD - u16HSize)/2;
4441 u16OffsetMax = u16OffsetMax & ~1;
4442
4443 return u16OffsetMax;
4444 }
4445
4446
MDrv_MVOP_GetMaxVOffset_V2(void * pInstance,MS_U16 u16HSize,MS_U16 u16VSize,MS_U16 u16Fps)4447 MS_U16 MDrv_MVOP_GetMaxVOffset_V2(void* pInstance, MS_U16 u16HSize, MS_U16 u16VSize, MS_U16 u16Fps)
4448 {
4449 _DRV_MVOP_Entry(E_MVOP_DEV_0);
4450
4451 if (p_gDrvMVOPCtx == NULL)
4452 {
4453 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
4454 _DRV_MVOP_Return(E_MVOP_DEV_0, FALSE);
4455 }
4456
4457 _DRV_MVOP_Return(E_MVOP_DEV_0, MVOP_GetMaxVOffset(E_MVOP_DEV_0, HAL_MVOP_GetMaxFreerunClk(), u16HSize, u16VSize, u16Fps));
4458 }
4459
MDrv_MVOP_GetMaxVOffset(MS_U16 u16HSize,MS_U16 u16VSize,MS_U16 u16Fps)4460 MS_U16 MDrv_MVOP_GetMaxVOffset(MS_U16 u16HSize, MS_U16 u16VSize, MS_U16 u16Fps)
4461 {
4462 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d arg1:%d, arg2:%d, arg3:%d\n", __FUNCTION__, __LINE__, u16HSize, u16VSize, u16Fps);)
4463 #if ENABLE_UTOPIA2_INTERFACE
4464 stMVOP_GET_MAX_VOFFSET IO_arg;
4465 IO_arg.u16HSize = u16HSize;
4466 IO_arg.u16VSize = u16VSize;
4467 IO_arg.u16Fps = u16Fps;
4468 IO_arg.u16Ret = 0;
4469
4470 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
4471 {
4472 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4473 return IO_arg.u16Ret;
4474 }
4475
4476 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_GET_MAX_VOFFSET, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
4477 {
4478 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4479 return IO_arg.u16Ret;
4480 }
4481
4482 return IO_arg.u16Ret;
4483 #else
4484 void* pInstance = NULL;
4485 return (MDrv_MVOP_GetMaxVOffset_V2(pInstance, u16HSize, u16VSize, u16Fps));
4486 #endif
4487 }
4488
4489 //------------------------------------------------------------------------------
4490 /// MVOP Get Destination Information for GOP mixer
4491 /// @return TRUE/FALSE
4492 //------------------------------------------------------------------------------
MDrv_MVOP_GetDstInfo_V2(void * pInstance,MVOP_DST_DispInfo * pDstInfo,MS_U32 u32SizeofDstInfo)4493 MS_BOOL MDrv_MVOP_GetDstInfo_V2(void* pInstance, MVOP_DST_DispInfo *pDstInfo, MS_U32 u32SizeofDstInfo)
4494 {
4495 _DRV_MVOP_Entry(E_MVOP_DEV_0);
4496 if (!MVOP_IsInit())
4497 {
4498 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
4499 _DRV_MVOP_Return(E_MVOP_DEV_0, FALSE);
4500 }
4501
4502 if(NULL == pDstInfo)
4503 {
4504 MVOP_ERR(MVOP_PRINTF("MApi_MVOP_GetDstInfo():pDstInfo is NULL\n");)
4505 _DRV_MVOP_Return(E_MVOP_DEV_0, FALSE);
4506 }
4507
4508 if(u32SizeofDstInfo != sizeof(MVOP_DST_DispInfo))
4509 {
4510 MVOP_ERR(MVOP_PRINTF("MApi_MVOP_GetDstInfo():u16SizeofDstInfo is different from the MVOP_DST_DispInfo defined, check header file!\n");)
4511 _DRV_MVOP_Return(E_MVOP_DEV_0, FALSE);
4512 }
4513
4514 MVOP_TimingInfo_FromRegisters mvopTimingInfo;
4515 memset(&mvopTimingInfo, 0, sizeof(MVOP_TimingInfo_FromRegisters));
4516 if(HAL_MVOP_GetTimingInfoFromRegisters(&mvopTimingInfo) == FALSE)
4517 {
4518 MVOP_ERR(MVOP_PRINTF("encounter errors in HAL_MVOP_GetTimingInfoFromRegisters()!\n");)
4519 memset(pDstInfo, 0, u32SizeofDstInfo);
4520 _DRV_MVOP_Return(E_MVOP_DEV_0, FALSE);
4521 }
4522 pDstInfo->VDTOT = mvopTimingInfo.u16V_TotalCount;
4523 pDstInfo->HDTOT = mvopTimingInfo.u16H_TotalCount;
4524 pDstInfo->bInterlaceMode = mvopTimingInfo.bInterlace;
4525 pDstInfo->DEHST = mvopTimingInfo.u16HActive_Start / 2 + 2;
4526 if(pDstInfo->bInterlaceMode)
4527 {
4528 pDstInfo->DEVST = (mvopTimingInfo.u16VBlank0_End - mvopTimingInfo.u16TopField_VS) * 2 - 18;
4529 }
4530 else
4531 {
4532 pDstInfo->DEVST = (mvopTimingInfo.u16VBlank0_End - mvopTimingInfo.u16TopField_VS) - 5;
4533 }
4534 //HDeEnd=HDeStart+HDeWidth
4535 pDstInfo->DEHEND = pDstInfo->DEHST + pDstInfo->HDTOT - mvopTimingInfo.u16HActive_Start;
4536 //VDeEnd=VDeStart+VDeWidth
4537 if(pDstInfo->bInterlaceMode)
4538 {
4539 pDstInfo->DEVEND = pDstInfo->DEVST + pDstInfo->VDTOT - (2 * mvopTimingInfo.u16VBlank0_End - 3);
4540 }
4541 else
4542 {
4543 pDstInfo->DEVEND = pDstInfo->DEVST + pDstInfo->VDTOT - (mvopTimingInfo.u16VBlank0_End - 1);
4544 }
4545 #if defined (__aarch64__)
4546 MVOP_TIMING_DBG(MVOP_PRINTF("bInterlace=%u,HTotal=%u,VTotal=%u\n", pDstInfo->bInterlaceMode, pDstInfo->HDTOT, pDstInfo->VDTOT);)
4547 MVOP_TIMING_DBG(MVOP_PRINTF("HDeStart=%u,HDeEnd=%u,VDeStart=%u,VDeEnd=%u\n", pDstInfo->DEHST, pDstInfo->DEHEND, pDstInfo->DEVST, pDstInfo->DEVEND);)
4548 #else
4549 MVOP_TIMING_DBG(MVOP_PRINTF("bInterlace=%u,HTotal=%u,VTotal=%u\n", pDstInfo->bInterlaceMode, (int)pDstInfo->HDTOT, (int)pDstInfo->VDTOT);)
4550 MVOP_TIMING_DBG(MVOP_PRINTF("HDeStart=%u,HDeEnd=%u,VDeStart=%u,VDeEnd=%u\n", (int)pDstInfo->DEHST, (int)pDstInfo->DEHEND, (int)pDstInfo->DEVST, (int)pDstInfo->DEVEND);)
4551 #endif
4552 _DRV_MVOP_Return(E_MVOP_DEV_0, TRUE);
4553 }
4554
MDrv_MVOP_GetDstInfo(MVOP_DST_DispInfo * pDstInfo,MS_U32 u32SizeofDstInfo)4555 MS_BOOL MDrv_MVOP_GetDstInfo(MVOP_DST_DispInfo *pDstInfo, MS_U32 u32SizeofDstInfo)
4556 {
4557 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
4558 #if ENABLE_UTOPIA2_INTERFACE
4559 stMVOP_GET_DST_INFO IO_arg;
4560 IO_arg.pDstInfo = pDstInfo;
4561 IO_arg.u32SizeofDstInfo = u32SizeofDstInfo;
4562 IO_arg.bRet = FALSE;
4563
4564 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
4565 {
4566 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4567 return IO_arg.bRet;
4568 }
4569
4570 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_GET_DST_INFO, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
4571 {
4572 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4573 return IO_arg.bRet;
4574 }
4575
4576 return IO_arg.bRet;
4577 #else
4578 void* pInstance = NULL;
4579 return (MDrv_MVOP_GetDstInfo_V2(pInstance, pDstInfo, u32SizeofDstInfo));
4580 #endif
4581 }
4582
4583
4584 /********************************************************************************/
4585 /// Used for Output Fix Vtotal of MVOP
4586 /// @param u16FixVtt \b IN
4587 /********************************************************************************/
MDrv_MVOP_SetFixVtt_V2(void * pInstance,MS_U16 u16FixVtt)4588 MS_BOOL MDrv_MVOP_SetFixVtt_V2(void* pInstance, MS_U16 u16FixVtt)
4589 {
4590 _DRV_MVOP_Entry(E_MVOP_DEV_0);
4591
4592 if (p_gDrvMVOPCtx == NULL)
4593 {
4594 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
4595 _DRV_MVOP_Return(E_MVOP_DEV_0, FALSE);
4596 }
4597 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._u16FixVtt = u16FixVtt;
4598
4599 _DRV_MVOP_Return(E_MVOP_DEV_0, TRUE);
4600 }
4601
MDrv_MVOP_SetFixVtt(MS_U16 u16FixVtt)4602 MS_BOOL MDrv_MVOP_SetFixVtt(MS_U16 u16FixVtt)
4603 {
4604 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d\n", __FUNCTION__, __LINE__, u16FixVtt);)
4605 #if ENABLE_UTOPIA2_INTERFACE
4606 stMVOP_SET_FIXVTT IO_arg;
4607 IO_arg.u16FixVtt = u16FixVtt;
4608 IO_arg.bRet = FALSE;
4609
4610 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
4611 {
4612 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4613 return IO_arg.bRet;
4614 }
4615
4616 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SET_FIXVTT, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
4617 {
4618 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4619 return IO_arg.bRet;
4620 }
4621 return IO_arg.bRet;
4622 #else
4623 void* pInstance = NULL;
4624 return (MDrv_MVOP_SetFixVtt_V2(pInstance, u16FixVtt));
4625 #endif
4626 }
4627
MDrv_MVOP_EnableFreerunMode_V2(void * pInstance,MS_BOOL bEnable)4628 MS_BOOL MDrv_MVOP_EnableFreerunMode_V2(void* pInstance, MS_BOOL bEnable)
4629 {
4630 HAL_MVOP_EnableFreerunMode(bEnable);
4631 if (p_gDrvMVOPCtx == NULL)
4632 {
4633 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
4634 return FALSE;
4635 }
4636
4637 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bEnableFreerunMode = bEnable;
4638 return TRUE;
4639 }
4640
MDrv_MVOP_EnableFreerunMode(MS_BOOL bEnable)4641 MS_BOOL MDrv_MVOP_EnableFreerunMode(MS_BOOL bEnable)
4642 {
4643 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d\n", __FUNCTION__, __LINE__, bEnable);)
4644 HAL_MVOP_EnableFreerunMode(bEnable);
4645 if (p_gDrvMVOPCtx == NULL)
4646 {
4647 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
4648 return FALSE;
4649 }
4650
4651 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bEnableFreerunMode = bEnable;
4652 return TRUE;
4653 }
4654
MDrv_MVOP_MiuSwitch_V2(void * pInstance,MS_U8 u8Miu)4655 MVOP_Result MDrv_MVOP_MiuSwitch_V2(void* pInstance, MS_U8 u8Miu)
4656 {
4657 _DRV_MVOP_Entry(E_MVOP_DEV_0);
4658 _DRV_MVOP_Return(E_MVOP_DEV_0,MVOP_MiuSwitch(TRUE, u8Miu));
4659 }
4660
MDrv_MVOP_MiuSwitch(MS_U8 u8Miu)4661 MVOP_Result MDrv_MVOP_MiuSwitch(MS_U8 u8Miu)
4662 {
4663 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
4664 #if ENABLE_UTOPIA2_INTERFACE
4665
4666 stMVOP_MIU_SWITCH IO_arg;
4667 IO_arg.u8Miu = u8Miu;
4668 IO_arg.eRet = E_MVOP_FAIL;
4669
4670 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
4671 {
4672 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4673 return IO_arg.eRet;
4674 }
4675
4676 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_MIU_SWITCH, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
4677 {
4678 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4679 return IO_arg.eRet;
4680 }
4681
4682 return IO_arg.eRet;
4683 #else
4684 void* pInstance = NULL;
4685 return (MDrv_MVOP_MiuSwitch_V2(pInstance, u8Miu));
4686 #endif
4687 }
4688
MDrv_MVOP_SetBaseAdd_V2(void * pInstance,MS_PHY u32YOffset,MS_PHY u32UVOffset,MS_BOOL bProgressive,MS_BOOL b422pack)4689 MS_BOOL MDrv_MVOP_SetBaseAdd_V2(void* pInstance, MS_PHY u32YOffset, MS_PHY u32UVOffset, MS_BOOL bProgressive, MS_BOOL b422pack)
4690 {
4691 _DRV_MVOP_Entry(E_MVOP_DEV_0);
4692
4693 if (!MVOP_IsInit())
4694 {
4695 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
4696 _DRV_MVOP_Return(E_MVOP_DEV_0, FALSE);
4697 }
4698
4699 if (HAL_MVOP_SetYUVBaseAdd)
4700 {
4701 HAL_MVOP_SetYUVBaseAdd(u32YOffset, u32UVOffset, bProgressive, b422pack);
4702 HAL_MVOP_LoadReg();
4703 _DRV_MVOP_Return(E_MVOP_DEV_0, TRUE);
4704 }
4705 else
4706 {
4707 MVOP_ERR(MVOP_PRINTF("%s not support!\n", __FUNCTION__);)
4708
4709 _DRV_MVOP_Return(E_MVOP_DEV_0, FALSE);
4710 }
4711 }
4712
MDrv_MVOP_SetBaseAdd(MS_PHY u32YOffset,MS_PHY u32UVOffset,MS_BOOL bProgressive,MS_BOOL b422pack)4713 MS_BOOL MDrv_MVOP_SetBaseAdd(MS_PHY u32YOffset, MS_PHY u32UVOffset, MS_BOOL bProgressive, MS_BOOL b422pack)
4714 {
4715 #if defined (__aarch64__)
4716 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg1:0x%lx, arg2:0x%lx, arg3:%d, arg4:%d \n", __FUNCTION__, __LINE__,
4717 u32YOffset, u32UVOffset, bProgressive, b422pack);)
4718 #else
4719 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg1:0x%x, arg2:0x%x, arg3:%d, arg4:%d \n", __FUNCTION__, __LINE__,
4720 (int)u32YOffset, (int)u32UVOffset, bProgressive, b422pack);)
4721 #endif
4722 #if ENABLE_UTOPIA2_INTERFACE
4723 stMVOP_SET_BASEADD IO_arg;
4724 IO_arg.u32YOffset = u32YOffset;
4725 IO_arg.u32UVOffset = u32UVOffset;
4726 IO_arg.bProgressive = bProgressive;
4727 IO_arg.b422pack = b422pack;
4728 IO_arg.bRet = FALSE;
4729
4730 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
4731 {
4732 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4733 return IO_arg.bRet;
4734 }
4735
4736 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SET_BASEADD, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
4737 {
4738 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4739 return IO_arg.bRet;
4740 }
4741
4742 return IO_arg.bRet;
4743 #else
4744 void* pInstance = NULL;
4745 return (MDrv_MVOP_SetBaseAdd_V2(pInstance, u32YOffset, u32UVOffset, bProgressive, b422pack));
4746 #endif
4747 }
4748
MDrv_MVOP_SEL_OP_FIELD_V2(void * pInstance,MS_BOOL bEnable)4749 void MDrv_MVOP_SEL_OP_FIELD_V2(void* pInstance, MS_BOOL bEnable)
4750 {
4751 _DRV_MVOP_Entry(E_MVOP_DEV_0);
4752
4753 if (p_gDrvMVOPCtx == NULL)
4754 {
4755 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
4756 _DRV_MVOP_Return(E_MVOP_DEV_0, );
4757 }
4758 #if defined(STB_DC_MODE)||(STB_DC)
4759 if (!MVOP_IsInit())
4760 {
4761 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
4762 _DRV_MVOP_Return(E_MVOP_DEV_0, );
4763 }
4764 HAL_MVOP_MaskDBRegCtrl(E_MVOP_DEV_0, bEnable ,E_MVOP_SEL_OP_FIELD);
4765 #endif
4766
4767 _DRV_MVOP_Release(E_MVOP_DEV_0);
4768 MVOP_DBG(MVOP_PRINTF("\nMVOP MDrv_MVOP_SEL_OP_FIELD (0x%x) \n",bEnable);)
4769 }
4770
MDrv_MVOP_SEL_OP_FIELD(MS_BOOL bEnable)4771 void MDrv_MVOP_SEL_OP_FIELD(MS_BOOL bEnable)
4772 {
4773 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d \n", __FUNCTION__, __LINE__, bEnable);)
4774 #if ENABLE_UTOPIA2_INTERFACE
4775 stMVOP_SEL_OP_FIELD IO_arg;
4776 IO_arg.bEnable = bEnable;
4777
4778 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
4779 {
4780 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4781 return;
4782 }
4783
4784 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SEL_OP_FIELD, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
4785 {
4786 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4787 return;
4788 }
4789
4790 #else
4791 void* pInstance = NULL;
4792 MDrv_MVOP_SEL_OP_FIELD_V2(pInstance, bEnable);
4793 #endif
4794 }
4795
MDrv_MVOP_INV_OP_VS_V2(void * pInstance,MS_BOOL bEnable)4796 void MDrv_MVOP_INV_OP_VS_V2(void* pInstance, MS_BOOL bEnable)
4797 {
4798 _DRV_MVOP_Entry(E_MVOP_DEV_0);
4799
4800 if (p_gDrvMVOPCtx == NULL)
4801 {
4802 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
4803 _DRV_MVOP_Return(E_MVOP_DEV_0, );
4804 }
4805 #if STB_DC
4806 if (!MVOP_IsInit())
4807 {
4808 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
4809 _DRV_MVOP_Return(E_MVOP_DEV_0, );
4810 }
4811 HAL_MVOP_MaskDBRegCtrl(E_MVOP_DEV_0, bEnable ,E_MVOP_INV_OP_VS);
4812 #endif
4813 _DRV_MVOP_Release(E_MVOP_DEV_0);
4814 MVOP_DBG(MVOP_PRINTF("\nMVOP MDrv_MVOP_INV_OP_VS (0x%x) \n",bEnable);)
4815 }
4816
MDrv_MVOP_INV_OP_VS(MS_BOOL bEnable)4817 void MDrv_MVOP_INV_OP_VS(MS_BOOL bEnable)
4818 {
4819 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d \n", __FUNCTION__, __LINE__, bEnable);)
4820 #if ENABLE_UTOPIA2_INTERFACE
4821 stMVOP_INV_OP_VS IO_arg;
4822 IO_arg.bEnable = bEnable;
4823
4824 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
4825 {
4826 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4827 return;
4828 }
4829
4830 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_INV_OP_VS, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
4831 {
4832 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4833 return;
4834 }
4835 #else
4836 void* pInstance = NULL;
4837 MDrv_MVOP_INV_OP_VS_V2(pInstance, bEnable);
4838 #endif
4839 }
4840
4841
MDrv_MVOP_FORCE_TOP_V2(void * pInstance,MS_BOOL bEnable)4842 void MDrv_MVOP_FORCE_TOP_V2(void* pInstance, MS_BOOL bEnable)
4843 {
4844 _DRV_MVOP_Entry(E_MVOP_DEV_0);
4845
4846 if (p_gDrvMVOPCtx == NULL)
4847 {
4848 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
4849 _DRV_MVOP_Return(E_MVOP_DEV_0, );
4850 }
4851 #if STB_DC
4852 if (!MVOP_IsInit())
4853 {
4854 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
4855 _DRV_MVOP_Return(E_MVOP_DEV_0, );
4856 }
4857 HAL_MVOP_ModeCtrl(bEnable ,E_MVOP_FORCE_TOP);
4858 #endif
4859 _DRV_MVOP_Release(E_MVOP_DEV_0);
4860 MVOP_DBG(MVOP_PRINTF("\nMVOP MDrv_MVOP_FORCE_TOP (0x%x) \n",bEnable);)
4861 }
4862
MDrv_MVOP_FORCE_TOP(MS_BOOL bEnable)4863 void MDrv_MVOP_FORCE_TOP(MS_BOOL bEnable)
4864 {
4865 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d \n", __FUNCTION__, __LINE__, bEnable);)
4866 #if ENABLE_UTOPIA2_INTERFACE
4867 stMVOP_FORCE_TOP IO_arg;
4868 IO_arg.bEnable = bEnable;
4869
4870 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
4871 {
4872 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4873 return;
4874 }
4875
4876 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_FORCE_TOP, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
4877 {
4878 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4879 return;
4880 }
4881
4882 #else
4883 void* pInstance = NULL;
4884 MDrv_MVOP_FORCE_TOP_V2(pInstance, bEnable);
4885 #endif
4886 }
4887
4888
MDrv_MVOP_SetImageWidthHight_V2(void * pInstance,MS_U16 u16Width,MS_U16 u16Height)4889 MS_BOOL MDrv_MVOP_SetImageWidthHight_V2(void* pInstance, MS_U16 u16Width ,MS_U16 u16Height)
4890 {
4891 _DRV_MVOP_Entry(E_MVOP_DEV_0);
4892
4893 if (p_gDrvMVOPCtx == NULL)
4894 {
4895 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
4896 _DRV_MVOP_Return(E_MVOP_DEV_0, FALSE);
4897 }
4898 #if defined(STB_DC_MODE)||(STB_DC)
4899 if(u16Width == 0 ||u16Height ==0)
4900 {
4901 HAL_MVOP_SetPicWidthMinus(E_MVOP_DEV_0, 0, p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16Width);
4902 HAL_MVOP_SetPicHeightMinus(E_MVOP_DEV_0, 0, p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16Height);
4903 }
4904 else
4905 {
4906 HAL_MVOP_SetPicWidthMinus(E_MVOP_DEV_0, u16Width-1, p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16Width);
4907 HAL_MVOP_SetPicHeightMinus(E_MVOP_DEV_0, u16Height-1, p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16Height);
4908 }
4909 p_gDrvMVOPCtx->_u16Width = u16Width;
4910 p_gDrvMVOPCtx->_u16Height =u16Height;
4911 #else
4912 HAL_MVOP_SetPicWidthMinus(E_MVOP_DEV_0, u16Width, p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16Width);
4913 HAL_MVOP_SetPicHeightMinus(E_MVOP_DEV_0, u16Height, p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16Height);
4914 #endif
4915 MVOP_DBG(MVOP_PRINTF("\nMVOP MDrv_MVOP_SetImageWidthHight (0x%x 0x%x) \n",u16Width ,u16Height);)
4916 _DRV_MVOP_Return(E_MVOP_DEV_0, TRUE);
4917
4918 }
4919
MDrv_MVOP_SetImageWidthHight(MS_U16 u16Width,MS_U16 u16Height)4920 MS_BOOL MDrv_MVOP_SetImageWidthHight(MS_U16 u16Width ,MS_U16 u16Height)
4921 {
4922 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg1:%d, arg2:%d \n", __FUNCTION__, __LINE__, u16Width, u16Height);)
4923 #if ENABLE_UTOPIA2_INTERFACE
4924 stMVOP_SET_IMAGE_WIDTH_HIGHT IO_arg;
4925 IO_arg.u16Width = u16Width;
4926 IO_arg.u16Height = u16Height;
4927 IO_arg.bRet = FALSE;
4928
4929 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
4930 {
4931 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4932 return IO_arg.bRet;
4933 }
4934
4935 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SET_IMAGE_WIDTH_HIGHT, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
4936 {
4937 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4938 return IO_arg.bRet;
4939 }
4940
4941 return IO_arg.bRet;
4942
4943 #else
4944 void* pInstance = NULL;
4945 return (MDrv_MVOP_SetImageWidthHight_V2(pInstance, u16Width, u16Height));
4946 #endif
4947 }
4948
4949
MDrv_MVOP_SetStartPos_V2(void * pInstance,MS_U16 u16Xpos,MS_U16 u16Ypos)4950 void MDrv_MVOP_SetStartPos_V2(void* pInstance, MS_U16 u16Xpos ,MS_U16 u16Ypos)
4951 {
4952 _DRV_MVOP_Entry(E_MVOP_DEV_0);
4953 if (p_gDrvMVOPCtx== NULL)
4954 {
4955 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
4956 _DRV_MVOP_Return(E_MVOP_DEV_0, );
4957 }
4958
4959 if (!MVOP_IsInit())
4960 {
4961 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
4962 _DRV_MVOP_Return(E_MVOP_DEV_0, );
4963 }
4964
4965 MVOP_Timing* pstTiming = NULL;
4966 pstTiming = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming;
4967
4968 HAL_MVOP_SetStartX(E_MVOP_DEV_0, u16Xpos);
4969 HAL_MVOP_SetStartY(E_MVOP_DEV_0, u16Ypos, pstTiming->bInterlace);
4970 _DRV_MVOP_Release(E_MVOP_DEV_0);
4971 MVOP_DBG(MVOP_PRINTF("\nMVOP MDrv_MVOP_SetStartPos (0x%x 0x%x) \n",u16Xpos ,u16Ypos);)
4972 }
4973
MDrv_MVOP_SetStartPos(MS_U16 u16Xpos,MS_U16 u16Ypos)4974 void MDrv_MVOP_SetStartPos(MS_U16 u16Xpos ,MS_U16 u16Ypos)
4975 {
4976 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg1:%d, arg2:%d \n", __FUNCTION__, __LINE__, u16Xpos, u16Ypos);)
4977 #if ENABLE_UTOPIA2_INTERFACE
4978 stMVOP_SET_START_POS IO_arg;
4979 IO_arg.u16Xpos = u16Xpos;
4980 IO_arg.u16Ypos = u16Ypos;
4981
4982 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
4983 {
4984 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4985 return;
4986 }
4987
4988 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SET_START_POS, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
4989 {
4990 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
4991 return;
4992 }
4993 #else
4994 void* pInstance = NULL;
4995 MDrv_MVOP_SetStartPos_V2(pInstance, u16Xpos, u16Ypos);
4996 #endif
4997 }
4998
4999
5000
MDrv_MVOP_SetRegSizeFromMVD_V2(void * pInstance,MS_BOOL bEnable)5001 void MDrv_MVOP_SetRegSizeFromMVD_V2(void* pInstance, MS_BOOL bEnable)
5002 {
5003 _DRV_MVOP_Entry(E_MVOP_DEV_0);
5004
5005 if (p_gDrvMVOPCtx == NULL)
5006 {
5007 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
5008 _DRV_MVOP_Return(E_MVOP_DEV_0, );
5009 }
5010
5011 #if defined(STB_DC_MODE)||(STB_DC)
5012 if (!MVOP_IsInit())
5013 {
5014 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
5015 _DRV_MVOP_Return(E_MVOP_DEV_0, );
5016 }
5017 p_gDrvMVOPCtx->_bRegSizeFromMVDStatus = bEnable;
5018 HAL_MVOP_SetDeb2MVDFrameModeCtrl(E_MVOP_DEV_0, p_gDrvMVOPCtx->_bRegSizeFromMVDStatus,E_MVOP_SIZE_FROM_MVD);
5019 #endif
5020 _DRV_MVOP_Release(E_MVOP_DEV_0);
5021 MVOP_DBG(MVOP_PRINTF("\nMVOP MDrv_MVOP_SetRegSizeFromMVD (0x%x) \n",bEnable);)
5022 }
5023
MDrv_MVOP_SetRegSizeFromMVD(MS_BOOL bEnable)5024 void MDrv_MVOP_SetRegSizeFromMVD(MS_BOOL bEnable)
5025 {
5026 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d \n", __FUNCTION__, __LINE__, bEnable);)
5027 #if ENABLE_UTOPIA2_INTERFACE
5028 stMVOP_SET_REGSIZE_FROM_MVD IO_arg;
5029 IO_arg.bEnable = bEnable;
5030
5031 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
5032 {
5033 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5034 return;
5035 }
5036
5037 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SET_REGSIZE_FROM_MVD, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
5038 {
5039 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5040 return;
5041 }
5042 #else
5043 void* pInstance = NULL;
5044 MDrv_MVOP_SetRegSizeFromMVD_V2(pInstance, bEnable);
5045 #endif
5046 }
5047
5048 //------------------------------------------------------------------------------
5049 /// Set(Modify) MVOP clock in CLK_GEN0 0x4c
5050 /// This command is effective after disable MVOP
5051 /// (may cause bluescreen and framerate increased)
5052 /// USAGE:
5053 /// step1. MDrv_MVOP_Enable (FALSE)
5054 /// step2. MDrv_MVOP_SetFrequency(MVOP_FREQUENCY)
5055 /// step3. MDrv_MVOP_Enable (TRUE)
5056 //------------------------------------------------------------------------------
MDrv_MVOP_SetFrequency_V2(void * pInstance,MVOP_FREQUENCY eFreq)5057 void MDrv_MVOP_SetFrequency_V2(void* pInstance, MVOP_FREQUENCY eFreq)
5058 {
5059 _DRV_MVOP_Entry(E_MVOP_DEV_0);
5060 if (p_gDrvMVOPCtx== NULL)
5061 {
5062 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
5063 _DRV_MVOP_Return(E_MVOP_DEV_0, );
5064 }
5065
5066 if (!MVOP_IsInit())
5067 {
5068 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
5069 _DRV_MVOP_Return(E_MVOP_DEV_0, );
5070 }
5071 HAL_MVOP_SetFrequency((HALMVOPFREQUENCY)eFreq);
5072
5073 _DRV_MVOP_Release(E_MVOP_DEV_0);
5074 MVOP_DBG(MVOP_PRINTF("\nMVOP HAL_MVOP_SetFrequency (0x%x) \n",eFreq);)
5075 }
5076
MDrv_MVOP_SetFrequency(MVOP_FREQUENCY eFreq)5077 void MDrv_MVOP_SetFrequency(MVOP_FREQUENCY eFreq)
5078 {
5079 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d \n", __FUNCTION__, __LINE__, eFreq);)
5080 #if ENABLE_UTOPIA2_INTERFACE
5081 stMVOP_SET_FREQUENCY IO_arg;
5082 IO_arg.eFreq = eFreq;
5083
5084 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
5085 {
5086 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5087 return;
5088 }
5089
5090 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_SET_FREQUENCY, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
5091 {
5092 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5093 return;
5094 }
5095
5096 #else
5097 void* pInstance = NULL;
5098 MDrv_MVOP_SetFrequency_V2(pInstance, eFreq);
5099 #endif
5100 }
5101
5102 //------------------------------------------------------------------------------
5103 /// MVOP Enable/Disable mirror mode (chips after M10 support this feature)
5104 /// @return TRUE/FALSE
5105 //------------------------------------------------------------------------------
MDrv_MVOP_SetVOPMirrorMode_V2(void * pInstance,MS_BOOL bEnable,MVOP_DrvMirror eMirrorMode)5106 void MDrv_MVOP_SetVOPMirrorMode_V2(void* pInstance, MS_BOOL bEnable,MVOP_DrvMirror eMirrorMode)
5107 {
5108 _DRV_MVOP_Entry(E_MVOP_DEV_0);
5109 if (!MVOP_IsInit())
5110 {
5111 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
5112 _DRV_MVOP_Return(E_MVOP_DEV_0, );
5113 }
5114 if (HAL_MVOP_SetVerticalMirrorMode && HAL_MVOP_SetHorizontallMirrorMode)
5115 {
5116 if( eMirrorMode == E_VOPMIRROR_VERTICAL)
5117 {
5118 HAL_MVOP_SetVerticalMirrorMode(bEnable);
5119 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopComdFlag.bEnableVMirror= 1;
5120 }
5121 else if(eMirrorMode == E_VOPMIRROR_HORIZONTALL)
5122 {
5123 HAL_MVOP_SetHorizontallMirrorMode(bEnable);
5124 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopComdFlag.bEnableHMirror= 1;
5125 }
5126 else if(eMirrorMode == E_VOPMIRROR_HVBOTH)
5127 {
5128 HAL_MVOP_SetVerticalMirrorMode(bEnable);
5129 HAL_MVOP_SetHorizontallMirrorMode(bEnable);
5130 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopComdFlag.bEnableVMirror= 1;
5131 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopComdFlag.bEnableHMirror= 1;
5132 }
5133 }
5134
5135 _DRV_MVOP_Release(E_MVOP_DEV_0);
5136 MVOP_DBG(MVOP_PRINTF("\nMVOP MDrv_MVOP_SetVOPMirrorMode (eMirrorMode :0x%x , 0x%x) \n",eMirrorMode,bEnable);)
5137 }
5138
MDrv_MVOP_SetVOPMirrorMode(MS_BOOL bEnable,MVOP_DrvMirror eMirrorMode)5139 void MDrv_MVOP_SetVOPMirrorMode(MS_BOOL bEnable,MVOP_DrvMirror eMirrorMode)
5140 {
5141 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg1:%d, arg2:%d \n", __FUNCTION__, __LINE__, bEnable, eMirrorMode);)
5142 #if ENABLE_UTOPIA2_INTERFACE
5143 stMVOP_SET_VOP_MIRROR_MODE IO_arg;
5144 IO_arg.bEnable = bEnable;
5145 IO_arg.eMirrorMode = eMirrorMode;
5146
5147 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
5148 {
5149 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5150 return;
5151 }
5152
5153 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SET_VOP_MIRROR_MODE, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
5154 {
5155 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5156 return;
5157 }
5158 #else
5159 void* pInstance = NULL;
5160 MDrv_MVOP_SetVOPMirrorMode_V2(pInstance, bEnable, eMirrorMode);
5161 #endif
5162 }
5163
5164
5165 //-----------------------------------------------------------------------------
5166 /// Get the current displayed base address of MCU mode, unit of 8 bytes.
5167 /// @param -u32YOffset: pointer to Y address
5168 /// @param -u32UVOffset: pointer to UV address
5169 //-----------------------------------------------------------------------------
MDrv_MVOP_GetBaseAdd_V2(void * pInstance,MS_PHY * u64YOffset,MS_PHY * u64UVOffset)5170 void MDrv_MVOP_GetBaseAdd_V2(void* pInstance, MS_PHY* u64YOffset, MS_PHY* u64UVOffset)
5171 {
5172 _DRV_MVOP_Entry(E_MVOP_DEV_0);
5173 if (!MVOP_IsInit())
5174 {
5175 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
5176 _DRV_MVOP_Return(E_MVOP_DEV_0, );
5177 }
5178 if (HAL_MVOP_GetYBaseAdd && HAL_MVOP_GetUVBaseAdd)
5179 {
5180 *u64YOffset = HAL_MVOP_GetYBaseAdd();
5181 *u64UVOffset = HAL_MVOP_GetUVBaseAdd();
5182 }
5183 _DRV_MVOP_Release(E_MVOP_DEV_0);
5184 }
5185
MDrv_MVOP_GetBaseAdd(MS_PHY * u64YOffset,MS_PHY * u64UVOffset)5186 void MDrv_MVOP_GetBaseAdd(MS_PHY* u64YOffset, MS_PHY* u64UVOffset)
5187 {
5188 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
5189 #if ENABLE_UTOPIA2_INTERFACE
5190 stMVOP_GET_BASE_ADD IO_arg;
5191 IO_arg.u32YOffset = u64YOffset;
5192 IO_arg.u32UVOffset = u64UVOffset;
5193
5194 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
5195 {
5196 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5197 return;
5198 }
5199
5200 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_GET_BASE_ADD, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
5201 {
5202 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5203 return;
5204 }
5205 #else
5206 void* pInstance = NULL;
5207 MDrv_MVOP_GetBaseAdd_V2(pInstance, u32YOffset, u32UVOffset);
5208 #endif
5209 }
5210 #if 0
5211 MS_BOOL MDrv_MVOP_SetBaseAddMultiView(MS_U32 u32YOffset, MS_U32 u32UVOffset, MVOP_3DView eView, MS_BOOL bLoad)
5212 {
5213 _DRV_MVOP_Entry(E_MVOP_DEV_0);
5214
5215 if (HAL_MVOP_SetYUVBaseAddMultiView)
5216 {
5217 HAL_MVOP_SetYUVBaseAddMultiView(u32YOffset, u32YOffset, eView);
5218 if(bLoad)
5219 {
5220 HAL_MVOP_LoadReg();
5221 }
5222 _DRV_MVOP_Return(E_MVOP_DEV_0,TRUE);
5223 }
5224 else
5225 {
5226 MVOP_ERR(MVOP_PRINTF("%s not support!\n", __FUNCTION__);)
5227
5228 _DRV_MVOP_Return(E_MVOP_DEV_0,FALSE);
5229 }
5230 }
5231
5232 void MDrv_MVOP_GetBaseAddMultiView(MS_U32* u32YOffset, MS_U32* u32UVOffset, MVOP_3DView eView)
5233 {
5234 _DRV_MVOP_Entry(E_MVOP_DEV_0);
5235 if (HAL_MVOP_GetYBaseAddMultiView && HAL_MVOP_GetUVBaseAddMultiView)
5236 {
5237 *u32YOffset = HAL_MVOP_GetYBaseAddMultiView(eView);
5238 *u32UVOffset = HAL_MVOP_GetUVBaseAddMultiView(eView);
5239 }
5240 _DRV_MVOP_Release(E_MVOP_DEV_0);
5241 }
5242 #endif
5243
5244 //=============================================================================
5245 // SUB MVOP
5246 // Chips that support two MVOP modules: T12/T8, J2, A5.
5247
5248 //-----------------------------------------------------------------------------
5249 /// Get status of MVOP driver
5250 /// @param -pstatus: driver status
5251 /// @return - TRUE / FALSE
5252 //-----------------------------------------------------------------------------
5253
MDrv_MVOP_SubGetBaseAdd_V2(void * pInstance,MS_U32 * u32YOffset,MS_U32 * u32UVOffset)5254 void MDrv_MVOP_SubGetBaseAdd_V2(void* pInstance, MS_U32* u32YOffset, MS_U32* u32UVOffset)
5255 {
5256 #if MVOP_SUPPORT_SUB
5257 _DRV_MVOP_Entry(E_MVOP_DEV_1);
5258 MVOP_SubCheckIsInit();
5259 if (HAL_MVOP_SubGetYBaseAdd && HAL_MVOP_SubGetUVBaseAdd)
5260 {
5261 *u32YOffset = HAL_MVOP_SubGetYBaseAdd();
5262 *u32UVOffset = HAL_MVOP_SubGetUVBaseAdd();
5263 }
5264 _DRV_MVOP_Release(E_MVOP_DEV_1);
5265 #endif
5266 }
5267
MDrv_MVOP_SubGetBaseAdd(MS_PHY * u32YOffset,MS_PHY * u32UVOffset)5268 void MDrv_MVOP_SubGetBaseAdd(MS_PHY* u32YOffset, MS_PHY* u32UVOffset)
5269 {
5270 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
5271 #if ENABLE_UTOPIA2_INTERFACE
5272 stMVOP_SUB_GET_BASE_ADD IO_arg;
5273 IO_arg.u32YOffset = u32YOffset;
5274 IO_arg.u32UVOffset = u32UVOffset;
5275
5276 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
5277 {
5278 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5279 return;
5280 }
5281
5282 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_SUB_GET_BASEADD, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
5283 {
5284 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5285 return;
5286 }
5287
5288 #else
5289 void* pInstance = NULL;
5290 MDrv_MVOP_SubGetBaseAdd_V2(pInstance, u32YOffset, u32UVOffset);
5291 #endif
5292 }
5293
MDrv_MVOP_SubGetStatus_V2(void * pInstance,MVOP_DrvStatus * pMVOPStat)5294 MS_BOOL MDrv_MVOP_SubGetStatus_V2(void* pInstance, MVOP_DrvStatus *pMVOPStat)
5295 {
5296 #if MVOP_SUPPORT_SUB
5297 _DRV_MVOP_Entry(E_MVOP_DEV_1);
5298
5299 if (p_gDrvSubMVOPCtx== NULL)
5300 {
5301 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
5302 _DRV_MVOP_Return(E_MVOP_DEV_1, FALSE);
5303 }
5304
5305 if (!MVOP_SubIsInit())
5306 {
5307 _DRV_MVOP_Return(E_MVOP_DEV_1, FALSE);
5308 }
5309 _DRV_MVOP_Return(E_MVOP_DEV_1, MVOP_GetStatus(E_MVOP_DEV_1, pMVOPStat));
5310 #else
5311 return FALSE;
5312 #endif
5313 }
5314
5315 /* Miss command: E_MVOP_CMD_SUB_GET_STATUS */
MDrv_MVOP_SubGetStatus(MVOP_DrvStatus * pMVOPStat)5316 MS_BOOL MDrv_MVOP_SubGetStatus(MVOP_DrvStatus *pMVOPStat)
5317 {
5318 #if MVOP_SUPPORT_SUB
5319 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
5320 if (p_gDrvSubMVOPCtx== NULL)
5321 {
5322 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
5323 return FALSE;
5324 }
5325
5326 if (!MVOP_SubIsInit())
5327 {
5328 return FALSE;
5329 }
5330 return MVOP_GetStatus(E_MVOP_DEV_1, pMVOPStat);
5331 #else
5332 return FALSE;
5333 #endif
5334 }
5335
5336
5337 //-----------------------------------------------------------------------------
5338 /// Get distance from HSync to DE for Scaler, unit: mvop clock cycle
5339 /// @return HStart
5340 //-----------------------------------------------------------------------------
MDrv_MVOP_SubGetHStart_V2(void * pInstance)5341 MS_U16 MDrv_MVOP_SubGetHStart_V2(void* pInstance)
5342 {
5343 #if MVOP_SUPPORT_SUB
5344 _DRV_MVOP_Entry(E_MVOP_DEV_1);
5345
5346 if (p_gDrvSubMVOPCtx == NULL)
5347 {
5348 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
5349 _DRV_MVOP_Return(E_MVOP_DEV_1, 0);
5350 }
5351 MVOP_SubCheckIsInit_RetZero();
5352 #if STB_DC
5353 return 0;
5354 #else
5355 _DRV_MVOP_Return(E_MVOP_DEV_1, ((p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopTiming.u16HActive_Start)/2 + 2));
5356 #endif
5357 #else
5358 return 0;
5359 #endif
5360 }
5361
MDrv_MVOP_SubGetHStart(void)5362 MS_U16 MDrv_MVOP_SubGetHStart(void)
5363 {
5364 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
5365 #if ENABLE_UTOPIA2_INTERFACE
5366 stMVOP_SUB_GET_HSTART IO_arg;
5367 IO_arg.u16Ret = 0;
5368
5369 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
5370 {
5371 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5372 return IO_arg.u16Ret;
5373 }
5374
5375 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_SUB_GET_HSTART, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
5376 {
5377 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5378 return IO_arg.u16Ret;
5379 }
5380 return IO_arg.u16Ret;
5381 #else
5382 void* pInstance = NULL;
5383 return (MDrv_MVOP_SubGetHStart_V2(pInstance));
5384 #endif
5385 }
5386
5387 //-----------------------------------------------------------------------------
5388 /// Get distance from HSync to DE for Scaler, unit: mvop clock cycle
5389 /// @return VStart
5390 //-----------------------------------------------------------------------------
MDrv_MVOP_SubGetVStart_V2(void * pInstance)5391 MS_U16 MDrv_MVOP_SubGetVStart_V2(void* pInstance)
5392 {
5393 MS_U16 u16Vst = 0;
5394 #if MVOP_SUPPORT_SUB
5395 _DRV_MVOP_Entry(E_MVOP_DEV_1);
5396 if (p_gDrvSubMVOPCtx == NULL)
5397 {
5398 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
5399 _DRV_MVOP_Return(E_MVOP_DEV_1, 0);
5400 }
5401 MVOP_SubCheckIsInit_RetZero();
5402 #if STB_DC
5403 return u16Vst;
5404 #else
5405 u16Vst = p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopTiming.u16VBlank0_End - p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopTiming.u16TopField_VS;
5406 if (p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopTiming.bInterlace==1)
5407 {
5408 u16Vst*=2;
5409 u16Vst-=18;
5410 }
5411 else
5412 {
5413 u16Vst-=5;
5414 }
5415 _DRV_MVOP_Return(E_MVOP_DEV_1, u16Vst);
5416 #endif
5417 #else
5418 return u16Vst;
5419 #endif
5420 }
5421
MDrv_MVOP_SubGetVStart(void)5422 MS_U16 MDrv_MVOP_SubGetVStart(void)
5423 {
5424 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
5425 #if ENABLE_UTOPIA2_INTERFACE
5426 stMVOP_SUB_GET_VSTART IO_arg;
5427 IO_arg.u16Ret = 0;
5428
5429 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
5430 {
5431 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5432 return IO_arg.u16Ret;
5433 }
5434
5435 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_SUB_GET_VSTART, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
5436 {
5437 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5438 return IO_arg.u16Ret;
5439 }
5440
5441 return IO_arg.u16Ret;
5442
5443 #else
5444 void* pInstance = NULL;
5445 return (MDrv_MVOP_SubGetVStart_V2(pInstance));
5446 #endif
5447 }
5448
5449 //-----------------------------------------------------------------------------
5450 // Set MVOP clock enable
5451 // @param bEnable \b IN
5452 // - # TRUE Enable clock
5453 // - # FALSE Close clock
5454 //-----------------------------------------------------------------------------
MDrv_MVOP_SubSetClk_V2(void * pInstance,MS_BOOL bEnable)5455 void MDrv_MVOP_SubSetClk_V2 (void* pInstance, MS_BOOL bEnable )
5456 {
5457 #if MVOP_SUPPORT_SUB
5458 HAL_MVOP_SubSetDCClk(0, bEnable); //Clk DC0
5459 HAL_MVOP_SubSetDCClk(1, bEnable); //Clk DC1
5460 if(HAL_MVOP_SubSetDCSRAMClk)
5461 {
5462 HAL_MVOP_SubSetDCSRAMClk(0, bEnable); //Clk DC1 sraam clock
5463 }
5464 #ifdef UFO_MVOP_FB_DEC_CLK
5465 if(HAL_MVOP_SetFBDecClk)
5466 {
5467 HAL_MVOP_SetFBDecClk(E_MVOP_DEV_1, bEnable); // clk FBDec
5468 }
5469 #endif
5470 #endif
5471 }
5472
5473 #if MVOP_SUPPORT_SUB
MDrv_MVOP_SubSetClk(MS_BOOL bEnable)5474 static void MDrv_MVOP_SubSetClk ( MS_BOOL bEnable )
5475 {
5476 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d \n", __FUNCTION__, __LINE__, bEnable);)
5477 HAL_MVOP_SubSetDCClk(0, bEnable); //Clk DC0
5478 HAL_MVOP_SubSetDCClk(1, bEnable); //Clk DC1
5479 if(HAL_MVOP_SubSetDCSRAMClk)
5480 {
5481 HAL_MVOP_SubSetDCSRAMClk(0, bEnable); //Clk DC1 sraam clock
5482 }
5483 #ifdef UFO_MVOP_FB_DEC_CLK
5484 if(HAL_MVOP_SetFBDecClk)
5485 {
5486 HAL_MVOP_SetFBDecClk(E_MVOP_DEV_1, bEnable); // clk FBDec
5487 }
5488 #endif
5489 }
5490 #endif
5491
5492 //-----------------------------------------------------------------------------
5493 /// Set MVOP test pattern.
5494 //-----------------------------------------------------------------------------
MDrv_MVOP_SubSetPattern_V2(void * pInstance,MVOP_Pattern enMVOPPattern)5495 void MDrv_MVOP_SubSetPattern_V2(void* pInstance, MVOP_Pattern enMVOPPattern)
5496 {
5497 static MVOP_Pattern s_enMVOPPattern = MVOP_PATTERN_NORMAL;
5498 #if MVOP_SUPPORT_SUB
5499 _DRV_MVOP_Entry(E_MVOP_DEV_1);
5500 if (p_gDrvSubMVOPCtx == NULL)
5501 {
5502 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
5503 _DRV_MVOP_Return(E_MVOP_DEV_1, );
5504 }
5505 MVOP_SubCheckIsInit();
5506 if(enMVOPPattern == MVOP_PATTERN_DEFAULT)
5507 {
5508 enMVOPPattern = (MVOP_Pattern)(((MS_U32)(s_enMVOPPattern) + 1) % (MS_U32)MVOP_PATTERN_DEFAULT);
5509 }
5510 HAL_MVOP_SubSetPattern(enMVOPPattern);
5511 s_enMVOPPattern = enMVOPPattern;
5512 _DRV_MVOP_Release(E_MVOP_DEV_1);
5513 #else
5514 UNUSED(s_enMVOPPattern);
5515 #endif
5516 }
5517
MDrv_MVOP_SubSetPattern(MVOP_Pattern enMVOPPattern)5518 void MDrv_MVOP_SubSetPattern(MVOP_Pattern enMVOPPattern)
5519 {
5520 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d \n", __FUNCTION__, __LINE__, enMVOPPattern);)
5521 #if ENABLE_UTOPIA2_INTERFACE
5522 stMVOP_SUB_SET_PATTERN IO_arg;
5523 IO_arg.enMVOPPattern = enMVOPPattern;
5524
5525 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
5526 {
5527 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5528 return;
5529 }
5530
5531 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SUB_SET_PATTERN, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
5532 {
5533 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5534 return;
5535 }
5536 #else
5537 void* pInstance = NULL;
5538 MDrv_MVOP_SubSetPattern_V2(pInstance, enMVOPPattern);
5539 #endif
5540 }
5541
5542 //-----------------------------------------------------------------------------
5543 /// Configure the tile format of the MVOP input.
5544 /// @return TRUE or FALSE
5545 //-----------------------------------------------------------------------------
MDrv_MVOP_SubSetTileFormat_V2(void * pInstance,MVOP_TileFormat eTileFmt)5546 MS_BOOL MDrv_MVOP_SubSetTileFormat_V2(void* pInstance, MVOP_TileFormat eTileFmt)
5547 {
5548 #if MVOP_SUPPORT_SUB
5549 _DRV_MVOP_Entry(E_MVOP_DEV_1);
5550 if (p_gDrvSubMVOPCtx == NULL)
5551 {
5552 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
5553 _DRV_MVOP_Return(E_MVOP_DEV_1, FALSE);
5554 }
5555 if (!MVOP_SubIsInit())
5556 {
5557 _DRV_MVOP_Return(E_MVOP_DEV_1, FALSE);
5558 }
5559 _DRV_MVOP_Return(E_MVOP_DEV_1, HAL_MVOP_SubSetTileFormat(eTileFmt));
5560 #else
5561 return FALSE;
5562 #endif
5563 }
5564
MDrv_MVOP_SubSetTileFormat(MVOP_TileFormat eTileFmt)5565 MS_BOOL MDrv_MVOP_SubSetTileFormat(MVOP_TileFormat eTileFmt)
5566 {
5567 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d \n", __FUNCTION__, __LINE__, eTileFmt);)
5568 #if ENABLE_UTOPIA2_INTERFACE
5569 stMVOP_SUB_SET_TILE_FORMAT IO_arg;
5570 IO_arg.eTileFmt = eTileFmt;
5571 IO_arg.bRet = FALSE;
5572
5573 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
5574 {
5575 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5576 return IO_arg.bRet;
5577 }
5578
5579 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SUB_SET_TILE_FORMAT, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
5580 {
5581 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5582 return IO_arg.bRet;
5583 }
5584 return IO_arg.bRet;
5585 #else
5586 void* pInstance = NULL;
5587 return (MDrv_MVOP_SubSetTileFormat_V2(pInstance, eTileFmt));
5588 #endif
5589 }
5590
5591 //-----------------------------------------------------------------------------
5592 /// Set MMIO Base for MVOP.
5593 /// @return TRUE or FALSE
5594 //-----------------------------------------------------------------------------
MDrv_MVOP_SubSetMMIOMapBase_V2(void * pInstance)5595 MS_BOOL MDrv_MVOP_SubSetMMIOMapBase_V2(void* pInstance)
5596 {
5597 return MVOP_SetRegBaseAdd(HAL_MVOP_SubRegSetBase);
5598 }
5599
MDrv_MVOP_SubSetMMIOMapBase(void)5600 MS_BOOL MDrv_MVOP_SubSetMMIOMapBase(void)
5601 {
5602 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
5603 return MVOP_SetRegBaseAdd(HAL_MVOP_SubRegSetBase);
5604 }
5605
5606 //-----------------------------------------------------------------------------
5607 /// Initialize MVOP hardware and set it to hardwire mode
5608 //-----------------------------------------------------------------------------
MDrv_MVOP_SubInit_V2(void * pInstance)5609 void MDrv_MVOP_SubInit_V2(void* pInstance)
5610 {
5611 #if MVOP_SUPPORT_SUB
5612 MVOP_DrvInitCtxResults eRet = E_MVOP_INIT_FAIL;
5613 MS_BOOL pbFirstDrvInstant;
5614 MS_U16 u16ECOVersion;
5615
5616 _DRV_MVOP_MutexCreate(E_MVOP_DEV_1);
5617 _DRV_MVOP_Entry(E_MVOP_DEV_1);
5618
5619 eRet = _MVOP_SubInit_Context(&pbFirstDrvInstant);
5620 if(eRet == E_MVOP_INIT_FAIL)
5621 {
5622 MVOP_DBG(MVOP_PRINTF("MVOP_Init_Context FAILED!\n");)
5623 _DRV_MVOP_Return(E_MVOP_DEV_1, );
5624 }
5625 else if(eRet == E_MVOP_INIT_ALREADY_EXIST)
5626 {
5627 if(MDrv_MVOP_SubSetMMIOMapBase() == FALSE)
5628 {
5629 _DRV_MVOP_Return(E_MVOP_DEV_1, );
5630 }
5631 //1. enable clock
5632 HAL_MVOP_SubInit();
5633 MDrv_MVOP_SubSetClk(TRUE);
5634 //2. enable sram power
5635 #ifdef CONFIG_MSTAR_SRAMPD
5636 if(HAL_MVOP_SetSramPower)
5637 {
5638 HAL_MVOP_SetSramPower(E_MVOP_DEV_1, TRUE);
5639 }
5640 #endif
5641 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._stMVOPDrvStat.bIsInit = TRUE;
5642 _DRV_MVOP_Return(E_MVOP_DEV_1, );
5643 }
5644
5645 _MVOP_SubInitVar(E_MVOP_DEV_1);
5646 u16ECOVersion = (MS_U16)MDrv_SYS_GetChipRev();
5647
5648 if(MDrv_MVOP_SubSetMMIOMapBase() == FALSE)
5649 {
5650 _DRV_MVOP_Return(E_MVOP_DEV_1, );
5651 }
5652
5653 if (HAL_MVOP_SubInit)
5654 {
5655 HAL_MVOP_SubInit();
5656 }
5657 else
5658 {
5659 MVOP_ERR(MVOP_PRINTF("***%s: SUB MVOP UNSUPPORTED!\n", __FUNCTION__);)
5660 _DRV_MVOP_Return(E_MVOP_DEV_1, );
5661 }
5662 if(HAL_MVOP_SetECONumber && (!MVOP_IsInit()))
5663 {
5664 HAL_MVOP_SetECONumber(u16ECOVersion);
5665 }
5666 //HAL_MVOP_SubSetInputMode( VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
5667
5668 // Set fld inv & ofld_inv
5669 HAL_MVOP_SubSetFieldInverse(ENABLE, ENABLE);
5670
5671 // Set Croma weighting off
5672 HAL_MVOP_SubSetChromaWeighting(ENABLE);
5673 #if 0
5674 #if ENABLE_3D_LR_MODE
5675 HAL_MVOP_SubEnable3DLR(DISABLE);
5676 #endif
5677 MDrv_MVOP_SubEnableFreerunMode(FALSE);
5678 HAL_MVOP_SubEnableMVDInterface(FALSE);
5679 #endif
5680 //1. enable clock
5681 MDrv_MVOP_SubSetClk(TRUE);
5682 //2. enable sram power
5683 #ifdef CONFIG_MSTAR_SRAMPD
5684 if(HAL_MVOP_SetSramPower)
5685 {
5686 HAL_MVOP_SetSramPower(E_MVOP_DEV_1, TRUE);
5687 }
5688 #endif
5689 HAL_MVOP_SubLoadReg();
5690
5691 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._stMVOPDrvStat.bIsInit = TRUE;
5692 _DRV_MVOP_Release(E_MVOP_DEV_1);
5693 #else
5694 MVOP_ERR(MVOP_PRINTF("*** %s: SUB MVOP UNSUPPORTED!!\n", __FUNCTION__);)
5695 #endif
5696 }
5697
MDrv_MVOP_SubInit()5698 void MDrv_MVOP_SubInit()
5699 {
5700 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
5701 #if ENABLE_UTOPIA2_INTERFACE
5702 void* IO_arg = NULL;
5703
5704 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
5705 {
5706 if(UtopiaOpen(MODULE_MVOP|MVOP_DRIVER_BASE, &pu32MVOP_Inst[E_MVOP_MAIN_STREAM], 0, NULL) != UTOPIA_STATUS_SUCCESS)
5707 {
5708 MVOP_PRINTF("[Fail] UtopiaOpen MVOP failed\n");
5709 return;
5710 }
5711 }
5712
5713 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SUB_INIT, (void*)(IO_arg)) != UTOPIA_STATUS_SUCCESS)
5714 {
5715 MVOP_PRINTF("[Fail] %s,%d\n",__FUNCTION__,__LINE__);
5716 return;
5717 }
5718 #else
5719 void* pInstance = NULL;
5720 MDrv_MVOP_SubInit_V2(pInstance);
5721 #endif
5722 }
5723
5724
5725 //-----------------------------------------------------------------------------
5726 /// Exit MVOP, turn off clock
5727 //-----------------------------------------------------------------------------
MDrv_MVOP_SubExit_V2(void * pInstance)5728 void MDrv_MVOP_SubExit_V2(void* pInstance)
5729 {
5730 #if MVOP_SUPPORT_SUB
5731 _DRV_MVOP_Entry(E_MVOP_DEV_1);
5732 if (p_gDrvSubMVOPCtx == NULL)
5733 {
5734 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
5735 _DRV_MVOP_Return(E_MVOP_DEV_1, );
5736 }
5737 MVOP_SubCheckIsInit();
5738 //1. disable mvop
5739 HAL_MVOP_SubSetMIUReqMask(TRUE);
5740 HAL_MVOP_SubEnable(FALSE, 25);
5741 HAL_MVOP_SubSetMIUReqMask(FALSE);
5742 //2.disable mvop sram
5743 #ifdef CONFIG_MSTAR_SRAMPD
5744 if(HAL_MVOP_SetSramPower)
5745 {
5746 HAL_MVOP_SetSramPower(E_MVOP_DEV_1, FALSE);
5747 }
5748 #endif
5749 //3.disable mvop clock
5750 MDrv_MVOP_SubSetClk(FALSE);
5751 if(HAL_MVOP_Exit)
5752 {
5753 HAL_MVOP_Exit(E_MVOP_DEV_1);
5754 }
5755 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._stMVOPDrvStat.bIsInit = FALSE;
5756 _DRV_MVOP_Release(E_MVOP_DEV_1);
5757 #endif
5758 }
5759
MDrv_MVOP_SubExit()5760 void MDrv_MVOP_SubExit()
5761 {
5762 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
5763 #if ENABLE_UTOPIA2_INTERFACE
5764
5765 void* IO_arg = NULL;
5766
5767 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
5768 {
5769 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5770 return;
5771 }
5772
5773 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_SUB_EXIT, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
5774 {
5775 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5776 return;
5777 }
5778 #else
5779 void* pInstance = NULL;
5780 MDrv_MVOP_SubExit_V2(pInstance);
5781 #endif
5782 }
5783
5784 //-----------------------------------------------------------------------------
5785 /// Enable and Disable MVOP
5786 /// @param bEnable \b IN
5787 /// - # TRUE Enable
5788 /// - # FALSE Disable and reset
5789 //-----------------------------------------------------------------------------
MDrv_MVOP_SubEnable_V2(void * pInstance,MS_BOOL bEnable)5790 void MDrv_MVOP_SubEnable_V2(void* pInstance, MS_BOOL bEnable)
5791 {
5792 #if MVOP_SUPPORT_SUB
5793 _DRV_MVOP_Entry(E_MVOP_DEV_1);
5794 MS_U8 u8FPS = 25; //Default fps = 25, set as normal case;
5795
5796
5797 if (p_gDrvSubMVOPCtx == NULL)
5798 {
5799 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
5800 _DRV_MVOP_Return(E_MVOP_DEV_1, );
5801 }
5802 MVOP_SubCheckIsInit();
5803 if(p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopTiming.u8Framerate != 0)
5804 {
5805 u8FPS = p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopTiming.u8Framerate;
5806 }
5807
5808 HAL_MVOP_SubSetMIUReqMask(TRUE);
5809 HAL_MVOP_SubEnable(bEnable, u8FPS);
5810 HAL_MVOP_SubSetMIUReqMask(FALSE);
5811
5812 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._stMVOPDrvStat.bIsEnable = bEnable;
5813 if(FALSE == bEnable)
5814 {
5815 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._stMVOPDrvStat.bIsSetTiming = bEnable;
5816 }
5817 _DRV_MVOP_Release(E_MVOP_DEV_1);
5818 #endif
5819 }
5820
MDrv_MVOP_SubEnable(MS_BOOL bEnable)5821 void MDrv_MVOP_SubEnable ( MS_BOOL bEnable )
5822 {
5823 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d \n", __FUNCTION__, __LINE__, bEnable);)
5824 #if ENABLE_UTOPIA2_INTERFACE
5825 stMVOP_ENABLE IO_arg;
5826 IO_arg.bEnable = bEnable;
5827
5828 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
5829 {
5830 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5831 return;
5832 }
5833
5834 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SUB_ENABLE, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
5835 {
5836 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5837 return;
5838 }
5839 #else
5840 void* pInstance = NULL;
5841 MDrv_MVOP_SubEnable_V2(pInstance, bEnable);
5842 #endif
5843 }
5844
5845
5846
5847 //-----------------------------------------------------------------------------
5848 /// Get if MVOP is enable or not.
5849 /// @param pbEnable \b OUT
5850 /// - # TRUE Enable
5851 /// - # FALSE Disable
5852 //-----------------------------------------------------------------------------
MDrv_MVOP_SubGetIsEnable_V2(void * pInstance,MS_BOOL * pbEnable)5853 MVOP_Result MDrv_MVOP_SubGetIsEnable_V2(void* pInstance, MS_BOOL * pbEnable)
5854 {
5855 #if MVOP_SUPPORT_SUB
5856 _DRV_MVOP_Entry(E_MVOP_DEV_1);
5857
5858 if (p_gDrvSubMVOPCtx == NULL)
5859 {
5860 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
5861 _DRV_MVOP_Return(E_MVOP_DEV_1, E_MVOP_FAIL);
5862 }
5863
5864 if ((NULL == pbEnable) || (TRUE != MVOP_SubIsInit()))
5865 {
5866 _DRV_MVOP_Return(E_MVOP_DEV_1, E_MVOP_FAIL);
5867 }
5868
5869 *pbEnable = HAL_MVOP_SubGetEnableState();
5870 _DRV_MVOP_Return(E_MVOP_DEV_1, E_MVOP_OK);
5871 #else
5872 return E_MVOP_UNSUPPORTED;
5873 #endif
5874 }
5875
MDrv_MVOP_SubGetIsEnable(MS_BOOL * pbEnable)5876 MVOP_Result MDrv_MVOP_SubGetIsEnable (MS_BOOL* pbEnable)
5877 {
5878 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
5879 #if ENABLE_UTOPIA2_INTERFACE
5880 stMVOP_SUB_GET_IS_ENABLE IO_arg;
5881 IO_arg.pbEnable = pbEnable;
5882 IO_arg.eRet = E_MVOP_FAIL;
5883
5884 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
5885 {
5886 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5887 return IO_arg.eRet;
5888 }
5889
5890 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_SUB_GET_IS_ENABLE, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
5891 {
5892 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5893 return IO_arg.eRet;
5894 }
5895
5896 return IO_arg.eRet;
5897 #else
5898 void* pInstance = NULL;
5899 return (MDrv_MVOP_SubGetIsEnable_V2(pInstance, pbEnable));
5900 #endif
5901 }
5902
5903 //-----------------------------------------------------------------------------
5904 /// Set enable UVShift
5905 //-----------------------------------------------------------------------------
MDrv_MVOP_SubEnableUVShift_V2(void * pInstance,MS_BOOL bEnable)5906 void MDrv_MVOP_SubEnableUVShift_V2(void* pInstance, MS_BOOL bEnable)
5907 {
5908 #if MVOP_SUPPORT_SUB
5909 _DRV_MVOP_Entry(E_MVOP_DEV_1);
5910 if (p_gDrvSubMVOPCtx == NULL)
5911 {
5912 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
5913 _DRV_MVOP_Return(E_MVOP_DEV_1, );
5914 }
5915 MVOP_SubCheckIsInit();
5916 HAL_MVOP_SubEnableUVShift(bEnable);
5917
5918 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._stMVOPDrvStat.bIsUVShift = bEnable;
5919 _DRV_MVOP_Release(E_MVOP_DEV_1);
5920 #endif
5921 }
5922
MDrv_MVOP_SubEnableUVShift(MS_BOOL bEnable)5923 void MDrv_MVOP_SubEnableUVShift(MS_BOOL bEnable)
5924 {
5925 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d \n", __FUNCTION__, __LINE__, bEnable);)
5926 #if ENABLE_UTOPIA2_INTERFACE
5927 stMVOP_SUB_ENABLE_UV_SHIFT IO_arg;
5928 IO_arg.bEnable = bEnable;
5929
5930 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
5931 {
5932 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5933 return;
5934 }
5935
5936 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_SUB_ENABLE_UV_SHIFT, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
5937 {
5938 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5939 return;
5940 }
5941 #else
5942 void* pInstance = NULL;
5943 MDrv_MVOP_SubEnableUVShift_V2(pInstance, bEnable);
5944 #endif
5945 }
5946
5947
5948 //-----------------------------------------------------------------------------
5949 /// Set enable black background
5950 //-----------------------------------------------------------------------------
MDrv_MVOP_SubEnableBlackBG_V2(void * pInstance)5951 void MDrv_MVOP_SubEnableBlackBG_V2(void * pInstance)
5952 {
5953 #if MVOP_SUPPORT_SUB
5954 _DRV_MVOP_Entry(E_MVOP_DEV_1);
5955 if (p_gDrvSubMVOPCtx == NULL)
5956 {
5957 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
5958 _DRV_MVOP_Return(E_MVOP_DEV_1, );
5959 }
5960 MVOP_SubCheckIsInit();
5961 HAL_MVOP_SubSetBlackBG();
5962
5963 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._stMVOPDrvStat.bIsBlackBG = TRUE;
5964 _DRV_MVOP_Release(E_MVOP_DEV_1);
5965 #endif
5966 }
5967
MDrv_MVOP_SubEnableBlackBG(void)5968 void MDrv_MVOP_SubEnableBlackBG(void)
5969 {
5970 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
5971 #if ENABLE_UTOPIA2_INTERFACE
5972 void* IO_arg = NULL;
5973
5974 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
5975 {
5976 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5977 return;
5978 }
5979
5980 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SUB_ENABLE_BLACK_BG, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
5981 {
5982 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
5983 return;
5984 }
5985 #else
5986 void* pInstance = NULL;
5987 MDrv_MVOP_SubEnableBlackBG_V2(pInstance);
5988 #endif
5989 }
5990
5991
5992
5993 //-----------------------------------------------------------------------------
5994 /// MVOP mono mode (fix chroma value)
5995 //-----------------------------------------------------------------------------
MDrv_MVOP_SubSetMonoMode_V2(void * pInstance,MS_BOOL bEnable)5996 void MDrv_MVOP_SubSetMonoMode_V2(void* pInstance, MS_BOOL bEnable)
5997 {
5998 #if MVOP_SUPPORT_SUB
5999 _DRV_MVOP_Entry(E_MVOP_DEV_1);
6000 if (p_gDrvSubMVOPCtx == NULL)
6001 {
6002 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
6003 _DRV_MVOP_Return(E_MVOP_DEV_1, );
6004 }
6005 MVOP_SubCheckIsInit();
6006 HAL_MVOP_SubSetMonoMode(bEnable);
6007
6008 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._stMVOPDrvStat.bIsMonoMode = bEnable;
6009 _DRV_MVOP_Release(E_MVOP_DEV_1);
6010 #endif
6011 }
6012
MDrv_MVOP_SubSetMonoMode(MS_BOOL bEnable)6013 void MDrv_MVOP_SubSetMonoMode(MS_BOOL bEnable)
6014 {
6015 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d \n", __FUNCTION__, __LINE__, bEnable);)
6016 #if ENABLE_UTOPIA2_INTERFACE
6017 stMVOP_SUB_SET_MONO_MODE IO_arg;
6018 IO_arg.bEnable = bEnable;
6019
6020 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
6021 {
6022 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6023 return;
6024 }
6025
6026 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SUB_SET_MONO_MODE, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
6027 {
6028 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6029 return;
6030 }
6031 #else
6032 void* pInstance = NULL;
6033 MDrv_MVOP_SubSetMonoMode_V2(pInstance, bEnable);
6034 #endif
6035 }
6036
6037
6038 //-----------------------------------------------------------------------------
6039 /// Configure MVOP input.
6040 /// @return MVOP_Result
6041 //-----------------------------------------------------------------------------
MDrv_MVOP_SubSetInputCfg_V2(void * pInstance,MVOP_InputSel in,MVOP_InputCfg * pCfg)6042 MVOP_Result MDrv_MVOP_SubSetInputCfg_V2(void * pInstance, MVOP_InputSel in, MVOP_InputCfg * pCfg)
6043 {
6044 MVOP_Result ret = E_MVOP_OK;
6045 #if MVOP_SUPPORT_SUB
6046 MS_U16 u16ECOVersion;
6047
6048 _DRV_MVOP_Entry(E_MVOP_DEV_1);
6049
6050 if (p_gDrvSubMVOPCtx == NULL)
6051 {
6052 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
6053 _DRV_MVOP_Return(E_MVOP_DEV_1, E_MVOP_FAIL);
6054 }
6055 MVOP_DrvCtrlSt* pstDrvCtrl = MVOP_GetSubDrvCtrl(E_MVOP_DEV_1);
6056
6057 if (NULL == pstDrvCtrl)
6058 {
6059 MVOP_DBG(MVOP_PRINTF("%s: Sub MVOP driver is not supported!\n", __FUNCTION__);)
6060 _DRV_MVOP_Return(E_MVOP_DEV_1, E_MVOP_UNSUPPORTED);
6061 }
6062
6063 if (!MVOP_SubIsInit())
6064 {
6065 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
6066 _DRV_MVOP_Return(E_MVOP_DEV_1, E_MVOP_FAIL);
6067 }
6068
6069 u16ECOVersion = (MS_U16)MDrv_SYS_GetChipRev();
6070 if (E_MVOP_RGB_NONE != pstDrvCtrl->_eRgbFmt)
6071 {
6072 if (HAL_MVOP_SubSetRgbFormat)
6073 {
6074 HAL_MVOP_SubSetRgbFormat(pstDrvCtrl->_eRgbFmt);
6075 }
6076 else
6077 {
6078 MVOP_ERR(MVOP_PRINTF("%s not support HAL_MVOP_SubSetRgbFormat\n", __FUNCTION__);)
6079 }
6080 }
6081 MVOP_ResetVar(E_MVOP_DEV_1);
6082
6083 switch (in)
6084 {
6085 #if ENABLE_3D_LR_MODE
6086 case MVOP_INPUT_DRAM_3DLR:
6087 HAL_MVOP_SubEnable3DLR(ENABLE);
6088 //no break here to continue setting MCU mode
6089 #endif
6090 case MVOP_INPUT_DRAM:
6091 if (!pCfg)
6092 {
6093 return E_MVOP_INVALID_PARAM;
6094 }
6095
6096 HAL_MVOP_SubSetInputMode(VOPINPUT_MCUCTRL, pCfg, u16ECOVersion);
6097 break;
6098
6099 #if ENABLE_3D_LR_MODE
6100 case MVOP_INPUT_HVD_3DLR:
6101 HAL_MVOP_SubEnable3DLR(ENABLE);
6102 //no break here to continue setting HVD hardwire mode
6103 #endif
6104 case MVOP_INPUT_H264:
6105 HAL_MVOP_SubSetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
6106 HAL_MVOP_SubSetH264HardwireMode(u16ECOVersion);
6107 break;
6108
6109 #if ENABLE_3D_LR_MODE
6110 case MVOP_INPUT_MVD_3DLR:
6111 HAL_MVOP_SubEnable3DLR(ENABLE);
6112 //no break here to continue setting MVD hardwire mode
6113 #endif
6114 case MVOP_INPUT_MVD:
6115 HAL_MVOP_SubEnableMVDInterface(TRUE);
6116 HAL_MVOP_SubSetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
6117 break;
6118 case MVOP_INPUT_RVD:
6119 HAL_MVOP_SubSetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
6120 HAL_MVOP_SubSetRMHardwireMode(u16ECOVersion);
6121 break;
6122 case MVOP_INPUT_CLIP:
6123 if (!pCfg)
6124 {
6125 return E_MVOP_INVALID_PARAM;
6126 }
6127 HAL_MVOP_SubSetCropWindow(pCfg);
6128 break;
6129 case MVOP_INPUT_JPD:
6130 HAL_MVOP_SubSetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
6131 HAL_MVOP_SubSetJpegHardwireMode(u16ECOVersion);
6132 break;
6133 #if SUPPORT_EVD_MODE
6134 #if ENABLE_3D_LR_MODE
6135 case MVOP_INPUT_EVD_3DLR:
6136 HAL_MVOP_SubEnable3DLR(ENABLE);
6137 //no break here to continue setting HVD hardwire mode
6138 #endif
6139 case MVOP_INPUT_EVD:
6140 HAL_MVOP_SubSetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
6141 HAL_MVOP_SubSetEVDHardwireMode(u16ECOVersion);
6142 break;
6143 #endif
6144 #if SUPPORT_VP9_MODE
6145 case MVOP_INPUT_VP9:
6146 HAL_MVOP_SubSetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
6147 HAL_MVOP_SubSetVP9HardwireMode(u16ECOVersion);
6148 break;
6149 #endif
6150 default:
6151 ret = E_MVOP_INVALID_PARAM;
6152 break;
6153 }
6154 if (E_MVOP_OK == ret)
6155 {
6156 pstDrvCtrl->_eInputSel = in;
6157 }
6158 _DRV_MVOP_Return(E_MVOP_DEV_1, ret);
6159 #else
6160 return ret;
6161 #endif
6162 }
6163
MDrv_MVOP_SubSetInputCfg(MVOP_InputSel in,MVOP_InputCfg * pCfg)6164 MVOP_Result MDrv_MVOP_SubSetInputCfg (MVOP_InputSel in, MVOP_InputCfg* pCfg)
6165 {
6166 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d \n", __FUNCTION__, __LINE__, in);)
6167 #if ENABLE_UTOPIA2_INTERFACE
6168 stMVOP_SUB_SET_INPUTCFG IO_arg;
6169 IO_arg.in = in;
6170 IO_arg.pCfg = pCfg;
6171 IO_arg.eRet = E_MVOP_FAIL;
6172
6173 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
6174 {
6175 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6176 return IO_arg.eRet;
6177 }
6178
6179 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_SUB_SET_INPUTCFG, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
6180 {
6181 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6182 return IO_arg.eRet;
6183 }
6184
6185 return IO_arg.eRet;
6186
6187 #else
6188 void* pInstance = NULL;
6189 return (MDrv_MVOP_SubSetInputCfg_V2(pInstance, in, pCfg));
6190 #endif
6191 }
6192
6193
6194 //-----------------------------------------------------------------------------
6195 /// Configure MVOP output.
6196 /// @return MVOP_Result
6197 //-----------------------------------------------------------------------------
MDrv_MVOP_SubSetOutputCfg_V2(void * pInstance,MVOP_VidStat * pstVideoStatus,MS_BOOL bEnHDup)6198 MVOP_Result MDrv_MVOP_SubSetOutputCfg_V2(void* pInstance, MVOP_VidStat *pstVideoStatus, MS_BOOL bEnHDup)
6199 {
6200 #if MVOP_SUPPORT_SUB
6201 _DRV_MVOP_Entry(E_MVOP_DEV_1);
6202 MS_U16 u16ECOVersion;
6203
6204 if (p_gDrvSubMVOPCtx == NULL)
6205 {
6206 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
6207 _DRV_MVOP_Return(E_MVOP_DEV_1, E_MVOP_FAIL);
6208 }
6209
6210 if (!MVOP_SubIsInit())
6211 {
6212 MVOP_DBG(MVOP_PRINTF("%s: driver is not initialized!\n", __FUNCTION__);)
6213 _DRV_MVOP_Return(E_MVOP_DEV_1, E_MVOP_FAIL);
6214 }
6215
6216 if (MVOP_CheckOutputCfg(pstVideoStatus) != TRUE)
6217 {
6218 MVOP_DBG(MVOP_PRINTF("%s: invalid parameter!\n", __FUNCTION__);)
6219 _DRV_MVOP_Return(E_MVOP_DEV_1, E_MVOP_INVALID_PARAM);
6220 }
6221
6222 MVOP_Timing* pSubTiming = &p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopTiming;
6223 u16ECOVersion = (MS_U16)MDrv_SYS_GetChipRev();
6224 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopOutputCfg = *pstVideoStatus;
6225
6226 if (MVOP_AutoGenMPEGTiming(FALSE, pSubTiming, pstVideoStatus, bEnHDup) != TRUE)
6227 {
6228 MVOP_DBG(MVOP_PRINTF("%s: fail to calculate timing!\n", __FUNCTION__);)
6229 _DRV_MVOP_Return(E_MVOP_DEV_1, E_MVOP_FAIL);
6230 }
6231
6232 if(HAL_MVOP_SetInterlaceType)
6233 {
6234 HAL_MVOP_SetInterlaceType(E_MVOP_DEV_1, u16ECOVersion, pstVideoStatus->u8Interlace);
6235 }
6236
6237 HAL_MVOP_SubSetOutputInterlace(pSubTiming->bInterlace, u16ECOVersion);
6238 HAL_MVOP_SubSetOutputTiming(pSubTiming);
6239 HAL_MVOP_SubSetSynClk(pSubTiming);
6240
6241 if (p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._u16SrcHSize != 0)
6242 {
6243 //report the source width for scaler, intead of the 16-aligned width
6244 //MS_U16 u16Discard_Width = 0;
6245 //u16Discard_Width = _u16SubSrcHSize.u16Width - _u16SubSrcHSize;
6246 MVOP_DBG(MVOP_PRINTF("%s: _mvopSubTiming.u16Width: %d ==> %d\n", __FUNCTION__,
6247 pSubTiming->u16Width, p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._u16SrcHSize);)
6248 pSubTiming->u16Width = p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._u16SrcHSize;
6249 #if 0 //for H-mirror ON
6250 if (_mvopTiming.u16HActive_Start > u16Discard_Width)
6251 {
6252 _mvopTiming.u16HActive_Start -= u16Discard_Width;
6253 }
6254 else
6255 {
6256 MVOP_PRINTF("Warning: u16HActive_Start(%d) <= u16Discard_Width(%d)\n",
6257 _mvopTiming.u16HActive_Start, u16Discard_Width);
6258 }
6259 if (_mvopTiming.u16HImg_Start > u16Discard_Width)
6260 {
6261 _mvopTiming.u16HImg_Start -= u16Discard_Width;
6262 }
6263 else
6264 {
6265 MVOP_PRINTF("Warning: u16HImg_Start(%d) <= u16Discard_Width(%d)\n",
6266 _mvopTiming.u16HImg_Start, u16Discard_Width);
6267 }
6268 #endif
6269 }
6270 MVOP_DumpOutputTiming(pSubTiming);
6271 MS_BOOL* pbIsSetTiming = &p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._stMVOPDrvStat.bIsSetTiming;
6272 *pbIsSetTiming = TRUE;
6273 _DRV_MVOP_Return(E_MVOP_DEV_1, E_MVOP_OK);
6274 #else
6275 return E_MVOP_UNSUPPORTED;
6276 #endif
6277 }
6278
MDrv_MVOP_SubSetOutputCfg(MVOP_VidStat * pstVideoStatus,MS_BOOL bEnHDup)6279 MVOP_Result MDrv_MVOP_SubSetOutputCfg(MVOP_VidStat *pstVideoStatus, MS_BOOL bEnHDup)
6280 {
6281 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d \n", __FUNCTION__, __LINE__, bEnHDup);)
6282 #if ENABLE_UTOPIA2_INTERFACE
6283 stMVOP_SUB_SET_OTPUTCFG IO_arg;
6284 IO_arg.pstVideoStatus = pstVideoStatus;
6285 IO_arg.bEnHDup = bEnHDup;
6286 IO_arg.eRet = E_MVOP_FAIL;
6287
6288 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
6289 {
6290 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6291 return IO_arg.eRet;
6292 }
6293
6294 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SUB_SET_OTPUTCFG, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
6295 {
6296 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6297 return IO_arg.eRet;
6298 }
6299
6300 return IO_arg.eRet;
6301 #else
6302 void* pInstance = NULL;
6303 return (MDrv_MVOP_SubSetOutputCfg_V2(pInstance, pstVideoStatus, bEnHDup));
6304 #endif
6305 }
6306
6307
6308
6309 //-----------------------------------------------------------------------------
6310 /// Get MVOP output timing information.
6311 /// @return MVOP_Result
6312 //-----------------------------------------------------------------------------
MDrv_MVOP_SubGetOutputTiming_V2(void * pInstance,MVOP_Timing * pMVOPTiming)6313 MVOP_Result MDrv_MVOP_SubGetOutputTiming_V2(void* pInstance, MVOP_Timing* pMVOPTiming)
6314 {
6315 MVOP_Timing* pSubTiming = NULL;
6316 #if MVOP_SUPPORT_SUB
6317 _DRV_MVOP_Entry(E_MVOP_DEV_1);
6318 if (p_gDrvSubMVOPCtx == NULL)
6319 {
6320 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
6321 _DRV_MVOP_Return(E_MVOP_DEV_1, E_MVOP_FAIL);
6322 }
6323
6324 if (!MVOP_SubIsInit())
6325 {
6326 MVOP_DBG(MVOP_PRINTF("%s: driver is not initialized!\n", __FUNCTION__);)
6327 _DRV_MVOP_Return(E_MVOP_DEV_1, E_MVOP_FAIL);
6328 }
6329 if (!p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._stMVOPDrvStat.bIsSetTiming)
6330 {
6331 MVOP_DBG(MVOP_PRINTF("%s: Timing is not set yet!\n", __FUNCTION__);)
6332 _DRV_MVOP_Return(E_MVOP_DEV_1, E_MVOP_FAIL);
6333 }
6334
6335 if (!pMVOPTiming)
6336 {
6337 MVOP_DBG(MVOP_PRINTF("%s: invalid parameter!\n", __FUNCTION__);)
6338 _DRV_MVOP_Return(E_MVOP_DEV_1, E_MVOP_INVALID_PARAM);
6339 }
6340 pSubTiming = &p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopTiming;
6341 #if !(defined(CHIP_A3) || defined(CHIP_EDISON))
6342 memcpy(pMVOPTiming, pSubTiming, sizeof(MVOP_Timing));
6343 #else
6344 pMVOPTiming->u16V_TotalCount = pSubTiming->u16V_TotalCount;
6345 pMVOPTiming->u16H_TotalCount = pSubTiming->u16H_TotalCount;
6346 pMVOPTiming->u16VBlank0_Start = pSubTiming->u16VBlank0_Start;
6347 pMVOPTiming->u16VBlank0_End = pSubTiming->u16VBlank0_End;
6348 pMVOPTiming->u16VBlank1_Start = pSubTiming->u16VBlank1_Start;
6349 pMVOPTiming->u16VBlank1_End = pSubTiming->u16VBlank1_End;
6350 pMVOPTiming->u16TopField_Start = pSubTiming->u16TopField_Start;
6351 pMVOPTiming->u16BottomField_Start = pSubTiming->u16BottomField_Start;
6352 pMVOPTiming->u16TopField_VS = pSubTiming->u16TopField_VS;
6353 pMVOPTiming->u16BottomField_VS = pSubTiming->u16BottomField_VS;
6354 pMVOPTiming->u16HActive_Start = pSubTiming->u16HActive_Start;
6355
6356 pMVOPTiming->bInterlace = pSubTiming->bInterlace;
6357 pMVOPTiming->u8Framerate = pSubTiming->u8Framerate;
6358 pMVOPTiming->u16H_Freq = pSubTiming->u16H_Freq;
6359 pMVOPTiming->u16Num = pSubTiming->u16Num;
6360 pMVOPTiming->u16Den = pSubTiming->u16Den;
6361 pMVOPTiming->u8MvdFRCType = pSubTiming->u8MvdFRCType;
6362 pMVOPTiming->u16ExpFrameRate = pSubTiming->u16ExpFrameRate;
6363 pMVOPTiming->u16Width = pSubTiming->u16Width;
6364 pMVOPTiming->u16Height = pSubTiming->u16Height;
6365 pMVOPTiming->bHDuplicate = pSubTiming->bHDuplicate;
6366 #endif
6367
6368 #if defined(CHIP_KANO)
6369 //patch for GOP: 0x28[7]=1 need to toggle mcu mode, kano HAL_MVOP_Rst doing mcu mode toggling.
6370 if(p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._bGOPPatch == TRUE)
6371 {
6372 HAL_MVOP_SubRst();
6373 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._bGOPPatch = FALSE;
6374 }
6375 #endif
6376 _DRV_MVOP_Return(E_MVOP_DEV_1, E_MVOP_OK);
6377 #else
6378 UNUSED(pSubTiming);
6379 return E_MVOP_UNSUPPORTED;
6380 #endif
6381 }
6382
MDrv_MVOP_SubGetOutputTiming(MVOP_Timing * pMVOPTiming)6383 MVOP_Result MDrv_MVOP_SubGetOutputTiming(MVOP_Timing* pMVOPTiming)
6384 {
6385 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
6386 #if ENABLE_UTOPIA2_INTERFACE
6387 stMVOP_SUB_GET_OUTPUT_TIMING IO_arg;
6388 IO_arg.pMVOPTiming = pMVOPTiming;
6389 IO_arg.eRet = E_MVOP_FAIL;
6390
6391 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
6392 {
6393 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6394 return IO_arg.eRet;
6395 }
6396
6397 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_SUB_GET_OUTPUT_TIMING, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
6398 {
6399 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6400 return IO_arg.eRet;
6401 }
6402
6403 return IO_arg.eRet;
6404 #else
6405 void* pInstance = NULL;
6406 return (MDrv_MVOP_SubGetOutputTiming_V2(pInstance, pMVOPTiming));
6407 #endif
6408 }
6409
6410
6411 //-----------------------------------------------------------------------------
6412 /// Get Horizontal Size.
6413 /// @return Horizontal Size
6414 //-----------------------------------------------------------------------------
MDrv_MVOP_SubGetHSize_V2(void * pInstance)6415 MS_U16 MDrv_MVOP_SubGetHSize_V2(void* pInstance)
6416 {
6417 #if MVOP_SUPPORT_SUB
6418 _DRV_MVOP_Entry(E_MVOP_DEV_1);
6419 if (p_gDrvSubMVOPCtx == NULL)
6420 {
6421 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
6422 _DRV_MVOP_Return(E_MVOP_DEV_1, 0);
6423 }
6424 MVOP_SubCheckIsInit_RetZero();
6425 _DRV_MVOP_Return(E_MVOP_DEV_1, (p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopTiming.u16Width));
6426 #else
6427 return 0;
6428 #endif
6429 }
6430
MDrv_MVOP_SubGetHSize(void)6431 MS_U16 MDrv_MVOP_SubGetHSize(void)
6432 {
6433 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
6434 #if ENABLE_UTOPIA2_INTERFACE
6435 stMVOP_SUB_GET_HSIZE IO_arg;
6436 IO_arg.u16Ret = 0;
6437
6438 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
6439 {
6440 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6441 return IO_arg.u16Ret;
6442 }
6443
6444 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_SUB_GET_HSIZE, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
6445 {
6446 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6447 return IO_arg.u16Ret;
6448 }
6449
6450 return IO_arg.u16Ret;
6451 #else
6452 void* pInstance = NULL;
6453 return (MDrv_MVOP_SubGetHSize_V2(pInstance));
6454 #endif
6455 }
6456
6457 //-----------------------------------------------------------------------------
6458 /// Get Vertical Size.
6459 /// @return Vertical Size
6460 //-----------------------------------------------------------------------------
MDrv_MVOP_SubGetVSize_V2(void * pInstance)6461 MS_U16 MDrv_MVOP_SubGetVSize_V2(void* pInstance)
6462 {
6463 #if MVOP_SUPPORT_SUB
6464 _DRV_MVOP_Entry(E_MVOP_DEV_1);
6465 if (p_gDrvSubMVOPCtx == NULL)
6466 {
6467 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
6468 _DRV_MVOP_Return(E_MVOP_DEV_1, 0);
6469 }
6470 MVOP_SubCheckIsInit_RetZero();
6471 _DRV_MVOP_Return(E_MVOP_DEV_1, (p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopTiming.u16Height));
6472 #else
6473 return 0;
6474 #endif
6475 }
6476
MDrv_MVOP_SubGetVSize(void)6477 MS_U16 MDrv_MVOP_SubGetVSize(void)
6478 {
6479 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
6480 #if ENABLE_UTOPIA2_INTERFACE
6481 stMVOP_SUB_GET_VSIZE IO_arg;
6482 IO_arg.u16Ret = 0;
6483
6484 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
6485 {
6486 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6487 return IO_arg.u16Ret;
6488 }
6489
6490 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_SUB_GET_VSIZE, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
6491 {
6492 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6493 return IO_arg.u16Ret;
6494 }
6495
6496 return IO_arg.u16Ret;
6497 #else
6498 void* pInstance = NULL;
6499 return (MDrv_MVOP_SubGetVSize_V2(pInstance));
6500 #endif
6501 }
6502
6503 //-----------------------------------------------------------------------------
6504 /// Get MVOP timing is interlace or progressive.
6505 /// @return TRUE for interlace; FALSE for progressive
6506 //-----------------------------------------------------------------------------
MDrv_MVOP_SubGetIsInterlace_V2(void * pInstance)6507 MS_BOOL MDrv_MVOP_SubGetIsInterlace_V2(void* pInstance)
6508 {
6509 #if MVOP_SUPPORT_SUB
6510 _DRV_MVOP_Entry(E_MVOP_DEV_1);
6511 if (p_gDrvSubMVOPCtx == NULL)
6512 {
6513 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
6514 _DRV_MVOP_Return(E_MVOP_DEV_1, FALSE);
6515 }
6516 MVOP_SubCheckIsInit_RetZero();
6517 _DRV_MVOP_Return(E_MVOP_DEV_1, (p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopTiming.bInterlace));
6518 #else
6519 return FALSE;
6520 #endif
6521 }
6522
MDrv_MVOP_SubGetIsInterlace(void)6523 MS_BOOL MDrv_MVOP_SubGetIsInterlace(void)
6524 {
6525 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
6526 #if ENABLE_UTOPIA2_INTERFACE
6527 stMVOP_SUB_GET_IS_INTERLACE IO_arg;
6528 IO_arg.bRet = FALSE;
6529
6530 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
6531 {
6532 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6533 return IO_arg.bRet;
6534 }
6535
6536 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_SUB_GET_IS_INTERLACE, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
6537 {
6538 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6539 return IO_arg.bRet;
6540 }
6541
6542 return IO_arg.bRet;
6543
6544 #else
6545 void* pInstance = NULL;
6546 return (MDrv_MVOP_SubGetIsInterlace_V2(pInstance));
6547 #endif
6548 }
6549
6550
6551 //-----------------------------------------------------------------------------
6552 /// Get MVOP timing is horizontal duplicated or not.
6553 /// @return TRUE for yes; FALSE for not.
6554 //-----------------------------------------------------------------------------
MDrv_MVOP_SubGetIsHDuplicate_V2(void * pInstance)6555 MS_BOOL MDrv_MVOP_SubGetIsHDuplicate_V2(void* pInstance)
6556 {
6557 #if MVOP_SUPPORT_SUB
6558 _DRV_MVOP_Entry(E_MVOP_DEV_1);
6559 if (p_gDrvSubMVOPCtx == NULL)
6560 {
6561 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
6562 _DRV_MVOP_Return(E_MVOP_DEV_1, FALSE);
6563 }
6564 MVOP_SubCheckIsInit_RetZero();
6565 _DRV_MVOP_Return(E_MVOP_DEV_1, (p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopTiming.bHDuplicate));
6566 #else
6567 return FALSE;
6568 #endif
6569 }
6570
MDrv_MVOP_SubGetIsHDuplicate(void)6571 MS_BOOL MDrv_MVOP_SubGetIsHDuplicate(void)
6572 {
6573 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
6574 #if ENABLE_UTOPIA2_INTERFACE
6575 stMVOP_SUB_GET_IS_HDUPLICATE IO_arg;
6576 IO_arg.bRet = FALSE;
6577
6578 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
6579 {
6580 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6581 return IO_arg.bRet;
6582 }
6583
6584 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_SUB_GET_IS_HDUPLICATE, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
6585 {
6586 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6587 return IO_arg.bRet;
6588 }
6589
6590 return IO_arg.bRet;
6591 #else
6592 void* pInstance = NULL;
6593 return (MDrv_MVOP_SubGetIsHDuplicate_V2(pInstance));
6594 #endif
6595 }
6596
6597 /******************************************************************************************/
6598 /// This function is used for dectection of MVOP's Capability
6599 /// @param u16HSize \b IN
6600 /// @param u16VSize \b IN
6601 /// @param u16Fps \b IN
6602 /// @return TRUE if MVOP's frequency can support this video source, otherwise return FASLE
6603 /******************************************************************************************/
MDrv_MVOP_SubCheckCapability_V2(void * pInstance,MS_U16 u16HSize,MS_U16 u16VSize,MS_U16 u16Fps)6604 MS_BOOL MDrv_MVOP_SubCheckCapability_V2(void* pInstance, MS_U16 u16HSize, MS_U16 u16VSize, MS_U16 u16Fps)
6605 {
6606 MS_BOOL bSupport = FALSE;
6607 #if MVOP_SUPPORT_SUB
6608 if (HAL_MVOP_SubGetMaxFreerunClk)
6609 {
6610 bSupport = ((MS_U32)((u16HSize + MVOP_HBlank_Min) * (u16VSize + MVOP_VBlank_Min)* u16Fps) <= (MS_U32)(HAL_MVOP_SubGetMaxFreerunClk()));
6611 }
6612 #endif
6613 return bSupport;
6614 }
6615
MDrv_MVOP_SubCheckCapability(MS_U16 u16HSize,MS_U16 u16VSize,MS_U16 u16Fps)6616 MS_BOOL MDrv_MVOP_SubCheckCapability(MS_U16 u16HSize, MS_U16 u16VSize, MS_U16 u16Fps)
6617 {
6618 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
6619 MS_BOOL bSupport = FALSE;
6620 #if MVOP_SUPPORT_SUB
6621 if (HAL_MVOP_SubGetMaxFreerunClk)
6622 {
6623 bSupport = ((MS_U32)((u16HSize + MVOP_HBlank_Min) * (u16VSize + MVOP_VBlank_Min)* u16Fps) <= (MS_U32)(HAL_MVOP_SubGetMaxFreerunClk()));
6624 }
6625 #endif
6626 return bSupport;
6627 }
6628
6629
MDrv_MVOP_SubGetMaxHOffset_V2(void * pInstance,MS_U16 u16HSize,MS_U16 u16VSize,MS_U16 u16Fps)6630 MS_U16 MDrv_MVOP_SubGetMaxHOffset_V2(void* pInstance, MS_U16 u16HSize, MS_U16 u16VSize, MS_U16 u16Fps)
6631 {
6632 MS_U16 u16HttMax, u16OffsetMax = 0;
6633 #if MVOP_SUPPORT_SUB
6634 if (HAL_MVOP_SubGetMaxFreerunClk)
6635 {
6636 u16HttMax = HAL_MVOP_SubGetMaxFreerunClk() / u16Fps*1000 / (u16VSize + MVOP_VBlank);
6637 u16OffsetMax = (u16HttMax - MVOP_HBlank_HD - u16HSize)/2;
6638 }
6639 #else
6640 UNUSED(u16HSize);
6641 UNUSED(u16VSize);
6642 UNUSED(u16Fps);
6643 UNUSED(u16HttMax);
6644 #endif
6645
6646 return u16OffsetMax;
6647 }
6648
MDrv_MVOP_SubGetMaxHOffset(MS_U16 u16HSize,MS_U16 u16VSize,MS_U16 u16Fps)6649 MS_U16 MDrv_MVOP_SubGetMaxHOffset(MS_U16 u16HSize, MS_U16 u16VSize, MS_U16 u16Fps)
6650 {
6651 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
6652 MS_U16 u16HttMax, u16OffsetMax = 0;
6653 #if MVOP_SUPPORT_SUB
6654 if (HAL_MVOP_SubGetMaxFreerunClk)
6655 {
6656 u16HttMax = HAL_MVOP_SubGetMaxFreerunClk() / u16Fps*1000 / (u16VSize + MVOP_VBlank);
6657 u16OffsetMax = (u16HttMax - MVOP_HBlank_HD - u16HSize)/2;
6658
6659 }
6660 #else
6661 UNUSED(u16HSize);
6662 UNUSED(u16VSize);
6663 UNUSED(u16Fps);
6664 UNUSED(u16HttMax);
6665 #endif
6666
6667 return u16OffsetMax;
6668 }
6669
MDrv_MVOP_SubGetMaxVOffset_V2(void * pInstance,MS_U16 u16HSize,MS_U16 u16VSize,MS_U16 u16Fps)6670 MS_U16 MDrv_MVOP_SubGetMaxVOffset_V2(void* pInstance, MS_U16 u16HSize, MS_U16 u16VSize, MS_U16 u16Fps)
6671 {
6672 MS_U16 u16OffsetMax = 0;
6673
6674 #if MVOP_SUPPORT_SUB
6675 if (HAL_MVOP_SubGetMaxFreerunClk)
6676 {
6677 u16OffsetMax = MVOP_GetMaxVOffset(E_MVOP_DEV_1, HAL_MVOP_SubGetMaxFreerunClk(), u16HSize, u16VSize, u16Fps);
6678 }
6679 #else
6680 UNUSED(u16HSize);
6681 UNUSED(u16VSize);
6682 UNUSED(u16Fps);
6683 #endif
6684
6685 return u16OffsetMax;
6686 }
6687
MDrv_MVOP_SubGetMaxVOffset(MS_U16 u16HSize,MS_U16 u16VSize,MS_U16 u16Fps)6688 MS_U16 MDrv_MVOP_SubGetMaxVOffset(MS_U16 u16HSize, MS_U16 u16VSize, MS_U16 u16Fps)
6689 {
6690 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
6691 MS_U16 u16OffsetMax = 0;
6692
6693 #if MVOP_SUPPORT_SUB
6694 if (HAL_MVOP_SubGetMaxFreerunClk)
6695 {
6696 u16OffsetMax = MVOP_GetMaxVOffset(E_MVOP_DEV_1, HAL_MVOP_SubGetMaxFreerunClk(), u16HSize, u16VSize, u16Fps);
6697 }
6698 #else
6699 UNUSED(u16HSize);
6700 UNUSED(u16VSize);
6701 UNUSED(u16Fps);
6702 #endif
6703
6704 return u16OffsetMax;
6705 }
6706
6707 //------------------------------------------------------------------------------
6708 /// MVOP Get Destination Information for GOP mixer
6709 /// @return TRUE/FALSE
6710 //------------------------------------------------------------------------------
MDrv_MVOP_SubGetDstInfo_V2(void * pInstance,MVOP_DST_DispInfo * pDstInfo,MS_U32 u32SizeofDstInfo)6711 MS_BOOL MDrv_MVOP_SubGetDstInfo_V2(void* pInstance, MVOP_DST_DispInfo *pDstInfo, MS_U32 u32SizeofDstInfo)
6712 {
6713 #if MVOP_SUPPORT_SUB
6714 _DRV_MVOP_Entry(E_MVOP_DEV_1);
6715 if (p_gDrvSubMVOPCtx == NULL)
6716 {
6717 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
6718 _DRV_MVOP_Return(E_MVOP_DEV_1, FALSE);
6719 }
6720
6721 MVOP_SubCheckIsInit_RetZero();
6722
6723 if(NULL == pDstInfo)
6724 {
6725 MVOP_ERR(MVOP_PRINTF("MApi_MVOP_GetDstInfo():pDstInfo is NULL\n");)
6726 _DRV_MVOP_Return(E_MVOP_DEV_1, FALSE);
6727 }
6728
6729 if(u32SizeofDstInfo != sizeof(MVOP_DST_DispInfo))
6730 {
6731 MVOP_ERR(MVOP_PRINTF("MApi_MVOP_GetDstInfo():u16SizeofDstInfo is different from the MVOP_DST_DispInfo defined, check header file!\n");)
6732 _DRV_MVOP_Return(E_MVOP_DEV_1, FALSE);
6733 }
6734
6735 MVOP_TimingInfo_FromRegisters mvopTimingInfo;
6736 memset(&mvopTimingInfo, 0, sizeof(MVOP_TimingInfo_FromRegisters));
6737 if(HAL_MVOP_SubGetTimingInfoFromRegisters(&mvopTimingInfo) == FALSE)
6738 {
6739 MVOP_ERR(MVOP_PRINTF("encounter errors in HAL_MVOP_SubGetTimingInfoFromRegisters()!\n");)
6740 memset(pDstInfo, 0, u32SizeofDstInfo);
6741 _DRV_MVOP_Return(E_MVOP_DEV_1, FALSE);
6742 }
6743 pDstInfo->VDTOT = mvopTimingInfo.u16V_TotalCount;
6744 pDstInfo->HDTOT = mvopTimingInfo.u16H_TotalCount;
6745 pDstInfo->bInterlaceMode = mvopTimingInfo.bInterlace;
6746 pDstInfo->DEHST = mvopTimingInfo.u16HActive_Start / 2 + 2;
6747 if(pDstInfo->bInterlaceMode)
6748 {
6749 pDstInfo->DEVST = (mvopTimingInfo.u16VBlank0_End - mvopTimingInfo.u16TopField_VS) * 2 - 18;
6750 }
6751 else
6752 {
6753 pDstInfo->DEVST = (mvopTimingInfo.u16VBlank0_End - mvopTimingInfo.u16TopField_VS) - 5;
6754 }
6755 //HDeEnd=HDeStart+HDeWidth
6756 pDstInfo->DEHEND = pDstInfo->DEHST + pDstInfo->HDTOT - mvopTimingInfo.u16HActive_Start;
6757 //VDeEnd=VDeStart+VDeWidth
6758 if(pDstInfo->bInterlaceMode)
6759 {
6760 pDstInfo->DEVEND = pDstInfo->DEVST + pDstInfo->VDTOT - (2 * mvopTimingInfo.u16VBlank0_End - 3);
6761 }
6762 else
6763 {
6764 pDstInfo->DEVEND = pDstInfo->DEVST + pDstInfo->VDTOT - (mvopTimingInfo.u16VBlank0_End - 1);
6765 }
6766 #if defined (__aarch64__)
6767 MVOP_TIMING_DBG(MVOP_PRINTF("bInterlace=%u,HTotal=%u,VTotal=%u\n", pDstInfo->bInterlaceMode, pDstInfo->HDTOT, pDstInfo->VDTOT);)
6768 MVOP_TIMING_DBG(MVOP_PRINTF("HDeStart=%u,HDeEnd=%u,VDeStart=%u,VDeEnd=%u\n", pDstInfo->DEHST, pDstInfo->DEHEND, pDstInfo->DEVST, pDstInfo->DEVEND);)
6769 #else
6770 MVOP_TIMING_DBG(MVOP_PRINTF("bInterlace=%u,HTotal=%u,VTotal=%u\n", pDstInfo->bInterlaceMode, (int)pDstInfo->HDTOT, (int)pDstInfo->VDTOT);)
6771 MVOP_TIMING_DBG(MVOP_PRINTF("HDeStart=%u,HDeEnd=%u,VDeStart=%u,VDeEnd=%u\n", (int)pDstInfo->DEHST, (int)pDstInfo->DEHEND, (int)pDstInfo->DEVST, (int)pDstInfo->DEVEND);)
6772 #endif
6773 _DRV_MVOP_Return(E_MVOP_DEV_1, TRUE);
6774 #else
6775 return FALSE;
6776 #endif
6777 }
6778
MDrv_MVOP_SubGetDstInfo(MVOP_DST_DispInfo * pDstInfo,MS_U32 u32SizeofDstInfo)6779 MS_BOOL MDrv_MVOP_SubGetDstInfo(MVOP_DST_DispInfo *pDstInfo, MS_U32 u32SizeofDstInfo)
6780 {
6781 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
6782 #if ENABLE_UTOPIA2_INTERFACE
6783 stMVOP_SUB_GET_DST_INFO IO_arg;
6784 IO_arg.pDstInfo = pDstInfo;
6785 IO_arg.u32SizeofDstInfo = u32SizeofDstInfo;
6786 IO_arg.bRet = FALSE;
6787
6788 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
6789 {
6790 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6791 return IO_arg.bRet;
6792 }
6793
6794 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_SUB_GET_DST_INFO, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
6795 {
6796 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6797 return IO_arg.bRet;
6798 }
6799
6800 return IO_arg.bRet;
6801 #else
6802 void* pInstance = NULL;
6803 return (MDrv_MVOP_SubGetDstInfo_V2(pInstance, pDstInfo, u32SizeofDstInfo));
6804 #endif
6805 }
6806
6807
MDrv_MVOP_SubSetFixVtt_V2(void * pInstance,MS_U16 u16FixVtt)6808 MS_BOOL MDrv_MVOP_SubSetFixVtt_V2(void* pInstance, MS_U16 u16FixVtt)
6809 {
6810 #if MVOP_SUPPORT_SUB
6811 _DRV_MVOP_Entry(E_MVOP_DEV_1);
6812 if (p_gDrvSubMVOPCtx == NULL)
6813 {
6814 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
6815 _DRV_MVOP_Return(E_MVOP_DEV_1, FALSE);
6816 }
6817
6818 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._u16FixVtt = u16FixVtt;
6819 _DRV_MVOP_Return(E_MVOP_DEV_1, TRUE);
6820 #else
6821 UNUSED(u16FixVtt);
6822 return FALSE;
6823 #endif
6824 }
6825
MDrv_MVOP_SubSetFixVtt(MS_U16 u16FixVtt)6826 MS_BOOL MDrv_MVOP_SubSetFixVtt(MS_U16 u16FixVtt)
6827 {
6828 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d \n", __FUNCTION__, __LINE__, u16FixVtt);)
6829 #if ENABLE_UTOPIA2_INTERFACE
6830 stMVOP_SUB_SET_FIXVTT IO_arg;
6831 IO_arg.u16FixVtt = u16FixVtt;
6832 IO_arg.bRet = FALSE;
6833
6834 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
6835 {
6836 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6837 return IO_arg.bRet;
6838 }
6839
6840 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_SUB_SET_FIXVTT, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
6841 {
6842 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6843 return IO_arg.bRet;
6844 }
6845
6846 return IO_arg.bRet;
6847 #else
6848 void* pInstance = NULL;
6849 return (MDrv_MVOP_SubSetFixVtt_V2(pInstance, u16FixVtt));
6850 #endif
6851 }
6852
MDrv_MVOP_SubEnableFreerunMode_V2(void * pInstance,MS_BOOL bEnable)6853 MS_BOOL MDrv_MVOP_SubEnableFreerunMode_V2(void* pInstance, MS_BOOL bEnable)
6854 {
6855 if (p_gDrvSubMVOPCtx == NULL)
6856 {
6857 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
6858 return FALSE;
6859 }
6860 #if MVOP_SUPPORT_SUB
6861 if (HAL_MVOP_SubEnableFreerunMode)
6862 {
6863 HAL_MVOP_SubEnableFreerunMode(bEnable);
6864 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._bEnableFreerunMode = bEnable;
6865 return TRUE;
6866 }
6867 else
6868 {
6869 return FALSE;
6870 }
6871 #else
6872 UNUSED(bEnable);
6873 return FALSE;
6874 #endif
6875 }
6876
MDrv_MVOP_SubEnableFreerunMode(MS_BOOL bEnable)6877 MS_BOOL MDrv_MVOP_SubEnableFreerunMode(MS_BOOL bEnable)
6878 {
6879 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
6880 #if ENABLE_UTOPIA2_INTERFACE
6881 if (p_gDrvSubMVOPCtx == NULL)
6882 {
6883 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
6884 return FALSE;
6885 }
6886 #if MVOP_SUPPORT_SUB
6887 if (HAL_MVOP_SubEnableFreerunMode)
6888 {
6889 HAL_MVOP_SubEnableFreerunMode(bEnable);
6890 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._bEnableFreerunMode = bEnable;
6891 return TRUE;
6892 }
6893 else
6894 {
6895 return FALSE;
6896 }
6897 #else
6898 UNUSED(bEnable);
6899 return FALSE;
6900 #endif
6901 #else
6902 void* pInstance = NULL;
6903 return (MDrv_MVOP_SubEnableFreerunMode_V2(pInstance, bEnable));
6904 #endif
6905 }
6906
6907
MDrv_MVOP_SubMiuSwitch_V2(void * pInstance,MS_U8 u8Miu)6908 MVOP_Result MDrv_MVOP_SubMiuSwitch_V2(void* pInstance, MS_U8 u8Miu)
6909 {
6910 #if MVOP_SUPPORT_SUB
6911 _DRV_MVOP_Entry(E_MVOP_DEV_1);
6912 _DRV_MVOP_Return(E_MVOP_DEV_1, MVOP_MiuSwitch(FALSE, u8Miu));
6913 #else
6914 return E_MVOP_UNSUPPORTED;
6915 #endif
6916 }
6917
MDrv_MVOP_SubMiuSwitch(MS_U8 u8Miu)6918 MVOP_Result MDrv_MVOP_SubMiuSwitch(MS_U8 u8Miu)
6919 {
6920 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
6921 #if ENABLE_UTOPIA2_INTERFACE
6922 stMVOP_SUB_MIU_SWITCH IO_arg;
6923 IO_arg.u8Miu = u8Miu;
6924 IO_arg.eRet = E_MVOP_FAIL;
6925
6926 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
6927 {
6928 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6929 return IO_arg.eRet;
6930 }
6931
6932 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_SUB_MIU_SWITCH, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
6933 {
6934 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6935 return IO_arg.eRet;
6936 }
6937
6938 return IO_arg.eRet;
6939 #else
6940 void* pInstance = NULL;
6941 return (MDrv_MVOP_SubMiuSwitch_V2(pInstance, u8Miu));
6942 #endif
6943 }
6944
MDrv_MVOP_SubSetBaseAdd_V2(void * pInstance,MS_PHY u32YOffset,MS_PHY u32UVOffset,MS_BOOL bProgressive,MS_BOOL b422pack)6945 MS_BOOL MDrv_MVOP_SubSetBaseAdd_V2(void* pInstance, MS_PHY u32YOffset, MS_PHY u32UVOffset, MS_BOOL bProgressive, MS_BOOL b422pack)
6946 {
6947 #if MVOP_SUPPORT_SUB
6948 _DRV_MVOP_Entry(E_MVOP_DEV_1);
6949 if (!MVOP_SubIsInit())
6950 {
6951 _DRV_MVOP_Return(E_MVOP_DEV_1, FALSE);
6952 }
6953 if (HAL_MVOP_SubSetYUVBaseAdd)
6954 {
6955 HAL_MVOP_SubSetYUVBaseAdd(u32YOffset, u32UVOffset, bProgressive, b422pack);
6956 HAL_MVOP_SubLoadReg();
6957 _DRV_MVOP_Return(E_MVOP_DEV_1, TRUE);
6958 }
6959 else
6960 {
6961 MVOP_ERR(MVOP_PRINTF("%s not support!\n", __FUNCTION__);)
6962 _DRV_MVOP_Return(E_MVOP_DEV_1, FALSE);
6963 }
6964 #else
6965 return FALSE;
6966 #endif
6967 }
6968
MDrv_MVOP_SubSetBaseAdd(MS_PHY u32YOffset,MS_PHY u32UVOffset,MS_BOOL bProgressive,MS_BOOL b422pack)6969 MS_BOOL MDrv_MVOP_SubSetBaseAdd(MS_PHY u32YOffset, MS_PHY u32UVOffset, MS_BOOL bProgressive, MS_BOOL b422pack)
6970 {
6971 #if defined (__aarch64__)
6972 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg1:0x%lx, arg2:0x%lx, arg3:%d, arg4:%d \n", __FUNCTION__, __LINE__,
6973 u32YOffset, u32UVOffset, bProgressive, b422pack);)
6974 #else
6975 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg1:0x%x, arg2:0x%x, arg3:%d, arg4:%d \n", __FUNCTION__, __LINE__,
6976 (int)u32YOffset, (int)u32UVOffset, bProgressive, b422pack);)
6977 #endif
6978 #if ENABLE_UTOPIA2_INTERFACE
6979 stMVOP_SUB_SET_BASEADD IO_arg;
6980 IO_arg.u32YOffset = u32YOffset;
6981 IO_arg.u32UVOffset = u32UVOffset;
6982 IO_arg.bProgressive = bProgressive;
6983 IO_arg.b422pack = b422pack;
6984 IO_arg.bRet = FALSE;
6985
6986 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
6987 {
6988 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6989 return IO_arg.bRet;
6990 }
6991
6992 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM],E_MVOP_CMD_SUB_SET_BASEADD, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
6993 {
6994 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
6995 return IO_arg.bRet;
6996 }
6997
6998 return IO_arg.bRet;
6999 #else
7000 void* pInstance = NULL;
7001 return (MDrv_MVOP_SubSetBaseAdd_V2(pInstance, u32YOffset, u32UVOffset, bProgressive, b422pack));
7002 #endif
7003 }
7004
7005 //------------------------------------------------------------------------------
7006 /// MVOP Enable/Disable mirror mode (chips after M10 support this feature)
7007 /// @return TRUE/FALSE
7008 //------------------------------------------------------------------------------
MDrv_MVOP_SubSetVOPMirrorMode_V2(void * pInstance,MS_BOOL bEnable,MVOP_DrvMirror eMirrorMode)7009 void MDrv_MVOP_SubSetVOPMirrorMode_V2(void* pInstance, MS_BOOL bEnable, MVOP_DrvMirror eMirrorMode)
7010 {
7011 #if MVOP_SUPPORT_SUB
7012 if (p_gDrvSubMVOPCtx == NULL)
7013 {
7014 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
7015 return;
7016 }
7017 MVOP_SubCheckIsInit();
7018
7019 if (HAL_MVOP_SubSetVerticalMirrorMode && HAL_MVOP_SubSetHorizontallMirrorMode)
7020 {
7021 if( eMirrorMode == E_VOPMIRROR_VERTICAL)
7022 {
7023 HAL_MVOP_SubSetVerticalMirrorMode(bEnable);
7024 }
7025 else if(eMirrorMode == E_VOPMIRROR_HORIZONTALL)
7026 {
7027 HAL_MVOP_SubSetHorizontallMirrorMode(bEnable);
7028 }
7029 else if(eMirrorMode == E_VOPMIRROR_HVBOTH)
7030 {
7031 HAL_MVOP_SubSetVerticalMirrorMode(bEnable);
7032 HAL_MVOP_SubSetHorizontallMirrorMode(bEnable);
7033 }
7034 }
7035
7036 MVOP_DBG(MVOP_PRINTF("\nMVOP MDrv_MVOP_SubSetVOPMirrorMode (eMirrorMode :0x%x , 0x%x) \n",eMirrorMode,bEnable);)
7037 #endif
7038 }
7039 /*Miss E_MVOP_CMD_SUB_SET_VOP_MIRROR_MODE*/
MDrv_MVOP_SubSetVOPMirrorMode(MS_BOOL bEnable,MVOP_DrvMirror eMirrorMode)7040 void MDrv_MVOP_SubSetVOPMirrorMode(MS_BOOL bEnable, MVOP_DrvMirror eMirrorMode)
7041 {
7042 #if MVOP_SUPPORT_SUB
7043 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
7044 if (p_gDrvSubMVOPCtx == NULL)
7045 {
7046 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
7047 return;
7048 }
7049 MVOP_SubCheckIsInit();
7050
7051 if (HAL_MVOP_SubSetVerticalMirrorMode && HAL_MVOP_SubSetHorizontallMirrorMode)
7052 {
7053 if( eMirrorMode == E_VOPMIRROR_VERTICAL)
7054 {
7055 HAL_MVOP_SubSetVerticalMirrorMode(bEnable);
7056 }
7057 else if(eMirrorMode == E_VOPMIRROR_HORIZONTALL)
7058 {
7059 HAL_MVOP_SubSetHorizontallMirrorMode(bEnable);
7060 }
7061 else if(eMirrorMode == E_VOPMIRROR_HVBOTH)
7062 {
7063 HAL_MVOP_SubSetVerticalMirrorMode(bEnable);
7064 HAL_MVOP_SubSetHorizontallMirrorMode(bEnable);
7065 }
7066 }
7067
7068 MVOP_DBG(MVOP_PRINTF("\nMVOP MDrv_MVOP_SubSetVOPMirrorMode (eMirrorMode :0x%x , 0x%x) \n",eMirrorMode,bEnable);)
7069 #endif
7070 }
7071
7072
MDrv_MVOP_SendBlueScreen_V2(void * pInstance,MS_U16 u16Width,MS_U16 u16Height)7073 MVOP_Result MDrv_MVOP_SendBlueScreen_V2(void* pInstance, MS_U16 u16Width, MS_U16 u16Height)
7074 {
7075 _DRV_MVOP_Entry(E_MVOP_DEV_0);
7076
7077 #if STB_DC
7078 MS_U8 u8InitFieldCtl = (MVOP_EN_MASK_INIT_FIELD | MVOP_MASK_INIT_FIELD_CNT0 | MVOP_MASK_INIT_FIELD_CNT1
7079 | MVOP_MASK_INIT_FIELD_CNT2 | MVOP_RST_MASK_INIT_FIELD | MVOP_FORCE_DEB_START);
7080
7081 if (p_gDrvMVOPCtx == NULL)
7082 {
7083 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
7084 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_FAIL);
7085 }
7086
7087 if(u16Width == 0 || u16Height ==0)
7088 {
7089 MVOP_ERR(MVOP_PRINTF("\nMVOP the Input value could not be zero(0x%x ,0x%x) \n",u16Width ,u16Height);)
7090 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_FAIL);
7091 }
7092
7093 MDrv_MVOP_SEL_OP_FIELD(TRUE);
7094 //MDrv_MVOP_SetImageWidthHight(u16Width, u16Height);
7095 HAL_MVOP_SetPicWidthMinus(u16Width-1);
7096 HAL_MVOP_SetPicHeightMinus(u16Height-1);
7097 HAL_MVOP_SetDeb2MVDFrameModeCtrl(E_MVOP_DEV_0, FALSE, E_MVOP_SIZE_FROM_MVD);
7098
7099 //Force clear STB_DC fb_mask
7100 HAL_MVOP_BaseFromIPCtrl(E_MVOP_DEV_0, TRUE, E_MVOP_FD_MASK_CLR);
7101 HAL_MVOP_SetInitFieldCtl(u8InitFieldCtl, u8InitFieldCtl);
7102
7103 MsOS_DelayTask(90);
7104
7105 HAL_MVOP_SetInitFieldCtl(MVOP_FORCE_DEB_START, u8InitFieldCtl);
7106 MDrv_MVOP_SEL_OP_FIELD(FALSE);
7107 HAL_MVOP_SetDeb2MVDFrameModeCtrl(E_MVOP_DEV_0, TRUE, E_MVOP_SIZE_FROM_MVD);
7108 HAL_MVOP_BaseFromIPCtrl(E_MVOP_DEV_0, FALSE, E_MVOP_FD_MASK_CLR);
7109
7110 if(!p_gDrvMVOPCtx->_bRegSizeFromMVDStatus)
7111 {
7112 HAL_MVOP_SetDeb2MVDFrameModeCtrl(E_MVOP_DEV_0, FALSE, E_MVOP_SIZE_FROM_MVD);
7113 HAL_MVOP_SetPicWidthMinus(p_gDrvMVOPCtx->_u16Width-1);
7114 HAL_MVOP_SetPicHeightMinus(p_gDrvMVOPCtx->_u16Height-1);
7115 }
7116 #endif
7117
7118 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_OK);
7119 }
7120
7121 /*Error: should not bRet*/
MDrv_MVOP_SendBlueScreen(MS_U16 u16Width,MS_U16 u16Height)7122 MVOP_Result MDrv_MVOP_SendBlueScreen(MS_U16 u16Width, MS_U16 u16Height)
7123 {
7124 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
7125 #if ENABLE_UTOPIA2_INTERFACE
7126 stMVOP_SEND_BLUE_SCREEN IO_arg;
7127 IO_arg.u16Width = u16Width;
7128 IO_arg.u16Height = u16Height;
7129 IO_arg.eRet = E_MVOP_FAIL;
7130
7131 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
7132 {
7133 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
7134 return IO_arg.eRet;
7135 }
7136
7137 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SEND_BLUE_SCREEN, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
7138 {
7139 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
7140 return IO_arg.eRet;
7141 }
7142
7143 return IO_arg.eRet;
7144 #else
7145 void* pInstance = NULL;
7146 return (MDrv_MVOP_SendBlueScreen_V2(pInstance, u16Width, u16Height));
7147 #endif
7148 }
7149
_MVOP_MapModNum2DevID(MVOP_Module eMod)7150 static MVOP_DevID _MVOP_MapModNum2DevID(MVOP_Module eMod)
7151 {
7152 MVOP_DevID eDevID = E_MVOP_DEV_0; //default is to control main mvop
7153
7154 switch (eMod)
7155 {
7156 case E_MVOP_MODULE_MAIN:
7157 eDevID = E_MVOP_DEV_0;
7158 break;
7159
7160 #if MVOP_SUPPORT_SUB
7161 case E_MVOP_MODULE_SUB:
7162 eDevID = E_MVOP_DEV_1;
7163 break;
7164 #endif
7165
7166 default:
7167 MVOP_DBG(MVOP_PRINTF("%s eMod=0x%x (set as main)\n", __FUNCTION__, eMod);)
7168 break;
7169 }
7170
7171 return eDevID;
7172 }
7173
7174
7175 //-----------------------------------------------------------------------------
7176 /// MVOP set command interface.
7177 //-----------------------------------------------------------------------------
MDrv_MVOP_SetCommand_V2(void * pInstance,MVOP_Handle * stHd,MVOP_Command eCmd,void * pPara)7178 MVOP_Result MDrv_MVOP_SetCommand_V2(void* pInstance, MVOP_Handle* stHd, MVOP_Command eCmd, void* pPara)
7179 {
7180 MVOP_Result eRet = E_MVOP_OK;
7181 MVOP_DevID eDevID = E_MVOP_DEV_0; //default is to control main mvop
7182 #if (STB_DC==0)
7183 MVOP_RgbFormat eRgbFmt = E_MVOP_RGB_NONE;
7184 #endif
7185 MS_U16 u16ECOVersion;
7186
7187 if (stHd != NULL)
7188 {
7189 eDevID = _MVOP_MapModNum2DevID(stHd->eModuleNum);
7190 MVOP_DBG(MVOP_PRINTF("%s eDevID=%x, eCmd=0x%x\n", __FUNCTION__, eDevID, eCmd);)
7191 }
7192 u16ECOVersion = (MS_U16)MDrv_SYS_GetChipRev();
7193 _DRV_MVOP_Entry(eDevID);
7194 if(eDevID == E_MVOP_DEV_0)
7195 {
7196 if(eCmd != E_MVOP_CMD_SET_STREAM_INFO) //E_MVOP_CMD_SET_STREAM_INFO only set dram sharemem
7197 {
7198 if (!MVOP_IsInit())
7199 {
7200 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
7201 _DRV_MVOP_Return(eDevID, E_MVOP_FAIL);
7202 }
7203 }
7204 if (p_gDrvMVOPCtx == NULL)
7205 {
7206 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
7207 _DRV_MVOP_Return(eDevID, E_MVOP_FAIL);
7208 }
7209 }
7210 #if MVOP_SUPPORT_SUB
7211 else if(eDevID == E_MVOP_DEV_1)
7212 {
7213 if(eCmd != E_MVOP_CMD_SET_STREAM_INFO)
7214 {
7215 if (!MVOP_SubIsInit())
7216 {
7217 MVOP_DBG(MVOP_PRINTF("%s:Sub MVOP driver is not initialized!\n", __FUNCTION__);)
7218 _DRV_MVOP_Return(eDevID, E_MVOP_FAIL);
7219 }
7220 }
7221 if (p_gDrvSubMVOPCtx == NULL)
7222 {
7223 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
7224 _DRV_MVOP_Return(eDevID, E_MVOP_FAIL);
7225 }
7226 }
7227 #endif
7228
7229 if ((eCmd & E_MVOP_CMD_SET_TYPE) != E_MVOP_CMD_SET_TYPE)
7230 {
7231 MVOP_ERR(MVOP_PRINTF("%s: invalid set cmd 0x%x\n", __FUNCTION__, eCmd);)
7232 _DRV_MVOP_Return(eDevID, E_MVOP_INVALID_PARAM);
7233 }
7234 if (!pPara)
7235 {
7236 MVOP_ERR(MVOP_PRINTF("%s: null pPara\n", __FUNCTION__);)
7237 _DRV_MVOP_Return(eDevID, E_MVOP_INVALID_PARAM);
7238 }
7239
7240 switch (eCmd)
7241 {
7242 case E_MVOP_CMD_SET_VSIZE_MIN:
7243 if(eDevID == E_MVOP_DEV_0)
7244 {
7245 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bEnMinVSize576 = *(MS_BOOL*)pPara;
7246 MVOP_DBG(MVOP_PRINTF("Set _bEnMinVSize576 as %x\n", p_gDrvMVOPCtx->_stMVOPDrvCtrl[eDevID]._bEnMinVSize576);)
7247 }
7248 #if MVOP_SUPPORT_SUB
7249 else if(E_MVOP_DEV_1 == eDevID)
7250 {
7251 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._bEnMinVSize576 = *(MS_BOOL*)pPara;
7252 MVOP_DBG(MVOP_PRINTF("Set _bEnMinVSize576 as %x\n", p_gDrvMVOPCtx->_stMVOPDrvCtrl[eDevID]._bEnMinVSize576);)
7253 }
7254 #endif
7255 else
7256 {
7257 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
7258 eRet = E_MVOP_FAIL;
7259 }
7260 break;
7261
7262 case E_MVOP_CMD_SET_STB_FD_MASK_CLR:
7263 #if defined(STB_DC_MODE)||(STB_DC)
7264 {
7265 if(eDevID == E_MVOP_DEV_0)
7266 {
7267 MS_BOOL bEnable;
7268 bEnable =*(MS_BOOL*)pPara;
7269 HAL_MVOP_BaseFromIPCtrl(E_MVOP_DEV_0, bEnable, E_MVOP_FD_MASK_CLR);
7270 MVOP_DBG(MVOP_PRINTF("\nMVOP MDrv_MVOP_ClearFDMask (0x%x) \n",bEnable);)
7271 }
7272 }
7273 #else
7274 {
7275 MVOP_DBG(MVOP_PRINTF("\n not support this function!! \n");)
7276 eRet = E_MVOP_FAIL;
7277 }
7278 #endif
7279 break;
7280
7281 #if (STB_DC==0) //Cmd supported for T-series chips
7282 case E_MVOP_CMD_SET_RGB_FMT:
7283 eRgbFmt = *(MVOP_RgbFormat*)pPara;
7284 if (HAL_MVOP_GetSupportRgbFormat && HAL_MVOP_GetSupportRgbFormat(eRgbFmt))
7285 {
7286 if(eDevID == E_MVOP_DEV_0)
7287 {
7288 p_gDrvMVOPCtx->_stMVOPDrvCtrl[eDevID]._eRgbFmt= eRgbFmt;
7289 MVOP_DBG(MVOP_PRINTF("Set _eRgbFmt as %x\n", p_gDrvMVOPCtx->_stMVOPDrvCtrl[eDevID]._eRgbFmt);)
7290 }
7291 }
7292 else
7293 {
7294 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!!\n", __FUNCTION__, eCmd);)
7295 eRet = E_MVOP_FAIL;
7296 }
7297 break;
7298
7299 //Commands for 3D L/R mode (default is frame packing output):
7300 // Frame packing output and insert vertical blanking between two views.
7301 // Need to set before calling MDrv_MVOP_SetOutputCfg() because timing will be different
7302 case E_MVOP_CMD_SET_3DLR_INST_VBLANK:
7303 {
7304 if(eDevID == E_MVOP_DEV_0)
7305 {
7306 #if SUPPORT_3DLR_INST_VBLANK
7307 p_gDrvMVOPCtx->_stMVOPDrvCtrl[eDevID]._u16InsVBlank= *(MS_U16*)pPara;
7308 MVOP_PRINTF("Set _u16InsVBlank as %x\n", p_gDrvMVOPCtx->_stMVOPDrvCtrl[eDevID]._u16InsVBlank);
7309 #else
7310 eRet = E_MVOP_FAIL;
7311 #endif
7312 }
7313 }
7314 break;
7315
7316 // Line alternative output
7317 // Support interlace or progressive output.
7318 // If interlace output, both view output the same field.
7319 case E_MVOP_CMD_SET_3DLR_ALT_OUT:
7320 {
7321 MS_BOOL bEnable;
7322 bEnable = *(MS_BOOL*)pPara;
7323 if ((E_MVOP_DEV_0 == eDevID) && HAL_MVOP_Set3DLRAltOutput_VHalfScaling)
7324 {
7325 HAL_MVOP_Set3DLRAltOutput_VHalfScaling(bEnable);
7326 HAL_MVOP_LoadReg();
7327 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopComdFlag.bEnable3DLRALT= 1;
7328 }
7329 #if MVOP_SUPPORT_SUB
7330 else if ((E_MVOP_DEV_1 == eDevID) && HAL_MVOP_SubSet3DLRAltOutput_VHalfScaling)
7331 {
7332 HAL_MVOP_SubSet3DLRAltOutput_VHalfScaling(bEnable);
7333 HAL_MVOP_SubLoadReg();
7334 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopComdFlag.bEnable3DLRALT= 1;
7335 }
7336 #endif
7337 else
7338 {
7339 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
7340 eRet = E_MVOP_FAIL;
7341 }
7342 }
7343 break;
7344
7345 // Line alternative read of 3D L/R mode, side-by-side output
7346 // Support interlace or progressive output.
7347 // If interlace output, both view output the same field.
7348 // Only support in Eagle.
7349 case E_MVOP_CMD_SET_3DLR_ALT_OUT_SBS:
7350 {
7351 #if SUPPORT_3DLR_ALT_SBS
7352 MS_BOOL bEnable;
7353 bEnable = *(MS_BOOL*)pPara;
7354 if (E_MVOP_DEV_0 == eDevID)
7355 {
7356 HAL_MVOP_Set3DLRAltOutput(bEnable);
7357 HAL_MVOP_Set3DLRAltSBSOutput(bEnable);
7358 HAL_MVOP_LoadReg();
7359 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopComdFlag.bEnable3DLRSBS= 1;
7360 }
7361 #if MVOP_SUPPORT_SUB
7362 else if (E_MVOP_DEV_1 == eDevID)
7363 {
7364 HAL_MVOP_SubSet3DLRAltOutput(bEnable);
7365 HAL_MVOP_SubSet3DLRAltSBSOutput(bEnable);
7366 HAL_MVOP_SubLoadReg();
7367 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopComdFlag.bEnable3DLRSBS= 1;
7368 }
7369 #endif
7370 else
7371 #endif
7372 {
7373 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
7374 eRet = E_MVOP_FAIL;
7375 }
7376 }
7377 break;
7378
7379 case E_MVOP_CMD_SET_3DLR_2ND_CFG:
7380 {
7381 //Support 2nd pitch: A3 U02, A7P U02, Agate U01, Eagle, Elk U01, Emerald, Edison.
7382 //Support 2nd w & h: Eagle, Elk U01, Emerald, Edison.
7383 MS_BOOL bEnable;
7384 bEnable = *(MS_BOOL*)pPara;
7385 if ((E_MVOP_DEV_0 == eDevID) && HAL_MVOP_Set3DLR2ndCfg)
7386 {
7387 if (TRUE == HAL_MVOP_Set3DLR2ndCfg(bEnable))
7388 {
7389 HAL_MVOP_LoadReg();
7390 }
7391 else
7392 {
7393 MVOP_DBG(MVOP_PRINTF("\n %s hw not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
7394 eRet = E_MVOP_FAIL;
7395 }
7396 }
7397 else
7398 {
7399 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
7400 eRet = E_MVOP_UNSUPPORTED;
7401 }
7402 }
7403 break;
7404
7405 case E_MVOP_CMD_SET_VSIZE_DUPLICATE:
7406 {
7407 //Supported after T12, except M12.
7408 MS_BOOL bEnable;
7409 bEnable =*(MS_BOOL*)pPara;
7410 p_gDrvMVOPCtx->_stMVOPDrvCtrl[eDevID]._bEnVSizeDup = bEnable;
7411 MVOP_DBG(MVOP_PRINTF("Set _bEnVSizeDup as %x\n", p_gDrvMVOPCtx->_stMVOPDrvCtrl[eDevID]._bEnVSizeDup);)
7412
7413 if ((E_MVOP_DEV_0 == eDevID) && HAL_MVOP_SetVerDup)
7414 {
7415 HAL_MVOP_SetVerDup(bEnable);
7416 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopComdFlag.bEnableVdup= 1;
7417 }
7418 else
7419 {
7420 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
7421 eRet = E_MVOP_FAIL;
7422 }
7423
7424 break;
7425 }
7426
7427 //Need to set before calling MDrv_MVOP_SetInputCfg()
7428 //For interlace source, single field input, such as H.264 decodeIframe of field type.
7429 case E_MVOP_CMD_SET_FIELD_DUPLICATE:
7430 {
7431 MVOP_RptFldMode eRptMode = E_MVOP_RPTFLD_NONE;
7432 eRptMode = *(MVOP_RptFldMode*)pPara;
7433 MVOP_DBG(MVOP_PRINTF("\n %s fieldRepeatMode 0x%x.\n", __FUNCTION__, eRptMode);)
7434
7435 if ((E_MVOP_DEV_0 == eDevID) && HAL_MVOP_SetRepeatField)
7436 {
7437 HAL_MVOP_SetRepeatField(eRptMode);
7438 }
7439 else
7440 {
7441 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
7442 eRet = E_MVOP_FAIL;
7443 }
7444
7445 break;
7446 }
7447
7448 case E_MVOP_CMD_SET_VSYNC_MODE:
7449 {
7450 MS_U8 u8Mode = *(MS_U8*)pPara;
7451 MVOP_DBG(MVOP_PRINTF("\n %s VSyncMode 0x%x.\n", __FUNCTION__, u8Mode);)
7452 if ((E_MVOP_DEV_0 == eDevID) && HAL_MVOP_SetVSyncMode)
7453 {
7454 HAL_MVOP_SetVSyncMode(u8Mode);
7455 }
7456 #if MVOP_SUPPORT_SUB
7457 else if((E_MVOP_DEV_1 == eDevID) && HAL_MVOP_SubSetVSyncMode)
7458 {
7459 HAL_MVOP_SubSetVSyncMode(u8Mode);
7460 }
7461 #endif
7462 else
7463 {
7464 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
7465 eRet = E_MVOP_FAIL;
7466 }
7467 break;
7468 }
7469 #endif
7470
7471 case E_MVOP_CMD_SET_SW_CTRL_FIELD_ENABLE:
7472 #if STB_DC
7473 {
7474 MS_BOOL bEnable;
7475 bEnable =*(MS_BOOL*)pPara;
7476 HAL_MVOP_SWFieldCtrl(ENABLE, E_MVOP_EN_SW_FIELD);
7477 HAL_MVOP_SWFieldCtrl(bEnable, E_MVOP_SW_FIELD_BOTTOM);
7478 MVOP_DBG(MVOP_PRINTF("\nMVOP HAL_MVOP_SWFieldCtrl (0x%x) \n", bEnable);)
7479
7480 }
7481 #else
7482 {
7483 MVOP_DBG(MVOP_PRINTF("\n not support this function!! \n");)
7484 eRet = E_MVOP_FAIL;
7485 }
7486 #endif
7487 break;
7488
7489 case E_MVOP_CMD_SET_SW_CTRL_FIELD_DSIABLE:
7490 #if STB_DC
7491 {
7492 HAL_MVOP_SWFieldCtrl(DISABLE, E_MVOP_EN_SW_FIELD);
7493 }
7494 #else
7495 {
7496 MVOP_DBG(MVOP_PRINTF("\n not support this function!! \n");)
7497 eRet = E_MVOP_FAIL;
7498 }
7499 #endif
7500 break;
7501
7502 case E_MVOP_CMD_SET_VSIZE_X4_DUPLICATE:
7503 {
7504 //Supported after Emerald.
7505 MS_BOOL bEnable;
7506 bEnable =*(MS_BOOL*)pPara;
7507 p_gDrvMVOPCtx->_stMVOPDrvCtrl[eDevID]._bEnVSizex4Dup = bEnable;
7508 MVOP_DBG(MVOP_PRINTF("Set _bEnVSizex4Dup as %x\n", p_gDrvMVOPCtx->_stMVOPDrvCtrl[eDevID]._bEnVSizex4Dup);)
7509
7510 if ((E_MVOP_DEV_0 == eDevID) && HAL_MVOP_SetVerx4Dup)
7511 {
7512 HAL_MVOP_SetVerx4Dup(bEnable);
7513 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopComdFlag.bEnableVx4= 1;
7514 }
7515 else
7516 {
7517 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
7518 eRet = E_MVOP_FAIL;
7519 }
7520
7521 break;
7522 }
7523
7524 case E_MVOP_CMD_SET_HSIZE_X4_DUPLICATE:
7525 {
7526 //Supported after Emerald.
7527 MS_BOOL bEnable;
7528 bEnable =*(MS_BOOL*)pPara;
7529 p_gDrvMVOPCtx->_stMVOPDrvCtrl[eDevID]._bEnHSizex4Dup = bEnable;
7530 MVOP_DBG(MVOP_PRINTF("Set _bEnHSizex4Dup as %x\n", p_gDrvMVOPCtx->_stMVOPDrvCtrl[eDevID]._bEnHSizex4Dup);)
7531
7532 if ((E_MVOP_DEV_0 == eDevID) && HAL_MVOP_SetHorx4Dup)
7533 {
7534 HAL_MVOP_SetHorx4Dup(bEnable);
7535 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopComdFlag.bEnableHx4= 1;
7536 }
7537 else
7538 {
7539 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
7540 eRet = E_MVOP_FAIL;
7541 }
7542
7543 break;
7544 }
7545 case E_MVOP_CMD_SET_BASE_ADD_MULTI_VIEW:
7546 {
7547 #if ENABLE_3D_LR_MODE
7548 MVOP_BaseAddInput *stBaseAddInfo = (MVOP_BaseAddInput*)pPara;
7549 //MVOP_DBG(MVOP_PRINTF("\n %s fieldRepeatMode 0x%x.\n", __FUNCTION__, eRptMode);)
7550 if(stBaseAddInfo)
7551 {
7552 if ((E_MVOP_DEV_0 == eDevID) && HAL_MVOP_SetYUVBaseAddMultiView)
7553 {
7554 HAL_MVOP_SetYUVBaseAddMultiView(stBaseAddInfo);
7555 }
7556 }
7557 else
7558 #endif
7559 {
7560 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
7561 eRet = E_MVOP_FAIL;
7562 }
7563 break;
7564 }
7565 case E_MVOP_CMD_SET_FIRE_MVOP:
7566 {
7567 MVOP_DBG(MVOP_PRINTF("\n %s.\n", __FUNCTION__);)
7568 MS_BOOL bEnable;
7569 bEnable =*(MS_BOOL*)pPara;
7570 if(bEnable)
7571 {
7572 switch(eDevID)
7573 {
7574 case E_MVOP_DEV_0:
7575 HAL_MVOP_LoadReg();
7576 break;
7577 case E_MVOP_DEV_1:
7578 #if MVOP_SUPPORT_SUB
7579 HAL_MVOP_SubLoadReg();
7580 #endif
7581 break;
7582 case E_MVOP_DEV_2:
7583 #if MVOP_SUPPORT_3RD
7584 HAL_MVOP_EX_LoadReg(eDevID);
7585 #endif
7586 break;
7587 default:
7588 break;
7589 }
7590 }
7591 else
7592 {
7593 MVOP_DBG(MVOP_PRINTF("\n %s cmd 0x%x is not enable!! \n", __FUNCTION__, eCmd);)
7594 eRet = E_MVOP_OK;
7595 }
7596 break;
7597 }
7598 case E_MVOP_CMD_SET_VC1_RANGE_MAP:
7599 {
7600 MVOP_DBG(MVOP_PRINTF("\n %s.\n", __FUNCTION__);)
7601 MVOP_VC1RangeMapInfo *stVC1RangeMapInfo = (MVOP_VC1RangeMapInfo*)pPara;
7602 if(stVC1RangeMapInfo && HAL_MVOP_SetVC1RangeMap)
7603 {
7604 HAL_MVOP_SetVC1RangeMap(eDevID, stVC1RangeMapInfo);
7605 }
7606 else
7607 {
7608 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
7609 eRet = E_MVOP_FAIL;
7610 }
7611 break;
7612 }
7613 case E_MVOP_CMD_SET_POWER_STATE:
7614 {
7615 // Please use API: MDrv_MVOP_SetPowerState
7616 break;
7617 }
7618 case E_MVOP_CMD_SET_420_BW_SAVING_MODE:
7619 {
7620 MVOP_DBG(MVOP_PRINTF("\n %s.\n", __FUNCTION__);)
7621 MS_BOOL bEnable;
7622 bEnable =*(MS_BOOL*)pPara;
7623 if ((E_MVOP_DEV_0 == eDevID) && HAL_MVOP_Set420BWSaveMode)
7624 {
7625 HAL_MVOP_Set420BWSaveMode(bEnable);
7626 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopComdFlag.bEnableBWSave= 1;
7627 HAL_MVOP_LoadReg();
7628 }
7629 #if MVOP_SUPPORT_SUB
7630 else if ((E_MVOP_DEV_1 == eDevID) && HAL_MVOP_SubSet420BWSaveMode)
7631 {
7632 HAL_MVOP_SubSet420BWSaveMode(bEnable, u16ECOVersion);
7633 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopComdFlag.bEnableBWSave= 1;
7634 HAL_MVOP_SubLoadReg();
7635 }
7636 #endif
7637 else
7638 {
7639 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
7640 eRet = E_MVOP_FAIL;
7641 }
7642
7643 break;
7644 }
7645 case E_MVOP_CMD_SET_EVD_BASE_ADD:
7646 {
7647 MVOP_DBG(MVOP_PRINTF("\n %s.\n", __FUNCTION__);)
7648 MVOP_EVDBaseAddInput *stEVDBaseAddInfo = (MVOP_EVDBaseAddInput*)pPara;
7649
7650 if(stEVDBaseAddInfo)
7651 {
7652 if ((E_MVOP_DEV_0 == eDevID) && HAL_MVOP_SetEVDYUVBaseAdd)
7653 {
7654 HAL_MVOP_SetEVDYUVBaseAdd(stEVDBaseAddInfo);
7655 HAL_MVOP_LoadReg();
7656 }
7657 #if MVOP_SUPPORT_SUB
7658 else if ((E_MVOP_DEV_1 == eDevID) && HAL_MVOP_SubSetEVDYUVBaseAdd)
7659 {
7660 HAL_MVOP_SubSetEVDYUVBaseAdd(stEVDBaseAddInfo);
7661 HAL_MVOP_SubLoadReg();
7662 }
7663 #endif
7664 }
7665 else
7666 {
7667 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
7668 eRet = E_MVOP_FAIL;
7669 }
7670 break;
7671 }
7672 case E_MVOP_CMD_SET_EVD_FEATURE:
7673 {
7674 MVOP_DBG(MVOP_PRINTF("\n %s.\n", __FUNCTION__);)
7675
7676 MVOP_EVDFeature *stEVDMCUInput = (MVOP_EVDFeature*)pPara;
7677
7678 if(stEVDMCUInput)
7679 {
7680 if (HAL_MVOP_SetEVDFeature)
7681 {
7682 HAL_MVOP_SetEVDFeature(eDevID, stEVDMCUInput);
7683 HAL_MVOP_LoadReg();
7684 }
7685 else
7686 {
7687 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
7688 }
7689 }
7690 else
7691 {
7692 MVOP_DBG(MVOP_PRINTF("\n %s Input data is NULL 0x%x!! \n", __FUNCTION__, eCmd);)
7693 eRet = E_MVOP_FAIL;
7694 }
7695 break;
7696 }
7697 case E_MVOP_CMD_SET_MVD_LATE_REPEAT:
7698 {
7699 MVOP_DBG(MVOP_PRINTF("\n %s.\n", __FUNCTION__);)
7700 MS_BOOL bEnable;
7701 bEnable =*(MS_BOOL*)pPara;
7702
7703 if (HAL_MVOP_SetRptPreVsyncFrame)
7704 {
7705 HAL_MVOP_SetRptPreVsyncFrame(eDevID, bEnable);
7706 switch(eDevID)
7707 {
7708 case E_MVOP_DEV_0:
7709 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopComdFlag.bEnableRptPreVsync= bEnable;
7710 break;
7711 #if MVOP_SUPPORT_SUB
7712 case E_MVOP_DEV_1:
7713 p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopComdFlag.bEnableRptPreVsync= bEnable;
7714 break;
7715 #endif
7716 default:
7717 MVOP_DBG(MVOP_PRINTF("\n %s not support this device 0x%x!! \n", __FUNCTION__, eCmd);)
7718 break;
7719 }
7720
7721 }
7722 else
7723 {
7724 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
7725 eRet = E_MVOP_FAIL;
7726 }
7727
7728 break;
7729 }
7730 case E_MVOP_CMD_SET_HANDSHAKE_MODE:
7731 {
7732 MVOP_DBG(MVOP_PRINTF("\n %s.\n", __FUNCTION__);)
7733 MS_BOOL bEnable;
7734 MS_U8 u8FPS = 25; //Default fps = 25, set as normal case;
7735 bEnable =*(MS_BOOL*)pPara;
7736
7737 switch(eDevID)
7738 {
7739 case E_MVOP_DEV_0:
7740 {
7741 if(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u8Framerate != 0)
7742 {
7743 u8FPS = p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u8Framerate;
7744 }
7745 break;
7746 }
7747 #if MVOP_SUPPORT_SUB
7748 case E_MVOP_DEV_1:
7749 {
7750 if(p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopTiming.u8Framerate != 0)
7751 {
7752 u8FPS = p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopTiming.u8Framerate;
7753 }
7754 break;
7755 }
7756 #endif
7757 default:
7758 break;
7759 }
7760
7761 if (HAL_MVOP_SetHandShakeMode)
7762 {
7763 HAL_MVOP_SetHandShakeMode(eDevID, bEnable, u8FPS);
7764 }
7765 else
7766 {
7767 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
7768 eRet = E_MVOP_FAIL;
7769 }
7770 break;
7771 }
7772 case E_MVOP_CMD_SET_FRC_OUTPUT:
7773 {
7774 MVOP_DBG(MVOP_PRINTF("\n %s.\n", __FUNCTION__);)
7775 MS_U32 u32FPS;
7776 u32FPS =*(MS_U32*)pPara;
7777
7778 if (HAL_MVOP_SupportFRCOutputFPS)
7779 {
7780 switch(eDevID)
7781 {
7782 case E_MVOP_DEV_0:
7783 {
7784 if(TRUE == HAL_MVOP_SupportFRCOutputFPS(E_MVOP_DEV_0))
7785 {
7786 MVOP_Timing* pstFRCTiming = NULL;
7787 pstFRCTiming = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming;
7788
7789 MVOP_VidStat stFRCVideoStatus;
7790 MS_BOOL bFRCEnHDup;
7791 stFRCVideoStatus = p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopOutputCfg;
7792 stFRCVideoStatus.u16FrameRate = u32FPS;
7793 bFRCEnHDup = p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bEnHx2Dup;
7794 if (MVOP_AutoGenMPEGTiming(TRUE, pstFRCTiming, &stFRCVideoStatus, bFRCEnHDup) != TRUE)
7795 {
7796 MVOP_PRINTF("%s: fail to calculate timing!\n", __FUNCTION__);
7797 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_FAIL);
7798 }
7799 HAL_MVOP_SetOutputInterlace(pstFRCTiming->bInterlace, u16ECOVersion);
7800 HAL_MVOP_SetOutputTiming(pstFRCTiming);
7801 HAL_MVOP_SetSynClk(pstFRCTiming);
7802 MVOP_DumpOutputTiming(pstFRCTiming);
7803 MS_BOOL* pbIsSetTiming = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._stMVOPDrvStat.bIsSetTiming;
7804 *pbIsSetTiming = TRUE;
7805 #ifdef UFO_MVOP_DOLBY_HDR
7806 if(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bEn265DV)
7807 {
7808 HAL_MVOP_SetEnable4k2k2P(TRUE);
7809 HAL_MVOP_SubSetEnable4k2k2P(TRUE);
7810 HAL_MVOP_SubSetOutputInterlace(pstFRCTiming->bInterlace, u16ECOVersion);
7811 HAL_MVOP_SubSetOutputTiming(pstFRCTiming);
7812 HAL_MVOP_SubSetSynClk(pstFRCTiming);
7813 if(HAL_MVOP_Enable2DCTimingSync)
7814 {
7815 HAL_MVOP_Enable2DCTimingSync(TRUE);
7816 }
7817 HAL_MVOP_Enable(TRUE, 0);
7818 }
7819 #endif
7820 }
7821 }
7822 break;
7823 case E_MVOP_DEV_1:
7824 #if MVOP_SUPPORT_SUB
7825 {
7826 if(TRUE == HAL_MVOP_SupportFRCOutputFPS(E_MVOP_DEV_1))
7827 {
7828 MVOP_Timing* pstFRCTiming = NULL;
7829 pstFRCTiming = &p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopTiming;
7830
7831 MVOP_VidStat stFRCVideoStatus;
7832 MS_BOOL bFRCEnHDup;
7833 stFRCVideoStatus = p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopOutputCfg;
7834 stFRCVideoStatus.u16FrameRate = u32FPS;
7835 bFRCEnHDup = p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bEnHx2Dup;
7836
7837 if (MVOP_AutoGenMPEGTiming(TRUE, pstFRCTiming, &stFRCVideoStatus, bFRCEnHDup) != TRUE)
7838 {
7839 MVOP_PRINTF("%s: fail to calculate timing!\n", __FUNCTION__);
7840 _DRV_MVOP_Return(E_MVOP_DEV_0, E_MVOP_FAIL);
7841 }
7842
7843 HAL_MVOP_SubSetOutputInterlace(pstFRCTiming->bInterlace, u16ECOVersion);
7844 HAL_MVOP_SubSetOutputTiming(pstFRCTiming);
7845 HAL_MVOP_SubSetSynClk(pstFRCTiming);
7846
7847 MVOP_DumpOutputTiming(pstFRCTiming);
7848 MS_BOOL* pbIsSetTiming = &p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._stMVOPDrvStat.bIsSetTiming;
7849 *pbIsSetTiming = TRUE;
7850 }
7851 }
7852 #endif
7853 break;
7854 default:
7855 break;
7856 }
7857 }
7858 else
7859 {
7860 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
7861 eRet = E_MVOP_FAIL;
7862 }
7863 break;
7864 }
7865 #if defined(STB_DC_MODE)||(STB_DC)
7866 /*******************************************************/
7867 // Usage: Dynamic change timing generate from xc or mvop
7868 // set command before mvop setoutputcfg
7869 /*******************************************************/
7870 case E_MVOP_CMD_SET_XC_GEN_TIMING:
7871 {
7872 MVOP_DBG(MVOP_PRINTF("\n %s.\n", __FUNCTION__);)
7873 MS_BOOL bEnable;
7874 bEnable =*(MS_BOOL*)pPara;
7875
7876 if (HAL_MVOP_SetTimingFromXC)
7877 {
7878 HAL_MVOP_SetTimingFromXC(eDevID, bEnable);
7879 }
7880 else
7881 {
7882 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
7883 eRet = E_MVOP_FAIL;
7884 }
7885 break;
7886 }
7887 #endif
7888
7889 #if (defined(STB_DC_MODE)||(STB_DC))&&(MVOP_SUPPORT_SUB)
7890 case E_MVOP_CMD_SET_SEL_OP_FIELD:
7891 {
7892 MVOP_DBG(MVOP_PRINTF("\n %s.\n", __FUNCTION__);)
7893 MS_BOOL bEnable;
7894 bEnable =*(MS_BOOL*)pPara;
7895
7896 if (HAL_MVOP_MaskDBRegCtrl)
7897 {
7898 HAL_MVOP_MaskDBRegCtrl(eDevID, bEnable ,E_MVOP_SEL_OP_FIELD);
7899 }
7900 else
7901 {
7902 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
7903 eRet = E_MVOP_FAIL;
7904 }
7905 break;
7906 }
7907 case E_MVOP_CMD_SET_SIZE_FROM_MVD:
7908 {
7909 MVOP_DBG(MVOP_PRINTF("\n %s.\n", __FUNCTION__);)
7910 MS_BOOL bEnable;
7911 bEnable =*(MS_BOOL*)pPara;
7912
7913 p_gDrvMVOPCtx->_bRegSizeFromMVDStatus = bEnable;
7914 HAL_MVOP_SetDeb2MVDFrameModeCtrl(eDevID, p_gDrvMVOPCtx->_bRegSizeFromMVDStatus,E_MVOP_SIZE_FROM_MVD);
7915 break;
7916 }
7917 case E_MVOP_CMD_SET_CROP_START_POS:
7918 {
7919 MVOP_DBG(MVOP_PRINTF("\n %s.\n", __FUNCTION__);)
7920 MVOP_SetCropPos stCropPos;
7921 stCropPos =*(MVOP_SetCropPos*)pPara;
7922
7923 MVOP_Timing* pstTiming = NULL;
7924 pstTiming = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming;
7925
7926 HAL_MVOP_SetStartX(eDevID, stCropPos.u16Xpos);
7927 HAL_MVOP_SetStartY(eDevID, stCropPos.u16Ypos, pstTiming->bInterlace);
7928
7929 break;
7930 }
7931 case E_MVOP_CMD_SET_IMAGE_WIDTH_HEIGHT:
7932 {
7933 MVOP_DBG(MVOP_PRINTF("\n %s.\n", __FUNCTION__);)
7934 MVOP_SetImageWH stCropSize;
7935 stCropSize =*(MVOP_SetImageWH*)pPara;
7936
7937 if(stCropSize.u16Width == 0 || stCropSize.u16Height == 0)
7938 {
7939 HAL_MVOP_SetPicWidthMinus(eDevID, 0, p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16Width);
7940 HAL_MVOP_SetPicHeightMinus(eDevID, 0, p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16Height);
7941 }
7942 else
7943 {
7944 HAL_MVOP_SetPicWidthMinus(eDevID, stCropSize.u16Width-1, p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16Width);
7945 HAL_MVOP_SetPicHeightMinus(eDevID, stCropSize.u16Height-1, p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16Height);
7946 }
7947 p_gDrvMVOPCtx->_u16Width = stCropSize.u16Width;
7948 p_gDrvMVOPCtx->_u16Height = stCropSize.u16Height;
7949 break;
7950 }
7951 #endif
7952 /*******************************************************/
7953 // Usage: set stream feature to mvop, only for AN vsyncbridge so far.
7954 // support setting as bIsInit = 0.
7955 // E_MVOP_SET_SI_DV_SINGLE: set dolby single layer
7956 // E_MVOP_SET_SI_DV_DUAL: set dolby dual layer
7957 /*******************************************************/
7958 case E_MVOP_CMD_SET_STREAM_INFO:
7959 {
7960 MVOP_SetStreamInfo eStreamInfo;
7961 eStreamInfo =*(MVOP_SetStreamInfo*)pPara;
7962 MVOP_DBG(MVOP_PRINTF("\n %s.E_MVOP_CMD_SET_STREAM_INFO, enum = 0x%x\n", __FUNCTION__,eStreamInfo);)
7963
7964 switch(eDevID)
7965 {
7966 case E_MVOP_DEV_0:
7967 {
7968 switch(eStreamInfo)
7969 {
7970 case E_MVOP_SET_SI_NONE:
7971 break;
7972 case E_MVOP_SET_SI_DV_SINGLE:
7973 {
7974 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bIsDVDual = FALSE;
7975 break;
7976 }
7977 case E_MVOP_SET_SI_DV_DUAL:
7978 {
7979 #if MVOP_SUPPORT_SUB
7980 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._bIsDVDual = TRUE;
7981 #endif
7982 break;
7983 }
7984 }
7985 break;
7986 }
7987 #if MVOP_SUPPORT_SUB
7988 case E_MVOP_DEV_1:
7989 {
7990 switch(eStreamInfo)
7991 {
7992 case E_MVOP_SET_SI_NONE:
7993 break;
7994 case E_MVOP_SET_SI_DV_SINGLE:
7995 case E_MVOP_SET_SI_DV_DUAL:
7996 //do nothing in sub mvop
7997 MVOP_PRINTF("\n %s do nothing in sub mvop\n", __FUNCTION__);
7998 break;
7999 }
8000 break;
8001 }
8002 #endif
8003 default:
8004 {
8005 MVOP_PRINTF("\n %s error mvop id index\n", __FUNCTION__);
8006 }
8007 }
8008 break;
8009 }
8010 /*******************************************************/
8011 // Usage: set before MDrv_MVOP_SetInputCfg .
8012 // TRUE for yvyu.
8013 /*******************************************************/
8014 case E_MVOP_CMD_SET_UV_SWAP:
8015 {
8016 MVOP_DBG(MVOP_PRINTF("\n %s.\n", __FUNCTION__);)
8017 MS_BOOL bEnable;
8018 bEnable =*(MS_BOOL*)pPara;
8019
8020 if (HAL_MVOP_UVSwapEnable)
8021 {
8022 HAL_MVOP_UVSwapEnable(eDevID, bEnable);
8023 }
8024 else
8025 {
8026 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
8027 eRet = E_MVOP_FAIL;
8028 }
8029 break;
8030 }
8031 case E_MVOP_CMD_SET_MFDEC_INFO:
8032 {
8033 MVOP_MCUMFDInfo* pMFDECInfo;
8034 pMFDECInfo =(MVOP_MCUMFDInfo*)pPara;
8035 HALMVOPMFDECINFO stHalMFDECInfo;
8036 stHalMFDECInfo.bMFDEC_EN = pMFDECInfo->bMFDEC_EN;
8037 stHalMFDECInfo.u8MFDEC_ID = pMFDECInfo->u8MFDEC_ID;
8038 stHalMFDECInfo.u32UNCOMPRESS_MODE = pMFDECInfo->u32UNCOMPRESS_MODE;
8039 stHalMFDECInfo.u32BITLEN_FB_ADDR = pMFDECInfo->u32BITLEN_FB_ADDR;
8040 stHalMFDECInfo.u8BITLEN_FB_MIU = pMFDECInfo->u8BITLEN_FB_MIU;
8041 stHalMFDECInfo.u32BITLEN_FB_PITCH = pMFDECInfo->u32BITLEN_FB_PITCH;
8042 stHalMFDECInfo.bBITLEN_SHT_8 = pMFDECInfo->bBITLEN_SHT_8;
8043 HAL_MVOP_SetMFDECInfo(eDevID, &stHalMFDECInfo);
8044 break;
8045 }
8046 default:
8047 {
8048 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
8049 eRet = E_MVOP_INVALID_PARAM;
8050 }
8051 break;
8052 }
8053
8054 _DRV_MVOP_Return(eDevID, eRet);
8055 //return eRet;
8056 }
8057
MDrv_MVOP_SetCommand(MVOP_Handle * stHd,MVOP_Command eCmd,void * pPara)8058 MVOP_Result MDrv_MVOP_SetCommand(MVOP_Handle* stHd, MVOP_Command eCmd, void* pPara)
8059 {
8060 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:0x%x \n", __FUNCTION__, __LINE__, eCmd);)
8061 #if ENABLE_UTOPIA2_INTERFACE
8062 stMVOP_SET_COMMAND IO_arg;
8063 IO_arg.stHd = stHd;
8064 IO_arg.eCmd = eCmd;
8065 IO_arg.pPara = pPara;
8066 IO_arg.eRet = E_MVOP_FAIL;
8067
8068 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
8069 {
8070 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
8071 return IO_arg.eRet;
8072 }
8073
8074 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SET_COMMAND, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
8075 {
8076 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
8077 return IO_arg.eRet;
8078 }
8079
8080 return IO_arg.eRet;
8081 #else
8082 void* pInstance = NULL;
8083 return (MDrv_MVOP_SetCommand_V2(pInstance, stHd, eCmd, pPara));
8084 #endif
8085 }
8086
8087
8088 //-----------------------------------------------------------------------------
8089 /// MVOP get command interface.
8090 //-----------------------------------------------------------------------------
MDrv_MVOP_GetCommand_V2(void * pInstance,MVOP_Handle * stHd,MVOP_Command eCmd,void * pPara,MS_U32 u32ParaSize)8091 MVOP_Result MDrv_MVOP_GetCommand_V2(void* pInstance, MVOP_Handle* stHd, MVOP_Command eCmd, void* pPara, MS_U32 u32ParaSize)
8092 {
8093 MVOP_Result eRet = E_MVOP_OK;
8094 MVOP_DevID eDevID = E_MVOP_DEV_0; //default is to control main mvop
8095 MVOP_DrvCtrlSt* pstDrvCtrl = NULL;
8096
8097 if (stHd != NULL)
8098 {
8099 eDevID = _MVOP_MapModNum2DevID(stHd->eModuleNum);
8100 MVOP_DBG(MVOP_PRINTF("%s eDevID=%x, eCmd=0x%x\n", __FUNCTION__, eDevID, eCmd);)
8101 }
8102 _DRV_MVOP_Entry(eDevID);
8103
8104 if (!MVOP_IsInit())
8105 {
8106 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
8107 _DRV_MVOP_Return(eDevID, E_MVOP_FAIL);
8108 }
8109 if ((eCmd & E_MVOP_CMD_GET_TYPE) != E_MVOP_CMD_GET_TYPE)
8110 {
8111 MVOP_ERR(MVOP_PRINTF("%s: invalid get cmd 0x%x\n", __FUNCTION__, eCmd);)
8112 _DRV_MVOP_Return(eDevID, E_MVOP_INVALID_PARAM);
8113 }
8114 if (!pPara)
8115 {
8116 MVOP_ERR(MVOP_PRINTF("%s: null pPara\n", __FUNCTION__);)
8117 _DRV_MVOP_Return(eDevID, E_MVOP_INVALID_PARAM);
8118 }
8119
8120 if(eDevID == E_MVOP_DEV_0)
8121 {
8122 if (!MVOP_IsInit())
8123 {
8124 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
8125 _DRV_MVOP_Return(eDevID, E_MVOP_FAIL);
8126 }
8127 if (p_gDrvMVOPCtx == NULL)
8128 {
8129 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
8130 _DRV_MVOP_Return(eDevID, E_MVOP_FAIL);
8131 }
8132 }
8133 #if MVOP_SUPPORT_SUB
8134 else if(eDevID == E_MVOP_DEV_1)
8135 {
8136 if (!MVOP_SubIsInit())
8137 {
8138 MVOP_DBG(MVOP_PRINTF("%s:Sub MVOP driver is not initialized!\n", __FUNCTION__);)
8139 _DRV_MVOP_Return(eDevID, E_MVOP_FAIL);
8140 }
8141 if (p_gDrvSubMVOPCtx == NULL)
8142 {
8143 MVOP_DBG(MVOP_PRINTF("%s p_gDrvSubMVOPCtx is NULL pointer\n", __FUNCTION__);)
8144 _DRV_MVOP_Return(eDevID, E_MVOP_FAIL);
8145 }
8146 }
8147 #endif
8148 switch (eCmd)
8149 {
8150 #if (STB_DC==0) //Cmd supported for T-series chips
8151 case E_MVOP_CMD_GET_3DLR_ALT_OUT:
8152 if ((HAL_MVOP_Get3DLRAltOutput) && (sizeof(MS_BOOL) == u32ParaSize))
8153 {
8154 *(MS_BOOL*)pPara = HAL_MVOP_Get3DLRAltOutput();
8155 }
8156 else
8157 {
8158 eRet = E_MVOP_INVALID_PARAM;
8159 }
8160 break;
8161
8162 case E_MVOP_CMD_GET_3DLR_2ND_CFG:
8163 if ((HAL_MVOP_Get3DLR2ndCfg) && (sizeof(MS_BOOL) == u32ParaSize))
8164 {
8165 *(MS_BOOL*)pPara = HAL_MVOP_Get3DLR2ndCfg();
8166 }
8167 else
8168 {
8169 eRet = E_MVOP_INVALID_PARAM;
8170 }
8171 break;
8172
8173 case E_MVOP_CMD_GET_MIRROR_MODE:
8174 if ((HAL_MVOP_GetMirrorMode) && (sizeof(MVOP_DrvMirror) == u32ParaSize))
8175 {
8176 *(MVOP_DrvMirror*)pPara = HAL_MVOP_GetMirrorMode(eDevID);
8177 }
8178 else
8179 {
8180 eRet = E_MVOP_INVALID_PARAM;
8181 }
8182 break;
8183
8184 case E_MVOP_CMD_GET_VSIZE_DUPLICATE:
8185 if ((HAL_MVOP_GetVerDup) && (sizeof(MS_BOOL) == u32ParaSize))
8186 {
8187 *(MS_BOOL*)pPara = HAL_MVOP_GetVerDup();
8188 }
8189 else
8190 {
8191 eRet = E_MVOP_INVALID_PARAM;
8192 }
8193 break;
8194
8195 case E_MVOP_CMD_GET_BASE_ADD_BITS:
8196 if (sizeof(MS_U8) == u32ParaSize)
8197 {
8198 *(MS_U8*)pPara = MVOP_BASE_ADD_BITS;
8199 }
8200 else
8201 {
8202 eRet = E_MVOP_INVALID_PARAM;
8203 }
8204 break;
8205 case E_MVOP_CMD_GET_TOTAL_MVOP_NUM:
8206 if (sizeof(MS_U32) == u32ParaSize)
8207 {
8208 *(MS_U32*)pPara = HAL_MVOP_MODULE_CNT;
8209 }
8210 else
8211 {
8212 eRet = E_MVOP_INVALID_PARAM;
8213 }
8214 break;
8215 #endif
8216 case E_MVOP_CMD_GET_MAXIMUM_CLK:
8217 if ((HAL_MVOP_GetMaximumClk) && (sizeof(MVOP_FREQUENCY) == u32ParaSize))
8218 {
8219 *(MVOP_FREQUENCY*)pPara = (MVOP_FREQUENCY)HAL_MVOP_GetMaximumClk();
8220 }
8221 else
8222 {
8223 eRet = E_MVOP_INVALID_PARAM;
8224 }
8225 break;
8226 case E_MVOP_CMD_GET_CURRENT_CLK:
8227 if ((HAL_MVOP_GetCurrentClk) && (sizeof(MVOP_FREQUENCY) == u32ParaSize))
8228 {
8229 *(MVOP_FREQUENCY*)pPara = (MVOP_FREQUENCY)HAL_MVOP_GetCurrentClk();
8230 }
8231 else
8232 {
8233 eRet = E_MVOP_INVALID_PARAM;
8234 }
8235 break;
8236 case E_MVOP_CMD_GET_BASE_ADD_MULTI_VIEW:
8237 #if ENABLE_3D_LR_MODE
8238 if (HAL_MVOP_GetYBaseAddMultiView && HAL_MVOP_GetUVBaseAddMultiView && (sizeof(MVOP_BaseAddInput) == u32ParaSize))
8239 {
8240 if (pPara)
8241 {
8242 MVOP_BaseAddInput *pBaseAddInfo = (MVOP_BaseAddInput *)pPara;
8243 pBaseAddInfo->u32YOffset = (MS_PHY)HAL_MVOP_GetYBaseAddMultiView(pBaseAddInfo->eView);
8244 pBaseAddInfo->u32UVOffset = (MS_PHY)HAL_MVOP_GetUVBaseAddMultiView(pBaseAddInfo->eView);
8245 }
8246 }
8247 else
8248 #endif
8249 {
8250 eRet = E_MVOP_INVALID_PARAM;
8251 }
8252 break;
8253 case E_MVOP_CMD_GET_TOP_FIELD_IMAGE_VSTART:
8254 if ((HAL_MVOP_GetTopVStart) && (sizeof(MS_U16) == u32ParaSize))
8255 {
8256 *(MS_U16*)pPara = HAL_MVOP_GetTopVStart(eDevID);
8257 }
8258 else
8259 {
8260 eRet = E_MVOP_INVALID_PARAM;
8261 }
8262 break;
8263 case E_MVOP_CMD_GET_BOTTOM_FIELD_IMAGE_VSTART:
8264 if ((HAL_MVOP_GetBottomVStart) && (sizeof(MS_U16) == u32ParaSize))
8265 {
8266 *(MS_U16*)pPara = HAL_MVOP_GetBottomVStart(eDevID);
8267 }
8268 else
8269 {
8270 eRet = E_MVOP_INVALID_PARAM;
8271 }
8272 break;
8273 case E_MVOP_CMD_GET_VCOUNT:
8274 if ((HAL_MVOP_GetVCount) && (sizeof(MS_U16) == u32ParaSize))
8275 {
8276 *(MS_U16*)pPara = HAL_MVOP_GetVCount(eDevID);
8277 }
8278 else
8279 {
8280 eRet = E_MVOP_INVALID_PARAM;
8281 }
8282 break;
8283 case E_MVOP_CMD_GET_HANDSHAKE_MODE:
8284 if ((HAL_MVOP_GetHandShakeMode) && (sizeof(MVOP_HSMode) == u32ParaSize))
8285 {
8286 *(MVOP_HSMode*)pPara = HAL_MVOP_GetHandShakeMode(eDevID);
8287 }
8288 else
8289 {
8290 eRet = E_MVOP_INVALID_PARAM;
8291 }
8292 break;
8293 case E_MVOP_CMD_GET_MAX_FPS:
8294 if ((HAL_MVOP_GetMaxFramerate) && (sizeof(MVOP_GetMaxFps) == u32ParaSize))
8295 {
8296 HAL_MVOP_GetMaxFramerate(eDevID, (MVOP_GetMaxFps*)pPara);
8297 }
8298 else
8299 {
8300 eRet = E_MVOP_INVALID_PARAM;
8301 }
8302 break;
8303 #if 1
8304 case E_MVOP_CMD_GET_INPUT:
8305 pstDrvCtrl = MVOP_GetDrvCtrl(E_MVOP_DEV_0);
8306 if(pstDrvCtrl)
8307 {
8308 *(MVOP_InputSel*)pPara = pstDrvCtrl->_eInputSel;
8309 eRet = E_MVOP_OK;
8310 }
8311 else
8312 {
8313 eRet = E_MVOP_FAIL;
8314 }
8315 break;
8316 case E_MVOP_CMD_GET_SUB_INPUT:
8317 pstDrvCtrl = MVOP_GetSubDrvCtrl(E_MVOP_DEV_1);
8318 if(pstDrvCtrl)
8319 {
8320 *(MVOP_InputSel*)pPara = pstDrvCtrl->_eInputSel;
8321 eRet = E_MVOP_OK;
8322 }
8323 else
8324 {
8325 eRet = E_MVOP_FAIL;
8326 }
8327 break;
8328 #endif
8329
8330
8331 case E_MVOP_CMD_GET_CROP_FOR_XC:
8332 {
8333 MVOP_DBG(MVOP_PRINTF("\n %s.\n", __FUNCTION__);)
8334 MVOP_XCGetCrop* stCropInfo;
8335 stCropInfo = (MVOP_XCGetCrop*)pPara;
8336
8337 if (HAL_MVOP_SetCropforXC)
8338 {
8339 HAL_MVOP_SetCropforXC(eDevID, stCropInfo, p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16Width,
8340 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16Height);
8341 }
8342 else
8343 {
8344 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
8345 eRet = E_MVOP_FAIL;
8346 }
8347 break;
8348 }
8349 #ifdef UFO_MVOP_GET_IS_SW_CROP
8350 case E_MVOP_CMD_GET_MVOP_SW_CROP_ADD:
8351 {
8352 MVOP_DBG(MVOP_PRINTF("\n %s.\n", __FUNCTION__);)
8353 MVOP_XCGetCropMirAdd* stADDInfo;
8354 stADDInfo = (MVOP_XCGetCropMirAdd*)pPara;
8355
8356 if (HAL_MVOP_GetCropAddbySW)
8357 {
8358 HAL_MVOP_GetCropAddbySW(eDevID, stADDInfo);
8359 }
8360 else
8361 {
8362 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
8363 eRet = E_MVOP_FAIL;
8364 }
8365 break;
8366
8367 }
8368 case E_MVOP_CMD_GET_IS_SW_CROP:
8369 {
8370 if ((HAL_MVOP_GetIsSWCrop) && (sizeof(MS_BOOL) == u32ParaSize))
8371 {
8372 *(MS_BOOL*)pPara = HAL_MVOP_GetIsSWCrop();
8373 }
8374 else
8375 {
8376 eRet = E_MVOP_INVALID_PARAM;
8377 }
8378 break;
8379
8380 }
8381 #endif
8382 #ifdef UFO_MVOP_GET_HV_RATIO
8383 case E_MVOP_CMD_GET_OUTPUT_HV_RATIO:
8384 {
8385 MVOP_OutputHVRatio* stRatio;
8386 stRatio = (MVOP_OutputHVRatio*)pPara;
8387 switch(eDevID)
8388 {
8389 case E_MVOP_DEV_0:
8390 {
8391 stRatio->fHratio = (float)(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16Width) /
8392 (float)(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopOutputCfg.u16HorSize);
8393 stRatio->fVratio = (float)(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming.u16Height) /
8394 (float)(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopOutputCfg.u16VerSize);
8395 }
8396 MVOP_DBG(MVOP_PRINTF("[MVOP][Debug] H rat = %f, V rat = %f \n",stRatio->fHratio, stRatio->fVratio);)
8397 break;
8398 case E_MVOP_DEV_1:
8399 {
8400 stRatio->fHratio = (float)(p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopTiming.u16Width) /
8401 (float)(p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopOutputCfg.u16HorSize);
8402 stRatio->fVratio = (float)(p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopTiming.u16Height) /
8403 (float)(p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopOutputCfg.u16VerSize);
8404 }
8405 MVOP_DBG(MVOP_PRINTF("[MVOP][Debug] H rat = %f, V rat = %f \n",stRatio->fHratio, stRatio->fVratio);)
8406 break;
8407 default:
8408 break;
8409 }
8410
8411 }
8412 break;
8413 #endif
8414 #if defined(STB_DC_MODE)||(STB_DC)
8415 case E_MVOP_CMD_GET_IS_XC_GEN_TIMING:
8416 if ((HAL_MVOP_GetIsCurrentXCGenTiming) && (sizeof(MS_BOOL) == u32ParaSize))
8417 {
8418 *(MS_BOOL*)pPara = HAL_MVOP_GetIsCurrentXCGenTiming(eDevID);
8419 }
8420 else
8421 {
8422 eRet = E_MVOP_INVALID_PARAM;
8423 }
8424 break;
8425 #endif
8426 #ifdef UFO_MVOP_GET_IS_MVOP_AUTO_GEN_BLACK
8427 case E_MVOP_CMD_GET_IS_MVOP_AUTO_GEN_BLACK:
8428 if ((HAL_MVOP_GetIsMVOPSupportBLKBackground) && (sizeof(MS_BOOL) == u32ParaSize))
8429 {
8430 *(MS_BOOL*)pPara = HAL_MVOP_GetIsMVOPSupportBLKBackground(eDevID);
8431 }
8432 else
8433 {
8434 eRet = E_MVOP_INVALID_PARAM;
8435 }
8436 break;
8437 #endif
8438
8439 case E_MVOP_CMD_GET_TYPE:
8440 break;
8441 default:
8442 {
8443 MVOP_DBG(MVOP_PRINTF("\n %s not support this cmd 0x%x!! \n", __FUNCTION__, eCmd);)
8444 eRet = E_MVOP_INVALID_PARAM;
8445 }
8446 break;
8447 }
8448
8449 _DRV_MVOP_Return(eDevID, eRet);
8450 }
8451
MDrv_MVOP_GetCommand(MVOP_Handle * stHd,MVOP_Command eCmd,void * pPara,MS_U32 u32ParaSize)8452 MVOP_Result MDrv_MVOP_GetCommand(MVOP_Handle* stHd, MVOP_Command eCmd, void* pPara, MS_U32 u32ParaSize)
8453 {
8454 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:0x%x \n", __FUNCTION__, __LINE__, eCmd);)
8455 #if ENABLE_UTOPIA2_INTERFACE
8456 stMVOP_GET_COMMAND IO_arg;
8457 IO_arg.stHd = stHd;
8458 IO_arg.eCmd = eCmd;
8459 IO_arg.pPara = pPara;
8460 IO_arg.u32ParaSize = u32ParaSize;
8461 IO_arg.eRet = E_MVOP_FAIL;
8462
8463 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
8464 {
8465 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
8466 return IO_arg.eRet;
8467 }
8468
8469 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_GET_COMMAND, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
8470 {
8471 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
8472 return IO_arg.eRet;
8473 }
8474 return IO_arg.eRet;
8475 #else
8476 void* pInstance = NULL;
8477 return (MDrv_MVOP_GetCommand_V2(pInstance, stHd, eCmd, pPara, u32ParaSize));
8478 #endif
8479 }
8480
8481
8482 //=============================================================================
8483 // The 3rd MVOP
8484 // Chips that support three MVOP modules: Agate.
8485
8486 //-----------------------------------------------------------------------------
8487 /// Get status of MVOP driver
8488 /// @param -pstatus: driver status
8489 /// @return - TRUE / FALSE
8490 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_GetStatus_V2(void * pInstance,MVOP_DevID eID,MVOP_DrvStatus * pMVOPStat)8491 MS_BOOL MDrv_MVOP_EX_GetStatus_V2(void* pInstance, MVOP_DevID eID, MVOP_DrvStatus *pMVOPStat)
8492 {
8493 return MVOP_GetStatus(eID, pMVOPStat);
8494 }
8495
MDrv_MVOP_EX_GetStatus(MVOP_DevID eID,MVOP_DrvStatus * pMVOPStat)8496 MS_BOOL MDrv_MVOP_EX_GetStatus(MVOP_DevID eID, MVOP_DrvStatus *pMVOPStat)
8497 {
8498 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
8499 return MVOP_GetStatus(eID, pMVOPStat);
8500 }
8501
8502 //-----------------------------------------------------------------------------
8503 /// Get distance from HSync to DE for Scaler, unit: mvop clock cycle
8504 /// @return HStart
8505 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_GetHStart_V2(void * pInstance,MVOP_DevID eID)8506 MS_U16 MDrv_MVOP_EX_GetHStart_V2(void* pInstance, MVOP_DevID eID)
8507 {
8508 MS_U16 u16HStart = 0;
8509 if (p_gDrvMVOPCtx == NULL)
8510 {
8511 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
8512 return 0;
8513 }
8514
8515 MVOP_DrvCtrlSt* pstDrvCtrl = MVOP_GetDrvCtrl(eID);
8516 u16HStart = (pstDrvCtrl) ? ((pstDrvCtrl->_mvopTiming.u16HActive_Start)/2 + 2) : 0;
8517
8518 return u16HStart;
8519 }
8520
MDrv_MVOP_EX_GetHStart(MVOP_DevID eID)8521 MS_U16 MDrv_MVOP_EX_GetHStart(MVOP_DevID eID)
8522 {
8523 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
8524 if (p_gDrvMVOPCtx == NULL)
8525 {
8526 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
8527 return 0;
8528 }
8529
8530 MVOP_DrvCtrlSt* pstDrvCtrl = MVOP_GetDrvCtrl(eID);
8531 MS_U16 u16HStart = (pstDrvCtrl) ? ((pstDrvCtrl->_mvopTiming.u16HActive_Start)/2 + 2) : 0;
8532 return u16HStart;
8533 }
8534
8535 //-----------------------------------------------------------------------------
8536 /// Get distance from HSync to DE for Scaler, unit: mvop clock cycle
8537 /// @return VStart
8538 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_GetVStart_V2(void * pInstance,MVOP_DevID eID)8539 MS_U16 MDrv_MVOP_EX_GetVStart_V2(void* pInstance, MVOP_DevID eID)
8540 {
8541 if (p_gDrvMVOPCtx == NULL)
8542 {
8543 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
8544 return 0;
8545 }
8546
8547 MVOP_DrvCtrlSt* pstDrvCtrl = MVOP_GetDrvCtrl(eID);
8548 MVOP_Timing* pstTiming = NULL;
8549 MS_U16 u16Vst = 0;
8550 if (pstDrvCtrl)
8551 {
8552 pstTiming = &pstDrvCtrl->_mvopTiming;
8553 u16Vst = pstTiming->u16VBlank0_End - pstTiming->u16TopField_VS;
8554 if (pstTiming->bInterlace==1)
8555 {
8556 u16Vst*=2;
8557 u16Vst-=18;
8558 }
8559 else
8560 {
8561 u16Vst-=5;
8562 }
8563 }
8564 return u16Vst;
8565 }
8566
MDrv_MVOP_EX_GetVStart(MVOP_DevID eID)8567 MS_U16 MDrv_MVOP_EX_GetVStart(MVOP_DevID eID)
8568 {
8569 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
8570 if (p_gDrvMVOPCtx == NULL)
8571 {
8572 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
8573 return 0;
8574 }
8575
8576 MVOP_DrvCtrlSt* pstDrvCtrl = MVOP_GetDrvCtrl(eID);
8577 MVOP_Timing* pstTiming = NULL;
8578 MS_U16 u16Vst = 0;
8579 if (pstDrvCtrl)
8580 {
8581 pstTiming = &pstDrvCtrl->_mvopTiming;
8582 u16Vst = pstTiming->u16VBlank0_End - pstTiming->u16TopField_VS;
8583 if (pstTiming->bInterlace==1)
8584 {
8585 u16Vst*=2;
8586 u16Vst-=18;
8587 }
8588 else
8589 {
8590 u16Vst-=5;
8591 }
8592 }
8593 return u16Vst;
8594 }
8595
8596 //-----------------------------------------------------------------------------
8597 // Set MVOP clock enable
8598 // @param bEnable \b IN
8599 // - # TRUE Enable clock
8600 // - # FALSE Close clock
8601 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_SetClk_V2(void * pInstance,MVOP_DevID eID,MS_BOOL bEnable)8602 void MDrv_MVOP_EX_SetClk_V2(void* pInstance, MVOP_DevID eID, MS_BOOL bEnable)
8603 {
8604 HAL_MVOP_EX_SetDCClk(eID, 0, bEnable); //Clk DC0
8605 HAL_MVOP_EX_SetDCClk(eID, 1, bEnable); //Clk DC1
8606 }
8607
MDrv_MVOP_EX_SetClk(MVOP_DevID eID,MS_BOOL bEnable)8608 static void MDrv_MVOP_EX_SetClk(MVOP_DevID eID, MS_BOOL bEnable)
8609 {
8610 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
8611 HAL_MVOP_EX_SetDCClk(eID, 0, bEnable); //Clk DC0
8612 HAL_MVOP_EX_SetDCClk(eID, 1, bEnable); //Clk DC1
8613 }
8614
8615 //-----------------------------------------------------------------------------
8616 /// Set MVOP test pattern.
8617 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_SetPattern_V2(void * pInstance,MVOP_DevID eID,MVOP_Pattern enMVOPPattern)8618 MVOP_Result MDrv_MVOP_EX_SetPattern_V2(void* pInstance, MVOP_DevID eID, MVOP_Pattern enMVOPPattern)
8619 {
8620 static MVOP_Pattern s_enMVOPPattern = MVOP_PATTERN_NORMAL;
8621 if (p_gDrvMVOPCtx == NULL)
8622 {
8623 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
8624 return E_MVOP_FAIL;
8625 }
8626
8627 MVOP_EX_CheckIsInit(eID);
8628 if(enMVOPPattern == MVOP_PATTERN_DEFAULT)
8629 {
8630 enMVOPPattern = (MVOP_Pattern)(((MS_U32)(s_enMVOPPattern) + 1) % (MS_U32)MVOP_PATTERN_DEFAULT);
8631 }
8632 HAL_MVOP_EX_SetPattern(eID, enMVOPPattern);
8633 s_enMVOPPattern = enMVOPPattern;
8634 return E_MVOP_OK;
8635 }
8636
MDrv_MVOP_EX_SetPattern(MVOP_DevID eID,MVOP_Pattern enMVOPPattern)8637 MVOP_Result MDrv_MVOP_EX_SetPattern(MVOP_DevID eID, MVOP_Pattern enMVOPPattern)
8638 {
8639 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
8640 static MVOP_Pattern s_enMVOPPattern = MVOP_PATTERN_NORMAL;
8641 if (p_gDrvMVOPCtx == NULL)
8642 {
8643 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
8644 return E_MVOP_FAIL;
8645 }
8646
8647 MVOP_EX_CheckIsInit(eID);
8648 if(enMVOPPattern == MVOP_PATTERN_DEFAULT)
8649 {
8650 enMVOPPattern = (MVOP_Pattern)(((int)(s_enMVOPPattern) + 1) % (int)MVOP_PATTERN_DEFAULT);
8651 }
8652 HAL_MVOP_EX_SetPattern(eID, enMVOPPattern);
8653 s_enMVOPPattern = enMVOPPattern;
8654 return E_MVOP_OK;
8655 }
8656
8657 //-----------------------------------------------------------------------------
8658 /// Configure the tile format of the MVOP input.
8659 /// @return TRUE or FALSE
8660 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_SetTileFormat_V2(void * pInstance,MVOP_DevID eID,MVOP_TileFormat eTileFmt)8661 MVOP_Result MDrv_MVOP_EX_SetTileFormat_V2(void* pInstance, MVOP_DevID eID, MVOP_TileFormat eTileFmt)
8662 {
8663 MVOP_Result eRet = E_MVOP_FAIL;
8664 if (p_gDrvMVOPCtx == NULL)
8665 {
8666 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
8667 return E_MVOP_FAIL;
8668 }
8669
8670 MVOP_EX_CheckIsInit(eID);
8671 if ((eTileFmt != E_MVOP_TILE_8x32) && (eTileFmt != E_MVOP_TILE_16x32))
8672 {
8673 return E_MVOP_INVALID_PARAM;
8674 }
8675 if (TRUE == HAL_MVOP_EX_SetTileFormat(eID, eTileFmt))
8676 {
8677 eRet = E_MVOP_OK;
8678 }
8679 return eRet;
8680 }
8681
MDrv_MVOP_EX_SetTileFormat(MVOP_DevID eID,MVOP_TileFormat eTileFmt)8682 MVOP_Result MDrv_MVOP_EX_SetTileFormat(MVOP_DevID eID, MVOP_TileFormat eTileFmt)
8683 {
8684 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
8685 MVOP_Result eRet = E_MVOP_FAIL;
8686 if (p_gDrvMVOPCtx == NULL)
8687 {
8688 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
8689 return E_MVOP_FAIL;
8690 }
8691
8692 MVOP_EX_CheckIsInit(eID);
8693 if ((eTileFmt != E_MVOP_TILE_8x32) && (eTileFmt != E_MVOP_TILE_16x32))
8694 {
8695 return E_MVOP_INVALID_PARAM;
8696 }
8697 if (TRUE == HAL_MVOP_EX_SetTileFormat(eID, eTileFmt))
8698 {
8699 eRet = E_MVOP_OK;
8700 }
8701 return eRet;
8702 }
8703
8704
8705 //-----------------------------------------------------------------------------
8706 /// Set MMIO Base for MVOP.
8707 /// @return TRUE or FALSE
8708 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_SetMMIOMapBase_V2(void * pInstance,MVOP_DevID eID)8709 MS_BOOL MDrv_MVOP_EX_SetMMIOMapBase_V2(void* pInstance, MVOP_DevID eID)
8710 {
8711 return MVOP_SetRegBaseAdd(HAL_MVOP_EX_RegSetBase);
8712 }
8713
MDrv_MVOP_EX_SetMMIOMapBase(MVOP_DevID eID)8714 MS_BOOL MDrv_MVOP_EX_SetMMIOMapBase(MVOP_DevID eID)
8715 {
8716 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
8717 return MVOP_SetRegBaseAdd(HAL_MVOP_EX_RegSetBase);
8718 }
8719 //-----------------------------------------------------------------------------
8720 /// Initialize MVOP hardware and set it to hardwire mode
8721 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_Init_V2(void * pInstance,MVOP_DevID eID,MS_U32 u32InitParam)8722 MVOP_Result MDrv_MVOP_EX_Init_V2(void* pInstance, MVOP_DevID eID, MS_U32 u32InitParam)
8723 {
8724
8725 if (eID >= HAL_MVOP_MODULE_CNT)
8726 {
8727 return E_MVOP_INVALID_PARAM;
8728 }
8729
8730 MVOP_DrvInitCtxResults eRet;
8731 MS_BOOL pbFirstDrvInstant;
8732 eRet = _MVOP_Init_Context(&pbFirstDrvInstant);
8733 if(eRet == E_MVOP_INIT_FAIL)
8734 {
8735 MVOP_DBG(MVOP_PRINTF("MVOP_Init_Context FAILED!\n");)
8736 return E_MVOP_FAIL;
8737 }
8738 else if(eRet == E_MVOP_INIT_ALREADY_EXIST)
8739 {
8740 if(MDrv_MVOP_SetMMIOMapBase() == FALSE)
8741 {
8742 return E_MVOP_FAIL;
8743 }
8744 HAL_MVOP_Init();
8745 return E_MVOP_OK;
8746 }
8747
8748 _MVOP_InitVar(eID);
8749
8750 if (MDrv_MVOP_EX_SetMMIOMapBase(eID) == FALSE)
8751 {
8752 return E_MVOP_FAIL;
8753 }
8754
8755 if (HAL_MVOP_EX_Init)
8756 {
8757 if (HAL_MVOP_EX_Init(eID) == FALSE)
8758 {
8759 return E_MVOP_FAIL;
8760 }
8761 }
8762 else
8763 {
8764 return E_MVOP_FAIL;
8765 }
8766
8767 HAL_MVOP_EX_SetInputMode(eID, VOPINPUT_HARDWIRE, NULL);
8768
8769 // Set fld inv & ofld_inv
8770 HAL_MVOP_EX_SetFieldInverse(eID, ENABLE, ENABLE);
8771
8772 // Set Croma weighting off
8773 HAL_MVOP_EX_SetChromaWeighting(eID, ENABLE);
8774 #if ENABLE_3D_LR_MODE
8775 HAL_MVOP_EX_Enable3DLR(eID, DISABLE);
8776 #endif
8777 MDrv_MVOP_EX_SetClk(eID, TRUE);
8778 MDrv_MVOP_EX_EnableFreerunMode(eID, FALSE);
8779 HAL_MVOP_EX_EnableMVDInterface(eID, FALSE);
8780 HAL_MVOP_EX_LoadReg(eID);
8781
8782 p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._stMVOPDrvStat.bIsInit = TRUE;
8783 return E_MVOP_OK;
8784 }
8785
MDrv_MVOP_EX_Init(MVOP_DevID eID,MS_U32 u32InitParam)8786 MVOP_Result MDrv_MVOP_EX_Init(MVOP_DevID eID, MS_U32 u32InitParam)
8787 {
8788 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
8789 if (eID >= HAL_MVOP_MODULE_CNT)
8790 {
8791 return E_MVOP_INVALID_PARAM;
8792 }
8793
8794 MVOP_DrvInitCtxResults eRet;
8795 MS_BOOL pbFirstDrvInstant;
8796 eRet = _MVOP_Init_Context(&pbFirstDrvInstant);
8797 if(eRet == E_MVOP_INIT_FAIL)
8798 {
8799 MVOP_DBG(MVOP_PRINTF("MVOP_Init_Context FAILED!\n");)
8800 return E_MVOP_FAIL;
8801 }
8802 else if(eRet == E_MVOP_INIT_ALREADY_EXIST)
8803 {
8804 if(MDrv_MVOP_SetMMIOMapBase() == FALSE)
8805 {
8806 return E_MVOP_FAIL;
8807 }
8808 HAL_MVOP_Init();
8809 return E_MVOP_OK;
8810 }
8811
8812 _MVOP_InitVar(eID);
8813
8814 if (MDrv_MVOP_EX_SetMMIOMapBase(eID) == FALSE)
8815 {
8816 return E_MVOP_FAIL;
8817 }
8818
8819 if (HAL_MVOP_EX_Init)
8820 {
8821 if (HAL_MVOP_EX_Init(eID) == FALSE)
8822 {
8823 return E_MVOP_FAIL;
8824 }
8825 }
8826 else
8827 {
8828 return E_MVOP_FAIL;
8829 }
8830
8831 HAL_MVOP_EX_SetInputMode(eID, VOPINPUT_HARDWIRE, NULL);
8832
8833 // Set fld inv & ofld_inv
8834 HAL_MVOP_EX_SetFieldInverse(eID, ENABLE, ENABLE);
8835
8836 // Set Croma weighting off
8837 HAL_MVOP_EX_SetChromaWeighting(eID, ENABLE);
8838 #if ENABLE_3D_LR_MODE
8839 HAL_MVOP_EX_Enable3DLR(eID, DISABLE);
8840 #endif
8841 MDrv_MVOP_EX_SetClk(eID, TRUE);
8842 MDrv_MVOP_EX_EnableFreerunMode(eID, FALSE);
8843 HAL_MVOP_EX_EnableMVDInterface(eID, FALSE);
8844 HAL_MVOP_EX_LoadReg(eID);
8845
8846 p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._stMVOPDrvStat.bIsInit = TRUE;
8847 return E_MVOP_OK;
8848 }
8849
8850 //-----------------------------------------------------------------------------
8851 /// Exit MVOP, turn off clock
8852 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_Exit_V2(void * pInstance,MVOP_DevID eID,MS_U32 u32ExitParam)8853 MVOP_Result MDrv_MVOP_EX_Exit_V2(void* pInstance, MVOP_DevID eID, MS_U32 u32ExitParam)
8854 {
8855 MVOP_Result eRet = E_MVOP_FAIL;
8856 if (p_gDrvMVOPCtx == NULL)
8857 {
8858 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
8859 return eRet;
8860 }
8861 if (MVOP_EX_IsInit(eID))
8862 {
8863 MDrv_MVOP_EX_SetClk(eID, FALSE);
8864 eRet = E_MVOP_OK;
8865 }
8866
8867 return eRet;
8868 }
8869
MDrv_MVOP_EX_Exit(MVOP_DevID eID,MS_U32 u32ExitParam)8870 MVOP_Result MDrv_MVOP_EX_Exit(MVOP_DevID eID, MS_U32 u32ExitParam)
8871 {
8872 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
8873 MVOP_Result eRet = E_MVOP_FAIL;
8874 if (p_gDrvMVOPCtx == NULL)
8875 {
8876 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
8877 return eRet;
8878 }
8879 if (MVOP_EX_IsInit(eID))
8880 {
8881 MDrv_MVOP_EX_SetClk(eID, FALSE);
8882 eRet = E_MVOP_OK;
8883 }
8884
8885 return eRet;
8886 }
8887
8888 //-----------------------------------------------------------------------------
8889 /// Enable and Disable MVOP
8890 /// @param bEnable \b IN
8891 /// - # TRUE Enable
8892 /// - # FALSE Disable and reset
8893 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_Enable_V2(void * pInstance,MVOP_DevID eID,MS_BOOL bEnable)8894 MVOP_Result MDrv_MVOP_EX_Enable_V2(void* pInstance, MVOP_DevID eID, MS_BOOL bEnable)
8895 {
8896 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
8897 if (p_gDrvMVOPCtx == NULL)
8898 {
8899 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
8900 return E_MVOP_FAIL;
8901 }
8902 MVOP_EX_CheckIsInit(eID);
8903
8904 HAL_MVOP_EX_SetMIUReqMask(eID, TRUE);
8905 HAL_MVOP_EX_Enable(eID, bEnable);
8906 HAL_MVOP_EX_SetMIUReqMask(eID, FALSE);
8907
8908 p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._stMVOPDrvStat.bIsEnable = bEnable;
8909 return E_MVOP_OK;
8910 }
8911
MDrv_MVOP_EX_Enable(MVOP_DevID eID,MS_BOOL bEnable)8912 MVOP_Result MDrv_MVOP_EX_Enable(MVOP_DevID eID, MS_BOOL bEnable)
8913 {
8914 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
8915 if (p_gDrvMVOPCtx == NULL)
8916 {
8917 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
8918 return E_MVOP_FAIL;
8919 }
8920 MVOP_EX_CheckIsInit(eID);
8921
8922 HAL_MVOP_EX_SetMIUReqMask(eID, TRUE);
8923 HAL_MVOP_EX_Enable(eID, bEnable);
8924 HAL_MVOP_EX_SetMIUReqMask(eID, FALSE);
8925
8926 p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._stMVOPDrvStat.bIsEnable = bEnable;
8927 return E_MVOP_OK;
8928 }
8929
8930
8931 //-----------------------------------------------------------------------------
8932 /// Get if MVOP is enable or not.
8933 /// @param pbEnable \b OUT
8934 /// - # TRUE Enable
8935 /// - # FALSE Disable
8936 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_GetIsEnable_V2(void * pInstance,MVOP_DevID eID,MS_BOOL * pbEnable)8937 MVOP_Result MDrv_MVOP_EX_GetIsEnable_V2(void * pInstance, MVOP_DevID eID, MS_BOOL * pbEnable)
8938 {
8939 if (p_gDrvMVOPCtx == NULL)
8940 {
8941 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
8942 return E_MVOP_FAIL;
8943 }
8944 if ((NULL == pbEnable) || (TRUE != MVOP_EX_IsInit(eID)))
8945 {
8946 return E_MVOP_FAIL;
8947 }
8948
8949 *pbEnable = HAL_MVOP_EX_GetEnableState(eID);
8950 return E_MVOP_OK;
8951 }
8952
MDrv_MVOP_EX_GetIsEnable(MVOP_DevID eID,MS_BOOL * pbEnable)8953 MVOP_Result MDrv_MVOP_EX_GetIsEnable (MVOP_DevID eID, MS_BOOL* pbEnable)
8954 {
8955 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
8956 if (p_gDrvMVOPCtx == NULL)
8957 {
8958 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
8959 return E_MVOP_FAIL;
8960 }
8961 if ((NULL == pbEnable) || (TRUE != MVOP_EX_IsInit(eID)))
8962 {
8963 return E_MVOP_FAIL;
8964 }
8965
8966 *pbEnable = HAL_MVOP_EX_GetEnableState(eID);
8967 return E_MVOP_OK;
8968 }
8969
8970 //-----------------------------------------------------------------------------
8971 /// Set enable UVShift
8972 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_EnableUVShift_V2(void * pInstance,MVOP_DevID eID,MS_BOOL bEnable)8973 MVOP_Result MDrv_MVOP_EX_EnableUVShift_V2(void* pInstance, MVOP_DevID eID, MS_BOOL bEnable)
8974 {
8975 if (p_gDrvMVOPCtx == NULL)
8976 {
8977 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
8978 return E_MVOP_FAIL;
8979 }
8980 MVOP_EX_CheckIsInit(eID);
8981 HAL_MVOP_EX_EnableUVShift(eID, bEnable);
8982
8983 p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._stMVOPDrvStat.bIsUVShift = bEnable;
8984 return E_MVOP_OK;
8985 }
8986
MDrv_MVOP_EX_EnableUVShift(MVOP_DevID eID,MS_BOOL bEnable)8987 MVOP_Result MDrv_MVOP_EX_EnableUVShift(MVOP_DevID eID, MS_BOOL bEnable)
8988 {
8989 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
8990 if (p_gDrvMVOPCtx == NULL)
8991 {
8992 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
8993 return E_MVOP_FAIL;
8994 }
8995 MVOP_EX_CheckIsInit(eID);
8996 HAL_MVOP_EX_EnableUVShift(eID, bEnable);
8997
8998 p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._stMVOPDrvStat.bIsUVShift = bEnable;
8999 return E_MVOP_OK;
9000 }
9001
9002 //-----------------------------------------------------------------------------
9003 /// Set enable black background
9004 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_EnableBlackBG_V2(void * pInstance,MVOP_DevID eID)9005 MVOP_Result MDrv_MVOP_EX_EnableBlackBG_V2(void* pInstance, MVOP_DevID eID)
9006 {
9007 if (p_gDrvMVOPCtx == NULL)
9008 {
9009 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9010 return E_MVOP_FAIL;
9011 }
9012 MVOP_EX_CheckIsInit(eID);
9013 HAL_MVOP_EX_SetBlackBG(eID);
9014 p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._stMVOPDrvStat.bIsBlackBG = TRUE;
9015 return E_MVOP_OK;
9016 }
9017
MDrv_MVOP_EX_EnableBlackBG(MVOP_DevID eID)9018 MVOP_Result MDrv_MVOP_EX_EnableBlackBG (MVOP_DevID eID)
9019 {
9020 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
9021 if (p_gDrvMVOPCtx == NULL)
9022 {
9023 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9024 return E_MVOP_FAIL;
9025 }
9026 MVOP_EX_CheckIsInit(eID);
9027 HAL_MVOP_EX_SetBlackBG(eID);
9028 p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._stMVOPDrvStat.bIsBlackBG = TRUE;
9029 return E_MVOP_OK;
9030 }
9031
9032
9033 //-----------------------------------------------------------------------------
9034 /// MVOP mono mode (fix chroma value)
9035 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_SetMonoMode_V2(void * pInstance,MVOP_DevID eID,MS_BOOL bEnable)9036 MVOP_Result MDrv_MVOP_EX_SetMonoMode_V2(void* pInstance, MVOP_DevID eID, MS_BOOL bEnable)
9037 {
9038 if (p_gDrvMVOPCtx == NULL)
9039 {
9040 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9041 return E_MVOP_FAIL;
9042 }
9043 MVOP_EX_CheckIsInit(eID);
9044 HAL_MVOP_EX_SetMonoMode(eID, bEnable);
9045
9046 p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._stMVOPDrvStat.bIsMonoMode = bEnable;
9047 return E_MVOP_OK;
9048 }
9049
MDrv_MVOP_EX_SetMonoMode(MVOP_DevID eID,MS_BOOL bEnable)9050 MVOP_Result MDrv_MVOP_EX_SetMonoMode(MVOP_DevID eID, MS_BOOL bEnable)
9051 {
9052 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
9053 if (p_gDrvMVOPCtx == NULL)
9054 {
9055 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9056 return E_MVOP_FAIL;
9057 }
9058 MVOP_EX_CheckIsInit(eID);
9059 HAL_MVOP_EX_SetMonoMode(eID, bEnable);
9060
9061 p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._stMVOPDrvStat.bIsMonoMode = bEnable;
9062 return E_MVOP_OK;
9063 }
9064 //-----------------------------------------------------------------------------
9065 /// Configure MVOP input.
9066 /// @return MVOP_Result
9067 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_SetInputCfg_V2(void * pInstance,MVOP_DevID eID,MVOP_InputSel in,MVOP_InputCfg * pCfg)9068 MVOP_Result MDrv_MVOP_EX_SetInputCfg_V2(void * pInstance, MVOP_DevID eID, MVOP_InputSel in, MVOP_InputCfg * pCfg)
9069 {
9070 MVOP_Result bRet = E_MVOP_OK;
9071
9072 if (p_gDrvMVOPCtx == NULL)
9073 {
9074 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9075 return E_MVOP_FAIL;
9076 }
9077 if (!MVOP_EX_IsInit(eID))
9078 {
9079 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
9080 return E_MVOP_FAIL;
9081 }
9082
9083 switch (in)
9084 {
9085 case MVOP_INPUT_DRAM:
9086 if (!pCfg)
9087 {
9088 return E_MVOP_INVALID_PARAM;
9089 }
9090 HAL_MVOP_EX_SetInputMode(eID, VOPINPUT_MCUCTRL, pCfg);
9091 break;
9092
9093 #if ENABLE_3D_LR_MODE
9094 case MVOP_INPUT_HVD_3DLR:
9095 HAL_MVOP_EX_Enable3DLR(eID, ENABLE);
9096 //no break here to continue setting HVD hardwire mode
9097 #endif
9098 case MVOP_INPUT_H264:
9099 HAL_MVOP_EX_SetInputMode(eID, VOPINPUT_HARDWIRE, NULL);
9100 HAL_MVOP_EX_SetH264HardwireMode(eID);
9101 break;
9102
9103 #if ENABLE_3D_LR_MODE
9104 case MVOP_INPUT_MVD_3DLR:
9105 HAL_MVOP_EX_Enable3DLR(eID, ENABLE);
9106 //no break here to continue setting MVD hardwire mode
9107 #endif
9108 case MVOP_INPUT_MVD:
9109 HAL_MVOP_EX_EnableMVDInterface(eID, TRUE);
9110 HAL_MVOP_EX_SetInputMode(eID, VOPINPUT_HARDWIRE, NULL);
9111 break;
9112 case MVOP_INPUT_RVD:
9113 HAL_MVOP_EX_SetInputMode(eID, VOPINPUT_HARDWIRE, NULL);
9114 HAL_MVOP_EX_SetRMHardwireMode(eID);
9115 break;
9116 case MVOP_INPUT_CLIP:
9117 if (!pCfg)
9118 {
9119 return E_MVOP_INVALID_PARAM;
9120 }
9121 HAL_MVOP_EX_SetCropWindow(eID, pCfg);
9122 break;
9123 case MVOP_INPUT_JPD:
9124 HAL_MVOP_EX_SetInputMode(eID, VOPINPUT_HARDWIRE, NULL);
9125 HAL_MVOP_EX_SetJpegHardwireMode(eID);
9126 break;
9127 default:
9128 bRet = E_MVOP_INVALID_PARAM;
9129 break;
9130 }
9131
9132 return bRet;
9133 }
9134
MDrv_MVOP_EX_SetInputCfg(MVOP_DevID eID,MVOP_InputSel in,MVOP_InputCfg * pCfg)9135 MVOP_Result MDrv_MVOP_EX_SetInputCfg (MVOP_DevID eID, MVOP_InputSel in, MVOP_InputCfg* pCfg)
9136 {
9137 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
9138 MVOP_Result bRet = E_MVOP_OK;
9139
9140 if (p_gDrvMVOPCtx == NULL)
9141 {
9142 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9143 return E_MVOP_FAIL;
9144 }
9145 if (!MVOP_EX_IsInit(eID))
9146 {
9147 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
9148 return E_MVOP_FAIL;
9149 }
9150
9151 switch (in)
9152 {
9153 case MVOP_INPUT_DRAM:
9154 if (!pCfg)
9155 {
9156 return E_MVOP_INVALID_PARAM;
9157 }
9158 HAL_MVOP_EX_SetInputMode(eID, VOPINPUT_MCUCTRL, pCfg);
9159 break;
9160
9161 #if ENABLE_3D_LR_MODE
9162 case MVOP_INPUT_HVD_3DLR:
9163 HAL_MVOP_EX_Enable3DLR(eID, ENABLE);
9164 //no break here to continue setting HVD hardwire mode
9165 #endif
9166 case MVOP_INPUT_H264:
9167 HAL_MVOP_EX_SetInputMode(eID, VOPINPUT_HARDWIRE, NULL);
9168 HAL_MVOP_EX_SetH264HardwireMode(eID);
9169 break;
9170
9171 #if ENABLE_3D_LR_MODE
9172 case MVOP_INPUT_MVD_3DLR:
9173 HAL_MVOP_EX_Enable3DLR(eID, ENABLE);
9174 //no break here to continue setting MVD hardwire mode
9175 #endif
9176 case MVOP_INPUT_MVD:
9177 HAL_MVOP_EX_EnableMVDInterface(eID, TRUE);
9178 HAL_MVOP_EX_SetInputMode(eID, VOPINPUT_HARDWIRE, NULL);
9179 break;
9180 case MVOP_INPUT_RVD:
9181 HAL_MVOP_EX_SetInputMode(eID, VOPINPUT_HARDWIRE, NULL);
9182 HAL_MVOP_EX_SetRMHardwireMode(eID);
9183 break;
9184 case MVOP_INPUT_CLIP:
9185 if (!pCfg)
9186 {
9187 return E_MVOP_INVALID_PARAM;
9188 }
9189 HAL_MVOP_EX_SetCropWindow(eID, pCfg);
9190 break;
9191 case MVOP_INPUT_JPD:
9192 HAL_MVOP_EX_SetInputMode(eID, VOPINPUT_HARDWIRE, NULL);
9193 HAL_MVOP_EX_SetJpegHardwireMode(eID);
9194 break;
9195 default:
9196 bRet = E_MVOP_INVALID_PARAM;
9197 break;
9198 }
9199
9200 return bRet;
9201 }
9202
9203
9204 //-----------------------------------------------------------------------------
9205 /// Configure MVOP output.
9206 /// @return MVOP_Result
9207 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_SetOutputCfg_V2(void * pInstance,MVOP_DevID eID,MVOP_VidStat * pstVideoStatus,MS_BOOL bEnHDup)9208 MVOP_Result MDrv_MVOP_EX_SetOutputCfg_V2(void* pInstance, MVOP_DevID eID, MVOP_VidStat *pstVideoStatus, MS_BOOL bEnHDup)
9209 {
9210 MVOP_Timing* pstTiming = NULL;
9211
9212 if (p_gDrvMVOPCtx == NULL)
9213 {
9214 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9215 return E_MVOP_FAIL;
9216 }
9217
9218 if (!MVOP_EX_IsInit(eID))
9219 {
9220 MVOP_DBG(MVOP_PRINTF("%s: driver is not initialized!\n", __FUNCTION__);)
9221 return E_MVOP_FAIL;
9222 }
9223
9224 if (MVOP_CheckOutputCfg(pstVideoStatus) != TRUE)
9225 {
9226 MVOP_DBG(MVOP_PRINTF("%s: invalid parameter!\n", __FUNCTION__);)
9227 return E_MVOP_INVALID_PARAM;
9228 }
9229
9230 pstTiming = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._mvopTiming;
9231 MS_BOOL b3DTB = FALSE;
9232 EN_MVOP_Output_3D_TYPE en3DType = E_MVOP_OUTPUT_3D_NONE;
9233 #if ENABLE_3D_LR_MODE
9234 if(HAL_MVOP_EX_GetOutput3DType)
9235 {
9236 b3DTB = (HAL_MVOP_EX_GetOutput3DType(eID) == E_MVOP_OUTPUT_3D_TB);
9237 en3DType = HAL_MVOP_EX_GetOutput3DType(eID);
9238 }
9239 #endif
9240 MS_U32 MVOP_Clock = MVOP_CalculatePixClk(eID, pstTiming, pstVideoStatus, bEnHDup, en3DType);
9241 if (0 == MVOP_Clock)
9242 {
9243 MVOP_DBG(MVOP_PRINTF("%s: MVOP_Clock==0\n", __FUNCTION__);)
9244 return E_MVOP_FAIL;
9245 }
9246
9247 HALMVOPFREQUENCY eClkFreq = HAL_MVOP_EX_GetClk(MVOP_Clock);
9248 MVOP_EX_AutoGenTiming(eID, pstTiming, pstVideoStatus, eClkFreq, b3DTB);
9249
9250 HAL_MVOP_EX_SetOutputInterlace(eID, pstTiming->bInterlace);
9251 HAL_MVOP_EX_SetOutputTiming(eID, pstTiming);
9252 HAL_MVOP_EX_SetSynClk(eID, pstTiming, eClkFreq);
9253
9254 MS_U16 u16SrcHSize = p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._u16SrcHSize;
9255 if (u16SrcHSize != 0)
9256 {
9257 //report the source width for scaler, intead of the 16-aligned width
9258 //MS_U16 u16Discard_Width = 0;
9259 //u16Discard_Width = _u16SubSrcHSize.u16Width - _u16SubSrcHSize;
9260 MVOP_DBG(MVOP_PRINTF("%s: _mvopTiming.u16Width: %d ==> %d\n", __FUNCTION__,
9261 pstTiming->u16Width, u16SrcHSize);)
9262 pstTiming->u16Width = u16SrcHSize;
9263 #if 0 //for H-mirror ON
9264 if (_mvopTiming.u16HActive_Start > u16Discard_Width)
9265 {
9266 _mvopTiming.u16HActive_Start -= u16Discard_Width;
9267 }
9268 else
9269 {
9270 MVOP_PRINTF("Warning: u16HActive_Start(%d) <= u16Discard_Width(%d)\n",
9271 _mvopTiming.u16HActive_Start, u16Discard_Width);
9272 }
9273 if (_mvopTiming.u16HImg_Start > u16Discard_Width)
9274 {
9275 _mvopTiming.u16HImg_Start -= u16Discard_Width;
9276 }
9277 else
9278 {
9279 MVOP_PRINTF("Warning: u16HImg_Start(%d) <= u16Discard_Width(%d)\n",
9280 _mvopTiming.u16HImg_Start, u16Discard_Width);
9281 }
9282 #endif
9283 }
9284 MVOP_DumpOutputTiming(pstTiming);
9285 return E_MVOP_OK;
9286 }
9287
MDrv_MVOP_EX_SetOutputCfg(MVOP_DevID eID,MVOP_VidStat * pstVideoStatus,MS_BOOL bEnHDup)9288 MVOP_Result MDrv_MVOP_EX_SetOutputCfg(MVOP_DevID eID, MVOP_VidStat *pstVideoStatus, MS_BOOL bEnHDup)
9289 {
9290 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
9291 MVOP_Timing* pstTiming = NULL;
9292
9293 if (p_gDrvMVOPCtx == NULL)
9294 {
9295 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9296 return E_MVOP_FAIL;
9297 }
9298
9299 if (!MVOP_EX_IsInit(eID))
9300 {
9301 MVOP_DBG(MVOP_PRINTF("%s: driver is not initialized!\n", __FUNCTION__);)
9302 return E_MVOP_FAIL;
9303 }
9304
9305 if (MVOP_CheckOutputCfg(pstVideoStatus) != TRUE)
9306 {
9307 MVOP_DBG(MVOP_PRINTF("%s: invalid parameter!\n", __FUNCTION__);)
9308 return E_MVOP_INVALID_PARAM;
9309 }
9310
9311 pstTiming = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._mvopTiming;
9312 MS_BOOL b3DTB = FALSE;
9313 EN_MVOP_Output_3D_TYPE en3DType = E_MVOP_OUTPUT_3D_NONE;
9314 #if ENABLE_3D_LR_MODE
9315 if(HAL_MVOP_EX_GetOutput3DType)
9316 {
9317 b3DTB = (HAL_MVOP_EX_GetOutput3DType(eID) == E_MVOP_OUTPUT_3D_TB);
9318 en3DType = HAL_MVOP_EX_GetOutput3DType(eID);
9319 }
9320 #endif
9321 MS_U32 MVOP_Clock = MVOP_CalculatePixClk(eID, pstTiming, pstVideoStatus, bEnHDup, en3DType);
9322 if (0 == MVOP_Clock)
9323 {
9324 MVOP_DBG(MVOP_PRINTF("%s: MVOP_Clock==0\n", __FUNCTION__);)
9325 return E_MVOP_FAIL;
9326 }
9327
9328 HALMVOPFREQUENCY eClkFreq = HAL_MVOP_EX_GetClk(MVOP_Clock);
9329 MVOP_EX_AutoGenTiming(eID, pstTiming, pstVideoStatus, eClkFreq, b3DTB);
9330
9331 HAL_MVOP_EX_SetOutputInterlace(eID, pstTiming->bInterlace);
9332 HAL_MVOP_EX_SetOutputTiming(eID, pstTiming);
9333 HAL_MVOP_EX_SetSynClk(eID, pstTiming, eClkFreq);
9334
9335 MS_U16 u16SrcHSize = p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._u16SrcHSize;
9336 if (u16SrcHSize != 0)
9337 {
9338 //report the source width for scaler, intead of the 16-aligned width
9339 //MS_U16 u16Discard_Width = 0;
9340 //u16Discard_Width = _u16SubSrcHSize.u16Width - _u16SubSrcHSize;
9341 MVOP_DBG(MVOP_PRINTF("%s: _mvopTiming.u16Width: %d ==> %d\n", __FUNCTION__,
9342 pstTiming->u16Width, u16SrcHSize);)
9343 pstTiming->u16Width = u16SrcHSize;
9344 #if 0 //for H-mirror ON
9345 if (_mvopTiming.u16HActive_Start > u16Discard_Width)
9346 {
9347 _mvopTiming.u16HActive_Start -= u16Discard_Width;
9348 }
9349 else
9350 {
9351 MVOP_PRINTF("Warning: u16HActive_Start(%d) <= u16Discard_Width(%d)\n",
9352 _mvopTiming.u16HActive_Start, u16Discard_Width);
9353 }
9354 if (_mvopTiming.u16HImg_Start > u16Discard_Width)
9355 {
9356 _mvopTiming.u16HImg_Start -= u16Discard_Width;
9357 }
9358 else
9359 {
9360 MVOP_PRINTF("Warning: u16HImg_Start(%d) <= u16Discard_Width(%d)\n",
9361 _mvopTiming.u16HImg_Start, u16Discard_Width);
9362 }
9363 #endif
9364 }
9365 MVOP_DumpOutputTiming(pstTiming);
9366 return E_MVOP_OK;
9367 }
9368
9369
9370 //-----------------------------------------------------------------------------
9371 /// Get MVOP output timing information.
9372 /// @return MVOP_Result
9373 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_GetOutputTiming_V2(void * pInstance,MVOP_DevID eID,MVOP_Timing * pMVOPTiming)9374 MVOP_Result MDrv_MVOP_EX_GetOutputTiming_V2(void* pInstance, MVOP_DevID eID, MVOP_Timing* pMVOPTiming)
9375 {
9376 MVOP_Timing* pstTiming = NULL;
9377
9378 if (p_gDrvMVOPCtx == NULL)
9379 {
9380 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9381 return E_MVOP_FAIL;
9382 }
9383
9384 if (!MVOP_EX_IsInit(eID))
9385 {
9386 MVOP_DBG(MVOP_PRINTF("%s: driver is not initialized!\n", __FUNCTION__);)
9387 return E_MVOP_FAIL;
9388 }
9389
9390 if (!pMVOPTiming)
9391 {
9392 MVOP_DBG(MVOP_PRINTF("%s: invalid parameter!\n", __FUNCTION__);)
9393 return E_MVOP_INVALID_PARAM;
9394 }
9395 pstTiming = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._mvopTiming;
9396 memcpy(pMVOPTiming, pstTiming, sizeof(MVOP_Timing));
9397 return E_MVOP_OK;
9398 }
9399
MDrv_MVOP_EX_GetOutputTiming(MVOP_DevID eID,MVOP_Timing * pMVOPTiming)9400 MVOP_Result MDrv_MVOP_EX_GetOutputTiming(MVOP_DevID eID, MVOP_Timing* pMVOPTiming)
9401 {
9402 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
9403 MVOP_Timing* pstTiming = NULL;
9404
9405 if (p_gDrvMVOPCtx == NULL)
9406 {
9407 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9408 return E_MVOP_FAIL;
9409 }
9410
9411 if (!MVOP_EX_IsInit(eID))
9412 {
9413 MVOP_DBG(MVOP_PRINTF("%s: driver is not initialized!\n", __FUNCTION__);)
9414 return E_MVOP_FAIL;
9415 }
9416
9417 if (!pMVOPTiming)
9418 {
9419 MVOP_DBG(MVOP_PRINTF("%s: invalid parameter!\n", __FUNCTION__);)
9420 return E_MVOP_INVALID_PARAM;
9421 }
9422 pstTiming = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._mvopTiming;
9423 memcpy(pMVOPTiming, pstTiming, sizeof(MVOP_Timing));
9424 return E_MVOP_OK;
9425 }
9426
9427 //-----------------------------------------------------------------------------
9428 /// Get Horizontal Size.
9429 /// @return Horizontal Size
9430 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_GetHSize_V2(void * pInstance,MVOP_DevID eID)9431 MS_U16 MDrv_MVOP_EX_GetHSize_V2(void* pInstance, MVOP_DevID eID)
9432 {
9433 MS_U16 u16HSize = 0;
9434 MVOP_DrvCtrlSt* pstDrvCtrl = NULL;
9435
9436 if (p_gDrvMVOPCtx == NULL)
9437 {
9438 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9439 return 0;
9440 }
9441 if (MVOP_EX_IsInit(eID))
9442 {
9443 pstDrvCtrl = MVOP_GetDrvCtrl(eID);
9444 u16HSize = (pstDrvCtrl) ? (pstDrvCtrl->_mvopTiming.u16Width) : 0;
9445 }
9446 return u16HSize;
9447 }
9448
MDrv_MVOP_EX_GetHSize(MVOP_DevID eID)9449 MS_U16 MDrv_MVOP_EX_GetHSize(MVOP_DevID eID)
9450 {
9451 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
9452 MS_U16 u16HSize = 0;
9453 MVOP_DrvCtrlSt* pstDrvCtrl = NULL;
9454
9455 if (p_gDrvMVOPCtx == NULL)
9456 {
9457 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9458 return 0;
9459 }
9460 if (MVOP_EX_IsInit(eID))
9461 {
9462 pstDrvCtrl = MVOP_GetDrvCtrl(eID);
9463 u16HSize = (pstDrvCtrl) ? (pstDrvCtrl->_mvopTiming.u16Width) : 0;
9464 }
9465 return u16HSize;
9466 }
9467
9468 //-----------------------------------------------------------------------------
9469 /// Get Vertical Size.
9470 /// @return Vertical Size
9471 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_GetVSize_V2(void * pInstance,MVOP_DevID eID)9472 MS_U16 MDrv_MVOP_EX_GetVSize_V2(void* pInstance, MVOP_DevID eID)
9473 {
9474 MS_U16 u16VSize = 0;
9475 MVOP_DrvCtrlSt* pstDrvCtrl = NULL;
9476
9477 if (p_gDrvMVOPCtx == NULL)
9478 {
9479 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9480 return 0;
9481 }
9482 if (MVOP_EX_IsInit(eID))
9483 {
9484 pstDrvCtrl = MVOP_GetDrvCtrl(eID);
9485 u16VSize = (pstDrvCtrl) ? (pstDrvCtrl->_mvopTiming.u16Height) : 0;
9486 }
9487 return u16VSize;
9488 }
9489
MDrv_MVOP_EX_GetVSize(MVOP_DevID eID)9490 MS_U16 MDrv_MVOP_EX_GetVSize(MVOP_DevID eID)
9491 {
9492 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
9493 MS_U16 u16VSize = 0;
9494 MVOP_DrvCtrlSt* pstDrvCtrl = NULL;
9495
9496 if (p_gDrvMVOPCtx == NULL)
9497 {
9498 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9499 return 0;
9500 }
9501 if (MVOP_EX_IsInit(eID))
9502 {
9503 pstDrvCtrl = MVOP_GetDrvCtrl(eID);
9504 u16VSize = (pstDrvCtrl) ? (pstDrvCtrl->_mvopTiming.u16Height) : 0;
9505 }
9506 return u16VSize;
9507 }
9508
9509 //-----------------------------------------------------------------------------
9510 /// Get MVOP timing is interlace or progressive.
9511 /// @return TRUE for interlace; FALSE for progressive
9512 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_GetIsInterlace_V2(void * pInstance,MVOP_DevID eID)9513 MS_BOOL MDrv_MVOP_EX_GetIsInterlace_V2(void* pInstance, MVOP_DevID eID)
9514 {
9515 MS_BOOL bInterlaced = FALSE;
9516 MVOP_DrvCtrlSt* pstDrvCtrl = NULL;
9517
9518 if (p_gDrvMVOPCtx == NULL)
9519 {
9520 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9521 return FALSE;
9522 }
9523 if (MVOP_EX_IsInit(eID))
9524 {
9525 pstDrvCtrl = MVOP_GetDrvCtrl(eID);
9526 bInterlaced = (pstDrvCtrl) ? (pstDrvCtrl->_mvopTiming.bInterlace) : FALSE;
9527 }
9528 return bInterlaced;
9529 }
9530
MDrv_MVOP_EX_GetIsInterlace(MVOP_DevID eID)9531 MS_BOOL MDrv_MVOP_EX_GetIsInterlace(MVOP_DevID eID)
9532 {
9533 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
9534 MS_BOOL bInterlaced = FALSE;
9535 MVOP_DrvCtrlSt* pstDrvCtrl = NULL;
9536
9537 if (p_gDrvMVOPCtx == NULL)
9538 {
9539 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9540 return FALSE;
9541 }
9542 if (MVOP_EX_IsInit(eID))
9543 {
9544 pstDrvCtrl = MVOP_GetDrvCtrl(eID);
9545 bInterlaced = (pstDrvCtrl) ? (pstDrvCtrl->_mvopTiming.bInterlace) : FALSE;
9546 }
9547 return bInterlaced;
9548 }
9549
9550 //-----------------------------------------------------------------------------
9551 /// Get MVOP timing is horizontal duplicated or not.
9552 /// @return TRUE for yes; FALSE for not.
9553 //-----------------------------------------------------------------------------
MDrv_MVOP_EX_GetIsHDuplicate_V2(void * pInstance,MVOP_DevID eID)9554 MS_BOOL MDrv_MVOP_EX_GetIsHDuplicate_V2(void* pInstance, MVOP_DevID eID)
9555 {
9556 MS_BOOL bHDuplicated = FALSE;
9557 MVOP_DrvCtrlSt* pstDrvCtrl = NULL;
9558
9559 if (p_gDrvMVOPCtx == NULL)
9560 {
9561 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9562 return FALSE;
9563 }
9564 if (MVOP_EX_IsInit(eID))
9565 {
9566 pstDrvCtrl = MVOP_GetDrvCtrl(eID);
9567 bHDuplicated = (pstDrvCtrl) ? (pstDrvCtrl->_mvopTiming.bHDuplicate) : FALSE;
9568 }
9569 return bHDuplicated;
9570 }
9571
MDrv_MVOP_EX_GetIsHDuplicate(MVOP_DevID eID)9572 MS_BOOL MDrv_MVOP_EX_GetIsHDuplicate(MVOP_DevID eID)
9573 {
9574 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
9575 MS_BOOL bHDuplicated = FALSE;
9576 MVOP_DrvCtrlSt* pstDrvCtrl = NULL;
9577
9578 if (p_gDrvMVOPCtx == NULL)
9579 {
9580 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9581 return FALSE;
9582 }
9583 if (MVOP_EX_IsInit(eID))
9584 {
9585 pstDrvCtrl = MVOP_GetDrvCtrl(eID);
9586 bHDuplicated = (pstDrvCtrl) ? (pstDrvCtrl->_mvopTiming.bHDuplicate) : FALSE;
9587 }
9588 return bHDuplicated;
9589 }
9590
9591 /******************************************************************************************/
9592 /// This function is used for dectection of MVOP's Capability
9593 /// @param u16HSize \b IN
9594 /// @param u16VSize \b IN
9595 /// @param u16Fps \b IN
9596 /// @return TRUE if MVOP's frequency can support this video source, otherwise return FALSE
9597 /******************************************************************************************/
9598 #if defined (__aarch64__)
MDrv_MVOP_EX_CheckCapability_V2(void * pInstance,MVOP_DevID eID,MS_U64 u32InParam)9599 MS_BOOL MDrv_MVOP_EX_CheckCapability_V2(void* pInstance, MVOP_DevID eID, MS_U64 u32InParam)
9600 #else
9601 MS_BOOL MDrv_MVOP_EX_CheckCapability_V2(void* pInstance, MVOP_DevID eID, MS_U32 u32InParam)
9602 #endif
9603 {
9604 MS_U16 u16HSize = 0;
9605 MS_U16 u16VSize = 0;
9606 MS_U16 u16Fps = 0;
9607 MS_BOOL bRet = FALSE;
9608 if ((u32InParam != 0) && (((MVOP_CapInput*)u32InParam)->u8StrVer == 0))
9609 {
9610 MVOP_CapInput* pstInput = (MVOP_CapInput*)u32InParam;
9611 u16HSize = pstInput->u16HSize;
9612 u16VSize = pstInput->u16VSize;
9613 u16Fps = pstInput->u16Fps;
9614 bRet = ((MS_U32)((u16HSize + MVOP_HBlank_Min) * (u16VSize + MVOP_VBlank_Min)* u16Fps) <= (MS_U32)(HAL_MVOP_EX_GetMaxFreerunClk(eID)));
9615 }
9616 return bRet;
9617 }
9618
9619 #if defined (__aarch64__)
MDrv_MVOP_EX_CheckCapability(MVOP_DevID eID,MS_U64 u32InParam)9620 MS_BOOL MDrv_MVOP_EX_CheckCapability(MVOP_DevID eID, MS_U64 u32InParam)
9621 #else
9622 MS_BOOL MDrv_MVOP_EX_CheckCapability(MVOP_DevID eID, MS_U32 u32InParam)
9623 #endif
9624 {
9625 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
9626 MS_U16 u16HSize = 0;
9627 MS_U16 u16VSize = 0;
9628 MS_U16 u16Fps = 0;
9629 MS_BOOL bRet = FALSE;
9630 if ((u32InParam != 0) && (((MVOP_CapInput*)u32InParam)->u8StrVer == 0))
9631 {
9632 MVOP_CapInput* pstInput = (MVOP_CapInput*)u32InParam;
9633 u16HSize = pstInput->u16HSize;
9634 u16VSize = pstInput->u16VSize;
9635 u16Fps = pstInput->u16Fps;
9636 bRet = ((MS_U32)((u16HSize + MVOP_HBlank_Min) * (u16VSize + MVOP_VBlank_Min)* u16Fps) <= (MS_U32)(HAL_MVOP_EX_GetMaxFreerunClk(eID)));
9637 }
9638 return bRet;
9639 }
9640
MDrv_MVOP_EX_GetMaxVOffset_V2(void * pInstance,MVOP_DevID eID,MS_U16 u16HSize,MS_U16 u16VSize,MS_U16 u16Fps)9641 MS_U16 MDrv_MVOP_EX_GetMaxVOffset_V2(void* pInstance, MVOP_DevID eID, MS_U16 u16HSize, MS_U16 u16VSize, MS_U16 u16Fps)
9642 {
9643 MS_U16 u16OffsetMax = 0;
9644
9645 if (HAL_MVOP_EX_GetMaxFreerunClk)
9646 {
9647 u16OffsetMax = MVOP_GetMaxVOffset(eID, HAL_MVOP_EX_GetMaxFreerunClk(eID), u16HSize, u16VSize, u16Fps);
9648 }
9649
9650 return u16OffsetMax;
9651 }
9652
MDrv_MVOP_EX_GetMaxVOffset(MVOP_DevID eID,MS_U16 u16HSize,MS_U16 u16VSize,MS_U16 u16Fps)9653 MS_U16 MDrv_MVOP_EX_GetMaxVOffset(MVOP_DevID eID, MS_U16 u16HSize, MS_U16 u16VSize, MS_U16 u16Fps)
9654 {
9655 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
9656 MS_U16 u16OffsetMax = 0;
9657
9658 if (HAL_MVOP_EX_GetMaxFreerunClk)
9659 {
9660 u16OffsetMax = MVOP_GetMaxVOffset(eID, HAL_MVOP_EX_GetMaxFreerunClk(eID), u16HSize, u16VSize, u16Fps);
9661 }
9662
9663 return u16OffsetMax;
9664 }
9665
9666 //------------------------------------------------------------------------------
9667 /// MVOP Get Destination Information for GOP mixer
9668 /// @return TRUE/FALSE
9669 //------------------------------------------------------------------------------
MDrv_MVOP_EX_GetDstInfo_V2(void * pInstance,MVOP_DevID eID,MVOP_DST_DispInfo * pDstInfo,MS_U32 u32SizeofDstInfo)9670 MS_BOOL MDrv_MVOP_EX_GetDstInfo_V2(void* pInstance, MVOP_DevID eID, MVOP_DST_DispInfo *pDstInfo, MS_U32 u32SizeofDstInfo)
9671 {
9672 if (!MVOP_EX_IsInit(eID))
9673 {
9674 MVOP_DBG(MVOP_PRINTF("%s: driver is not initialized!\n", __FUNCTION__);)
9675 return FALSE;
9676 }
9677
9678 if(NULL == pDstInfo)
9679 {
9680 MVOP_ERR(MVOP_PRINTF("MApi_MVOP_GetDstInfo():pDstInfo is NULL\n");)
9681 return FALSE;
9682 }
9683
9684 if(u32SizeofDstInfo != sizeof(MVOP_DST_DispInfo))
9685 {
9686 MVOP_ERR(MVOP_PRINTF("MApi_MVOP_GetDstInfo():u16SizeofDstInfo is different from the MVOP_DST_DispInfo defined, check header file!\n");)
9687 return FALSE;
9688 }
9689
9690 MVOP_TimingInfo_FromRegisters mvopTimingInfo;
9691 memset(&mvopTimingInfo, 0, sizeof(MVOP_TimingInfo_FromRegisters));
9692 if(HAL_MVOP_EX_GetTimingInfoFromRegisters(eID, &mvopTimingInfo) == FALSE)
9693 {
9694 MVOP_ERR(MVOP_PRINTF("encounter errors in HAL_MVOP_EX_GetTimingInfoFromRegisters()!\n");)
9695 memset(pDstInfo, 0, u32SizeofDstInfo);
9696 return FALSE;
9697 }
9698 pDstInfo->VDTOT = mvopTimingInfo.u16V_TotalCount;
9699 pDstInfo->HDTOT = mvopTimingInfo.u16H_TotalCount;
9700 pDstInfo->bInterlaceMode = mvopTimingInfo.bInterlace;
9701 pDstInfo->DEHST = mvopTimingInfo.u16HActive_Start / 2 + 2;
9702 if(pDstInfo->bInterlaceMode)
9703 {
9704 pDstInfo->DEVST = (mvopTimingInfo.u16VBlank0_End - mvopTimingInfo.u16TopField_VS) * 2 - 18;
9705 }
9706 else
9707 {
9708 pDstInfo->DEVST = (mvopTimingInfo.u16VBlank0_End - mvopTimingInfo.u16TopField_VS) - 5;
9709 }
9710 //HDeEnd=HDeStart+HDeWidth
9711 pDstInfo->DEHEND = pDstInfo->DEHST + pDstInfo->HDTOT - mvopTimingInfo.u16HActive_Start;
9712 //VDeEnd=VDeStart+VDeWidth
9713 if(pDstInfo->bInterlaceMode)
9714 {
9715 pDstInfo->DEVEND = pDstInfo->DEVST + pDstInfo->VDTOT - (2 * mvopTimingInfo.u16VBlank0_End - 3);
9716 }
9717 else
9718 {
9719 pDstInfo->DEVEND = pDstInfo->DEVST + pDstInfo->VDTOT - (mvopTimingInfo.u16VBlank0_End - 1);
9720 }
9721 #if defined (__aarch64__)
9722 MVOP_TIMING_DBG(MVOP_PRINTF("bInterlace=%u,HTotal=%u,VTotal=%u\n", pDstInfo->bInterlaceMode, pDstInfo->HDTOT, pDstInfo->VDTOT);)
9723 MVOP_TIMING_DBG(MVOP_PRINTF("HDeStart=%u,HDeEnd=%u,VDeStart=%u,VDeEnd=%u\n", pDstInfo->DEHST, pDstInfo->DEHEND, pDstInfo->DEVST, pDstInfo->DEVEND);)
9724 #else
9725 MVOP_TIMING_DBG(MVOP_PRINTF("bInterlace=%u,HTotal=%u,VTotal=%u\n", pDstInfo->bInterlaceMode, (int)pDstInfo->HDTOT, (int)pDstInfo->VDTOT);)
9726 MVOP_TIMING_DBG(MVOP_PRINTF("HDeStart=%u,HDeEnd=%u,VDeStart=%u,VDeEnd=%u\n", (int)pDstInfo->DEHST, (int)pDstInfo->DEHEND, (int)pDstInfo->DEVST, (int)pDstInfo->DEVEND);)
9727 #endif
9728 return TRUE;
9729 }
9730
MDrv_MVOP_EX_GetDstInfo(MVOP_DevID eID,MVOP_DST_DispInfo * pDstInfo,MS_U32 u32SizeofDstInfo)9731 MS_BOOL MDrv_MVOP_EX_GetDstInfo(MVOP_DevID eID, MVOP_DST_DispInfo *pDstInfo, MS_U32 u32SizeofDstInfo)
9732 {
9733 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
9734 if (!MVOP_EX_IsInit(eID))
9735 {
9736 MVOP_DBG(MVOP_PRINTF("%s: driver is not initialized!\n", __FUNCTION__);)
9737 return FALSE;
9738 }
9739
9740 if(NULL == pDstInfo)
9741 {
9742 MVOP_ERR(MVOP_PRINTF("MApi_MVOP_GetDstInfo():pDstInfo is NULL\n");)
9743 return FALSE;
9744 }
9745
9746 if(u32SizeofDstInfo != sizeof(MVOP_DST_DispInfo))
9747 {
9748 MVOP_ERR(MVOP_PRINTF("MApi_MVOP_GetDstInfo():u16SizeofDstInfo is different from the MVOP_DST_DispInfo defined, check header file!\n");)
9749 return FALSE;
9750 }
9751
9752 MVOP_TimingInfo_FromRegisters mvopTimingInfo;
9753 memset(&mvopTimingInfo, 0, sizeof(MVOP_TimingInfo_FromRegisters));
9754 if(HAL_MVOP_EX_GetTimingInfoFromRegisters(eID, &mvopTimingInfo) == FALSE)
9755 {
9756 MVOP_ERR(MVOP_PRINTF("encounter errors in HAL_MVOP_EX_GetTimingInfoFromRegisters()!\n");)
9757 memset(pDstInfo, 0, u32SizeofDstInfo);
9758 return FALSE;
9759 }
9760 pDstInfo->VDTOT = mvopTimingInfo.u16V_TotalCount;
9761 pDstInfo->HDTOT = mvopTimingInfo.u16H_TotalCount;
9762 pDstInfo->bInterlaceMode = mvopTimingInfo.bInterlace;
9763 pDstInfo->DEHST = mvopTimingInfo.u16HActive_Start / 2 + 2;
9764 if(pDstInfo->bInterlaceMode)
9765 {
9766 pDstInfo->DEVST = (mvopTimingInfo.u16VBlank0_End - mvopTimingInfo.u16TopField_VS) * 2 - 18;
9767 }
9768 else
9769 {
9770 pDstInfo->DEVST = (mvopTimingInfo.u16VBlank0_End - mvopTimingInfo.u16TopField_VS) - 5;
9771 }
9772 //HDeEnd=HDeStart+HDeWidth
9773 pDstInfo->DEHEND = pDstInfo->DEHST + pDstInfo->HDTOT - mvopTimingInfo.u16HActive_Start;
9774 //VDeEnd=VDeStart+VDeWidth
9775 if(pDstInfo->bInterlaceMode)
9776 {
9777 pDstInfo->DEVEND = pDstInfo->DEVST + pDstInfo->VDTOT - (2 * mvopTimingInfo.u16VBlank0_End - 3);
9778 }
9779 else
9780 {
9781 pDstInfo->DEVEND = pDstInfo->DEVST + pDstInfo->VDTOT - (mvopTimingInfo.u16VBlank0_End - 1);
9782 }
9783 #if defined (__aarch64__)
9784 MVOP_TIMING_DBG(MVOP_PRINTF("bInterlace=%u,HTotal=%u,VTotal=%u\n", pDstInfo->bInterlaceMode, pDstInfo->HDTOT, pDstInfo->VDTOT);)
9785 MVOP_TIMING_DBG(MVOP_PRINTF("HDeStart=%u,HDeEnd=%u,VDeStart=%u,VDeEnd=%u\n", pDstInfo->DEHST, pDstInfo->DEHEND, pDstInfo->DEVST, pDstInfo->DEVEND);)
9786 #else
9787 MVOP_TIMING_DBG(MVOP_PRINTF("bInterlace=%u,HTotal=%u,VTotal=%u\n", pDstInfo->bInterlaceMode, (int)pDstInfo->HDTOT, (int)pDstInfo->VDTOT);)
9788 MVOP_TIMING_DBG(MVOP_PRINTF("HDeStart=%u,HDeEnd=%u,VDeStart=%u,VDeEnd=%u\n", (int)pDstInfo->DEHST, (int)pDstInfo->DEHEND, (int)pDstInfo->DEVST, (int)pDstInfo->DEVEND);)
9789 #endif
9790 return TRUE;
9791 }
9792
MDrv_MVOP_EX_SetFixVtt_V2(void * pInstance,MVOP_DevID eID,MS_U16 u16FixVtt)9793 MVOP_Result MDrv_MVOP_EX_SetFixVtt_V2(void* pInstance, MVOP_DevID eID, MS_U16 u16FixVtt)
9794 {
9795 if (p_gDrvMVOPCtx == NULL)
9796 {
9797 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9798 return E_MVOP_FAIL;
9799 }
9800 p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._u16FixVtt = u16FixVtt;
9801 return E_MVOP_OK;
9802 }
9803
MDrv_MVOP_EX_SetFixVtt(MVOP_DevID eID,MS_U16 u16FixVtt)9804 MVOP_Result MDrv_MVOP_EX_SetFixVtt(MVOP_DevID eID, MS_U16 u16FixVtt)
9805 {
9806 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
9807 if (p_gDrvMVOPCtx == NULL)
9808 {
9809 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9810 return E_MVOP_FAIL;
9811 }
9812 p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._u16FixVtt = u16FixVtt;
9813 return E_MVOP_OK;
9814 }
9815
MDrv_MVOP_EX_EnableFreerunMode_V2(void * pInstance,MVOP_DevID eID,MS_BOOL bEnable)9816 MVOP_Result MDrv_MVOP_EX_EnableFreerunMode_V2(void* pInstance, MVOP_DevID eID, MS_BOOL bEnable)
9817 {
9818 MVOP_Result eRet = E_MVOP_FAIL;
9819 if (p_gDrvMVOPCtx == NULL)
9820 {
9821 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9822 return E_MVOP_FAIL;
9823 }
9824
9825 eRet = HAL_MVOP_EX_EnableFreerunMode(eID, bEnable);
9826 if (E_MVOP_OK == eRet)
9827 {
9828 p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._bEnableFreerunMode = bEnable;
9829 }
9830 return eRet;
9831 }
9832
MDrv_MVOP_EX_EnableFreerunMode(MVOP_DevID eID,MS_BOOL bEnable)9833 MVOP_Result MDrv_MVOP_EX_EnableFreerunMode(MVOP_DevID eID, MS_BOOL bEnable)
9834 {
9835 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
9836 MVOP_Result eRet = E_MVOP_FAIL;
9837 if (p_gDrvMVOPCtx == NULL)
9838 {
9839 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9840 return E_MVOP_FAIL;
9841 }
9842
9843 eRet = HAL_MVOP_EX_EnableFreerunMode(eID, bEnable);
9844 if (E_MVOP_OK == eRet)
9845 {
9846 p_gDrvMVOPCtx->_stMVOPDrvCtrl[eID]._bEnableFreerunMode = bEnable;
9847 }
9848 return eRet;
9849 }
9850
MDrv_MVOP_EX_MiuSwitch_V2(void * pInstance,MVOP_DevID eID,MS_U8 u8Miu)9851 MVOP_Result MDrv_MVOP_EX_MiuSwitch_V2(void* pInstance, MVOP_DevID eID, MS_U8 u8Miu)
9852 {
9853 //Agate Sub and 3rd MVOP share one miu client.
9854 return MVOP_MiuSwitch(FALSE, u8Miu);
9855 }
9856
MDrv_MVOP_EX_MiuSwitch(MVOP_DevID eID,MS_U8 u8Miu)9857 MVOP_Result MDrv_MVOP_EX_MiuSwitch(MVOP_DevID eID, MS_U8 u8Miu)
9858 {
9859 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
9860 //Agate Sub and 3rd MVOP share one miu client.
9861 return MVOP_MiuSwitch(FALSE, u8Miu);
9862 }
9863 //------------------------------------------------------------------------------
9864 /// MVOP Enable/Disable mirror mode (chips after M10 support this feature)
9865 /// @return TRUE/FALSE
9866 //------------------------------------------------------------------------------
MDrv_MVOP_EX_SetVOPMirrorMode_V2(void * pInstance,MVOP_DevID eID,MS_BOOL bEnable,MVOP_DrvMirror eMirrorMode)9867 MVOP_Result MDrv_MVOP_EX_SetVOPMirrorMode_V2(void* pInstance, MVOP_DevID eID, MS_BOOL bEnable, MVOP_DrvMirror eMirrorMode)
9868 {
9869 if (p_gDrvMVOPCtx == NULL)
9870 {
9871 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9872 return E_MVOP_FAIL;
9873 }
9874 MVOP_EX_CheckIsInit(eID);
9875
9876 if (HAL_MVOP_EX_SetVerticalMirrorMode && HAL_MVOP_EX_SetHorizontallMirrorMode)
9877 {
9878 if( eMirrorMode == E_VOPMIRROR_VERTICAL)
9879 {
9880 HAL_MVOP_EX_SetVerticalMirrorMode(eID, bEnable);
9881 }
9882 else if(eMirrorMode == E_VOPMIRROR_HORIZONTALL)
9883 {
9884 HAL_MVOP_EX_SetHorizontallMirrorMode(eID, bEnable);
9885 }
9886 else if(eMirrorMode == E_VOPMIRROR_HVBOTH)
9887 {
9888 HAL_MVOP_EX_SetVerticalMirrorMode(eID, bEnable);
9889 HAL_MVOP_EX_SetHorizontallMirrorMode(eID, bEnable);
9890 }
9891 }
9892
9893 MVOP_DBG(MVOP_PRINTF("\nMVOP MDrv_MVOP_EX_SetVOPMirrorMode (eMirrorMode :0x%x , 0x%x) \n",eMirrorMode,bEnable);)
9894 return E_MVOP_OK;
9895 }
9896
MDrv_MVOP_EX_SetVOPMirrorMode(MVOP_DevID eID,MS_BOOL bEnable,MVOP_DrvMirror eMirrorMode)9897 MVOP_Result MDrv_MVOP_EX_SetVOPMirrorMode(MVOP_DevID eID, MS_BOOL bEnable, MVOP_DrvMirror eMirrorMode)
9898 {
9899 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
9900 if (p_gDrvMVOPCtx == NULL)
9901 {
9902 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
9903 return E_MVOP_FAIL;
9904 }
9905 MVOP_EX_CheckIsInit(eID);
9906
9907 if (HAL_MVOP_EX_SetVerticalMirrorMode && HAL_MVOP_EX_SetHorizontallMirrorMode)
9908 {
9909 if( eMirrorMode == E_VOPMIRROR_VERTICAL)
9910 {
9911 HAL_MVOP_EX_SetVerticalMirrorMode(eID, bEnable);
9912 }
9913 else if(eMirrorMode == E_VOPMIRROR_HORIZONTALL)
9914 {
9915 HAL_MVOP_EX_SetHorizontallMirrorMode(eID, bEnable);
9916 }
9917 else if(eMirrorMode == E_VOPMIRROR_HVBOTH)
9918 {
9919 HAL_MVOP_EX_SetVerticalMirrorMode(eID, bEnable);
9920 HAL_MVOP_EX_SetHorizontallMirrorMode(eID, bEnable);
9921 }
9922 }
9923
9924 MVOP_DBG(MVOP_PRINTF("\nMVOP MDrv_MVOP_EX_SetVOPMirrorMode (eMirrorMode :0x%x , 0x%x) \n",eMirrorMode,bEnable);)
9925 return E_MVOP_OK;
9926 }
9927
9928 // Interrupt functions
9929 //MS_BOOL MDrv_MVOP_EnableInterrupt(MVOP_IntType eIntType)
MDrv_MVOP_EnableInterrupt_V2(void * pInstance,MS_U8 eIntType)9930 MS_BOOL MDrv_MVOP_EnableInterrupt_V2(void* pInstance, MS_U8 eIntType)
9931 {
9932 MS_BOOL bRet = FALSE;
9933 if (!MVOP_IsInit())
9934 {
9935 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
9936 return bRet;
9937 }
9938 if (HAL_MVOP_IntEnableMask)
9939 {
9940 bRet = HAL_MVOP_IntEnableMask(E_MVOP_DEV_0, eIntType);
9941 }
9942
9943 return bRet;
9944 }
9945
MDrv_MVOP_EnableInterrupt(MS_U8 eIntType)9946 MS_BOOL MDrv_MVOP_EnableInterrupt(MS_U8 eIntType)
9947 {
9948 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
9949 #if ENABLE_UTOPIA2_INTERFACE
9950 stMVOP_ENABLE_INTERRUPT IO_arg;
9951 IO_arg.eIntType = eIntType;
9952 IO_arg.bRet = FALSE;
9953
9954 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
9955 {
9956 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
9957 return IO_arg.bRet;
9958 }
9959
9960 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_ENABLE_INTERRUPT, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
9961 {
9962 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
9963 return IO_arg.bRet;
9964 }
9965 #else
9966 void* pInstance = NULL;
9967 return (MDrv_MVOP_EnableInterrupt_V2(pInstance, eIntType));
9968 #endif
9969 return IO_arg.bRet;
9970 }
9971
MDrv_MVOP_ClearInterrupt(MS_BOOL bEnable)9972 MS_BOOL MDrv_MVOP_ClearInterrupt(MS_BOOL bEnable)
9973 {
9974 MS_U8 eIntType;
9975 MS_BOOL bRet = FALSE;
9976 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
9977 if(bEnable)
9978 {
9979 eIntType = E_MVOP_INT_NONE;
9980 }
9981 else
9982 {
9983 eIntType = E_MVOP_INT_VSYNC;
9984 }
9985 bRet = HAL_MVOP_IntEnableMask(E_MVOP_DEV_0, eIntType);
9986 return bRet;
9987 }
9988
MDrv_MVOP_GetIntStatus_V2(void * pInstance)9989 MS_U8 MDrv_MVOP_GetIntStatus_V2(void* pInstance)
9990 {
9991 MS_U8 u8IntSt = 0;
9992 if (!MVOP_IsInit())
9993 {
9994 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
9995 return u8IntSt;
9996 }
9997 if (HAL_MVOP_IntGetStatus)
9998 {
9999 u8IntSt = HAL_MVOP_IntGetStatus(E_MVOP_DEV_0);
10000 }
10001 return u8IntSt;
10002 }
10003
MDrv_MVOP_GetIntStatus(void)10004 MS_U8 MDrv_MVOP_GetIntStatus(void)
10005 {
10006 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
10007 #if ENABLE_UTOPIA2_INTERFACE
10008 stMVOP_GET_INT_STATUS IO_arg;
10009 IO_arg.u8Ret = 0;
10010
10011 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
10012 {
10013 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
10014 return IO_arg.u8Ret;
10015 }
10016
10017 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_GET_INT_STATUS, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
10018 {
10019 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
10020 return IO_arg.u8Ret;
10021 }
10022
10023 return IO_arg.u8Ret;
10024 #else
10025 void* pInstance = NULL;
10026 return (MDrv_MVOP_GetIntStatus_V2(pInstance));
10027 #endif
10028 }
10029
MDrv_MVOP_SubEnableInterrupt_V2(void * pInstance,MVOP_IntType eIntType)10030 MS_BOOL MDrv_MVOP_SubEnableInterrupt_V2(void* pInstance, MVOP_IntType eIntType)
10031 {
10032 MS_BOOL bRet = FALSE;
10033 #if MVOP_SUPPORT_SUB
10034 if (!MVOP_SubIsInit())
10035 {
10036 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
10037 return bRet;
10038 }
10039 if (HAL_MVOP_IntEnableMask)
10040 {
10041 bRet = HAL_MVOP_IntEnableMask(E_MVOP_DEV_1, eIntType);
10042 }
10043 #endif
10044 return bRet;
10045 }
10046
MDrv_MVOP_SubEnableInterrupt(MVOP_IntType eIntType)10047 MS_BOOL MDrv_MVOP_SubEnableInterrupt(MVOP_IntType eIntType)
10048 {
10049 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d, arg:%d \n", __FUNCTION__, __LINE__, eIntType);)
10050 #if ENABLE_UTOPIA2_INTERFACE
10051 stMVOP_SUB_ENABLE_INTERRUPT IO_arg;
10052 IO_arg.eIntType = eIntType;
10053 IO_arg.bRet = FALSE;
10054
10055 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
10056 {
10057 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
10058 return IO_arg.bRet;
10059 }
10060
10061 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SUB_ENABLE_INTERRUPT, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
10062 {
10063 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
10064 return IO_arg.bRet;
10065 }
10066
10067 return IO_arg.bRet;
10068 #else
10069 void* pInstance = NULL;
10070 return (MDrv_MVOP_SubEnableInterrupt_V2(pInstance, eIntType));
10071 #endif
10072 }
10073
MDrv_MVOP_SubGetIntStatus_V2(void * pInstance)10074 MS_U8 MDrv_MVOP_SubGetIntStatus_V2(void* pInstance)
10075 {
10076 MS_U8 u8IntSt = 0;
10077 #if MVOP_SUPPORT_SUB
10078 if (!MVOP_SubIsInit())
10079 {
10080 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
10081 return u8IntSt;
10082 }
10083 if (HAL_MVOP_IntGetStatus)
10084 {
10085 u8IntSt = HAL_MVOP_IntGetStatus(E_MVOP_DEV_1);
10086 }
10087 #endif
10088 return u8IntSt;
10089 }
10090
MDrv_MVOP_SubGetIntStatus(void)10091 MS_U8 MDrv_MVOP_SubGetIntStatus(void)
10092 {
10093 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
10094 #if ENABLE_UTOPIA2_INTERFACE
10095 stMVOP_SUB_GET_INT_STATUS IO_arg;
10096 IO_arg.u8Ret = 0;
10097
10098 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
10099 {
10100 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
10101 return IO_arg.u8Ret;
10102 }
10103
10104 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SUB_GET_INT_STATUS, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
10105 {
10106 MVOP_PRINTF("[Fail][%s,%d]\n",__FUNCTION__,__LINE__);
10107 return IO_arg.u8Ret;
10108 }
10109
10110 return IO_arg.u8Ret;
10111 #else
10112 void* pInstance = NULL;
10113 return (MDrv_MVOP_SubGetIntStatus_V2(pInstance));
10114 #endif
10115 }
10116
10117
MDrv_MVOP_EX_EnableInterrupt_V2(void * pInstance,MVOP_DevID eID,MVOP_IntType eIntType)10118 MS_BOOL MDrv_MVOP_EX_EnableInterrupt_V2(void* pInstance, MVOP_DevID eID, MVOP_IntType eIntType)
10119 {
10120 MS_BOOL bRet = FALSE;
10121 if (!MVOP_EX_IsInit(eID))
10122 {
10123 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
10124 return bRet;
10125 }
10126 if (HAL_MVOP_IntEnableMask)
10127 {
10128 bRet = HAL_MVOP_IntEnableMask(eID, eIntType);
10129 }
10130
10131 return bRet;
10132 }
10133
MDrv_MVOP_EX_EnableInterrupt(MVOP_DevID eID,MVOP_IntType eIntType)10134 MS_BOOL MDrv_MVOP_EX_EnableInterrupt(MVOP_DevID eID, MVOP_IntType eIntType)
10135 {
10136 MS_BOOL bRet = FALSE;
10137 if (!MVOP_EX_IsInit(eID))
10138 {
10139 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
10140 return bRet;
10141 }
10142 if (HAL_MVOP_IntEnableMask)
10143 {
10144 bRet = HAL_MVOP_IntEnableMask(eID, eIntType);
10145 }
10146
10147 return bRet;
10148 }
10149
MDrv_MVOP_EX_GetIntStatus_V2(void * pInstance,MVOP_DevID eID)10150 MS_U8 MDrv_MVOP_EX_GetIntStatus_V2(void* pInstance, MVOP_DevID eID)
10151 {
10152 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
10153 MS_U8 u8IntSt = 0;
10154 if (!MVOP_EX_IsInit(eID))
10155 {
10156 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
10157 return u8IntSt;
10158 }
10159 if (HAL_MVOP_IntGetStatus)
10160 {
10161 u8IntSt = HAL_MVOP_IntGetStatus(eID);
10162 }
10163 return u8IntSt;
10164 }
10165
MDrv_MVOP_EX_GetIntStatus(MVOP_DevID eID)10166 MS_U8 MDrv_MVOP_EX_GetIntStatus(MVOP_DevID eID)
10167 {
10168 MS_U8 u8IntSt = 0;
10169 if (!MVOP_EX_IsInit(eID))
10170 {
10171 MVOP_DBG(MVOP_PRINTF("%s:MVOP driver is not initialized!\n", __FUNCTION__);)
10172 return u8IntSt;
10173 }
10174 if (HAL_MVOP_IntGetStatus)
10175 {
10176 u8IntSt = HAL_MVOP_IntGetStatus(eID);
10177 }
10178 return u8IntSt;
10179 }
10180
10181
10182
10183
10184
10185 //#define MVOP_BANK_REGNUM 0x80UL
10186
_MDrv_MVOP_Power_Mode(MVOP_DevID eID,EN_MVOP_POWER_MODE ePowerMode)10187 MS_BOOL _MDrv_MVOP_Power_Mode(MVOP_DevID eID,EN_MVOP_POWER_MODE ePowerMode)
10188 {
10189 MS_BOOL bRet = TRUE;
10190 //STR restored
10191 MS_U8 i=0UL;
10192 #if 0
10193 MVOP_STR_SAVE_AREA* pMVOP_STRPrivate;
10194 void* pModule;
10195 UtopiaInstanceGetModule(pInstance, &pModule);
10196 UtopiaModuleGetSTRPrivate(pModule, (void**)&pMVOP_STRPrivate);
10197 #endif
10198
10199
10200 if(ePowerMode == E_MVOP_POWER_SUSPEND)
10201 {
10202 for(i =0; i<MVOP_BANK_REGNUM; i++ )
10203 {
10204 p_gDrvMVOPCtx->pMVOP_STRPrivate.MVOP_BANK[eID][i] = HAL_MVOP_ReadBank(eID,i);
10205 }
10206 for(i =0; i<MVOP_CLK_REGNUM; i++ )
10207 {
10208 p_gDrvMVOPCtx->pMVOP_STRPrivate.CLK_BANK[i] = HAL_MVOP_ReadClkBank(i);
10209 }
10210
10211 }
10212 else if(ePowerMode == E_MVOP_POWER_RESUME)
10213 {
10214 for(i =0; i<MVOP_BANK_REGNUM; i++ )
10215 {
10216 HAL_MVOP_WriteBank(eID,i,p_gDrvMVOPCtx->pMVOP_STRPrivate.MVOP_BANK[eID][i]);
10217 }
10218 for(i =0; i<MVOP_CLK_REGNUM; i++ )
10219 {
10220 HAL_MVOP_WriteClkBank(i,p_gDrvMVOPCtx->pMVOP_STRPrivate.CLK_BANK[i]);
10221 }
10222 }
10223 else if(ePowerMode == E_MVOP_POWER_MECHANICAL)
10224 {
10225
10226 }
10227 else if(ePowerMode == E_MVOP_POWER_SOFT_OFF)
10228 {
10229
10230 }
10231 return bRet;
10232 }
10233
10234
10235 //----------------------------------------------------------------------
10236 /// For Kernel mode suspend and resume
10237 ///
10238 ///
10239 //----------------------------------------------------------------------
MDrv_MVOP_SetPowerState_Kernel_V2(void * pInstance,EN_POWER_MODE u16PowerState)10240 MS_U32 MDrv_MVOP_SetPowerState_Kernel_V2(void* pInstance, EN_POWER_MODE u16PowerState)
10241 {
10242 //static EN_POWER_MODE _prev_u16PowerState = E_POWER_MECHANICAL;
10243 MS_U16 u16Return = UTOPIA_STATUS_FAIL;
10244 MS_BOOL bRet = TRUE;
10245
10246 if (u16PowerState == E_POWER_SUSPEND)
10247 {
10248 MDrv_MVOP_Init();
10249
10250 if (p_gDrvMVOPCtx == NULL)
10251 {
10252 MVOP_DBG(MVOP_PRINTF("[kernel]%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
10253 return u16Return;
10254 }
10255 //check main/sub mvop be used or not
10256
10257 if(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._stMVOPDrvStat.bIsInit && bRet)
10258 {
10259 bRet =_MDrv_MVOP_Power_Mode(E_MVOP_DEV_0,E_MVOP_POWER_SUSPEND);
10260 }
10261 #if MVOP_SUPPORT_SUB
10262 MDrv_MVOP_SubInit();
10263
10264 if (p_gDrvSubMVOPCtx == NULL)
10265 {
10266 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
10267 return u16Return;
10268 }
10269 if(p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._stMVOPDrvStat.bIsInit && bRet)
10270 {
10271 bRet =_MDrv_MVOP_Power_Mode(E_MVOP_DEV_1,E_MVOP_POWER_SUSPEND);
10272 }
10273 #endif
10274 }
10275 else if(u16PowerState == E_POWER_RESUME)
10276 {
10277 if (p_gDrvMVOPCtx == NULL)
10278 {
10279 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
10280 return u16Return;
10281 }
10282
10283 if(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._stMVOPDrvStat.bIsInit && bRet)
10284 {
10285 bRet =_MDrv_MVOP_Power_Mode(E_MVOP_DEV_0,E_POWER_RESUME);
10286 }
10287 #if MVOP_SUPPORT_SUB
10288 if (p_gDrvSubMVOPCtx == NULL)
10289 {
10290 MVOP_DBG(MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);)
10291 return u16Return;
10292 }
10293
10294 if(p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._stMVOPDrvStat.bIsInit && bRet)
10295 {
10296 bRet =_MDrv_MVOP_Power_Mode(E_MVOP_DEV_1,E_POWER_RESUME);
10297 }
10298 #endif
10299 }
10300
10301 if(bRet)
10302 {
10303 u16Return = UTOPIA_STATUS_SUCCESS;
10304 }
10305
10306 return u16Return;
10307 }
10308
10309
10310 //-----------------------------------------------------------------------------
10311 /// For HK power suspend and resume.
10312 /// MVOP keeps the status as suspend for staying the same status while HK resume.
10313 /// @return 1 for RESUME_OK; 2 for SUSPEND_OK; 3 for SUSPEND_FAILED.
10314 //-----------------------------------------------------------------------------
10315
MDrv_MVOP_SetPowerState_V2(void * pInstance,EN_POWER_MODE u16PowerState)10316 MS_U32 MDrv_MVOP_SetPowerState_V2(void* pInstance, EN_POWER_MODE u16PowerState)
10317 {
10318 static EN_POWER_MODE _prev_u16PowerState = E_POWER_MECHANICAL;
10319 MS_U16 u16Return = UTOPIA_STATUS_FAIL;
10320 #if 0
10321 MVOP_Timing* pstTiming = NULL;
10322 MVOP_InputCfg* InputCfg = NULL;
10323 MVOP_InputSel InputSel;
10324 MS_U16 u16ECOVersion;
10325 #endif
10326 MVOP_DBG(MVOP_PRINTF("[MVOP][DBG] u16PowerState = %d\n",u16PowerState);)
10327
10328 if (u16PowerState == E_POWER_SUSPEND)
10329 {
10330 //MDrv_MVOP_Init();
10331 MDrv_MVOP_Init_V2(pInstance);
10332
10333 if (p_gDrvMVOPCtx == NULL)
10334 {
10335 MVOP_PRINTF("%s p_gDrvMVOPCtx is NULL pointer\n", __FUNCTION__);
10336 return u16Return;
10337 }
10338
10339 _prev_u16PowerState = u16PowerState;
10340 //--------------------
10341 // Saving YUV address
10342 //--------------------
10343 if(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._eInputSel == MVOP_INPUT_DRAM )
10344 {
10345 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopInputCfg.u32YOffset = HAL_MVOP_GetYBaseAdd();
10346 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopInputCfg.u32UVOffset = HAL_MVOP_GetUVBaseAdd();
10347 }
10348 p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._stMVOPDrvStat.bIsInit = FALSE;
10349 HAL_MVOP_PowerStateSuspend();
10350
10351 u16Return = UTOPIA_STATUS_SUCCESS;//SUSPEND_OK;
10352 }
10353 else if (u16PowerState == E_POWER_RESUME)
10354 {
10355 if (_prev_u16PowerState == E_POWER_SUSPEND)
10356 {
10357 //MDrv_MVOP_Init();
10358 MDrv_MVOP_Init_V2(pInstance);
10359 #if 0
10360 pstTiming = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming;
10361 InputCfg = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopInputCfg;
10362 u16ECOVersion = (MS_U16)MDrv_SYS_GetChipRev();
10363
10364 //---------------
10365 // Set InputCfg
10366 //---------------
10367 InputSel = p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._eInputSel;
10368 switch(InputSel)
10369 {
10370 #if ENABLE_3D_LR_MODE
10371 case MVOP_INPUT_DRAM_3DLR:
10372 HAL_MVOP_Enable3DLR(ENABLE);
10373 //no break here to continue setting MCU mode
10374 #endif
10375 case MVOP_INPUT_DRAM:
10376 if (!InputCfg)
10377 {
10378 return FALSE;
10379 }
10380
10381 if (E_MVOP_RGB_NONE != p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._eRgbFmt)
10382 {
10383 if (HAL_MVOP_SetRgbFormat)
10384 {
10385 HAL_MVOP_SetRgbFormat(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._eRgbFmt);
10386 }
10387 else
10388 {
10389 MVOP_ERR(MVOP_PRINTF("%s not support HAL_MVOP_SetRgbFormat\n", __FUNCTION__);)
10390 }
10391 }
10392
10393 HAL_MVOP_SetInputMode(VOPINPUT_MCUCTRL, InputCfg, u16ECOVersion);
10394 break;
10395
10396 #if ENABLE_3D_LR_MODE
10397 case MVOP_INPUT_HVD_3DLR:
10398 HAL_MVOP_Enable3DLR(ENABLE);
10399 //no break here to continue setting HVD hardwire mode
10400 #endif
10401 case MVOP_INPUT_H264:
10402 HAL_MVOP_SetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
10403 HAL_MVOP_SetH264HardwireMode();
10404 break;
10405
10406 #if ENABLE_3D_LR_MODE
10407 case MVOP_INPUT_MVD_3DLR:
10408 HAL_MVOP_Enable3DLR(ENABLE);
10409 //no break here to continue setting MVD hardwire mode
10410 #endif
10411 case MVOP_INPUT_MVD:
10412 HAL_MVOP_SetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
10413 break;
10414 case MVOP_INPUT_RVD:
10415 HAL_MVOP_SetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
10416 HAL_MVOP_SetRMHardwireMode();
10417 break;
10418 case MVOP_INPUT_CLIP:
10419 if (!InputCfg)
10420 {
10421 _DRV_MVOP_Return(E_MVOP_INVALID_PARAM);
10422 }
10423 HAL_MVOP_SetCropWindow(InputCfg);
10424 break;
10425 case MVOP_INPUT_JPD:
10426 HAL_MVOP_SetInputMode(VOPINPUT_HARDWIRE, NULL, u16ECOVersion);
10427 HAL_MVOP_SetJpegHardwireMode();
10428 break;
10429 default:
10430 u16Return = E_MVOP_INVALID_PARAM;
10431 break;
10432 }
10433 //---------------
10434 // Set OutputCfg
10435 //---------------
10436 HAL_MVOP_SetMIUReqMask(TRUE);
10437 HAL_MVOP_Enable(FALSE);
10438 HAL_MVOP_SetMIUReqMask(FALSE);
10439
10440 HAL_MVOP_SetOutputInterlace(pstTiming->bInterlace);
10441 HAL_MVOP_SetOutputTiming(pstTiming);
10442 HAL_MVOP_SetSynClk(pstTiming);
10443
10444 HAL_MVOP_SetMIUReqMask(TRUE);
10445 HAL_MVOP_Enable(TRUE);
10446 HAL_MVOP_SetMIUReqMask(FALSE);
10447
10448 //-----------------
10449 // Restore Command
10450 //-----------------
10451 HAL_MVOP_Set3DLRAltOutput_VHalfScaling(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopComdFlag.bEnable3DLRALT);
10452 HAL_MVOP_Set3DLRAltOutput(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopComdFlag.bEnable3DLRSBS);
10453 HAL_MVOP_Set3DLRAltSBSOutput(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopComdFlag.bEnable3DLRSBS);
10454 HAL_MVOP_LoadReg();
10455
10456 HAL_MVOP_SetVerDup(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopComdFlag.bEnableVdup);
10457 HAL_MVOP_SetVSyncMode(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopComdFlag.bEnableVsyncMode);
10458 HAL_MVOP_SetVerx4Dup(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopComdFlag.bEnableVx4);
10459 HAL_MVOP_SetHorx4Dup(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopComdFlag.bEnableHx4);
10460
10461 HAL_MVOP_SetVerticalMirrorMode(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopComdFlag.bEnableVMirror);
10462 HAL_MVOP_SetHorizontallMirrorMode(p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopComdFlag.bEnableHMirror);
10463
10464 _prev_u16PowerState = u16PowerState;
10465 u16Return = UTOPIA_STATUS_SUCCESS;//RESUME_OK;
10466 #endif
10467 }
10468 else
10469 {
10470 MVOP_PRINTF("[%s,%5d]It is not suspended yet. We shouldn't resume\n",__FUNCTION__,__LINE__);
10471 u16Return = UTOPIA_STATUS_FAIL;//SUSPEND_FAILED;
10472 }
10473
10474 }
10475 else
10476 {
10477 MVOP_PRINTF("[%s,%5d]Do Nothing: %d\n",__FUNCTION__,__LINE__,u16PowerState);
10478 u16Return = FALSE;
10479 }
10480
10481 return u16Return;// for success
10482 }
10483
MDrv_MVOP_SetPowerState(EN_POWER_MODE u16PowerState)10484 MS_U32 MDrv_MVOP_SetPowerState(EN_POWER_MODE u16PowerState)
10485 {
10486 MVOP_DBG_TRACE(MVOP_PRINTF("[TRACE] %s, line:%d \n", __FUNCTION__, __LINE__);)
10487 #if ENABLE_UTOPIA2_INTERFACE
10488 stMVOP_SET_POWER_STATE IO_arg;
10489 IO_arg.u16PowerState = u16PowerState;
10490 IO_arg.u32Ret = FALSE;
10491
10492 if (pu32MVOP_Inst[E_MVOP_MAIN_STREAM] == NULL)
10493 {
10494 if(UtopiaOpen(MODULE_MVOP|MVOP_DRIVER_BASE, &pu32MVOP_Inst[E_MVOP_MAIN_STREAM], 0, NULL) != UTOPIA_STATUS_SUCCESS)
10495 {
10496 MVOP_PRINTF("[Fail] UtopiaOpen MVOP failed\n");
10497 return IO_arg.u32Ret;
10498 }
10499 }
10500
10501 if(UtopiaIoctl(pu32MVOP_Inst[E_MVOP_MAIN_STREAM], E_MVOP_CMD_SET_POWERSTATE, (void*)(&IO_arg)) != UTOPIA_STATUS_SUCCESS)
10502 {
10503 MVOP_PRINTF("[Fail] %s,%d\n",__FUNCTION__,__LINE__);
10504 return IO_arg.u32Ret;
10505 }
10506
10507 IO_arg.u32Ret = TRUE;
10508 return IO_arg.u32Ret;
10509 #else
10510 void* pInstance = NULL;
10511 return MDrv_MVOP_SetPowerState_V2(pInstance, u16PowerState);
10512 #endif
10513
10514
10515 }
10516
10517 #ifdef CONFIG_UTOPIA_PROC_DBG_SUPPORT
_MVOP_MdbInfoSWInput(MS_U64 * u64ReqHdl,MVOP_DevID eDevID,MVOP_InputCfg * stMvopInputCfg,MVOP_InputSel _eInputSel)10518 void _MVOP_MdbInfoSWInput(MS_U64 *u64ReqHdl, MVOP_DevID eDevID, MVOP_InputCfg* stMvopInputCfg, MVOP_InputSel _eInputSel)
10519 {
10520 MdbPrint(u64ReqHdl,"=== Input Config ===\n");
10521
10522 if((NULL == stMvopInputCfg))
10523 {
10524 if(MVOP_INPUT_UNKNOWN == _eInputSel)
10525 {
10526 MdbPrint(u64ReqHdl,"Yoffset : Na\n");
10527 MdbPrint(u64ReqHdl,"UVoffset : Na\n");
10528 MdbPrint(u64ReqHdl,"Hsize : Na\n");
10529 MdbPrint(u64ReqHdl,"Vsize : Na\n");
10530 MdbPrint(u64ReqHdl,"strip : Na\n");
10531 MdbPrint(u64ReqHdl,"422 : Na\n");
10532 MdbPrint(u64ReqHdl,"bProgressive : Na\n");
10533 MdbPrint(u64ReqHdl,"bDramContd : Na\n");
10534 MdbPrint(u64ReqHdl,"bField : Na\n");
10535 MdbPrint(u64ReqHdl,"b422Pack : Na\n");
10536 MdbPrint(u64ReqHdl,"YUVtype : Na\n");
10537 }
10538 else
10539 {
10540 MdbPrint(u64ReqHdl,"Yoffset : set from vdec fw\n");
10541 MdbPrint(u64ReqHdl,"UVoffset : set from vdec fw\n");
10542 MdbPrint(u64ReqHdl,"Hsize : set from vdec fw\n");
10543 MdbPrint(u64ReqHdl,"Vsize : set from vdec fw\n");
10544 MdbPrint(u64ReqHdl,"strip : set from vdec fw\n");
10545 MdbPrint(u64ReqHdl,"bProgressive : set from vdec fw\n");
10546 MdbPrint(u64ReqHdl,"bDramContd : set from vdec fw\n");
10547 MdbPrint(u64ReqHdl,"bField : set from vdec fw\n");
10548 MdbPrint(u64ReqHdl,"b422Pack : set from vdec fw\n");
10549 MdbPrint(u64ReqHdl,"YUVtype : set from vdec fw\n");
10550 }
10551 }
10552 else
10553 {
10554 MdbPrint(u64ReqHdl,"Yoffset : %d\n",stMvopInputCfg->u32YOffset);
10555 MdbPrint(u64ReqHdl,"UVoffset : %d\n",stMvopInputCfg->u32UVOffset);
10556 MdbPrint(u64ReqHdl,"Hsize : %d\n",stMvopInputCfg->u16HSize);
10557 MdbPrint(u64ReqHdl,"Vsize : %d\n",stMvopInputCfg->u16VSize);
10558 MdbPrint(u64ReqHdl,"strip : %d\n",stMvopInputCfg->u16StripSize);
10559 MdbPrint(u64ReqHdl,"bProgressive : %d\n",stMvopInputCfg->bProgressive);
10560 MdbPrint(u64ReqHdl,"bDramContd : %d\n",stMvopInputCfg->bDramRdContd);
10561 MdbPrint(u64ReqHdl,"bField : %d\n",stMvopInputCfg->bField);
10562 MdbPrint(u64ReqHdl,"b422Pack : %d\n",stMvopInputCfg->b422pack);
10563 switch(eDevID)
10564 {
10565 case E_MVOP_DEV_0:
10566 {
10567 if(E_MVOP_RGB_NONE == p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._eRgbFmt)
10568 {
10569 if(stMvopInputCfg->bYUV422)
10570 MdbPrint(u64ReqHdl,"YUVtype : 422\n");
10571 else
10572 MdbPrint(u64ReqHdl,"YUVtype : 420\n");
10573 }
10574 else
10575 {
10576 MdbPrint(u64ReqHdl,"YUVtype : RGB\n");
10577 }
10578 break;
10579 }
10580 #if MVOP_SUPPORT_SUB
10581 case E_MVOP_DEV_1:
10582 {
10583 if(E_MVOP_RGB_NONE == p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._eRgbFmt)
10584 {
10585 if(stMvopInputCfg->bYUV422)
10586 MdbPrint(u64ReqHdl,"YUVtype : 422\n");
10587 else
10588 MdbPrint(u64ReqHdl,"YUVtype : 420\n");
10589 }
10590 else
10591 {
10592 MdbPrint(u64ReqHdl,"YUVtype : RGB\n");
10593 }
10594
10595 break;
10596 }
10597 #endif
10598 default:
10599 break;
10600 }
10601
10602 }
10603 }
10604
_MVOP_MdbInfoSWOutput(MS_U64 * u64ReqHdl,MVOP_VidStat * stMvopOutputCfg,MS_BOOL bHdup)10605 void _MVOP_MdbInfoSWOutput(MS_U64 *u64ReqHdl, MVOP_VidStat* stMvopOutputCfg, MS_BOOL bHdup)
10606 {
10607 MdbPrint(u64ReqHdl,"\n=== Output Config ===\n");
10608
10609 if(NULL == stMvopOutputCfg)
10610 {
10611 MdbPrint(u64ReqHdl,"u16HorSize : Na\n");
10612 MdbPrint(u64ReqHdl,"u16VerSize : Na\n");
10613 MdbPrint(u64ReqHdl,"u16FrameRate : Na\n");
10614 MdbPrint(u64ReqHdl,"u8AspectRate : Na\n");
10615 MdbPrint(u64ReqHdl,"u8Interlace : Na\n");
10616 MdbPrint(u64ReqHdl,"u16HorOffset : Na\n");
10617 MdbPrint(u64ReqHdl,"u16VerOffset : Na\n");
10618 MdbPrint(u64ReqHdl,"bEnHDup : Na\n");
10619 }
10620 else
10621 {
10622 MdbPrint(u64ReqHdl,"u16HorSize : %d\n",stMvopOutputCfg->u16HorSize);
10623 MdbPrint(u64ReqHdl,"u16VerSize : %d\n",stMvopOutputCfg->u16VerSize);
10624 MdbPrint(u64ReqHdl,"u16FrameRate : %d\n",stMvopOutputCfg->u16FrameRate);
10625 MdbPrint(u64ReqHdl,"u8AspectRate : %d\n",stMvopOutputCfg->u8AspectRate);
10626 MdbPrint(u64ReqHdl,"u8Interlace : %d\n",stMvopOutputCfg->u8Interlace);
10627 MdbPrint(u64ReqHdl,"u16HorOffset : %d\n",stMvopOutputCfg->u16HorOffset);
10628 MdbPrint(u64ReqHdl,"u16VerOffset : %d\n",stMvopOutputCfg->u16VerOffset);
10629 MdbPrint(u64ReqHdl,"bEnHDup : %d\n",bHdup);
10630 }
10631 }
10632
_MVOP_MdbInfoFeature(MS_U64 * u64ReqHdl,MVOP_FeatureMdb * pstFeature)10633 void _MVOP_MdbInfoFeature(MS_U64 *u64ReqHdl, MVOP_FeatureMdb* pstFeature)
10634 {
10635 MdbPrint(u64ReqHdl,"\n=== Feature ===\n");
10636
10637 if(NULL == pstFeature)
10638 {
10639 MdbPrint(u64ReqHdl,"Mirror : Na\n");
10640 MdbPrint(u64ReqHdl,"3D type : Na\n");
10641 MdbPrint(u64ReqHdl,"HSK mode : Na\n");
10642 MdbPrint(u64ReqHdl,"XC gen timing : Na\n");
10643 MdbPrint(u64ReqHdl,"MVOP crop : Na\n");
10644 MdbPrint(u64ReqHdl,"OneField : Na\n");
10645 MdbPrint(u64ReqHdl,"2p mode : Na\n");
10646 MdbPrint(u64ReqHdl,"Force P : Na\n");
10647 MdbPrint(u64ReqHdl,"Ext FPS : Na\n");
10648 }
10649 else
10650 {
10651 MdbPrint(u64ReqHdl,"Mirror : %d\n",pstFeature->enMirror);
10652 MdbPrint(u64ReqHdl,"3D type : %d\n",pstFeature->en3D);
10653 MdbPrint(u64ReqHdl,"HSK mode : %d\n",pstFeature->bHSK);
10654 MdbPrint(u64ReqHdl,"XC gen timing : %d\n",pstFeature->bXCGenTiming);
10655 MdbPrint(u64ReqHdl,"MVOP crop start : %d,%d\n",pstFeature->stCropSt.u16Xpos,pstFeature->stCropSt.u16Ypos);
10656 MdbPrint(u64ReqHdl,"MVOP crop size : %d,%d\n",pstFeature->stCropSize.u16Width,pstFeature->stCropSize.u16Height);
10657 MdbPrint(u64ReqHdl,"OneField : %d\n",pstFeature->stCropSize);
10658 MdbPrint(u64ReqHdl,"2p mode : %d\n",pstFeature->b2P);
10659 MdbPrint(u64ReqHdl,"Force P : %d\n",pstFeature->bForceP);
10660 MdbPrint(u64ReqHdl,"Ext FPS : %d\n",pstFeature->u32Framerate);
10661 }
10662 }
10663
10664
_MVOP_MdbInfoSWOutputTiming(MS_U64 * u64ReqHdl,MVOP_Timing * pMVOPTiming)10665 void _MVOP_MdbInfoSWOutputTiming(MS_U64 *u64ReqHdl, MVOP_Timing* pMVOPTiming)
10666 {
10667 MdbPrint(u64ReqHdl,"///////// SW Output Info(to XC) /////////\n");
10668
10669 if(NULL == pMVOPTiming)
10670 {
10671 MdbPrint(u64ReqHdl,"Vtotal : Na\n");
10672 MdbPrint(u64ReqHdl,"Htotal : Na\n");
10673 MdbPrint(u64ReqHdl,"u16VImg_Start0 : Na\n");
10674 MdbPrint(u64ReqHdl,"u16HImg_Start : Na\n");
10675 MdbPrint(u64ReqHdl,"bInterlace : Na\n");
10676 MdbPrint(u64ReqHdl,"u8Framerate : Na\n");
10677 MdbPrint(u64ReqHdl,"u16ExpFrameRate : Na\n");
10678 MdbPrint(u64ReqHdl,"u16H_Freq : Na\n");
10679 MdbPrint(u64ReqHdl,"u16Width : Na\n");
10680 MdbPrint(u64ReqHdl,"u16Height : Na\n");
10681 MdbPrint(u64ReqHdl,"bHDuplicate : Na\n");
10682 MdbPrint(u64ReqHdl,"Hstar : Na\n");
10683 MdbPrint(u64ReqHdl,"Vstart : Na\n");
10684 }
10685 else
10686 {
10687 MdbPrint(u64ReqHdl,"Vtotal : %d\n",pMVOPTiming->u16V_TotalCount);
10688 MdbPrint(u64ReqHdl,"Htotal : %d\n",pMVOPTiming->u16H_TotalCount);
10689 MdbPrint(u64ReqHdl,"u16VImg_Start0 : %d\n",pMVOPTiming->u16VBlank1_Start);
10690 MdbPrint(u64ReqHdl,"u16HImg_Start : %d\n",pMVOPTiming->u16HImg_Start);
10691 MdbPrint(u64ReqHdl,"bInterlace : %d\n",pMVOPTiming->bInterlace);
10692 MdbPrint(u64ReqHdl,"u8Framerate : %d\n",pMVOPTiming->u8Framerate);
10693 MdbPrint(u64ReqHdl,"u16ExpFrameRate : %d\n",pMVOPTiming->u16ExpFrameRate);
10694 MdbPrint(u64ReqHdl,"u16H_Freq : %d\n",pMVOPTiming->u16H_Freq);
10695 MdbPrint(u64ReqHdl,"u16Width : %d\n",pMVOPTiming->u16Width);
10696 MdbPrint(u64ReqHdl,"u16Height : %d\n",pMVOPTiming->u16Height);
10697 MdbPrint(u64ReqHdl,"bHDuplicate : %d\n",pMVOPTiming->bHDuplicate);
10698 MdbPrint(u64ReqHdl,"Hstar : %d\n",(pMVOPTiming->u16HImg_Start/2)+2);
10699 MdbPrint(u64ReqHdl,"Vstart : %d\n",0x6); //fixme
10700 }
10701 }
10702
_MVOP_MdbInfoRegInputCfg(MS_U64 * u64ReqHdl,MVOP_DevID eDevID,MVOP_RegInputMdb * stRegInput)10703 void _MVOP_MdbInfoRegInputCfg(MS_U64 *u64ReqHdl, MVOP_DevID eDevID, MVOP_RegInputMdb* stRegInput)
10704 {
10705 MdbPrint(u64ReqHdl,"\n=== Input Setting ===\n");
10706
10707 if(NULL == stRegInput)
10708 {
10709 MdbPrint(u64ReqHdl,"Reg_Yoffset : Na\n");
10710 MdbPrint(u64ReqHdl,"Reg_UVoffset : Na\n");
10711 MdbPrint(u64ReqHdl,"Reg_Hsize : Na\n");
10712 MdbPrint(u64ReqHdl,"Reg_Vsize : Na\n");
10713 MdbPrint(u64ReqHdl,"Reg_strip : Na\n");
10714 MdbPrint(u64ReqHdl,"Reg_422 : Na\n");
10715 MdbPrint(u64ReqHdl,"Reg_bProgressive : Na\n");
10716 MdbPrint(u64ReqHdl,"Reg_bDramContd : Na\n");
10717 MdbPrint(u64ReqHdl,"Reg_bField : Na\n");
10718 MdbPrint(u64ReqHdl,"Reg_b422Pack : Na\n");
10719 MdbPrint(u64ReqHdl,"Reg_YUVtype : Na\n");
10720
10721 MdbPrint(u64ReqHdl,"Reg_DS Index : Na\n");
10722 MdbPrint(u64ReqHdl,"Reg_FDMask : Na\n");
10723 MdbPrint(u64ReqHdl,"Reg_bMfdecEn : Na\n");
10724 MdbPrint(u64ReqHdl,"Reg_bitlen address : Na\n");
10725 }
10726 else
10727 {
10728 memset(stRegInput, 0, sizeof(MVOP_RegInputMdb));
10729 //add hal api for get value
10730 MdbPrint(u64ReqHdl,"Reg_Yoffset : %d\n",stRegInput->u32RegYoffset);
10731 MdbPrint(u64ReqHdl,"Reg_UVoffset : %d\n",stRegInput->u32RegUVoffset);
10732 MdbPrint(u64ReqHdl,"Reg_Hsize : %d\n",stRegInput->u16RegHsize);
10733 MdbPrint(u64ReqHdl,"Reg_Vsize : %d\n",stRegInput->u16RegVsize);
10734 MdbPrint(u64ReqHdl,"Reg_strip : %d\n",stRegInput->u16RegStrip);
10735 MdbPrint(u64ReqHdl,"Reg_422 : %d\n",stRegInput->bReg422);
10736 MdbPrint(u64ReqHdl,"Reg_bProgressive : %d\n",stRegInput->bRegPMode);
10737 MdbPrint(u64ReqHdl,"Reg_bDramContd : %d\n",stRegInput->bRegDramContd);
10738 MdbPrint(u64ReqHdl,"Reg_bField : %d\n",stRegInput->bRegField);
10739 MdbPrint(u64ReqHdl,"Reg_b422Pack : %d\n",stRegInput->bReg422Pack);
10740 MdbPrint(u64ReqHdl,"Reg_YUVtype : %d\n");
10741
10742 MdbPrint(u64ReqHdl,"Reg_DS Index : %d\n",stRegInput->u8RegDSIndex);
10743 MdbPrint(u64ReqHdl,"Reg_FDMask : %d\n",stRegInput->u8RegFDMask);
10744 MdbPrint(u64ReqHdl,"Reg_bMfdecEn : %d\n",stRegInput->bRegMfdecEn);
10745 MdbPrint(u64ReqHdl,"Reg_bitlen address : %d\n",stRegInput->u32RegBitenAdd);
10746 }
10747
10748 }
10749
_MVOP_MdbInfoRegOutputCfg(MS_U64 * u64ReqHdl,MVOP_DevID eDevID,MVOP_RegOutputMdb * stRegOutput)10750 void _MVOP_MdbInfoRegOutputCfg(MS_U64 *u64ReqHdl, MVOP_DevID eDevID, MVOP_RegOutputMdb* stRegOutput)
10751 {
10752 MdbPrint(u64ReqHdl,"\n=== Output Setting ===\n");
10753
10754 if(NULL == stRegOutput)
10755 {
10756 MdbPrint(u64ReqHdl,"Reg_Vtotal : Na\n");
10757 MdbPrint(u64ReqHdl,"Reg_Htotal : Na\n");
10758 MdbPrint(u64ReqHdl,"Reg_u16VImg_Start0 : Na\n");
10759 MdbPrint(u64ReqHdl,"Reg_u16HImg_Start : Na\n");
10760 MdbPrint(u64ReqHdl,"Reg_bInterlace : Na\n");
10761 MdbPrint(u64ReqHdl,"Reg_u8Framerate : Na\n");
10762 MdbPrint(u64ReqHdl,"Reg_u16ExpFrameRate : Na\n");
10763 MdbPrint(u64ReqHdl,"Reg_u16H_Freq : Na\n");
10764 MdbPrint(u64ReqHdl,"Reg_u16Width : Na\n");
10765 MdbPrint(u64ReqHdl,"Reg_u16Height : Na\n");
10766 MdbPrint(u64ReqHdl,"Reg_bHDuplicate : Na\n");
10767
10768 MdbPrint(u64ReqHdl,"Reg_b2P : Na\n");
10769 MdbPrint(u64ReqHdl,"Reg_Clock : Na\n");
10770 MdbPrint(u64ReqHdl,"Reg_Vsync Forwarding Lines: Na\n");
10771 }
10772 else
10773 {
10774 memset(stRegOutput, 0, sizeof(MVOP_RegOutputMdb));
10775 //add hal api for get value
10776 MdbPrint(u64ReqHdl,"Reg_Vtotal : %d\n",stRegOutput->u32RegVtt);
10777 MdbPrint(u64ReqHdl,"Reg_Htotal : %d\n",stRegOutput->u32RegHtt);
10778 MdbPrint(u64ReqHdl,"Reg_u16VImg_Start0 : %d\n",stRegOutput->u16RegVImgst);
10779 MdbPrint(u64ReqHdl,"Reg_u16HImg_Start : %d\n",stRegOutput->u16RegHImgst);
10780 MdbPrint(u64ReqHdl,"Reg_bInterlace : %d\n",stRegOutput->bRegInterlace);
10781 MdbPrint(u64ReqHdl,"Reg_u8Framerate : %d\n",stRegOutput->u8RegFPS);
10782 MdbPrint(u64ReqHdl,"Reg_u16ExpFrameRate : %d\n",stRegOutput->u16RegExpFPS);
10783 MdbPrint(u64ReqHdl,"Reg_u16H_Freq : %d\n",stRegOutput->u16RegHFreq);
10784 MdbPrint(u64ReqHdl,"Reg_u16Width : %d\n",stRegOutput->u16RegWidth);
10785 MdbPrint(u64ReqHdl,"Reg_u16Height : %d\n",stRegOutput->u16RegHeight);
10786 MdbPrint(u64ReqHdl,"Reg_bHDuplicate : %d\n",stRegOutput->bRegHDup);
10787
10788 MdbPrint(u64ReqHdl,"Reg_b2P : %d\n",stRegOutput->bReg2P);
10789 MdbPrint(u64ReqHdl,"Reg_Clock : %d\n",stRegOutput->enRegCLOCK);
10790 MdbPrint(u64ReqHdl,"Reg_Vsync Forwarding Lines: %d\n",stRegOutput->u16RegVsForward);
10791 }
10792 }
10793
_MVOP_MdbInfoRegFeature(MS_U64 * u64ReqHdl,MVOP_FeatureMdb * pstFeature)10794 void _MVOP_MdbInfoRegFeature(MS_U64 *u64ReqHdl, MVOP_FeatureMdb* pstFeature)
10795 {
10796 MdbPrint(u64ReqHdl,"\n=== Reg Feature ===\n");
10797
10798 if(NULL == pstFeature)
10799 {
10800 MdbPrint(u64ReqHdl,"Mirror : Na\n");
10801 MdbPrint(u64ReqHdl,"3D type : Na\n");
10802 MdbPrint(u64ReqHdl,"HSK mode : Na\n");
10803 MdbPrint(u64ReqHdl,"XC gen timing : Na\n");
10804 MdbPrint(u64ReqHdl,"MVOP crop : Na\n");
10805 MdbPrint(u64ReqHdl,"OneField : Na\n");
10806 MdbPrint(u64ReqHdl,"2p mode : Na\n");
10807 MdbPrint(u64ReqHdl,"Force P : Na\n");
10808 MdbPrint(u64ReqHdl,"Ext FPS : Na\n");
10809 MdbPrint(u64ReqHdl,"YUV type : Na\n");
10810 }
10811 else
10812 {
10813 memset(pstFeature, 0, sizeof(MVOP_FeatureMdb));
10814 //add hal api for get value
10815 MdbPrint(u64ReqHdl,"Mirror : %d\n",pstFeature->enMirror);
10816 MdbPrint(u64ReqHdl,"3D type : %d\n",pstFeature->en3D);
10817 MdbPrint(u64ReqHdl,"HSK mode : %d\n",pstFeature->bHSK);
10818 MdbPrint(u64ReqHdl,"XC gen timing : %d\n",pstFeature->bXCGenTiming);
10819 MdbPrint(u64ReqHdl,"MVOP crop start : %d,%d\n",pstFeature->stCropSt.u16Xpos,pstFeature->stCropSt.u16Ypos);
10820 MdbPrint(u64ReqHdl,"MVOP crop size : %d,%d\n",pstFeature->stCropSize.u16Width,pstFeature->stCropSize.u16Height);
10821 MdbPrint(u64ReqHdl,"OneField : %d\n",pstFeature->stCropSize);
10822 MdbPrint(u64ReqHdl,"2p mode : %d\n",pstFeature->b2P);
10823 MdbPrint(u64ReqHdl,"Force P : %d\n",pstFeature->bForceP);
10824 MdbPrint(u64ReqHdl,"Ext FPS : %d\n",pstFeature->u32Framerate);
10825 MdbPrint(u64ReqHdl,"YUV type : 444\n");//fix me
10826 }
10827 }
10828
MDrv_MVOP_GetMVOPMdbInfo_V2(MS_U64 * u64ReqHdl)10829 void MDrv_MVOP_GetMVOPMdbInfo_V2(MS_U64 *u64ReqHdl)
10830 {
10831 MVOP_DevID eDevID = E_MVOP_DEV_0; //default is to control main mvop
10832 MVOP_InputCfg* stMvopInputCfg = NULL;
10833 MVOP_InputSel _eInputSel = MVOP_INPUT_UNKNOWN;
10834 MVOP_VidStat* stMvopOutputCfg = NULL;
10835 MVOP_FeatureMdb* pstFeature = NULL;
10836 MVOP_Timing* pstTiming = NULL;
10837 MVOP_RegInputMdb* stRegInput = NULL;
10838 MVOP_RegOutputMdb* stRegOutput = NULL;
10839 MVOP_FeatureMdb* pstRegFeature = NULL;
10840 MS_BOOL bIsInint = FALSE;
10841 MS_BOOL bIsEnable = FALSE;
10842
10843 MdbPrint(u64ReqHdl,"---------MStar MVOP Info---------\n\n");
10844 if(NULL != p_gDrvMVOPCtx)
10845 {
10846 //data collection
10847 switch(eDevID)
10848 {
10849 case E_MVOP_DEV_0:
10850 {
10851 bIsInint = p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._stMVOPDrvStat.bIsInit;
10852 bIsEnable = p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._stMVOPDrvStat.bIsEnable;
10853 _eInputSel = p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._eInputSel;
10854 stMvopInputCfg = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopInputCfg;
10855 stMvopOutputCfg = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopOutputCfg;
10856 MVOP_FeatureMdb stSWFtr;
10857 stSWFtr.enMirror = 0;
10858 stSWFtr.en3D = 0;
10859 stSWFtr.bHSK = 0;
10860 stSWFtr.bXCGenTiming = 0;
10861 stSWFtr.stCropSt.u16Xpos = 0;
10862 stSWFtr.stCropSt.u16Ypos = 0;
10863 stSWFtr.stCropSize.u16Width = 0;
10864 stSWFtr.stCropSize.u16Height = 0;
10865 stSWFtr.bOneField = 0;
10866 stSWFtr.b2P = 0;
10867 stSWFtr.bForceP = 0;
10868 stSWFtr.u32Framerate = 0;
10869 pstFeature = &stSWFtr;
10870 pstTiming = &p_gDrvMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_0]._mvopTiming;
10871 break;
10872 }
10873 #if MVOP_SUPPORT_SUB
10874 case E_MVOP_DEV_1:
10875 {
10876 bIsInint = p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._stMVOPDrvStat.bIsInit;
10877 bIsEnable = p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._stMVOPDrvStat.bIsEnable;
10878 _eInputSel = p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._eInputSel;
10879 stMvopInputCfg = &p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopInputCfg;
10880 stMvopOutputCfg = &p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopOutputCfg;
10881 MVOP_FeatureMdb stSWFtr;
10882 stSWFtr.enMirror = 0;
10883 stSWFtr.en3D = 0;
10884 stSWFtr.bHSK = 0;
10885 stSWFtr.bXCGenTiming = 0;
10886 stSWFtr.stCropSt.u16Xpos = 0;
10887 stSWFtr.stCropSt.u16Ypos = 0;
10888 stSWFtr.stCropSize.u16Width = 0;
10889 stSWFtr.stCropSize.u16Height = 0;
10890 stSWFtr.bOneField = 0;
10891 stSWFtr.b2P = 0;
10892 stSWFtr.bForceP = 0;
10893 stSWFtr.u32Framerate = 0;
10894 pstFeature = &stSWFtr;
10895 pstTiming = &p_gDrvSubMVOPCtx->_stMVOPDrvCtrl[E_MVOP_DEV_1]._mvopTiming;
10896 break;
10897 }
10898 #endif
10899 default:
10900 break;
10901 }
10902 }
10903
10904 //print info
10905
10906 MdbPrint(u64ReqHdl,"IsInit : %d\n",bIsInint);
10907 MdbPrint(u64ReqHdl,"Enable : %d\n",bIsEnable);
10908 MdbPrint(u64ReqHdl,"Input Select : %d\n",_eInputSel);
10909
10910 MdbPrint(u64ReqHdl,"///////// SW Input Info(from SDK) /////////\n");
10911
10912 _MVOP_MdbInfoSWInput(u64ReqHdl, eDevID, stMvopInputCfg, _eInputSel);
10913
10914 MdbPrint(u64ReqHdl,"RGB format : Na\n");//fixme
10915
10916 _MVOP_MdbInfoSWOutput(u64ReqHdl, stMvopOutputCfg, FALSE);
10917
10918 _MVOP_MdbInfoFeature(u64ReqHdl, pstFeature);
10919
10920 _MVOP_MdbInfoSWOutputTiming(u64ReqHdl, pstTiming);
10921
10922 MdbPrint(u64ReqHdl,"///////// Register Info /////////\n");
10923 _MVOP_MdbInfoRegInputCfg(u64ReqHdl, eDevID, stRegInput);
10924
10925 _MVOP_MdbInfoRegOutputCfg(u64ReqHdl, eDevID, stRegOutput);
10926
10927 _MVOP_MdbInfoRegFeature(u64ReqHdl, pstRegFeature);
10928 }
10929 #endif
10930
10931
10932