1 //<MStar Software>
2 //******************************************************************************
3 // MStar Software
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77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
79 //
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92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95 //-------------------------------------------------------------------------------------------------
96 // Include Files
97 //-------------------------------------------------------------------------------------------------
98 #include "MsCommon.h"
99 #ifndef MSOS_TYPE_LINUX_KERNEL
100 #include <string.h>
101 #endif
102 #include "utopia.h"
103 #include "utopia_dapi.h"
104 #include "MsTypes.h"
105 #include "drvGOP.h"
106 #include "halGOP.h"
107 #include "regGOP.h"
108 #include "drvMMIO.h"
109 #include "MsOS.h"
110 #include "drvGFLIP.h"
111 #include "halCHIP.h"
112 #include "drvGOP_priv.h"
113
114 #ifdef XC_FSC_FRC_PATCH
115 extern void MDrv_SC_Get_GOPOffset(MS_U16 *u16OffsetH, MS_U16 *u16OffsetV);
116 #endif
117
118 //-------------------------------------------------------------------------------------------------
119 // Local Compiler Options
120 //-------------------------------------------------------------------------------------------------
121
122
123 //-------------------------------------------------------------------------------------------------
124 // Local Defines
125 //-------------------------------------------------------------------------------------------------
126 #ifdef MSOS_TYPE_LINUX_KERNEL
127 #define atoi(str) simple_strtoul(((str != NULL) ? str : ""), NULL, 0)
128 #endif
129
130 //check 1 time/1ms, maximum vsync time is 1000/48 ms(scaler 48hz output), so check 22 times at most
131
132 #ifdef GOP_4K2K30
133 #define GOP_TIMEOUT_CNT_OS 40UL
134 #else
135 #define GOP_TIMEOUT_CNT_OS 22UL
136 #endif
137 #define GOP_TIMEOUT_CNT_OS_YIELD 0x10000UL
138 #define GOP_TIMEOUT_CNT_NOS 0x100000UL
139
140 #define PALETTE_BY_REGDMA 1UL
141 #define msWarning(c) do {} while (0)
142 #define msFatal(c) do {} while (0)
143 #define ERR_FB_ID_OUT_OF_RANGE 0x0300UL
144 #define ERR_FB_ID_NOT_ALLOCATED 0x0301UL
145 #define ERR_FB_ID_ALREADY_ALLOCATED 0x0302UL
146 #define ERR_FB_OUT_OF_MEMORY 0x0303UL
147 #define ERR_FB_OUT_OF_ENTRY 0x0304UL
148 #define PAR_IGNORE 0xFFUL // PARAM constant for ignore
149
150 //=============================================================
151 // Debug Log
152 #include "ULog.h"
153 MS_U32 u32GOPDbgLevel_drv;
154
155 // Debug Logs, level form low(INFO) to high(FATAL, always show)
156 // Function information, ex function entry
157 #define GOP_D_INFO(x, args...) if(u32GOPDbgLevel_drv >= E_GOP_Debug_Level_HIGH) {ULOGI("GOP DRV", x, ##args);}
158 // Warning, illegal paramter but can be self fixed in functions
159 #define GOP_D_WARN(x, args...) if(u32GOPDbgLevel_drv >= E_GOP_Debug_Level_HIGH) {ULOGW("GOP DRV", x, ##args);}
160 // Need debug, illegal paramter.
161 #define GOP_D_DBUG(x, args...) if(u32GOPDbgLevel_drv >= E_GOP_Debug_Level_MED) {ULOGD("GOP DRV", x, ##args);}
162 // Error, function will be terminated but system not crash
163 #define GOP_D_ERR(x, args...) if(u32GOPDbgLevel_drv >= E_GOP_Debug_Level_LOW) {ULOGE("GOP DRV", x, ##args);}
164 // Critical, system crash. (ex. assert)
165 #define GOP_D_FATAL(x, args...) if(u32GOPDbgLevel_drv >= E_GOP_Debug_Level_LOW) {ULOGF("GOP DRV", x, ##args);}
166 //=============================================================
167
168 #if GOP_LOCK_SUPPORT
169 //Move GOP mutex define here for gflip to access
170 //But we do not suggest to use it in DRV layer in normal case, try use it in API layer
171 #define _ObtainMutex() \
172 {\
173 if(pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared == NULL){return FALSE;} \
174 if(FALSE == MsOS_ObtainMutex(pGOPDrvLocalCtx->apiCtxLocal.s32GOPMutex, MSOS_WAIT_FOREVER)){APIGOP_ASSERT(0, (GOP_D_FATAL("DRV_GOP_ENTRY: Fatal Error, Obtain GOP mutex fail\n")));} \
175 APIGOP_ASSERT(0==pGOPDrvLocalCtx->apiCtxLocal.s32GOPMutexCnt, (GOP_D_FATAL("DRV_GOP_ENTRY: Fatal Error, No GOP mutex to release\n"))); \
176 pGOPDrvLocalCtx->apiCtxLocal.s32GOPMutexCnt++; \
177 pGOPDrvLocalCtx->apiCtxLocal.s32GOPLock=MsOS_GetOSThreadID(); \
178 if((pGOPDrvLocalCtx->apiCtxLocal.u32GOPClientId!=pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u32LstGOPClientId) \
179 &&pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u32LstGOPClientId) \
180 { \
181 GOP_GOP_Restore_Ctx(&(pGOPDrvLocalCtx->apiCtxLocal)); \
182 pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u32LstGOPClientId = pGOPDrvLocalCtx->apiCtxLocal.u32GOPClientId; \
183 } \
184 }
185
186 //Warning: we do not suggest to use it in DRV layer in normal case, try use it in API layer
187 #define DRV_GOP_ENTRY() \
188 { \
189 if (pGOPDrvLocalCtx->apiCtxLocal.s32GOPMutex < 0) \
190 { \
191 GOP_D_DBUG("DRV_GOP_ENTRY: Fatal Error, No GOP mutex to obtain\n"); \
192 } \
193 if(0 < pGOPDrvLocalCtx->apiCtxLocal.s32GOPMutexCnt) \
194 { \
195 if (pGOPDrvLocalCtx->apiCtxLocal.s32GOPLock!=MsOS_GetOSThreadID())\
196 {_ObtainMutex(); }\
197 else\
198 {pGOPDrvLocalCtx->apiCtxLocal.s32GOPMutexCnt++;} \
199 } \
200 else \
201 {_ObtainMutex();} \
202 }
203
204 //Warning: we do not suggest to use it in DRV layer in normal case, try use it in API layer
205 #define DRV_GOP_RETURN() \
206 { \
207 APIGOP_ASSERT((pGOPDrvLocalCtx->apiCtxLocal.s32GOPLock==MsOS_GetOSThreadID()), (GOP_D_FATAL("\nDRV_GOP_RETURN: Fatal Error, Task ID mismatch[%d]->[%d] \n", pGOPDrvLocalCtx->apiCtxLocal.s32GOPLock, (MS_S32)MsOS_GetOSThreadID()))); \
208 APIGOP_ASSERT((0<pGOPDrvLocalCtx->apiCtxLocal.s32GOPMutexCnt), (GOP_D_FATAL("\nDRV_GOP_RETURN: Fatal Error, No Mutex to release[Cnt=%d]\n", pGOPDrvLocalCtx->apiCtxLocal.s32GOPMutexCnt))); \
209 if(1 < pGOPDrvLocalCtx->apiCtxLocal.s32GOPMutexCnt) \
210 {pGOPDrvLocalCtx->apiCtxLocal.s32GOPMutexCnt--;} \
211 else if(0 < pGOPDrvLocalCtx->apiCtxLocal.s32GOPMutexCnt) \
212 { \
213 pGOPDrvLocalCtx->apiCtxLocal.s32GOPLock = -1; \
214 pGOPDrvLocalCtx->apiCtxLocal.s32GOPMutexCnt--;\
215 if(FALSE == MsOS_ReleaseMutex(pGOPDrvLocalCtx->apiCtxLocal.s32GOPMutex)){APIGOP_ASSERT(0, (GOP_D_FATAL("DRV_GOP_ENTRY: Fatal Error, Release GOP mutex fail\n")));} \
216 } \
217 else{GOP_D_DBUG("\nDRV_GOP_RETURN: Fatal Error, No mutex to release\n");} \
218 }
219 #else
220 #define DRV_GOP_ENTRY() while(0)
221 #define DRV_GOP_RETURN() while(0)
222 #endif
223
224 #if GOP_XC_LOCK_SUPPORT
225 #if GOP_XC_LOCK_DEBUG
226 ///XC MUTEX for GOP driver access SC registers
227 ///Place it in Drv layer NOT the API Layer is to avoid Mutex rase condition, because GOP functions will use some XC call back functions
228 #define _Obtain_XCMutex() \
229 {\
230 pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_MutexCnt++; \
231 pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_Lock=MsOS_GetOSThreadID(); \
232 GOP_D_INFO("[%s][%05d][%d]XC_LOCK+++[%d]\n",__FUNCTION__,__LINE__, pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_Lock, pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_MutexCnt); \
233 MsOS_ObtainMutex(pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_Mutex, MSOS_WAIT_FOREVER); \
234 }
235
236 #define _Release_XCMutex() \
237 { \
238 pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_MutexCnt--;\
239 GOP_D_INFO("[%s][%05d][%d]XC_LOCK---[%d]\n",__FUNCTION__,__LINE__, pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_Lock, pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_MutexCnt); \
240 MsOS_ReleaseMutex(pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_Mutex); \
241 }
242 #else
243 #define _Obtain_XCMutex() \
244 {\
245 pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_MutexCnt++; \
246 pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_Lock=MsOS_GetOSThreadID(); \
247 MsOS_ObtainMutex(pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_Mutex, MSOS_WAIT_FOREVER); \
248 }
249
250 #define _Release_XCMutex() \
251 { \
252 pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_MutexCnt--;\
253 MsOS_ReleaseMutex(pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_Mutex); \
254 }
255 #endif
256
257 #define DRV_GOP_XC_ENTRY() \
258 { \
259 if(0 < pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_MutexCnt) \
260 { \
261 if (pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_Lock!=MsOS_GetOSThreadID()) \
262 {_Obtain_XCMutex(); } \
263 else \
264 {pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_MutexCnt++;} \
265 } \
266 else \
267 {_Obtain_XCMutex();} \
268 }
269
270 #define DRV_GOP_XC_RETURN() \
271 { \
272 if(pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_Lock != MsOS_GetOSThreadID()) \
273 {GOP_D_DBUG("DRV_GOP_XC_RETURN: Fatal Error, Task ID mismatch [%d]->[%d]\n", pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_Lock, (MS_S32)MsOS_GetOSThreadID());} \
274 if(0<pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_MutexCnt){ \
275 if(1 < pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_MutexCnt) \
276 {pGOPDrvLocalCtx->apiCtxLocal.s32GOPXC_MutexCnt--;} \
277 else \
278 { \
279 _Release_XCMutex(); \
280 } \
281 }else{GOP_D_DBUG("DRV_GOP_XC_RETURN: Fatal Error, No mutex to release\n");} \
282 }
283 #else
284 #define DRV_GOP_XC_ENTRY() while(0)
285 #define DRV_GOP_XC_RETURN() while(0)
286 #endif
287
288 #if GOP_XC_SEMPHORE_PROTECT
289 #define E_XC_POOL_ID_INTERNAL_REGISTER 0
290 #if GOP_XC_LOCK_DEBUG
291 #define DRV_GOP_XC_GET_SEMPHORE() \
292 { \
293 if (!pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bXCDirrectBankSupport) \
294 { \
295 if(_GOP_Get_XCSemaphore() != UTOPIA_STATUS_SUCCESS) \
296 {GOP_D_DBUG("DRV_GOP_XC_GET_SEMPHORE: Fatal Error, %s get XC semaphore fail\n", __FUNCTION__);} \
297 } \
298 }
299
300 #define DRV_GOP_XC_RELEASE_SEMPHORE() \
301 { \
302 if (!pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bXCDirrectBankSupport) \
303 { \
304 if (_GOP_Release_XCSemaphore() != UTOPIA_STATUS_SUCCESS) \
305 {GOP_D_DBUG("DRV_GOP_XC_RELEASE_SEMPHORE: Fatal Error, %s release XC semaphore fail\n",__FUNCTION__);} \
306 } \
307 }
308 #else
309 #define DRV_GOP_XC_GET_SEMPHORE() \
310 { \
311 if (!pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bXCDirrectBankSupport) \
312 { \
313 _GOP_Get_XCSemaphore(); \
314 } \
315 }
316
317 #define DRV_GOP_XC_RELEASE_SEMPHORE() \
318 { \
319 if (!pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bXCDirrectBankSupport) \
320 { \
321 _GOP_Release_XCSemaphore(); \
322 } \
323 }
324 #endif
325 #else
326 #define DRV_GOP_XC_GET_SEMPHORE() while(0)
327 #define DRV_GOP_XC_RELEASE_SEMPHORE() while(0)
328 #endif
329 #define TESTPATTERN_CALC(x) ((x&0xF0)<<4)+(x&0xF)
330
331 // Define return values of check align
332 #define CHECKALIGN_SUCCESS 1UL
333 #define CHECKALIGN_FORMAT_FAIL 2UL
334 #define CHECKALIGN_PARA_FAIL 3UL
335
336 #define FRAMEPACKING_1080P_GAP (45)
337 #define FRAMEPACKING_720P_GAP (30)
338
339 #define GOP_ASSERT(x) {printf("\33[0;36m error in %s:%d \33[m \n",__FUNCTION__,__LINE__);}
340 //-------------------------------------------------------------------------------------------------
341 // Local Structures
342 //-------------------------------------------------------------------------------------------------
343
344 //-------------------------------------------------------------------------------------------------
345 // Global Variables
346 //-------------------------------------------------------------------------------------------------
347 #if GOP_XC_SEMPHORE_PROTECT
348 extern void* pInstantGOP_XC;
349 extern void* g_pXCResource[];
350 #endif
351 extern MS_BOOL (*_fpXCIsInterlace)(void);
352 extern MS_U16 (*_fpXCGetCapHStart)(void);
353
354 //-------------------------------------------------------------------------------------------------
355 // Local Variables
356 //-------------------------------------------------------------------------------------------------
357 #ifdef INSTANT_PRIVATE
358 #define g_gopDrvCtxLocal psGOPInstPri->g_gopDrvCtxLocal
359 #else
360 GOP_CTX_DRV_LOCAL g_gopDrvCtxLocal;
361 #endif
362
363 #if defined(MSOS_TYPE_LINUX) || defined(MSOS_TYPE_LINUX_KERNEL)
364 #else
365 GOP_CTX_DRV_SHARED g_gopDrvCtxShared;
366 #endif
367
368 #if GOP_XC_SEMPHORE_PROTECT
369 static MS_BOOL _XC_Inited = FALSE;
370 #endif
371
372 MS_U16 _GopVStretchTable[MAX_GOP_VSTRETCH_MODE_SUPPORT][GOP_VSTRETCH_TABLE_NUM] =
373 {
374 //liner
375 {0x14,0x3c,0x13,0x3d,
376 0x11,0x3f,0x10,0x00,
377 0x0e,0x02,0x0b,0x05,
378 0x09,0x07,0x08,0x08,
379 0x14,0x3c,0x13,0x3d,
380 0x11,0x3f,0x10,0x00,
381 0x0e,0x02,0x0b,0x05,
382 0x09,0x07,0x08,0x08,
383 },
384 //
385 {0x0f,0x01,0x0e,0x02,
386 0x0d,0x03,0x0c,0x04,
387 0x0b,0x05,0x0a,0x06,
388 0x09,0x07,0x08,0x08,
389 0x0f,0x01,0x0e,0x02,
390 0x0d,0x03,0x0c,0x04,
391 0x0b,0x05,0x0a,0x06,
392 0x09,0x07,0x08,0x08,
393 },
394 //
395 {0x0f,0x01,0x0e,0x02,
396 0x0d,0x03,0x0c,0x04,
397 0x0b,0x05,0x0a,0x06,
398 0x09,0x07,0x08,0x08,
399 0x0f,0x01,0x0e,0x02,
400 0x0d,0x03,0x0c,0x04,
401 0x0b,0x05,0x0a,0x06,
402 0x09,0x07,0x08,0x08,
403 },
404 //liner Gain0
405 {0x0f,0x01,0x0e,0x02,
406 0x0d,0x03,0x0c,0x04,
407 0x0b,0x05,0x0a,0x06,
408 0x09,0x07,0x08,0x08,
409 0x0f,0x01,0x0e,0x02,
410 0x0d,0x03,0x0c,0x04,
411 0x0b,0x05,0x0a,0x06,
412 0x09,0x07,0x08,0x08,
413 },
414 //liner Gain1
415 {0x10,0x00,0x0F,0x01,
416 0x0E,0x02,0x0D,0x03,
417 0x0C,0x04,0x0B,0x05,
418 0x0A,0x06,0x08,0x08,
419 0x10,0x00,0x0F,0x01,
420 0x0E,0x02,0x0D,0x03,
421 0x0C,0x04,0x0B,0x05,
422 0x0A,0x06,0x08,0x08,
423 },
424 };
425
426 MS_U16 _GopHStretchTable[MAX_GOP_HSTRETCH_MODE_SUPPORT][GOP_STRETCH_TABLE_NUM] =
427 {
428
429 //6-tap Default
430 { 0x03,0x01,0x16,0x01,0x03,
431 0x00,0x03,0x02,0x16,0x04,
432 0x04,0x01,0x02,0x03,0x13,
433 0x07,0x04,0x01,0x02,0x04,
434 0x10,0x0b,0x04,0x01,0x03,
435 0x01,0x16,0x01,0x03,0x00,
436 0x03,0x02,0x16,0x04,0x04,
437 0x01,0x02,0x03,0x13,0x07,
438 0x04,0x01,0x02,0x04,0x10,
439 0x0b,0x04,0x01,0x00,0x01
440 },
441
442 //Duplicate ->Set as default
443 { 0x03,0x01,0x16,0x01,0x03,
444 0x00,0x03,0x02,0x16,0x04,
445 0x04,0x01,0x02,0x03,0x13,
446 0x07,0x04,0x01,0x02,0x04,
447 0x10,0x0b,0x04,0x01,0x03,
448 0x01,0x16,0x01,0x03,0x00,
449 0x03,0x02,0x16,0x04,0x04,
450 0x01,0x02,0x03,0x13,0x07,
451 0x04,0x01,0x02,0x04,0x10,
452 0x0b,0x04,0x01,0x00,0x01
453 },
454
455 //6-tap Linear
456 { 0x00,0x00,0x10,0x00,0x00,
457 0x00,0x00,0x00,0x0E,0x02,
458 0x00,0x00,0x00,0x00,0x0C,
459 0x04,0x00,0x00,0x00,0x00,
460 0x09,0x07,0x00,0x00,0x00,
461 0x00,0x10,0x00,0x00,0x00,
462 0x00,0x00,0x0e,0x02,0x00,
463 0x00,0x00,0x00,0x0c,0x04,
464 0x00,0x00,0x00,0x00,0x09,
465 0x07,0x00,0x00,0x00,0x00
466 },
467
468 //6-tap Nearest
469 { 0x00,0x00,0x10,0x00,0x00,
470 0x00,0x00,0x00,0x10,0x00,
471 0x00,0x00,0x00,0x00,0x10,
472 0x00,0x00,0x00,0x00,0x00,
473 0x10,0x00,0x00,0x00,0x00,
474 0x00,0x10,0x00,0x00,0x00,
475 0x00,0x00,0x10,0x00,0x00,
476 0x00,0x00,0x00,0x10,0x00,
477 0x00,0x00,0x00,0x00,0x10,
478 0x00,0x00,0x00,0x00,0x00
479 },
480
481 //6-tap Gain0
482 { 0x00,0x01,0x10,0x01,0x00,
483 0x00,0x00,0x02,0x0f,0x04,
484 0x01,0x00,0x01,0x02,0x0d,
485 0x05,0x01,0x00,0x00,0x02,
486 0x0c,0x08,0x02,0x00,0x00,
487 0x01,0x10,0x01,0x00,0x00,
488 0x00,0x02,0x0f,0x04,0x01,
489 0x00,0x01,0x02,0x0d,0x05,
490 0x01,0x00,0x00,0x02,0x0c,
491 0x08,0x02,0x00,0x00,0x00
492 },
493
494 //6-tap Gain1
495 { 0x02,0x01,0x14,0x01,0x02,
496 0x00,0x02,0x02,0x12,0x05,
497 0x03,0x00,0x00,0x03,0x10,
498 0x06,0x02,0x01,0x01,0x03,
499 0x0e,0x0a,0x03,0x01,0x02,
500 0x01,0x14,0x01,0x02,0x00,
501 0x02,0x02,0x12,0x05,0x03,
502 0x00,0x00,0x03,0x10,0x06,
503 0x02,0x01,0x01,0x03,0x0e,
504 0x0a,0x03,0x01,0x00,0x00
505 },
506
507 //6-tap Gain2
508 { 0x03,0x01,0x16,0x01,0x03,
509 0x00,0x03,0x02,0x16,0x04,
510 0x04,0x01,0x02,0x03,0x13,
511 0x07,0x04,0x01,0x02,0x04,
512 0x10,0x0b,0x04,0x01,0x03,
513 0x01,0x16,0x01,0x03,0x00,
514 0x03,0x02,0x16,0x04,0x04,
515 0x01,0x02,0x03,0x13,0x07,
516 0x04,0x01,0x02,0x04,0x10,
517 0x0b,0x04,0x01,0x00,0x00
518 },
519
520 //6-tap Gain3
521 { 0x05,0x01,0x19,0x02,0x05,
522 0x00,0x04,0x03,0x18,0x06,
523 0x06,0x01,0x03,0x04,0x15,
524 0x08,0x04,0x02,0x04,0x04,
525 0x13,0x0d,0x06,0x02,0x05,
526 0x01,0x19,0x02,0x05,0x00,
527 0x04,0x03,0x18,0x06,0x06,
528 0x01,0x03,0x04,0x15,0x08,
529 0x04,0x02,0x04,0x04,0x13,
530 0x0d,0x06,0x02,0x00,0x00
531 },
532
533 //6-tap Gain4
534 { 0x00,0x01,0x11,0x00,0x00,
535 0x00,0x00,0x02,0x0f,0x04,
536 0x01,0x00,0x00,0x01,0x0d,
537 0x05,0x01,0x00,0x00,0x02,
538 0x0c,0x08,0x02,0x00,0x03,
539 0x01,0x16,0x01,0x03,0x00,
540 0x03,0x02,0x16,0x04,0x04,
541 0x01,0x02,0x03,0x13,0x07,
542 0x04,0x01,0x02,0x04,0x10,
543 0x0b,0x04,0x01,0x00,0x00
544 },
545
546 //6-tap Gain5
547 { 0x00,0x00,0x10,0x00,0x00,
548 0x00,0x00,0x00,0x0E,0x02,
549 0x00,0x00,0x00,0x00,0x0C,
550 0x04,0x00,0x00,0x00,0x00,
551 0x08,0x08,0x00,0x00,0x00,
552 0x00,0x10,0x00,0x00,0x00,
553 0x00,0x00,0x0E,0x02,0x00,
554 0x00,0x00,0x00,0x0C,0x04,
555 0x00,0x00,0x00,0x00,0x08,
556 0x08,0x00,0x00,0x00,0x00
557 },
558 //4-tap ->Set as default
559 { 0x03,0x01,0x16,0x01,0x03,
560 0x00,0x03,0x02,0x16,0x04,
561 0x04,0x01,0x02,0x03,0x13,
562 0x07,0x04,0x01,0x02,0x04,
563 0x10,0x0b,0x04,0x01,0x03,
564 0x01,0x16,0x01,0x03,0x00,
565 0x03,0x02,0x16,0x04,0x04,
566 0x01,0x02,0x03,0x13,0x07,
567 0x04,0x01,0x02,0x04,0x10,
568 0x0b,0x04,0x01,0x00,0x01
569 },
570 //2-tap
571 { 0x00,0x00,0x10,0x00,0x00,
572 0x00,0x00,0x00,0x00,0x00,
573 0x00,0x00,0x00,0x00,0x00,
574 0x00,0x00,0x00,0x00,0x00,
575 0x08,0x08,0x00,0x00,0x00,
576 0x00,0x10,0x00,0x00,0x00,
577 0x00,0x00,0x00,0x00,0x00,
578 0x00,0x00,0x00,0x00,0x00,
579 0x00,0x00,0x00,0x00,0x08,
580 0x08,0x00,0x00,0x00,0x00
581 },
582
583
584 };
585 #ifdef GOP_CMDQ_ENABLE
586 MS_U16 u16MIUSelect[MAX_GOP_SUPPORT]={0};
587 MS_BOOL bMIUSelect[MAX_GOP_SUPPORT]={0};
588
589 MS_U16 u16AFBCMIUSelect[MAX_GOP_SUPPORT]={0};
590 MS_BOOL bAFBCMIUSelect[MAX_GOP_SUPPORT]={0};
591 #endif
592 MS_BOOL bAFBCTrigger=FALSE;
593
594 //-------------------------------------------------------------------------------------------------
595 // Debug Functions
596 //-------------------------------------------------------------------------------------------------
597
598 //------------------------------------------------------------------------------
599 // Local Functions
600 //------------------------------------------------------------------------------
601 #if GOP_XC_SEMPHORE_PROTECT
_GOP_Get_XCSemaphore(void)602 MS_U32 _GOP_Get_XCSemaphore(void)
603 {
604 MS_U32 u32Return = UTOPIA_STATUS_FAIL;
605
606 _XC_Inited = (pInstantGOP_XC != NULL);
607 if (!_XC_Inited)
608 {
609 GOP_D_ERR("[%s,%5d]No instance existed, please get an instance by calling MApi_XC_Init() first\n",__FUNCTION__,__LINE__);
610 return u32Return;
611 }
612
613 #if 0 // for Debug. It is important to check the tid
614 pid_t tid;
615 tid = syscall(SYS_gettid);
616 printf("tid = (%d)\n",tid);
617 #endif
618
619 void* pModule = NULL;
620 UtopiaInstanceGetModule(&pInstantGOP_XC, &pModule);
621 if(pModule==NULL)
622 return UTOPIA_STATUS_ERR_RESOURCE;
623 if(UtopiaResourceObtain(pModule, E_XC_POOL_ID_INTERNAL_REGISTER, &g_pXCResource[E_XC_POOL_ID_INTERNAL_REGISTER]) != UTOPIA_STATUS_SUCCESS)
624 {
625 GOP_D_ERR("UtopiaResourceObtain fail\n");
626 return UTOPIA_STATUS_ERR_RESOURCE;
627 }
628 u32Return = UTOPIA_STATUS_SUCCESS;
629 return u32Return;
630 }
631
_GOP_Release_XCSemaphore(void)632 MS_U32 _GOP_Release_XCSemaphore(void)
633 {
634 MS_U32 u32Return = UTOPIA_STATUS_FAIL;
635 if (!_XC_Inited)
636 {
637 GOP_D_ERR("[%s,%5d]No instance existed, please get an instance by calling MApi_XC_Init() first\n",__FUNCTION__,__LINE__);
638 return UTOPIA_STATUS_SUCCESS;
639 }
640 #if 0 // for Debug. It is important to check the tid
641 pid_t tid;
642 tid = syscall(SYS_gettid);
643 printf("tid = (%d)\n",tid);
644 #endif
645
646 u32Return = UtopiaResourceRelease(g_pXCResource[E_XC_POOL_ID_INTERNAL_REGISTER]);
647 return u32Return;
648 }
649 #endif
650
_IsGwinIdValid(MS_GOP_CTX_LOCAL * pDrvCtx,MS_U8 u8GwinID)651 static MS_BOOL _IsGwinIdValid(MS_GOP_CTX_LOCAL*pDrvCtx, MS_U8 u8GwinID)
652 {
653 if (u8GwinID>=pDrvCtx->pGopChipProperty->TotalGwinNum)
654 return FALSE;
655 else
656 return TRUE;
657 }
658
_IsGopNumVaild(MS_GOP_CTX_LOCAL * pDrvCtx,MS_U8 u8GopNum)659 static MS_BOOL _IsGopNumVaild(MS_GOP_CTX_LOCAL*pDrvCtx, MS_U8 u8GopNum)
660 {
661 if (u8GopNum>=MDrv_GOP_GetMaxGOPNum(pDrvCtx))
662 return FALSE;
663 else
664 return TRUE;
665 }
666
_IsMuxSelVaild(MS_GOP_CTX_LOCAL * pDrvCtx,MS_U8 u8GopNum)667 static MS_BOOL _IsMuxSelVaild(MS_GOP_CTX_LOCAL*pDrvCtx, MS_U8 u8GopNum)
668 {
669 if (u8GopNum>=MDrv_GOP_GetMaxMuxSel(pDrvCtx))
670 return FALSE;
671 else
672 return TRUE;
673 }
674
_GOP_Load_Stretch_Mode_Table(GOP_CTX_DRV_LOCAL * pGOPDrvLocalCtx,MS_U8 u8GOP,MS_U16 * pGopHStretchTable)675 static void _GOP_Load_Stretch_Mode_Table(GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx,MS_U8 u8GOP, MS_U16* pGopHStretchTable)
676 {
677 MS_U8 idx=0,u8Reg;
678 MS_U16 u16RegVal;
679 MS_U32 u32BankOffSet = 0;
680
681 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
682 while(idx<GOP_STRETCH_TABLE_NUM)
683 {
684 u16RegVal = ((pGopHStretchTable[idx] <<8) | pGopHStretchTable[idx+1]);
685
686 if(idx == (GOP_STRETCH_TABLE_NUM-2))
687 u8Reg = 0x30; // reg_clamp_thrd & reg_clamp_num
688 else
689 u8Reg = idx/2;
690
691 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_REG(2,u8Reg),u16RegVal ,GOP_REG_WORD_MASK);
692
693 idx+=2;
694 }
695
696 }
697
_GOP_Load_VStretch_Mode_Table(GOP_CTX_DRV_LOCAL * pGOPDrvLocalCtx,MS_U8 u8GOP,MS_U16 * pGopVStretchTable)698 static void _GOP_Load_VStretch_Mode_Table(GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx,MS_U8 u8GOP, MS_U16* pGopVStretchTable)
699 {
700 MS_U8 idx=0,u8Reg;
701 MS_U16 u16RegVal;
702 MS_U32 u32BankOffSet = 0;
703
704 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
705 while(idx<GOP_VSTRETCH_TABLE_NUM)
706 {
707 u8Reg = 0x40 + idx/2;
708 #ifdef V_STRETCH_TABLE_ISSUE
709 if((u8Reg == 0x41)||(u8Reg == 0x43)||(u8Reg == 0x44)||(u8Reg == 0x45)||(u8Reg == 0x46)||(u8Reg == 0x47))
710 u16RegVal = ((pGopVStretchTable[idx+1] <<8) | pGopVStretchTable[idx]);
711 else
712 u16RegVal = ((pGopVStretchTable[idx] <<8) | pGopVStretchTable[idx+1]);
713 #else
714 u16RegVal = ((pGopVStretchTable[idx] <<8) | pGopVStretchTable[idx+1]);
715 #endif
716 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_REG(2,u8Reg),u16RegVal ,GOP_REG_WORD_MASK);
717 idx+=2;
718 }
719
720 }
721
722
GOP_SetFmt(DRV_GOPColorType colorfmt)723 static MS_U16 GOP_SetFmt(DRV_GOPColorType colorfmt)
724 {
725 MS_U16 ret = GOP_FMT_GENERIC;
726
727 switch(colorfmt)
728 {
729 case E_DRV_GOP_COLOR_RGB555_BLINK :
730 ret = GOP_FMT_RGB555_BLINK;
731 break;
732 case E_DRV_GOP_COLOR_RGB565 :
733 ret = GOP_FMT_RGB565;
734 break;
735 case E_DRV_GOP_COLOR_ARGB4444 :
736 ret = GOP_FMT_ARGB4444;
737 break;
738 case E_DRV_GOP_COLOR_2266:
739 ret = GOP_FMT_FaBaFgBg2266;
740 break;
741 case E_DRV_GOP_COLOR_I8 :
742 ret = GOP_FMT_I8;
743 break;
744 case E_DRV_GOP_COLOR_ARGB8888 :
745 ret = GOP_FMT_ARGB8888;
746 break;
747 case E_DRV_GOP_COLOR_ARGB1555:
748 ret = GOP_FMT_ARGB1555;
749 break;
750 case E_DRV_GOP_COLOR_ABGR8888 :
751 ret = GOP_FMT_ABGR8888;
752 break;
753 case E_DRV_GOP_COLOR_RGB555YUV422:/*Nos Chakra2*/
754 ret = GOP_FMT_ARGB1555;
755 break;
756 case E_DRV_GOP_COLOR_YUV422:
757 ret = GOP_FMT_YUV422;
758 break;
759 case E_DRV_GOP_COLOR_RGBA5551:
760 ret = GOP_FMT_RGBA5551;
761 break;
762 case E_DRV_GOP_COLOR_RGBA4444 :
763 ret = GOP_FMT_RGBA4444;
764 break;
765 case E_DRV_GOP_COLOR_RGBA8888 :
766 ret = GOP_FMT_RGBA8888;
767 break;
768 case E_DRV_GOP_COLOR_BGR565 :
769 ret = GOP_FMT_BGR565;
770 break;
771 case E_DRV_GOP_COLOR_ABGR4444 :
772 ret = GOP_FMT_ABGR4444;
773 break;
774 case E_DRV_GOP_COLOR_AYUV8888 :
775 ret = GOP_FMT_ARGB8888;
776 break;
777 case E_DRV_GOP_COLOR_ABGR1555 :
778 ret = GOP_FMT_ABGR1555;
779 break;
780 case E_DRV_GOP_COLOR_BGRA5551 :
781 ret = GOP_FMT_BGRA5551;
782 break;
783 case E_DRV_GOP_COLOR_BGRA4444 :
784 ret = GOP_FMT_BGRA4444;
785 break;
786 case E_DRV_GOP_COLOR_BGRA8888 :
787 ret = GOP_FMT_BGRA8888;
788 break;
789 default :
790 GOP_ASSERT(0);
791 ret = GOP_FMT_GENERIC;
792 break;
793 }
794 return ret;
795 }
796
GOP_GetFmt(MS_U16 colorfmt)797 static DRV_GOPColorType GOP_GetFmt(MS_U16 colorfmt)
798 {
799 DRV_GOPColorType ret = E_DRV_GOP_COLOR_INVALID;
800
801 switch(colorfmt)
802 {
803 case GOP_FMT_RGB555_BLINK :
804 ret = E_DRV_GOP_COLOR_RGB555_BLINK;
805 break;
806 case GOP_FMT_RGB565 :
807 ret = E_DRV_GOP_COLOR_RGB565;
808 break;
809 case GOP_FMT_ARGB4444:
810 ret = E_DRV_GOP_COLOR_ARGB4444;
811 break;
812 case GOP_FMT_FaBaFgBg2266:
813 ret = E_DRV_GOP_COLOR_2266;
814 break;
815 case GOP_FMT_I8:
816 ret = E_DRV_GOP_COLOR_I8;
817 break;
818 case GOP_FMT_ARGB8888:
819 ret = E_DRV_GOP_COLOR_ARGB8888;
820 break;
821 case GOP_FMT_ARGB1555:
822 ret = E_DRV_GOP_COLOR_ARGB1555;
823 break;
824 case GOP_FMT_ABGR8888:
825 ret = E_DRV_GOP_COLOR_ABGR8888;
826 break;
827 case GOP_FMT_ARGB1555_DST:
828 ret = E_DRV_GOP_COLOR_RGB555YUV422;
829 break;
830 case GOP_FMT_YUV422:
831 ret = E_DRV_GOP_COLOR_YUV422;
832 break;
833 case GOP_FMT_RGBA5551:
834 ret = E_DRV_GOP_COLOR_RGBA5551;
835 break;
836 case GOP_FMT_RGBA4444:
837 ret = E_DRV_GOP_COLOR_RGBA4444;
838 break;
839 case GOP_FMT_RGBA8888 :
840 ret = E_DRV_GOP_COLOR_RGBA8888;
841 break;
842 case GOP_FMT_BGR565:
843 ret = E_DRV_GOP_COLOR_BGR565;
844 break;
845 case GOP_FMT_ABGR4444:
846 ret = E_DRV_GOP_COLOR_ABGR4444;
847 break;
848 case GOP_FMT_ABGR1555 :
849 ret = E_DRV_GOP_COLOR_ABGR1555;
850 break;
851 case GOP_FMT_BGRA5551 :
852 ret = E_DRV_GOP_COLOR_BGRA5551;
853 break;
854 case GOP_FMT_BGRA4444 :
855 ret = E_DRV_GOP_COLOR_BGRA4444;
856 break;
857 case GOP_FMT_BGRA8888 :
858 ret = E_DRV_GOP_COLOR_BGRA8888;
859 break;
860 default :
861 GOP_ASSERT(0);
862 ret = E_DRV_GOP_COLOR_INVALID;
863 break;
864 }
865 return ret;
866 }
_GetGOPAckDelayTimeAndCnt(MS_U32 * pu32DelayTimems,MS_U32 * pu32TimeoutCnt)867 static MS_BOOL _GetGOPAckDelayTimeAndCnt(MS_U32* pu32DelayTimems, MS_U32* pu32TimeoutCnt)
868 {
869 if ((NULL == pu32DelayTimems) || (NULL == pu32TimeoutCnt))
870 {
871 GOP_ASSERT(FALSE);
872 return FALSE;
873 }
874 #if defined(MSOS_TYPE_LINUX) || defined(MSOS_TYPE_LINUX_KERNEL)
875 #if GOP_VSYNC_WAIT_BYSLEEP
876 *pu32DelayTimems = 1;
877 *pu32TimeoutCnt = GOP_TIMEOUT_CNT_OS;
878 #else
879 *pu32DelayTimems = 1;
880 *pu32TimeoutCnt = GOP_TIMEOUT_CNT_OS_YIELD;
881 #endif
882 #else
883 *pu32DelayTimems = 0;
884 *pu32TimeoutCnt = GOP_TIMEOUT_CNT_NOS;
885 #endif
886 return TRUE;
887 }
888
889 /*
890 //Return GWIN index in GOP's all GWin by normal gwin id
891 static MS_U8 _MapGWinIDToGWinIndexinGOP(MS_U8 u8GwinID)
892 {
893 if(u8GwinID < GOP1_GwinIdBase)
894 {
895 return u8GwinID;//GOP 0
896 }
897 else if(u8GwinID >= GOP1_GwinIdBase && u8GwinID < GOP2_GwinIdBase)
898 {
899 return u8GwinID-GOP1_GwinIdBase; //GOP1
900 }
901 else
902 {
903 return 0; //GOP2 and gop3 only have 1 gwin
904 }
905 }
906 */
907
908 #if GOP_LOCK_SUPPORT
GOP_GOP_Restore_Ctx(MS_GOP_CTX_LOCAL * pGOPCtx)909 static void GOP_GOP_Restore_Ctx(MS_GOP_CTX_LOCAL*pGOPCtx)
910 {
911 MDrv_GOP_Restore_Ctx(pGOPCtx);
912 }
913 #endif
914
915 /****************************************************************************************/
916 ///Merge
917 /***************************************************************************************/
918 #ifdef CONFIG_GOP_TEST_PATTERN
Merge(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U32 x1,MS_U32 x2,MS_U32 x3,MS_U16 v1,MS_U16 v2,MS_U16 v3,MS_U16 m1,MS_U16 m2,MS_U16 m3)919 static void Merge(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U32 x1, MS_U32 x2, MS_U32 x3, MS_U16 v1, MS_U16 v2, MS_U16 v3, MS_U16 m1, MS_U16 m2, MS_U16 m3)
920 {
921 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
922
923 if(x1==x2)
924 {
925 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, x1, v1|v2, m1|m2);
926 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, x3, v3, m3);
927 }
928 else
929 {
930 if(x2==x3)
931 {
932 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, x2, v2|v3, m2|m3);
933 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, x1, v1, m1);
934 }
935 else
936 {
937 if(x3==x1)
938 {
939 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, x3, v3|v1, m3|m1);
940 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, x2, v2, m2);
941 }
942 else
943 {
944 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, x1, v1, m1);
945 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, x2, v2, m2);
946 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, x3, v3, m3);
947 }
948 }
949 }
950 }
951 #endif
GOP_GWIN_TriggerRegWriteIn(GOP_CTX_DRV_LOCAL * pGOPDrvLocalCtx,E_GOP_TYPE u8GopType,MS_BOOL bForceWriteIn,MS_BOOL bSync)952 void GOP_GWIN_TriggerRegWriteIn(GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx, E_GOP_TYPE u8GopType, MS_BOOL bForceWriteIn, MS_BOOL bSync)
953 {
954 MS_U16 reg_val =0, u16GopAck=0,u16GOPOfst = 0;
955 MS_U32 goptimeout = 0,u32BankOffSet = 0;
956 MS_U16 IsIpSrcDisable=0;
957 MS_BOOL IsBnkExist = FALSE;
958
959 IsBnkExist = _GetBnkOfstByGop(u8GopType,&u32BankOffSet);
960
961 if(!IsBnkExist)
962 {
963 GOP_D_ERR("[%s][%d] GOP not support this GOPType = %d\n",__FUNCTION__,__LINE__,u8GopType);
964 return;
965 }
966
967 if(pGOPDrvLocalCtx->bGOPBankFwr[u8GopType])
968 {
969 /*Defination use for warning user the bnkForceWrite function support or not.*/
970 if(pGOPDrvLocalCtx->apiCtxLocal.pGopChipProperty->bBnkForceWrite)
971 {
972 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_BANK_FWR, GOP_BIT0 , GOP_BIT0);
973 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_BANK_FWR, 0 , GOP_BIT0);
974 }
975 else
976 {
977 GOP_D_DBUG("[%s][%d] GOP%d not support BankForceWrite\n",__FUNCTION__,__LINE__,u8GopType);
978 }
979 }
980 else if(bForceWriteIn)
981 {
982 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_BAK_SEL, GOP_VAL_FWR, GOP_REG_HW_MASK);
983 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_BAK_SEL, 0x0000, GOP_REG_HW_MASK);
984
985 if(pGOPDrvLocalCtx->apiCtxLocal.pGopChipProperty->bAFBC_Merge_GOP_Trig ==FALSE)
986 {
987 //AFBC
988 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_TRIGGER, 0, GOP_BIT0);
989 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0);
990 }
991 }
992 else
993 {
994 u16GOPOfst = (u32BankOffSet>>16);
995
996 #ifdef GOP_BANK_SHIFT
997 if(u8GopType == E_GOP2)
998 u16GOPOfst -= 1;
999 #endif
1000
1001 if(pGOPDrvLocalCtx->apiCtxLocal.pGopChipProperty->bPixelModeSupport)
1002 {
1003 #ifdef GOP_CMDQ_ENABLE
1004 if(bMIUSelect[u8GopType] == TRUE || bAFBCMIUSelect[u8GopType] == TRUE || bAFBCTrigger==TRUE )
1005 {
1006 HAL_GOP_CMDQ_SetGOPACK(&pGOPDrvLocalCtx->halCtxLocal, u8GopType);
1007 return;
1008 }
1009 #endif
1010 HAL_GOP_SetGOPACK(&pGOPDrvLocalCtx->halCtxLocal, u8GopType);
1011 }
1012 else
1013 {
1014 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_BAK_SEL, u16GOPOfst | GOP_BIT10 , GOP_REG_WORD_MASK);
1015 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_BAK_SEL, u16GOPOfst, GOP_REG_WORD_MASK);
1016 }
1017
1018 #if GOP_SW_SCROLL
1019 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_INT, ®_val);
1020 if((reg_val & GOP_BIT0) ==0)
1021 {
1022 return; // gop ack will be process at interrupt routine
1023 }
1024 #endif
1025 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, ®_val);
1026 if(u8GopType == E_GOP_Dwin)
1027 {
1028 DRV_GOP_XC_GET_SEMPHORE();
1029 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_SC_IP_SYNC, &IsIpSrcDisable);
1030 DRV_GOP_XC_RELEASE_SEMPHORE();
1031 if(IsIpSrcDisable & 0x80)
1032 {
1033 bSync = FALSE;
1034 }
1035 }
1036 else if (u8GopType == E_GOP_MIXER)
1037 {
1038 bSync = TRUE; //always update double buffer
1039 }
1040 else
1041 {
1042 if((reg_val & GOP_BIT0) ==1)
1043 {
1044 bSync = FALSE;
1045 }
1046 }
1047
1048 if(bSync == TRUE)
1049 {
1050 MS_U32 u32DelayTimems = 0;
1051 MS_U32 u32TimeoutCnt = 0;
1052 _GetGOPAckDelayTimeAndCnt(&u32DelayTimems, &u32TimeoutCnt);
1053 do
1054 {
1055 goptimeout++;
1056 u16GopAck = HAL_GOP_GetGOPACK(&pGOPDrvLocalCtx->halCtxLocal,u8GopType);
1057 if (0 != u32DelayTimems)
1058 {
1059 #if GOP_VSYNC_WAIT_BYSLEEP
1060 MsOS_DelayTask(u32DelayTimems); //delay 1 ms
1061 #else
1062 MsOS_YieldTask(); //Customer request
1063 #endif
1064 }
1065 } while((!u16GopAck) &&(goptimeout <= u32TimeoutCnt) );
1066
1067 // Perform force write if wr timeout.
1068 if(goptimeout > u32TimeoutCnt)
1069 {
1070 GOP_D_INFO("[%s][%d]Perform fwr if wr timeout!!\n",__FUNCTION__,__LINE__);
1071 if(pGOPDrvLocalCtx->apiCtxLocal.pGopChipProperty->bBnkForceWrite)
1072 {
1073 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_BANK_FWR, GOP_BIT0 , GOP_BIT0);
1074 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_BANK_FWR, 0 , GOP_BIT0);
1075 }
1076 else
1077 {
1078 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_BAK_SEL, GOP_VAL_FWR, GOP_REG_HW_MASK);
1079 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_BAK_SEL, 0x0000, GOP_REG_HW_MASK);
1080 }
1081 }
1082
1083 #ifdef CONFIG_MSTAR_SRAMPD
1084 if(pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.bGOPPowerDown[u8GopType]==TRUE)
1085 {
1086 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_MULTI_ALPHA, GOP_BIT11, GOP_BIT11);
1087 }
1088 #endif
1089 }
1090 }
1091 }
1092
GOP_GWIN_UpdateReg(GOP_CTX_DRV_LOCAL * pGOPDrvLocalCtx,E_GOP_TYPE u8GopType)1093 void GOP_GWIN_UpdateReg(GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx, E_GOP_TYPE u8GopType)
1094 {
1095 if((FALSE == pGOPDrvLocalCtx->apiCtxLocal.bUpdateRegOnce[GOP_PUBLIC_UPDATE]) && (FALSE == pGOPDrvLocalCtx->apiCtxLocal.bUpdateRegOnce[u8GopType]))
1096 {
1097 GOP_GWIN_TriggerRegWriteIn(pGOPDrvLocalCtx, u8GopType, MDrv_GOP_GWIN_IsForceWrite((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, u8GopType), TRUE);
1098 }
1099 }
1100
GOP_RegdmaEnable(GOP_CTX_DRV_LOCAL * pGOPDrvLocalCtx,MS_U8 u8GOPNum)1101 static void GOP_RegdmaEnable(GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx, MS_U8 u8GOPNum)
1102 {
1103 MS_U32 u32BankOffSet=0;
1104 MS_U16 reg_val =0;
1105 MS_U32 goptimeout = 0;
1106 MS_U32 u32DelayTimems = 0;
1107 MS_U32 u32TimeoutCnt = 0;
1108
1109 if(pGOPDrvLocalCtx->u16REGMAP_Offset[u8GOPNum] == 0)
1110 return;
1111
1112 if (FALSE== _IsGopNumVaild((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, u8GOPNum))
1113 {
1114 GOP_D_ERR("\n[%s] not support gop%d in this chip version!!", __FUNCTION__,u8GOPNum);
1115 return;
1116 }
1117
1118 _GetBnkOfstByGop(u8GOPNum, &u32BankOffSet); //sel pal control by u8GOPNum
1119
1120 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_REGDMA_END, \
1121 pGOPDrvLocalCtx->u16REGMAP_Offset[u8GOPNum]/GOP_WordUnit -1 , 0x01ff);
1122 pGOPDrvLocalCtx->u16REGMAP_Offset[u8GOPNum] = 0;
1123
1124 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CTRL1, 0x4100, 0xff00); // Set REGDMA interval
1125 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_REGDMA_EN, 0x0003, 0x0003);
1126
1127 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)u8GOPNum);
1128
1129 _GetGOPAckDelayTimeAndCnt(&u32DelayTimems, &u32TimeoutCnt);
1130 do
1131 {
1132 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_REGDMA_EN, ®_val);
1133 goptimeout++;
1134 if(reg_val&(0x0100) )
1135 {
1136 break;
1137 }
1138 if (0 != u32DelayTimems)
1139 {
1140 MsOS_DelayTask(u32DelayTimems);
1141 }
1142 } while( goptimeout <= u32TimeoutCnt );
1143
1144 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_REGDMA_EN, 0x0000, 0x0003);
1145
1146 if(goptimeout > u32TimeoutCnt)
1147 {
1148 GOP_D_DBUG("GOP wr timeout in [%s]!!\n", __FUNCTION__);
1149 }
1150 // GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)u8GOPNum);
1151 }
1152
1153
_GOP_GWIN_AlignChecker(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,MS_U16 * width,MS_U16 fmtbpp)1154 static MS_U32 _GOP_GWIN_AlignChecker(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum, MS_U16 *width, MS_U16 fmtbpp)
1155 {
1156 MS_U16 alignfactor =0;
1157
1158 if(pGOPCtx->pGOPCtxShared->bPixelMode[u8GOPNum] == TRUE)
1159 {
1160 alignfactor = 1;
1161 }
1162 else
1163 {
1164 alignfactor = (MS_U16)(((MS_U16)MDrv_GOP_GetWordUnit(pGOPCtx, u8GOPNum))/(fmtbpp>>3) );
1165 }
1166
1167 if ((alignfactor != 0) && (*width % alignfactor !=0)) // Not Aligned
1168 {
1169 GOP_D_ERR("\n\n%s, This FB format needs to %d-pixels alignment !!!\n\n",__FUNCTION__, alignfactor);
1170 //*width = (*width + alignfactor - 1) & (~(alignfactor - 1));
1171 return CHECKALIGN_PARA_FAIL;
1172 }
1173 else
1174 {
1175 return CHECKALIGN_SUCCESS;
1176 }
1177 }
1178
_GOP_GWIN_2PEngineAlignChecker(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,MS_PHY * width)1179 static MS_U32 _GOP_GWIN_2PEngineAlignChecker(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum, MS_PHY *width)
1180 {
1181 MS_U16 alignfactor =0;
1182
1183 if(pGOPCtx->pGopChipProperty->b2Pto1PSupport==TRUE)
1184 {
1185 alignfactor=2;
1186
1187 if ((alignfactor != 0) && (*width % alignfactor !=0)) // Not Aligned
1188 {
1189 GOP_D_ERR("\n\n%s, Not mach to %d-pixels alignment !!!\n\n",__FUNCTION__, alignfactor);
1190 return CHECKALIGN_PARA_FAIL;
1191 }
1192 else
1193 {
1194 return CHECKALIGN_SUCCESS;
1195 }
1196 }
1197 return CHECKALIGN_SUCCESS;
1198 }
1199
_GOP_GWIN_FB_AddrAlignChecker(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,MS_PHY Address,MS_U16 fmtbpp)1200 static MS_U32 _GOP_GWIN_FB_AddrAlignChecker(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum, MS_PHY Address, MS_U16 fmtbpp)
1201 {
1202 MS_U32 alignfactor=0;
1203
1204 if(pGOPCtx->pGOPCtxShared->bPixelMode[u8GOPNum] == TRUE)
1205 {
1206 alignfactor = (MS_U32)((MDrv_GOP_GetWordUnit(pGOPCtx,u8GOPNum)*(fmtbpp>>3))&0xFF);
1207 }
1208 else
1209 {
1210 alignfactor = (MS_U32)((MDrv_GOP_GetWordUnit(pGOPCtx,u8GOPNum))&0xFF);
1211 }
1212
1213 if ((Address&(alignfactor-1))!=0)
1214 {
1215 GOP_D_ERR("%s,%d FB=0x%tx address need %d-bytes aligned!\n",__FUNCTION__,__LINE__, (ptrdiff_t)Address, (MS_U32)alignfactor);
1216 return CHECKALIGN_PARA_FAIL;
1217 }
1218 else
1219 {
1220 return CHECKALIGN_SUCCESS;
1221 }
1222 }
1223
1224
GOP_SetGopGwinDelPixel(GOP_CTX_DRV_LOCAL * pGOPDrvLocalCtx,MS_U8 u8win,MS_U8 u8GOP,MS_U16 del_pixel,E_DRV_GOP_DelDirect direct)1225 void GOP_SetGopGwinDelPixel(GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx, MS_U8 u8win, MS_U8 u8GOP, MS_U16 del_pixel, E_DRV_GOP_DelDirect direct)
1226 {
1227 #if GOP_PIXEL_ALIGN
1228 MS_U16 Pixel_Shift;
1229 if(direct ==E_DRV_GOP_Deldirect_Front)
1230 {
1231 Pixel_Shift = 0;
1232 switch(u8GOP)
1233 {
1234 case E_GOP0:
1235 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DEL_PIXEL(u8win), del_pixel<<Pixel_Shift, GOP_REG_LW_MASK);
1236 break;
1237 case E_GOP1:
1238 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_DEL_PIXEL(u8win), del_pixel<<Pixel_Shift, GOP_REG_LW_MASK);
1239 break;
1240 case E_GOP2:
1241 case E_GOP3:
1242 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, (u8win==GOP2_Gwin0Id)?GOP_1G_DEL_PIXEL:GOP_1GX_HSTR, del_pixel<<Pixel_Shift, GOP_REG_LW_MASK); // word pixels
1243 break;
1244 case E_GOP4:
1245 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_1GS0_DEL_PIXEL, del_pixel<<Pixel_Shift, GOP_REG_LW_MASK);
1246 break;
1247 case E_GOP5:
1248 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_1GS1_DEL_PIXEL, del_pixel<<Pixel_Shift, GOP_REG_LW_MASK);
1249 break;
1250 default:
1251 break;
1252 }
1253 }
1254 else
1255 {
1256 Pixel_Shift = GOP_WordUnit;
1257 switch(u8GOP)
1258 {
1259 case E_GOP0:
1260 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DEL_PIXEL(u8win), del_pixel<<Pixel_Shift, GOP_REG_HW_MASK);
1261 break;
1262 case E_GOP1:
1263 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_DEL_PIXEL(u8win), del_pixel<<Pixel_Shift, GOP_REG_HW_MASK);
1264 break;
1265 case E_GOP2:
1266 case E_GOP3:
1267 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, (u8win==GOP2_Gwin0Id)?GOP_1G_DEL_PIXEL:GOP_1GX_HSTR, del_pixel<<Pixel_Shift, GOP_REG_HW_MASK); // word pixels
1268 break;
1269 case E_GOP4:
1270 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_1GS0_DEL_PIXEL, del_pixel<<Pixel_Shift, GOP_REG_HW_MASK);
1271 break;
1272 case E_GOP5:
1273 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_1GS1_DEL_PIXEL, del_pixel<<Pixel_Shift, GOP_REG_HW_MASK);
1274 break;
1275 default:
1276 break;
1277 }
1278 }
1279
1280
1281 #endif
1282
1283 }
1284
GOP_GetGopGwinHVPixel(GOP_CTX_DRV_LOCAL * pGOPDrvLocalCtx,MS_U8 u8win,MS_U8 u8GOP,DRV_GOP_GWIN_INFO * pinfo)1285 void GOP_GetGopGwinHVPixel(GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx, MS_U8 u8win, MS_U8 u8GOP, DRV_GOP_GWIN_INFO* pinfo)
1286 {
1287 MS_U16 u16tmp=0, u8Bpp=INVALID_BPP;
1288 u8Bpp = HAL_GOP_GetBPP(&pGOPDrvLocalCtx->halCtxLocal, pinfo->clrType);
1289
1290 switch(u8GOP)
1291 {
1292 case E_GOP0:
1293 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_HSTR(u8win), &(pinfo->u16DispHPixelStart));
1294 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_HEND(u8win), &(pinfo->u16DispHPixelEnd));
1295 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_VSTR(u8win), &(pinfo->u16DispVPixelStart));
1296 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_VEND(u8win), &(pinfo->u16DispVPixelEnd));
1297 break;
1298
1299 case E_GOP1:
1300 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_HSTR(u8win), &(pinfo->u16DispHPixelStart));
1301 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_HEND(u8win), &(pinfo->u16DispHPixelEnd));
1302 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_VSTR(u8win), &(pinfo->u16DispVPixelStart)); // 1 pixel
1303 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_VEND(u8win), &(pinfo->u16DispVPixelEnd)); // 1 pixel
1304 break;
1305
1306 case E_GOP2:
1307 case E_GOP3:
1308 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, (u8win==GOP2_Gwin0Id)?GOP_1G_HSTR:GOP_1GX_HSTR, &(pinfo->u16DispHPixelStart)); // word pixels
1309 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, (u8win==GOP2_Gwin0Id)?GOP_1G_HEND:GOP_1GX_HEND, &(pinfo->u16DispHPixelEnd)); // word pixels
1310 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, (u8win==GOP2_Gwin0Id)?GOP_1G_VSTR:GOP_1GX_VSTR, &(pinfo->u16DispVPixelStart)); // 1 pixel
1311 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, (u8win==GOP2_Gwin0Id)?GOP_1G_VEND:GOP_1GX_VEND, &(pinfo->u16DispVPixelEnd)); // 1 pixel
1312 break;
1313
1314 case E_GOP4:
1315 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_1GS0_HSTR, &(pinfo->u16DispHPixelStart));
1316 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_1GS0_HEND, &(pinfo->u16DispHPixelEnd));
1317 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_1GS0_VSTR, &(pinfo->u16DispVPixelStart)); // 1 pixel
1318 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_1GS0_VEND, &(pinfo->u16DispVPixelEnd)); // 1 pixel
1319 break;
1320
1321 case E_GOP5:
1322 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_1GS1_HSTR, &(pinfo->u16DispHPixelStart));
1323 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_1GS1_HEND, &(pinfo->u16DispHPixelEnd));
1324 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_1GS1_VSTR, &(pinfo->u16DispVPixelStart)); // 1 pixel
1325 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_1GS1_VEND, &(pinfo->u16DispVPixelEnd)); // 1 pixel
1326 break;
1327
1328 default:
1329 GOP_D_ERR("invalid Gwin number:%d\n",u8win);
1330 break;
1331 }
1332
1333 if(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->enGOP3DType == E_DRV_3D_DUP_HALF)
1334 {
1335 switch(pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.GOP_StereoMode[u8GOP])
1336 {
1337 case E_DRV_GOP_3D_SIDE_BY_SYDE:
1338 u16tmp = (pinfo->u16DispHPixelEnd - pinfo->u16DispHPixelStart)>>1;
1339 pinfo->u16DispHPixelEnd -= u16tmp;
1340 break;
1341 case E_DRV_GOP_3D_TOP_BOTTOM:
1342 case E_DRV_GOP_3D_LINE_ALTERNATIVE:
1343 u16tmp = (pinfo->u16DispVPixelEnd - pinfo->u16DispVPixelStart)>>1;
1344 pinfo->u16DispVPixelEnd -= u16tmp;
1345 break;
1346 case E_DRV_GOP_3D_LINE_FRAMEPACKING:
1347 u16tmp = (pinfo->u16DispVPixelEnd - pGOPDrvLocalCtx->apiCtxLocal.GOP_FramePacking_Gap - pinfo->u16DispVPixelStart)>>1;
1348 pinfo->u16DispVPixelEnd -= u16tmp;
1349 break;
1350 default:
1351 break;
1352 }
1353 }
1354
1355 if(pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->bPixelMode[u8GOP]!= TRUE)
1356 {
1357 pinfo->u16DispHPixelStart *= (GOP_WordUnit/(u8Bpp>>3));
1358 pinfo->u16DispHPixelEnd *= (GOP_WordUnit/(u8Bpp>>3));
1359 }
1360 }
1361
GOP_SetGopGwinHVPixel(GOP_CTX_DRV_LOCAL * pGOPDrvLocalCtx,MS_U8 u8win,MS_U8 u8GOP,DRV_GOP_GWIN_INFO * pinfo)1362 void GOP_SetGopGwinHVPixel(GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx, MS_U8 u8win, MS_U8 u8GOP, DRV_GOP_GWIN_INFO* pinfo)
1363 {
1364 MS_U16 u8Bpp=INVALID_BPP;
1365 MS_U16 align_start,align_end, u16VEnd;
1366 MS_U32 u32BankOffSet=0;
1367 MS_U16 u16StretchWidth=0;
1368
1369 u8Bpp = HAL_GOP_GetBPP(&pGOPDrvLocalCtx->halCtxLocal, pinfo->clrType);
1370 if(u8Bpp == FB_FMT_AS_DEFAULT)
1371 {
1372 GOP_D_DBUG("[%s] [%d] GOP not support the color format = %d \n",__FUNCTION__,__LINE__,pinfo->clrType);
1373 }
1374 u16VEnd = pinfo->u16DispVPixelEnd;
1375 #if GOP_PIXEL_ALIGN
1376 MS_U16 del_pixel=0;
1377 MS_U16 align_offset;
1378 MS_U16 u16tmp;
1379 MS_U16 u16w = pinfo->u16DispHPixelEnd - pinfo->u16DispHPixelStart;
1380 MS_U16 u16Mask;
1381 MS_U16 GOP_Unit = 0;
1382
1383 if(pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->bPixelMode[u8GOP] == TRUE)
1384 {
1385 GOP_Unit = 1;
1386 }
1387 else
1388 {
1389 GOP_Unit = (GOP_WordUnit/(u8Bpp>>3));
1390 }
1391 u16Mask = ~(GOP_Unit -1);
1392
1393 /*
1394 if(0)//!pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.bHMirror)
1395 {
1396 align_end = (pinfo->u16DispHPixelEnd) /GOP_Unit;
1397 if((pinfo->u16DispHPixelEnd) % GOP_Unit)
1398 align_end+=1;
1399
1400 align_offset = align_end * GOP_Unit - pinfo->u16DispHPixelEnd;
1401
1402 u16tmp = (pinfo->u16DispHPixelEnd + align_offset - u16w );
1403 align_start = u16tmp /GOP_Unit;
1404
1405 del_pixel = u16tmp - align_start * GOP_Unit;
1406 }
1407 else*/
1408 {
1409 align_start = ((pinfo->u16DispHPixelStart)/GOP_Unit);
1410 align_offset = pinfo->u16DispHPixelStart % GOP_Unit;
1411
1412
1413 u16tmp = ((pinfo->u16DispHPixelStart - align_offset + u16w ) + (GOP_Unit -1))& u16Mask;
1414 del_pixel = u16tmp - (pinfo->u16DispHPixelStart - align_offset + u16w );
1415 align_end = u16tmp /GOP_Unit;
1416 }
1417
1418 if(pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.bHMirror)
1419 GOP_SetGopGwinDelPixel(pGOPDrvLocalCtx, u8win, u8GOP ,del_pixel, E_DRV_GOP_Deldirect_Front);
1420 else
1421 GOP_SetGopGwinDelPixel(pGOPDrvLocalCtx, u8win, u8GOP ,del_pixel, E_DRV_GOP_Deldirect_Back);
1422
1423
1424 if((align_end*GOP_Unit) != pinfo->u16RBlkHRblkSize)
1425 {
1426
1427 if((align_end*GOP_Unit) > u16w)
1428 {
1429 if(pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.bHMirror)
1430 {
1431 del_pixel = (align_end*GOP_Unit) - u16w;
1432 GOP_SetGopGwinDelPixel(pGOPDrvLocalCtx, u8win, u8GOP ,del_pixel,E_DRV_GOP_Deldirect_Back);
1433 }
1434 }
1435 else
1436 {
1437 del_pixel = 0;
1438 GOP_SetGopGwinDelPixel(pGOPDrvLocalCtx, u8win, u8GOP ,del_pixel,E_DRV_GOP_Deldirect_Back);
1439 }
1440 }
1441
1442 if(pinfo->u16WinX % GOP_Unit)
1443 {
1444 del_pixel = pinfo->u16WinX - ((pinfo->u16WinX / GOP_Unit)*GOP_Unit);
1445 GOP_SetGopGwinDelPixel(pGOPDrvLocalCtx, u8win, u8GOP ,del_pixel,E_DRV_GOP_Deldirect_Front);
1446 }
1447 else
1448 {
1449 del_pixel = 0;
1450 GOP_SetGopGwinDelPixel(pGOPDrvLocalCtx, u8win, u8GOP ,del_pixel,E_DRV_GOP_Deldirect_Front);
1451 }
1452
1453 #else
1454 if(pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->bPixelMode[u8GOP] == TRUE)
1455 {
1456 align_start = (pinfo->u16DispHPixelStart);
1457 align_end = (pinfo->u16DispHPixelEnd);
1458 }
1459 else
1460 {
1461 align_start = (pinfo->u16DispHPixelStart) /(GOP_WordUnit/(u8Bpp>>3));
1462 align_end = (pinfo->u16DispHPixelEnd) /(GOP_WordUnit/(u8Bpp>>3));
1463 }
1464 #endif
1465 _GetBnkOfstByGop(u8GOP, &u32BankOffSet); //sel pal control by u8GOPNum
1466
1467 if(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->enGOP3DType == E_DRV_3D_DUP_HALF)
1468 {
1469 switch(pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.GOP_StereoMode[u8GOP])
1470 {
1471 case E_DRV_GOP_3D_SIDE_BY_SYDE:
1472 align_end += (align_end -align_start);
1473 break;
1474 case E_DRV_GOP_3D_TOP_BOTTOM:
1475 case E_DRV_GOP_3D_LINE_ALTERNATIVE:
1476 u16VEnd += (pinfo->u16DispVPixelEnd - pinfo->u16DispVPixelStart);
1477 break;
1478 case E_DRV_GOP_3D_LINE_FRAMEPACKING:
1479 u16VEnd += (pinfo->u16DispVPixelEnd - pinfo->u16DispVPixelStart)+ pGOPDrvLocalCtx->apiCtxLocal.GOP_FramePacking_Gap;
1480 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_GWIN_MIDDLE(u8win), \
1481 (pinfo->u16DispVPixelEnd + pGOPDrvLocalCtx->apiCtxLocal.GOP_FramePacking_Gap), GOP_REG_WORD_MASK);
1482 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_GWIN_MIDDLE(u8win), GOP_BIT15 , GOP_BIT15);
1483 break;
1484 default:
1485 break;
1486 }
1487 }
1488 else
1489 {
1490 if(pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.GOP_StereoMode[u8GOP] == E_DRV_GOP_3D_LINE_FRAMEPACKING)
1491 {
1492 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_SVM_HEND, pGOPDrvLocalCtx->apiCtxLocal.GOP_FramePacking_Gap , GOP_REG_LW_MASK);
1493 }
1494 }
1495
1496 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+ GOP_4G_STRCH_HSZ, &u16StretchWidth);
1497 u16StretchWidth *= GOP_STRETCH_WIDTH_UNIT;
1498 if(align_end > u16StretchWidth)
1499 {
1500 printf("[GOP]%s,%s,%d GWIN Hend > StretchWidth!!!align_end=%d,u16StretchWidth=%d\n",__FILE__,__FUNCTION__,__LINE__,(int)align_end,(int)u16StretchWidth);
1501 align_end = u16StretchWidth;
1502 }
1503
1504 HAL_GOP_SetGopGwinHVPixel(&pGOPDrvLocalCtx->halCtxLocal, u8GOP, u8win, align_start, align_end, pinfo->u16DispVPixelStart, u16VEnd);
1505 }
1506
1507
GOP_SetGopExtendGwinInfo(GOP_CTX_DRV_LOCAL * pGOPDrvLocalCtx,MS_U8 u8win,DRV_GOP_GWIN_INFO * pinfo)1508 static void GOP_SetGopExtendGwinInfo(GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx, MS_U8 u8win, DRV_GOP_GWIN_INFO* pinfo)
1509 {
1510 MS_PHY u64tmp;
1511 MS_U32 u32DRAM_VSTR_Addr, u32DRAM_RBLK_L_Addr, u32DRAM_RBLK_HSIZE_Addr;
1512 MS_U16 bpp;
1513 MS_U16 u16GOP_Unit=0;
1514 MS_U8 u8GOP;
1515 MS_U16 u16Pitch=0;
1516 MS_U8 u8MiuSel=0;
1517 MS_PHY Width=0;
1518
1519 if (FALSE== _IsGwinIdValid((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, u8win))
1520 {
1521 GOP_D_ERR("\n[%s] not support gwin id:%d in this chip version",__FUNCTION__, u8win);
1522 return;
1523 }
1524
1525 switch(u8win)
1526 {
1527 case GOP2_Gwin0Id:
1528 u8GOP = 2;
1529 u32DRAM_VSTR_Addr = GOP_1G_DRAM_VSTR_L;
1530 u32DRAM_RBLK_L_Addr = GOP_1G_DRAM_RBLK_L;
1531 u32DRAM_RBLK_HSIZE_Addr = GOP_1G_DRAM_RBLK_HSIZE;
1532 break;
1533 case GOP3_Gwin0Id:
1534 u8GOP = 3;
1535 u32DRAM_VSTR_Addr = GOP_1GX_DRAM_VSTR_L;
1536 u32DRAM_RBLK_L_Addr = GOP_1GX_DRAM_RBLK_L;
1537 u32DRAM_RBLK_HSIZE_Addr = GOP_1GX_DRAM_RBLK_HSIZE;
1538 break;
1539 case GOP4_Gwin0Id:
1540 u8GOP = 4;
1541 u32DRAM_VSTR_Addr = GOP_1GS0_DRAM_VSTR_L;
1542 u32DRAM_RBLK_L_Addr = GOP_1GS0_DRAM_RBLK_L;
1543 u32DRAM_RBLK_HSIZE_Addr = GOP_1GS0_DRAM_RBLK_HSIZE;
1544 break;
1545 case GOP5_Gwin0Id:
1546 u8GOP = 5;
1547 u32DRAM_VSTR_Addr = GOP_1GS1_DRAM_VSTR_L;
1548 u32DRAM_RBLK_L_Addr = GOP_1GS1_DRAM_RBLK_L;
1549 u32DRAM_RBLK_HSIZE_Addr = GOP_1GS1_DRAM_RBLK_HSIZE;
1550 break;
1551 default:
1552 GOP_D_ERR("[%s] invalud GwinNum\n",__FUNCTION__);
1553 return;
1554 }
1555
1556 if (FALSE== _IsGopNumVaild((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, u8GOP))
1557 {
1558 GOP_D_ERR("\n[%s] not support GOP id:%d in this chip version",__FUNCTION__, u8GOP);
1559 return;
1560 }
1561
1562 u16GOP_Unit = MDrv_GOP_GetWordUnit((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, u8GOP);
1563 bpp = HAL_GOP_GetBPP(&pGOPDrvLocalCtx->halCtxLocal, pinfo->clrType);
1564 if(bpp == FB_FMT_AS_DEFAULT)
1565 {
1566 GOP_D_ERR("[%s] invalud color format\n",__FUNCTION__);
1567 return;
1568 }
1569
1570 _GOP_GWIN_AlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, u8GOP, &(pinfo->u16WinX), bpp);
1571 _GOP_GWIN_AlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, u8GOP, &(pinfo->u16DispHPixelStart), bpp);
1572 _GOP_GWIN_AlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, u8GOP, &(pinfo->u16DispHPixelEnd), bpp);
1573 _GOP_GWIN_AlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, u8GOP, &u16Pitch, bpp);
1574 _GOP_GWIN_FB_AddrAlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, u8GOP, pinfo->u64DRAMRBlkStart, bpp);
1575
1576 if(pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->bPixelMode[u8GOP] == TRUE)
1577 {
1578 /*Pixel Unit*/
1579 u16Pitch = pinfo->u16RBlkHRblkSize/u16GOP_Unit/(bpp/8);
1580 }
1581 else
1582 {
1583 /*Word Unit*/
1584 u16Pitch = pinfo->u16RBlkHRblkSize/u16GOP_Unit;
1585 }
1586
1587 if(pinfo->u16DispHPixelEnd > pinfo->u16DispHPixelStart)
1588 {
1589 Width = (MS_PHY)(pinfo->u16DispHPixelEnd - pinfo->u16DispHPixelStart);
1590 }
1591 else
1592 {
1593 if(pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.bGopHasInitialized[u8GOP] == TRUE)
1594 {
1595 GOP_D_DBUG("[%s]WidthEnd 0x%x >WidthStart 0x%x \n",__FUNCTION__, pinfo->u16DispHPixelEnd, pinfo->u16DispHPixelStart);
1596 }
1597 }
1598 if (CHECKALIGN_PARA_FAIL ==_GOP_GWIN_2PEngineAlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, u8GOP, &Width))
1599 {
1600 GOP_D_WARN("[%s][%d] Size not Align!!! Original u16DispHPixelStart =0x%x; u16DispHPixelEnd=0x%x \n",__FUNCTION__,__LINE__,pinfo->u16DispHPixelStart, pinfo->u16DispHPixelEnd );
1601 pinfo->u16DispHPixelStart = ((pinfo->u16DispHPixelStart+1 )& ~(1));
1602 pinfo->u16DispHPixelEnd = ((pinfo->u16DispHPixelEnd+1 )& ~(1));
1603 GOP_D_WARN("[%s][%d] Size not Align!!! Align after u16DispHPixelStart =0x%x; u16DispHPixelEnd=0x%x \n",__FUNCTION__,__LINE__,pinfo->u16DispHPixelStart, pinfo->u16DispHPixelEnd );
1604 }
1605 _GOP_GWIN_2PEngineAlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, u8GOP, &(pinfo->u64DRAMRBlkStart));
1606
1607 if(pGOPDrvLocalCtx->b32BPPTileMode[u8GOP] && pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.bVMirror)
1608 {
1609 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal, u32DRAM_VSTR_Addr, (pinfo->u16DispVPixelEnd- pinfo->u16DispVPixelStart-1));
1610 }
1611 else
1612 {
1613 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal, u32DRAM_VSTR_Addr, 0); //clear the VSTR value
1614 }
1615
1616 //GOP HW just read the relative offset of each MIU
1617 _phy_to_miu_offset(u8MiuSel, u64tmp, pinfo->u64DRAMRBlkStart);
1618 u64tmp /= u16GOP_Unit;
1619
1620 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal, u32DRAM_RBLK_L_Addr, (MS_U32)u64tmp);
1621 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32DRAM_RBLK_HSIZE_Addr, u16Pitch, GOP_REG_WORD_MASK); // word
1622
1623 GOP_SetGopGwinHVPixel(pGOPDrvLocalCtx, u8win, u8GOP ,pinfo);
1624
1625 GOP_D_INFO("GWIN_SetWin(%d): [adr, RBsz, offset](Unit:Byte) = [%td, %d, %d]\n", \
1626 u8win,\
1627 (ptrdiff_t)pinfo->u64DRAMRBlkStart,\
1628 pinfo->u16RBlkHPixSize * pinfo->u16RBlkVPixSize / (u16GOP_Unit/(bpp>>3)),\
1629 (pinfo->u16WinY * pinfo->u16RBlkHPixSize + pinfo->u16WinX)/(u16GOP_Unit/(bpp>>3)) );
1630 GOP_D_INFO("\t[Vst, Vend, Hst, Hend, GwinHsz](Unit:Pixel) = [%d, %d, %d, %d, %d]\n",\
1631 pinfo->u16DispVPixelStart, \
1632 pinfo->u16DispVPixelEnd, \
1633 pinfo->u16DispHPixelStart, \
1634 pinfo->u16DispHPixelEnd,\
1635 pinfo->u16RBlkHPixSize);
1636
1637 }
1638
GOP_SetGop1GwinInfo(GOP_CTX_DRV_LOCAL * pGOPDrvLocalCtx,MS_U8 u8win,DRV_GOP_GWIN_INFO * pinfo)1639 static void GOP_SetGop1GwinInfo(GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx, MS_U8 u8win, DRV_GOP_GWIN_INFO* pinfo)
1640 {
1641 MS_PHY u64tmp;
1642 MS_U16 bpp;
1643 MS_U16 u16GOP_Unit=0;
1644 MS_U16 u16Pitch=0;
1645 MS_U8 u8MiuSel;
1646 MS_PHY Width=0;
1647
1648 u16GOP_Unit = MDrv_GOP_GetWordUnit((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, E_GOP1);
1649
1650 u8win -= MAX_GOP0_GWIN; //Reset win number to 0~3 in GOP1
1651 bpp = HAL_GOP_GetBPP(&pGOPDrvLocalCtx->halCtxLocal, pinfo->clrType);
1652 if(bpp == FB_FMT_AS_DEFAULT)
1653 {
1654 GOP_D_ERR("[%s] invalud color format\n",__FUNCTION__);
1655 return;
1656 }
1657
1658 _GOP_GWIN_AlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, E_GOP1, &(pinfo->u16WinX), bpp);
1659 _GOP_GWIN_AlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, E_GOP1, &(pinfo->u16DispHPixelStart), bpp);
1660 _GOP_GWIN_AlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, E_GOP1, &(pinfo->u16DispHPixelEnd), bpp);
1661 _GOP_GWIN_AlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, E_GOP1, &u16Pitch, bpp);
1662 _GOP_GWIN_FB_AddrAlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, E_GOP1, pinfo->u64DRAMRBlkStart, bpp);
1663
1664 if(pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->bPixelMode[E_GOP1] == TRUE)
1665 {
1666 /*Pixel Unit*/
1667 u16Pitch = pinfo->u16RBlkHRblkSize/u16GOP_Unit/(bpp/8);
1668 }
1669 else
1670 {
1671 /*Word Unit*/
1672 u16Pitch = pinfo->u16RBlkHRblkSize/u16GOP_Unit;
1673 }
1674
1675 if(pinfo->u16DispHPixelEnd > pinfo->u16DispHPixelStart)
1676 {
1677 Width = (MS_PHY)(pinfo->u16DispHPixelEnd - pinfo->u16DispHPixelStart);
1678 }
1679 else
1680 {
1681 if(pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.bGopHasInitialized[E_GOP1] == TRUE)
1682 {
1683 GOP_D_DBUG("[%s]WidthEnd 0x%x >WidthStart 0x%x \n",__FUNCTION__, pinfo->u16DispHPixelEnd, pinfo->u16DispHPixelStart);
1684 }
1685 }
1686 if (CHECKALIGN_PARA_FAIL ==_GOP_GWIN_2PEngineAlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, E_GOP1, &Width))
1687 {
1688 GOP_D_WARN("[%s][%d] Size not Align!!! Original u16DispHPixelStart =0x%x; u16DispHPixelEnd=0x%x \n",__FUNCTION__,__LINE__,pinfo->u16DispHPixelStart, pinfo->u16DispHPixelEnd );
1689 pinfo->u16DispHPixelStart = ((pinfo->u16DispHPixelStart+1 )& ~(1));
1690 pinfo->u16DispHPixelEnd = ((pinfo->u16DispHPixelEnd+1 )& ~(1));
1691 GOP_D_WARN("[%s][%d] Size not Align!!! Align after u16DispHPixelStart =0x%x; u16DispHPixelEnd=0x%x \n",__FUNCTION__,__LINE__,pinfo->u16DispHPixelStart, pinfo->u16DispHPixelEnd );
1692 }
1693 _GOP_GWIN_2PEngineAlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, E_GOP1, &(pinfo->u64DRAMRBlkStart));
1694
1695 if(pGOPDrvLocalCtx->b32BPPTileMode[1] && pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.bVMirror)
1696 {
1697 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal,GOP_2G_DRAM_VSTR_L(u8win), (pinfo->u16DispVPixelEnd- pinfo->u16DispVPixelStart-1));
1698 }
1699 else
1700 {
1701 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal,GOP_2G_DRAM_VSTR_L(u8win), 0x0); //clear the VSTR value
1702 }
1703 //GOP HW just read the relative offset of each MIU
1704 _phy_to_miu_offset(u8MiuSel, u64tmp, pinfo->u64DRAMRBlkStart);
1705 u64tmp /= u16GOP_Unit;
1706 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal,GOP_2G_DRAM_RBLK_L(u8win), u64tmp);
1707 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_DRAM_RBLK_HSIZE(u8win), u16Pitch, GOP_REG_WORD_MASK); // word
1708
1709 GOP_SetGopGwinHVPixel(pGOPDrvLocalCtx, u8win, E_GOP1 ,pinfo);
1710
1711 GOP_D_INFO("GWIN_SetWin(%d): [adr, RBsz, offset](Unit: Byte) = [%td, %d, %d]\n", \
1712 u8win,\
1713 (ptrdiff_t)pinfo->u64DRAMRBlkStart,\
1714 pinfo->u16RBlkHPixSize * pinfo->u16RBlkVPixSize / (u16GOP_Unit/(bpp>>3)),\
1715 (pinfo->u16WinY * pinfo->u16RBlkHPixSize + pinfo->u16WinX)/(u16GOP_Unit/(bpp>>3)) );
1716 GOP_D_INFO("\t[Vst, Vend, Hst, Hend, GwinHsz] = [%d, %d, %d, %d, %d](Unit:Pixel)\n",\
1717 pinfo->u16DispVPixelStart, \
1718 pinfo->u16DispVPixelEnd, \
1719 pinfo->u16DispHPixelStart, \
1720 pinfo->u16DispHPixelEnd,\
1721 pinfo->u16RBlkHPixSize);
1722
1723 }
1724
GOP_SetGop0GwinInfo(GOP_CTX_DRV_LOCAL * pGOPDrvLocalCtx,MS_U8 u8win,DRV_GOP_GWIN_INFO * pinfo)1725 static void GOP_SetGop0GwinInfo(GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx, MS_U8 u8win, DRV_GOP_GWIN_INFO* pinfo)
1726 {
1727 MS_PHY u64tmp=0;
1728 MS_U32 u32tmp=0;
1729 MS_U16 u16tmp =0;
1730 MS_U16 regval =0;
1731 MS_U16 bpp;
1732 MS_U16 u16GOP_Unit=0;
1733 MS_U16 u16Pitch=0;
1734 MS_U8 u8MiuSel;
1735 MS_PHY Width=0;
1736
1737 bpp = HAL_GOP_GetBPP(&pGOPDrvLocalCtx->halCtxLocal, pinfo->clrType);
1738 if(bpp == FB_FMT_AS_DEFAULT)
1739 {
1740 GOP_D_ERR("[%s] invalud color format\n",__FUNCTION__);
1741 return;
1742 }
1743
1744 _GOP_GWIN_AlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, E_GOP0, &(pinfo->u16WinX), bpp);
1745 _GOP_GWIN_AlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, E_GOP0, &(pinfo->u16DispHPixelStart), bpp);
1746 _GOP_GWIN_AlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, E_GOP0, &(pinfo->u16DispHPixelEnd), bpp);
1747 _GOP_GWIN_AlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, E_GOP0, &(pinfo->u16RBlkHRblkSize), bpp);
1748
1749 _GOP_GWIN_FB_AddrAlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, E_GOP0, pinfo->u64DRAMRBlkStart, bpp);
1750
1751 if(pinfo->u16DispHPixelEnd > pinfo->u16DispHPixelStart)
1752 {
1753 Width = (MS_PHY)(pinfo->u16DispHPixelEnd - pinfo->u16DispHPixelStart);
1754 }
1755 else
1756 {
1757 if(pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.bGopHasInitialized[E_GOP0] == TRUE)
1758 {
1759 GOP_D_DBUG("[%s]WidthEnd 0x%x >WidthStart 0x%x \n",__FUNCTION__, pinfo->u16DispHPixelEnd, pinfo->u16DispHPixelStart);
1760 }
1761 }
1762 if (CHECKALIGN_PARA_FAIL ==_GOP_GWIN_2PEngineAlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, E_GOP0, &Width))
1763 {
1764 GOP_D_WARN("[%s][%d] Size not Align!!! Original u16DispHPixelStart =0x%x; u16DispHPixelEnd=0x%x \n",__FUNCTION__,__LINE__,pinfo->u16DispHPixelStart, pinfo->u16DispHPixelEnd );
1765 pinfo->u16DispHPixelStart = ((pinfo->u16DispHPixelStart+1 )& ~(1));
1766 pinfo->u16DispHPixelEnd = ((pinfo->u16DispHPixelEnd+1 )& ~(1));
1767 GOP_D_WARN("[%s][%d] Size not Align!!! Align after u16DispHPixelStart =0x%x; u16DispHPixelEnd=0x%x \n",__FUNCTION__,__LINE__,pinfo->u16DispHPixelStart, pinfo->u16DispHPixelEnd );
1768 }
1769 _GOP_GWIN_2PEngineAlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, E_GOP0, &(pinfo->u64DRAMRBlkStart));
1770
1771 u16GOP_Unit = MDrv_GOP_GetWordUnit((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, E_GOP0);
1772 if(pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->bPixelMode[E_GOP0] == TRUE)
1773 {
1774 /*Pixel Unit*/
1775 u16Pitch = pinfo->u16RBlkHRblkSize/u16GOP_Unit/(bpp/8);
1776 #if ENABLE_GOP0_RBLK_MIRROR
1777 u16tmp = pinfo->u16WinX;
1778 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_HSTR(u8win), u16tmp, GOP_REG_WORD_MASK);
1779 #endif
1780 }
1781 else
1782 {
1783 /*Word Unit*/
1784 u16Pitch = pinfo->u16RBlkHRblkSize/u16GOP_Unit;
1785 #if ENABLE_GOP0_RBLK_MIRROR
1786 u16tmp = pinfo->u16WinX*(bpp>>3) / u16GOP_Unit;
1787 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_HSTR(u8win), u16tmp, GOP_REG_WORD_MASK);
1788 #endif
1789 }
1790
1791 #if ENABLE_GOP0_RBLK_MIRROR
1792 u32tmp = (MS_U32)pinfo->u16WinY * (MS_U32)pinfo->u16RBlkHRblkSize; // Convert pixel into bytes
1793 u32tmp /= u16GOP_Unit; // Convert to word.
1794 #else
1795 u32tmp = ((MS_U32)pinfo->u16WinY * (MS_U32)pinfo->u16RBlkHRblkSize + (MS_U32)pinfo->u16WinX*(bpp>>3)); // Convert pixel into bytes
1796 u32tmp /= u16GOP_Unit; // Convert to word.
1797 #endif //ENABLE_GOP0_RBLK_MIRROR
1798 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_VSTR_L(u8win), (MS_U16*)®val);
1799 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_VSTR_H(u8win), (MS_U16*)&u16tmp);
1800
1801 if(pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.bVMirror && pGOPDrvLocalCtx->b32BPPTileMode[0])
1802 {
1803 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal,GOP_4G_DRAM_VSTR_L(u8win), pinfo->u16RBlkVPixSize-1);
1804 }
1805 #if ENABLE_GOP0_RBLK_MIRROR
1806 else if (u32tmp != (MS_U32)(u16tmp << 16) + regval)
1807 #else
1808 else if (pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.bVMirror &&(u32tmp != (MS_U32)(u16tmp << 16) + regval))
1809 #endif
1810 {
1811 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal,GOP_4G_DRAM_VSTR_L(u8win), u32tmp);
1812 }
1813 //GOP HW just read the relative offset of each MIU
1814 _phy_to_miu_offset(u8MiuSel, u64tmp, pinfo->u64DRAMRBlkStart);
1815 u64tmp /= u16GOP_Unit;
1816 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal,GOP_4G_DRAM_RBLK_L(u8win), u64tmp);
1817 u64tmp = ((MS_U32)pinfo->u16RBlkHRblkSize * (MS_U32)pinfo->u16RBlkVPixSize)/u16GOP_Unit;
1818
1819 _GOP_GWIN_FB_AddrAlignChecker((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, E_GOP0, u64tmp, bpp);
1820 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal,GOP_4G_DRAM_RBLK_SIZE_L(u8win), u64tmp);
1821 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_RBLK_HSIZE(u8win), u16Pitch, GOP_REG_WORD_MASK);
1822
1823 GOP_SetGopGwinHVPixel(pGOPDrvLocalCtx, u8win, E_GOP0 ,pinfo);
1824
1825 GOP_D_INFO("GWIN_SetWin(%d): [adr, RBsz, offset](Unit:Byte) = [%td, %d, %d]\n", \
1826 u8win,\
1827 (ptrdiff_t)pinfo->u64DRAMRBlkStart,\
1828 pinfo->u16RBlkHPixSize * pinfo->u16RBlkVPixSize / (u16GOP_Unit/(bpp>>3)),\
1829 (pinfo->u16WinY * pinfo->u16RBlkHPixSize + pinfo->u16WinX)/(u16GOP_Unit/(bpp>>3)) );
1830 GOP_D_INFO("\t[Vst, Vend, Hst, Hend, GwinHsz](Unit:Pixel) = [%d, %d, %d, %d, %d]\n",\
1831 pinfo->u16DispVPixelStart, \
1832 pinfo->u16DispVPixelEnd, \
1833 pinfo->u16DispHPixelStart, \
1834 pinfo->u16DispHPixelEnd, \
1835 pinfo->u16RBlkHPixSize);
1836 }
1837
GOP_ReadGopExtendGwinInfo(GOP_CTX_DRV_LOCAL * pGOPDrvLocalCtx,MS_U8 u8win,DRV_GOP_GWIN_INFO * pinfo)1838 static void GOP_ReadGopExtendGwinInfo(GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx, MS_U8 u8win, DRV_GOP_GWIN_INFO* pinfo)
1839 {
1840 MS_U32 u32tmp =0;
1841 MS_U32 u32DRAM_RBLK_H_Addr, u32DRAM_RBLK_L_Addr, u32DRAM_RBLK_HSIZE_Addr, u32GWIN0_CTRL_Addr =0;
1842 MS_U16 bpp, u16tmp =0;
1843 MS_U8 u8GOP;
1844 MS_U16 u16GOP_Unit=0;
1845
1846 if (FALSE== _IsGwinIdValid((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, u8win))
1847 {
1848 GOP_D_ERR("\n[%s] not support gwin id:%d in this chip version",__FUNCTION__, u8win);
1849 return;
1850 }
1851
1852 switch(u8win)
1853 {
1854 case GOP2_Gwin0Id:
1855 u8GOP = 2;
1856 u32GWIN0_CTRL_Addr = GOP_1G_GWIN0_CTRL;
1857 u32DRAM_RBLK_L_Addr = GOP_1G_DRAM_RBLK_L;
1858 u32DRAM_RBLK_H_Addr = GOP_1G_DRAM_RBLK_H;
1859 u32DRAM_RBLK_HSIZE_Addr = GOP_1G_DRAM_RBLK_HSIZE;
1860 break;
1861 case GOP3_Gwin0Id:
1862 u8GOP = 3;
1863 u32GWIN0_CTRL_Addr = GOP_1GX_GWIN0_CTRL;
1864 u32DRAM_RBLK_L_Addr = GOP_1GX_DRAM_RBLK_L;
1865 u32DRAM_RBLK_H_Addr = GOP_1GX_DRAM_RBLK_H;
1866 u32DRAM_RBLK_HSIZE_Addr = GOP_1GX_DRAM_RBLK_HSIZE;
1867 break;
1868 case GOP4_Gwin0Id:
1869 u8GOP = 4;
1870 u32GWIN0_CTRL_Addr = GOP_1GS0_GWIN0_CTRL;
1871 u32DRAM_RBLK_L_Addr = GOP_1GS0_DRAM_RBLK_L;
1872 u32DRAM_RBLK_H_Addr = GOP_1GS0_DRAM_RBLK_H;
1873 u32DRAM_RBLK_HSIZE_Addr = GOP_1GS0_DRAM_RBLK_HSIZE;
1874 break;
1875 case GOP5_Gwin0Id:
1876 u8GOP = 5;
1877 u32GWIN0_CTRL_Addr = GOP_1GS1_GWIN0_CTRL;
1878 u32DRAM_RBLK_L_Addr = GOP_1GS1_DRAM_RBLK_L;
1879 u32DRAM_RBLK_H_Addr = GOP_1GS1_DRAM_RBLK_H;
1880 u32DRAM_RBLK_HSIZE_Addr = GOP_1GS1_DRAM_RBLK_HSIZE;
1881 break;
1882 default:
1883 GOP_D_ERR("[%s] invalud GwinNum\n",__FUNCTION__);
1884 return;
1885 }
1886
1887 if (FALSE== _IsGopNumVaild((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, u8GOP))
1888 {
1889 GOP_D_ERR("\n[%s] not support GOP id:%d in this chip version",__FUNCTION__, u8GOP);
1890 return;
1891 }
1892
1893 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32GWIN0_CTRL_Addr, (MS_U16*)&u16tmp);
1894 pinfo->clrType = (DRV_GOPColorType)GOP_GetFmt((u16tmp>>GOP_REG_COLORTYPE_SHIFT)&GOP_REG_COLORTYPE_MASK);
1895 bpp = HAL_GOP_GetBPP(&pGOPDrvLocalCtx->halCtxLocal, pinfo->clrType);
1896 if(bpp == FB_FMT_AS_DEFAULT)
1897 {
1898 return;
1899 }
1900
1901 GOP_GetGopGwinHVPixel(pGOPDrvLocalCtx, u8win, u8GOP, pinfo);
1902
1903 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32DRAM_RBLK_HSIZE_Addr, (MS_U16*)&u16tmp);
1904 u16GOP_Unit = MDrv_GOP_GetWordUnit((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, u8GOP);
1905 if(pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->bPixelMode[u8GOP] == TRUE)
1906 {
1907 pinfo->u16RBlkHRblkSize = u16tmp*(bpp/8);
1908 }
1909 else
1910 {
1911 pinfo->u16RBlkHRblkSize = u16tmp*u16GOP_Unit;
1912 }
1913 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32DRAM_RBLK_L_Addr, (MS_U16*)&u16tmp);
1914 u32tmp = u16tmp;
1915 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32DRAM_RBLK_H_Addr, (MS_U16*)&u16tmp);
1916 u32tmp += (u16tmp << 16);
1917 pinfo->u64DRAMRBlkStart = u32tmp*u16GOP_Unit;
1918
1919 GOP_D_INFO("GWIN_GetWin(%d): [adr(B), Hsz, Vsz, Hsdrm, winX, winY ] = [%td, %d, %d, %d, %d, %d]\n",
1920 u8win,
1921 (ptrdiff_t)pinfo->u64DRAMRBlkStart,
1922 pinfo->u16RBlkHPixSize,
1923 pinfo->u16RBlkVPixSize,
1924 pinfo->u16RBlkHRblkSize,
1925 pinfo->u16WinX,
1926 pinfo->u16WinY);
1927
1928
1929 }
1930
GOP_ReadGop1GwinInfo(GOP_CTX_DRV_LOCAL * pGOPDrvLocalCtx,MS_U8 u8win,DRV_GOP_GWIN_INFO * pinfo)1931 static void GOP_ReadGop1GwinInfo(GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx, MS_U8 u8win, DRV_GOP_GWIN_INFO* pinfo)
1932 {
1933 MS_U32 u32tmp =0;
1934 MS_U16 u16tmp =0;
1935 MS_U16 bpp;
1936 MS_U16 u16GOP_Unit=0;
1937
1938 u8win -= MAX_GOP0_GWIN; //Reset win number to 0~3 in GOP1
1939 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_GWIN_CTRL(u8win), (MS_U16*)&u16tmp);
1940 pinfo->clrType = (DRV_GOPColorType)GOP_GetFmt((u16tmp>>GOP_REG_COLORTYPE_SHIFT)&GOP_REG_COLORTYPE_MASK);
1941 bpp = HAL_GOP_GetBPP(&pGOPDrvLocalCtx->halCtxLocal, pinfo->clrType);
1942 if(bpp == FB_FMT_AS_DEFAULT)
1943 {
1944 return;
1945 }
1946
1947 GOP_GetGopGwinHVPixel(pGOPDrvLocalCtx, u8win, E_GOP1, pinfo);
1948
1949 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_DRAM_RBLK_HSIZE(u8win), (MS_U16*)&u16tmp);
1950 u16GOP_Unit = MDrv_GOP_GetWordUnit((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, E_GOP1);
1951 if(pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->bPixelMode[E_GOP1] == TRUE)
1952 {
1953 pinfo->u16RBlkHRblkSize = u16tmp*(bpp/8);
1954 }
1955 else
1956 {
1957 pinfo->u16RBlkHRblkSize = u16tmp*u16GOP_Unit;
1958 }
1959 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_DRAM_RBLK_L(u8win), (MS_U16*)&u16tmp);
1960 u32tmp = u16tmp;
1961 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_DRAM_RBLK_H(u8win), (MS_U16*)&u16tmp);
1962 u32tmp += (u16tmp << 16);
1963 pinfo->u64DRAMRBlkStart = u32tmp*u16GOP_Unit;
1964
1965 GOP_D_INFO("GWIN_GetWin(%d): [adr(B), Hsz, Vsz, Hsdrm, winX, winY ] = [%td, %d, %d, %d, %d, %d]\n",
1966 u8win,
1967 (ptrdiff_t)pinfo->u64DRAMRBlkStart,
1968 pinfo->u16RBlkHPixSize,
1969 pinfo->u16RBlkVPixSize,
1970 pinfo->u16RBlkHRblkSize,
1971 pinfo->u16WinX,
1972 pinfo->u16WinY);
1973 }
1974
GOP_ReadGop0GwinInfo(GOP_CTX_DRV_LOCAL * pGOPDrvLocalCtx,MS_U8 u8win,DRV_GOP_GWIN_INFO * pinfo)1975 static void GOP_ReadGop0GwinInfo(GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx, MS_U8 u8win, DRV_GOP_GWIN_INFO* pinfo)
1976 {
1977 MS_U32 u32tmp =0;
1978 MS_U16 u16tmp =0;
1979 MS_U16 bpp;
1980 MS_U16 u16GOP_Unit=0;
1981
1982 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_GWIN0_CTRL(u8win), (MS_U16*)&u16tmp);
1983 pinfo->clrType = (DRV_GOPColorType)GOP_GetFmt((u16tmp>>GOP_REG_COLORTYPE_SHIFT)&GOP_REG_COLORTYPE_MASK);
1984 bpp = HAL_GOP_GetBPP(&pGOPDrvLocalCtx->halCtxLocal, pinfo->clrType);
1985 if(bpp == FB_FMT_AS_DEFAULT)
1986 {
1987 return;
1988 }
1989
1990 GOP_GetGopGwinHVPixel(pGOPDrvLocalCtx, u8win, E_GOP0, pinfo);
1991
1992 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_RBLK_HSIZE(u8win), (MS_U16*)&u16tmp);
1993 u16GOP_Unit = MDrv_GOP_GetWordUnit((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, E_GOP0);
1994 if(pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->bPixelMode[E_GOP0] == TRUE)
1995 {
1996 pinfo->u16RBlkHRblkSize = u16tmp*(bpp/8);
1997 }
1998 else
1999 {
2000 pinfo->u16RBlkHRblkSize = u16tmp*u16GOP_Unit;
2001 }
2002 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_RBLK_L(u8win), (MS_U16*)&u16tmp);
2003 u32tmp = u16tmp;
2004 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_RBLK_H(u8win), (MS_U16*)&u16tmp);
2005 u32tmp += (u16tmp << 16);
2006 pinfo->u64DRAMRBlkStart = u32tmp*u16GOP_Unit;
2007 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_RBLK_SIZE_L(u8win), (MS_U16*)&u16tmp);
2008 u32tmp = u16tmp;
2009 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_RBLK_SIZE_H(u8win), (MS_U16*)&u16tmp);
2010 u32tmp += (u16tmp << 16);
2011
2012 if (pinfo->u16RBlkHRblkSize!=0)
2013 pinfo->u16RBlkVPixSize = ((u32tmp *u16GOP_Unit) / pinfo->u16RBlkHRblkSize);
2014
2015 //2009.03.14 Fix the TTX,CC position error
2016 #if 0
2017 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_VSTR_L(u8win), (MS_U16*)&u16tmp);
2018 u32tmp= u16tmp;
2019 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_VSTR_H(u8win), (MS_U16*)&u16tmp);
2020 u32tmp += (u16tmp << 16);
2021 pinfo->u16WinY = (MS_U16)((u32tmp * (64/bpp)) / pinfo->u16RBlkHPixSize); // pix
2022 pinfo->u16WinX= (MS_U16)((u32tmp * (64/bpp)) / pinfo->u16RBlkHPixSize); // pix
2023 #endif
2024 GOP_D_INFO("GWIN_GetWin(%d): [adr(B), Hsz, Vsz, Hsdrm ] = [%td, %d, %d, %d]\n",
2025 u8win,
2026 (ptrdiff_t)pinfo->u64DRAMRBlkStart,
2027 pinfo->u16RBlkHPixSize,
2028 pinfo->u16RBlkVPixSize,
2029 pinfo->u16RBlkHRblkSize
2030 );
2031 }
2032
_GOP_MAP_DRVHscale2Reg_Emun(DRV_GOPStrchHMode eGOPHscal)2033 static MS_U8 _GOP_MAP_DRVHscale2Reg_Emun(DRV_GOPStrchHMode eGOPHscal)
2034 {
2035 MS_U8 eRet=0xFF;
2036 switch(eGOPHscal)
2037 {
2038 case E_DRV_GOP_HSTRCH_6TAPE:
2039 default:
2040 eRet = 0x0;
2041 break;
2042 case E_DRV_GOP_HSTRCH_DUPLICATE:
2043 eRet = 0x1;
2044 break;
2045 case E_DRV_GOP_HSTRCH_4TAPE:
2046 eRet = 0x3;
2047 break;
2048 }
2049
2050 return eRet;
2051 }
2052
_GOP_MAP_DRVVscale2Reg_Emun(DRV_GOPStrchVMode eGOPVscal)2053 static MS_U8 _GOP_MAP_DRVVscale2Reg_Emun(DRV_GOPStrchVMode eGOPVscal)
2054 {
2055 MS_U8 eRet=0xFF;
2056
2057 switch(eGOPVscal)
2058 {
2059 case E_DRV_GOP_VSTRCH_LINEAR:
2060 default:
2061 eRet = 0x0;
2062 break;
2063 case E_DRV_GOP_VSTRCH_DUPLICATE:
2064 eRet = 0x1;
2065 break;
2066 case E_DRV_GOP_VSTRCH_NEAREST:
2067 eRet = 0x2;
2068 break;
2069 case E_DRV_GOP_VSTRCH_LINEAR_GAIN2:
2070 case E_DRV_GOP_VSTRCH_4TAP:
2071 eRet = 0x3;
2072 break;
2073 }
2074
2075 return eRet;
2076 }
2077
_GWIN_ADDR_Invalid_Check(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8win)2078 MS_BOOL _GWIN_ADDR_Invalid_Check(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8win)
2079 {
2080
2081 return TRUE;
2082 }
2083
2084 //------------------------------------------------------------------------------
2085 // Global Functions
2086 //------------------------------------------------------------------------------
MDrv_DumpGopByGwinId(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U32 GwinID)2087 MS_U8 MDrv_DumpGopByGwinId(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U32 GwinID)
2088 {
2089 MS_U8 gop_num=0;
2090 MS_U8 gop_gwinnum[MAX_GOP_SUPPORT];
2091 MS_U8 gop_start[MAX_GOP_SUPPORT];
2092 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2093
2094 for (gop_num=0; gop_num < MAX_GOP_SUPPORT; gop_num++)
2095 {
2096 gop_start[gop_num]=0;
2097 gop_gwinnum[gop_num]=0;
2098 }
2099
2100 for (gop_num=0; gop_num < MAX_GOP_SUPPORT; gop_num++)
2101 {
2102 gop_gwinnum[gop_num] = MDrv_GOP_GetGwinNum((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx,gop_num);
2103 }
2104
2105 gop_start[0] = 0;
2106 for (gop_num=1; gop_num < MAX_GOP_SUPPORT; gop_num++)
2107 {
2108 gop_start[gop_num] = gop_start[gop_num-1] + gop_gwinnum[gop_num-1];
2109 }
2110
2111 for (gop_num=0; gop_num < MAX_GOP_SUPPORT; gop_num++)
2112 {
2113 if( gop_num == 0 )
2114 {
2115 if(GwinID < gop_start[gop_num+1])
2116 return gop_num;
2117 }
2118 else if( gop_num == (MAX_GOP_SUPPORT-1) )
2119 {
2120 if( (GwinID >= gop_start[gop_num]) && (GwinID < pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->TotalGwinNum) )
2121 return gop_num;
2122 }
2123 else
2124 {
2125 if( (GwinID >= gop_start[gop_num]) && (GwinID < gop_start[gop_num+1]) )
2126 return gop_num;
2127 }
2128 }
2129
2130 GOP_ASSERT(0);
2131 return INVAILD_GOP_NUM;
2132 }
2133
MDrv_GOP_GetGOPEnum(MS_GOP_CTX_LOCAL * pGOPCtx,GOP_TYPE_DEF * GOP_TYPE)2134 MS_BOOL MDrv_GOP_GetGOPEnum(MS_GOP_CTX_LOCAL*pGOPCtx, GOP_TYPE_DEF* GOP_TYPE)
2135 {
2136 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2137 HAL_GOP_GetGOPEnum(&pGOPDrvLocalCtx->halCtxLocal, GOP_TYPE);
2138 return TRUE;
2139 }
2140
MDrv_GOP_GetGOPACK(MS_GOP_CTX_LOCAL * pstGOPCtx,MS_U8 enGopType)2141 MS_U16 MDrv_GOP_GetGOPACK(MS_GOP_CTX_LOCAL *pstGOPCtx, MS_U8 enGopType)
2142 {
2143 MS_BOOL bGopAck = FALSE;
2144 GOP_CTX_DRV_LOCAL*pstGOPDrvLocalCtx = NULL;
2145 #ifdef CONFIG_MSTAR_SRAMPD
2146 MS_U32 u32BankOffSet=0;
2147 #endif
2148 if (NULL == pstGOPCtx)
2149 {
2150 return bGopAck;
2151 }
2152
2153 pstGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pstGOPCtx;
2154 if (MDrv_GOP_GWIN_IsForceWrite(pstGOPCtx, enGopType))
2155 {
2156 bGopAck = TRUE;
2157 }
2158 else
2159 {
2160 bGopAck = (MS_BOOL)HAL_GOP_GetGOPACK(&pstGOPDrvLocalCtx->halCtxLocal, enGopType);
2161 }
2162 #ifdef CONFIG_MSTAR_SRAMPD
2163 if((bGopAck==TRUE)&&(pstGOPCtx->pGOPCtxShared->bGOPPowerDown[enGopType]==TRUE))
2164 {
2165 _GetBnkOfstByGop(enGopType, &u32BankOffSet);
2166 HAL_GOP_Write16Reg(&pstGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_MULTI_ALPHA, GOP_BIT11, GOP_BIT11);
2167 }
2168 #endif
2169 return bGopAck;
2170 }
2171
MDrv_GOP_GetMaxGOPNum(MS_GOP_CTX_LOCAL * pGOPCtx)2172 MS_U8 MDrv_GOP_GetMaxGOPNum(MS_GOP_CTX_LOCAL*pGOPCtx)
2173 {
2174 return (MS_U8)MAX_GOP_SUPPORT;
2175 }
2176
MDrv_GOP_GetMaxMuxSel(MS_GOP_CTX_LOCAL * pGOPCtx)2177 MS_U8 MDrv_GOP_GetMaxMuxSel(MS_GOP_CTX_LOCAL*pGOPCtx)
2178 {
2179 return (MS_U8)MAX_GOP_MUX_SEL;
2180 }
2181
MDrv_GOP_GetGwinNum(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GopNum)2182 MS_U8 MDrv_GOP_GetGwinNum(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GopNum)
2183 {
2184 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2185 return HAL_GOP_GetMaxGwinNumByGOP(&pGOPDrvLocalCtx->halCtxLocal, u8GopNum);
2186 }
2187
MDrv_GetMaxMuxOPNum(void)2188 MS_U8 MDrv_GetMaxMuxOPNum(void)
2189 {
2190 return MAX_GOP_MUX_OPNum;
2191 }
2192
MDrv_GetAFBCCapsSupport(MS_GOP_CTX_LOCAL * pGOPCtx)2193 MS_BOOL MDrv_GetAFBCCapsSupport(MS_GOP_CTX_LOCAL*pGOPCtx)
2194 {
2195 MS_U8 i=0;
2196 MS_BOOL bAFBCStatus=FALSE;
2197
2198 for(i=0;i<MDrv_GOP_GetMaxGOPNum(pGOPCtx);i++)
2199 {
2200 bAFBCStatus |= pGOPCtx->pGopChipProperty->bAFBC_Support[i];
2201 }
2202 return bAFBCStatus;
2203 }
2204
MDrv_GOP_Get(MS_GOP_CTX_LOCAL * pGOPCtx)2205 MS_U8 MDrv_GOP_Get(MS_GOP_CTX_LOCAL*pGOPCtx)
2206 {
2207 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2208 return pGOPDrvLocalCtx->current_gop;
2209 }
2210
MDrv_GOP_Sel(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum)2211 GOP_Result MDrv_GOP_Sel(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum)
2212 {
2213 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2214 pGOPDrvLocalCtx->current_gop = u8GOPNum;
2215 return HAL_GOP_GOPSel(&pGOPDrvLocalCtx->halCtxLocal, u8GOPNum);
2216 }
2217
MDrv_GOP_MIU_Sel(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,E_DRV_GOP_SEL_TYPE miusel)2218 void MDrv_GOP_MIU_Sel(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum,E_DRV_GOP_SEL_TYPE miusel)
2219 {
2220 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2221 MS_U16 u16regval=0;
2222 MS_U32 u32BankOffSet = 0;
2223
2224 if(miusel>MAX_GOP_MIUSEL)
2225 {
2226 GOP_D_DBUG("ERROR Over gop miu select!\n");
2227 }
2228
2229 if(pGOPCtx->pGopChipProperty->bAFBC_Support[u8GOPNum]==TRUE)
2230 {
2231 _GetBnkOfstByGop(u8GOPNum, &u32BankOffSet);
2232 if((pGOPCtx->pGopChipProperty->bAFBCMIUSelDoubleBuffer==TRUE)&&(pGOPCtx->pGopChipProperty->bInternalMIUSelect[u8GOPNum]==TRUE))
2233 {
2234 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_MIU, miusel<<4 , GOP_BIT4|GOP_BIT5);
2235 HAL_GOP_Set_MIU(&pGOPDrvLocalCtx->halCtxLocal, u8GOPNum, miusel);
2236 GOP_GWIN_UpdateReg((GOP_CTX_DRV_LOCAL*)pGOPCtx, (E_GOP_TYPE)u8GOPNum);
2237 }
2238 else if((pGOPCtx->pGopChipProperty->bAFBCMIUSelDoubleBuffer==FALSE)&&(pGOPCtx->pGopChipProperty->bInternalMIUSelect[u8GOPNum]==TRUE))
2239 {
2240 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+ GOP_4G_MIU_SEL, &u16regval);
2241 if(u16regval&GOP_BIT12)
2242 {
2243 #ifdef GOP_CMDQ_ENABLE
2244 u16AFBCMIUSelect[u8GOPNum]= miusel;
2245 bAFBCMIUSelect[u8GOPNum] = TRUE;
2246 #else
2247 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_MIU, miusel<<4 , GOP_BIT4|GOP_BIT5);
2248 #endif
2249 }
2250 else
2251 {
2252 HAL_GOP_Set_MIU(&pGOPDrvLocalCtx->halCtxLocal, u8GOPNum, miusel);
2253 GOP_GWIN_UpdateReg((GOP_CTX_DRV_LOCAL*)pGOPCtx, (E_GOP_TYPE)u8GOPNum);
2254 }
2255 }
2256 else if((pGOPCtx->pGopChipProperty->bAFBCMIUSelDoubleBuffer==TRUE)&&(pGOPCtx->pGopChipProperty->bInternalMIUSelect[u8GOPNum]==FALSE))
2257 {
2258 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+ GOP_4G_MIU_SEL, &u16regval);
2259 if(u16regval&GOP_BIT12)
2260 {
2261 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_MIU, miusel<<4 , GOP_BIT4|GOP_BIT5);
2262 if(pGOPDrvLocalCtx->apiCtxLocal.pGopChipProperty->bAFBC_Merge_GOP_Trig ==FALSE)
2263 {
2264 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_TRIGGER, GOP_BIT1, GOP_BIT1);
2265 }
2266 }
2267 else
2268 {
2269 #ifdef GOP_CMDQ_ENABLE
2270 u16MIUSelect[u8GOPNum]= miusel;
2271 bMIUSelect[u8GOPNum] = TRUE;
2272 #else
2273 HAL_GOP_Set_MIU(&pGOPDrvLocalCtx->halCtxLocal, u8GOPNum, miusel);
2274 #endif
2275 }
2276 }
2277 else
2278 {
2279 #ifdef GOP_CMDQ_ENABLE
2280 u16AFBCMIUSelect[u8GOPNum]= miusel;
2281 bAFBCMIUSelect[u8GOPNum] = TRUE;
2282 u16MIUSelect[u8GOPNum]= miusel;
2283 bMIUSelect[u8GOPNum] = TRUE;
2284 #else
2285 HAL_GOP_Set_MIU(&pGOPDrvLocalCtx->halCtxLocal, u8GOPNum, miusel);
2286 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_MIU, miusel<<4 , GOP_BIT4|GOP_BIT5);
2287 #endif
2288 }
2289 }
2290 else
2291 {
2292 if(pGOPCtx->pGopChipProperty->bInternalMIUSelect[u8GOPNum]==TRUE)
2293 {
2294 HAL_GOP_Set_MIU(&pGOPDrvLocalCtx->halCtxLocal, u8GOPNum, miusel);
2295 GOP_GWIN_UpdateReg((GOP_CTX_DRV_LOCAL*)pGOPCtx, (E_GOP_TYPE)u8GOPNum);
2296 }
2297 else
2298 {
2299 #ifndef GOP_CMDQ_ENABLE
2300 HAL_GOP_Set_MIU(&pGOPDrvLocalCtx->halCtxLocal, u8GOPNum, miusel);
2301 #else
2302
2303 #ifndef GOP_MIU_GROUP2
2304 if(miusel == 2)
2305 return;
2306 #endif
2307 u16MIUSelect[u8GOPNum]= miusel;
2308 bMIUSelect[u8GOPNum] = TRUE;
2309 #endif
2310 }
2311 }
2312 }
2313
2314
MDrv_GOP_Get_MIU_Sel(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum)2315 MS_U8 MDrv_GOP_Get_MIU_Sel(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum)
2316 {
2317 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2318 MS_U16 regmiu =0;
2319
2320 regmiu=HAL_GOP_GetMIUDst(&pGOPDrvLocalCtx->halCtxLocal,u8GOPNum);
2321
2322 if(regmiu == 0xFF)
2323 {
2324 GOP_D_DBUG("ERROR gop miu client\n");
2325 }
2326
2327 return regmiu;
2328 }
2329
MDrv_GOP_SetIOMapBase(MS_GOP_CTX_LOCAL * pGOPCtx)2330 MS_BOOL MDrv_GOP_SetIOMapBase(MS_GOP_CTX_LOCAL*pGOPCtx)
2331 {
2332 MS_VIRT MMIOBaseAdr;
2333 MS_PHY u32NonPMBankSize;
2334 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2335
2336 if( !MDrv_MMIO_GetBASE(&MMIOBaseAdr, &u32NonPMBankSize, MS_MODULE_GOP))
2337 {
2338 GOP_D_FATAL("Get GOP IOMap failure\n");
2339 GOP_ASSERT(0);
2340 return FALSE;
2341 }
2342 if(pGOPDrvLocalCtx == NULL)
2343 {
2344 return UTOPIA_STATUS_PARAMETER_ERROR;
2345 }
2346 HAL_GOP_SetIOMapBase(&pGOPDrvLocalCtx->halCtxLocal, MMIOBaseAdr);
2347
2348 if(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bFRCSupport == TRUE)
2349 {
2350 if( !MDrv_MMIO_GetBASE(&MMIOBaseAdr, &u32NonPMBankSize, MS_MODULE_FRC))
2351 {
2352 GOP_D_FATAL("Get OC IOMap failure\n");
2353 GOP_ASSERT(0);
2354 return FALSE;
2355 }
2356 HAL_GOP_SetIOFRCMapBase(&pGOPDrvLocalCtx->halCtxLocal, MMIOBaseAdr);
2357 }
2358
2359 return TRUE;
2360 }
2361
2362 // for identify GOP reg format
MDrv_GOP_GetRegForm(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8gop,MS_U8 u8gwin)2363 MS_U32 MDrv_GOP_GetRegForm(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8gop, MS_U8 u8gwin)
2364 {
2365 MS_U32 ret = 0xffff;
2366
2367 if(u8gop != INVAILD_GOP_NUM)
2368 {
2369 switch(u8gop)
2370 {
2371 case E_GOP0:
2372 ret = GOP0_REG_FORM;
2373 break;
2374 case E_GOP1:
2375 ret = GOP1_REG_FORM;
2376 break;
2377 case E_GOP2:
2378 ret = GOP2_REG_FORM;
2379 break;
2380 case E_GOP3:
2381 ret = GOP3_REG_FORM;
2382 break;
2383 case E_GOP4:
2384 ret = GOP4_REG_FORM;
2385 break;
2386 case E_GOP5:
2387 ret = GOP5_REG_FORM;
2388 break;
2389 case E_GOP_Dwin:
2390 ret = GOPD_REG_FORM;
2391 break;
2392 default:
2393 ret = 0xffff;
2394 }
2395 }
2396 else if(u8gwin != INVALID_GWIN_ID)
2397 {
2398 switch(MDrv_DumpGopByGwinId(pGOPCtx,u8gwin))
2399 {
2400 case E_GOP0:
2401 ret = GOP0_REG_FORM;
2402 break;
2403 case E_GOP1:
2404 ret = GOP1_REG_FORM;
2405 break;
2406 case E_GOP2:
2407 ret = GOP2_REG_FORM;
2408 break;
2409 case E_GOP3:
2410 ret = GOP3_REG_FORM;
2411 break;
2412 case E_GOP4:
2413 ret = GOP4_REG_FORM;
2414 break;
2415 case E_GOP5:
2416 ret = GOP5_REG_FORM;
2417 break;
2418 case E_GOP_Dwin:
2419 ret = GOPD_REG_FORM;
2420 break;
2421 default:
2422 ret = 0xffff;
2423 }
2424
2425 }
2426
2427 return ret ;
2428
2429 }
2430
MDrv_GOP_GetShareMemory(MS_BOOL * pbNeedInitShared)2431 void* MDrv_GOP_GetShareMemory(MS_BOOL *pbNeedInitShared)
2432 {
2433 GOP_CTX_DRV_SHARED *pDrvGOPShared=NULL;
2434 MS_BOOL bNeedInitShared = FALSE;
2435
2436 #if defined(MSOS_TYPE_LINUX) || defined(MSOS_TYPE_LINUX_KERNEL)
2437 MS_U32 u32ShmId;
2438 MS_VIRT VAddr;
2439 MS_U32 u32BufSize;
2440 char SHM_Id[] = "Linux GOP driver";
2441
2442 if (FALSE == MsOS_SHM_GetId((MS_U8*)SHM_Id, sizeof(GOP_CTX_DRV_SHARED), &u32ShmId, &VAddr, &u32BufSize, MSOS_SHM_QUERY))
2443 {
2444 if (FALSE == MsOS_SHM_GetId((MS_U8*)SHM_Id, sizeof(GOP_CTX_DRV_SHARED), &u32ShmId, &VAddr, &u32BufSize, MSOS_SHM_CREATE))
2445 {
2446 GOP_D_ERR("SHM allocation failed!\n");
2447 return NULL;
2448 }
2449 GOP_D_INFO("[%s][%d] This is first initial 0x%08x\n", __FUNCTION__, __LINE__, (MS_U32)VAddr);
2450 memset( (MS_U8*)VAddr, 0, sizeof(GOP_CTX_DRV_SHARED));
2451 pDrvGOPShared = (GOP_CTX_DRV_SHARED*)VAddr;
2452 pDrvGOPShared->apiCtxShared.bInitShared = TRUE;
2453 bNeedInitShared = TRUE;
2454 }
2455 pDrvGOPShared = (GOP_CTX_DRV_SHARED*)VAddr;
2456 #else
2457 pDrvGOPShared = &g_gopDrvCtxShared;
2458 bNeedInitShared = TRUE;
2459 #endif
2460
2461 *pbNeedInitShared = (bNeedInitShared | pDrvGOPShared->apiCtxShared.bInitShared);
2462 return (void*)pDrvGOPShared;
2463 }
2464
2465
Drv_GOP_Init_Context(void * pInstance,MS_BOOL * pbNeedInitShared)2466 MS_GOP_CTX_LOCAL* Drv_GOP_Init_Context(void* pInstance,MS_BOOL *pbNeedInitShared)
2467 {
2468 GOP_CTX_DRV_SHARED *pDrvGOPShared;
2469 MS_BOOL bNeedInitShared = FALSE;
2470
2471 #ifdef INSTANT_PRIVATE
2472 GOP_INSTANT_PRIVATE* psGOPInstPri = NULL;
2473 UtopiaInstanceGetPrivate(pInstance, (void*)&psGOPInstPri);
2474 #endif
2475
2476 pDrvGOPShared = (GOP_CTX_DRV_SHARED*)MDrv_GOP_GetShareMemory(&bNeedInitShared);
2477
2478 *pbNeedInitShared = bNeedInitShared;
2479 memset(&g_gopDrvCtxLocal, 0, sizeof(g_gopDrvCtxLocal));
2480 #ifdef MSOS_TYPE_LINUX
2481 g_gopDrvCtxLocal.s32FdGFlip = -1;
2482 #endif
2483 if(bNeedInitShared)
2484 memset(pDrvGOPShared, 0, sizeof(GOP_CTX_DRV_SHARED));
2485
2486 g_gopDrvCtxLocal.pDrvCtxShared = pDrvGOPShared;
2487 g_gopDrvCtxLocal.apiCtxLocal.pGOPCtxShared = & pDrvGOPShared->apiCtxShared;
2488
2489 HAL_GOP_Init_Context(&g_gopDrvCtxLocal.halCtxLocal, &pDrvGOPShared->halCtxShared, bNeedInitShared);
2490 g_gopDrvCtxLocal.apiCtxLocal.pGopChipProperty = g_gopDrvCtxLocal.halCtxLocal.pGopChipPro;
2491
2492 g_gopDrvCtxLocal.halCtxLocal.User_ConsAlpha_bits = DRV_VALID_8BITS; //const alpha : 8bits
2493 g_gopDrvCtxLocal.apiCtxLocal.pGopConsAlphaBits = &(g_gopDrvCtxLocal.halCtxLocal.User_ConsAlpha_bits);
2494
2495 if(bNeedInitShared)
2496 {
2497 //#ifdef MSOS_TYPE_LINUX
2498 MS_U32 gId;
2499 MS_GOP_CTX_LOCAL *pGOPCtxLocal=&g_gopDrvCtxLocal.apiCtxLocal;
2500 *pbNeedInitShared = bNeedInitShared;
2501
2502 if(g_gopDrvCtxLocal.apiCtxLocal.pGopChipProperty->TotalGwinNum>=SHARED_GWIN_MAX_COUNT)
2503 {
2504 //assert here!!
2505 GOP_D_DBUG("Error - TotalGwinNum >= SHARED_GWIN_MAX_COUNT!!\n");
2506 }
2507
2508 for( gId=0; gId<g_gopDrvCtxLocal.apiCtxLocal.pGopChipProperty->TotalGwinNum; gId++)
2509 {
2510 pGOPCtxLocal->pGOPCtxShared->gwinMap[gId].u32CurFBId = INVALID_GWIN_ID;
2511 pGOPCtxLocal->pGOPCtxShared->gwinMap[gId].bIsShared = FALSE;
2512 pGOPCtxLocal->pGOPCtxShared->gwinMap[gId].u16SharedCnt = 0x0;
2513 }
2514
2515
2516 for( gId=0; gId<MDrv_GOP_GetMaxGOPNum(pGOPCtxLocal); gId++)
2517 {
2518 if(gId>=SHARED_GOP_MAX_COUNT)
2519 {
2520 //assert here!!
2521 }
2522 pGOPCtxLocal->pGOPCtxShared->s32OutputColorType[gId] = -1;
2523 pGOPCtxLocal->pGOPCtxShared->bGopHasInitialized[gId] = FALSE;
2524 }
2525 // chip proprity is shared, init once is ok.
2526 HAL_GOP_Chip_Proprity_Init(&g_gopDrvCtxLocal.halCtxLocal);
2527 //#endif //MSOS_TYPE_LINUX
2528 }
2529
2530 return (MS_GOP_CTX_LOCAL*)&g_gopDrvCtxLocal;
2531
2532 }
2533
MDrv_GOP_Init(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,MS_PHY u64GOP_REGDMABASE,MS_U32 u32GOP_RegdmaLen,MS_BOOL bEnableVsyncIntFlip)2534 void MDrv_GOP_Init(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum, MS_PHY u64GOP_REGDMABASE, MS_U32 u32GOP_RegdmaLen, MS_BOOL bEnableVsyncIntFlip)
2535 {
2536 MS_U32 bankoffset=0;
2537 MS_U8 u8Idx;
2538 MS_U8 u8MiuSel;
2539 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2540
2541 if (FALSE== _IsGopNumVaild((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, u8GOPNum))
2542 {
2543 GOP_D_ERR("\n[%s] not support gop%d in this chip version!!",__FUNCTION__, u8GOPNum);
2544 return;
2545 }
2546 _phy_to_miu_offset(u8MiuSel, u64GOP_REGDMABASE, u64GOP_REGDMABASE);
2547 _GetBnkOfstByGop(u8GOPNum, &bankoffset);
2548
2549 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, bankoffset+GOP_4G_CTRL0, 0x1, GOP_BIT0); // GOP rst
2550 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, bankoffset+GOP_4G_CTRL0, 0x0,(GOP_BIT0|GOP_BIT1|GOP_BIT2)); // clear H/V sync reserve
2551 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, bankoffset+GOP_4G_CTRL1, 0x4100, GOP_REG_HW_MASK); // Set REGDMA interval
2552
2553 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, bankoffset+GOP_4G_HSTRCH, 0x1000, GOP_REG_WORD_MASK); // Sanger 070713 For REGDMA Ready issue.
2554 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, bankoffset+GOP_4G_VSTRCH, 0x1000, GOP_REG_WORD_MASK);
2555 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, bankoffset+GOP_4G_CTRL0, GOP_BIT14, GOP_BIT14); // Set mask Hsync when VFDE is low
2556
2557 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, bankoffset+GOP_4G_RATE, 0x0098, GOP_REG_WORD_MASK); // enable blink capability - for ttx usage
2558 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, bankoffset+GOP_4G_CTRL0, 0x0000, GOP_BIT10); // Enable RGB output
2559
2560 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, bankoffset+GOP_4G_BW, GOP_FIFO_BURST_ALL, GOP_FIFO_BURST_MASK ); //set GOP DMA Burst length to "32"
2561 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, bankoffset+GOP_4G_BW, GOP_FIFO_THRESHOLD, GOP_REG_LW_MASK ); //set DMA FIFO threshold to 3/4 FIFO length
2562
2563 if(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bGOPAutoClkGating)
2564 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, bankoffset+GOP_4G_OLDADDR, (GOP_BIT1 | GOP_BIT0), (GOP_BIT1 | GOP_BIT0) );
2565 else
2566 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, bankoffset+GOP_4G_OLDADDR, 0, (GOP_BIT1 | GOP_BIT0) );
2567
2568 /*set clamping value between 2 pixels, it can avoid some cases garbage happen.*/
2569 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, (bankoffset+0x20000)+GOP_4G_STRCH_HSZ, 0, GOP_BIT0);
2570 DRV_GOP_XC_GET_SEMPHORE();
2571 HAL_GOP_Init(&pGOPDrvLocalCtx->halCtxLocal, u8GOPNum);
2572 DRV_GOP_XC_RELEASE_SEMPHORE();
2573
2574 #ifdef GOP_SUPPORT_SPLIT_MODE
2575 // this should be improved.....
2576 pGOPDrvLocalCtx->halCtxLocal.pHALShared->u16GopSplitMode_LRWIDTH[u8GOPNum] = pGOPCtx->pGOPCtxShared->u16PnlWidth[u8GOPNum];
2577 #endif
2578
2579 if (u8GOPNum==0)
2580 {
2581 for (u8Idx=0; u8Idx<MAX_GOP0_GWIN; u8Idx++)
2582 {
2583 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_VSTR_L(u8Idx),0, GOP_REG_WORD_MASK);
2584 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_VSTR_H(u8Idx),0, GOP_REG_WORD_MASK);
2585 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_HSTR(u8Idx),0, GOP_REG_WORD_MASK);
2586 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_HVSTOP_L(u8Idx),0, GOP_REG_WORD_MASK);
2587 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_HVSTOP_H(u8Idx),0, GOP_REG_WORD_MASK);
2588 }
2589 }
2590
2591 if (pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bSetHSyncInverse)
2592 {
2593 /*Set Hsync Inverse, only valid in T3*/
2594 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, bankoffset+GOP_4G_CTRL0, GOP_BIT2, GOP_BIT2);
2595 }
2596
2597 if(pGOPCtx->pGopChipProperty->bPixelModeSupport)
2598 {
2599 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, bankoffset+GOP_4G_BANK_FWR, GOP_BIT7, GOP_BIT7);
2600 }
2601
2602 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)u8GOPNum);
2603 }
2604
MDrv_GOP_DeInit(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum)2605 void MDrv_GOP_DeInit(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum)
2606 {
2607 //De-Init GFlip:
2608 MDrv_GFLIP_DeInit(pGOPCtx, (MS_U32)u8GOPNum);
2609 }
2610
MDrv_GOP_PerClientInit(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,MS_PHY u64GOP_REGDMABASE,MS_U32 u32GOP_RegdmaLen,MS_BOOL bEnableVsyncIntFlip)2611 void MDrv_GOP_PerClientInit(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum, MS_PHY u64GOP_REGDMABASE, MS_U32 u32GOP_RegdmaLen, MS_BOOL bEnableVsyncIntFlip)
2612 {
2613 //Init GFlip:
2614 #if GFLIP_ENABLE
2615 MDrv_GFLIP_Init(pGOPCtx, (MS_U32)u8GOPNum, bEnableVsyncIntFlip);
2616 #endif
2617 //Init RegDMA:
2618 MDrv_GOP_SetRegDMA(pGOPCtx,u8GOPNum, u64GOP_REGDMABASE, u32GOP_RegdmaLen);
2619
2620 GOP_GWIN_UpdateReg((GOP_CTX_DRV_LOCAL*)pGOPCtx, (E_GOP_TYPE)u8GOPNum);
2621 }
2622
MDrv_GOP_SetRegDMA(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_PHY u64GOP_REGDMABASE,MS_U32 u32GOP_RegdmaLen)2623 void MDrv_GOP_SetRegDMA(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, MS_PHY u64GOP_REGDMABASE, MS_U32 u32GOP_RegdmaLen)
2624 {
2625 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2626 MS_U8 u8MiuSel;
2627 MS_U32 u32BankOffSet = 0;
2628
2629 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
2630 //* PA->VA for CPU acdess
2631 pGOPDrvLocalCtx->pu8REGMAP_Base[u8GOP] = (MS_U8*)MS_PA2KSEG1(u64GOP_REGDMABASE);
2632 pGOPDrvLocalCtx->u16REGMAP_Offset[u8GOP] = 0;
2633 pGOPDrvLocalCtx->u32REGMAP_Len[u8GOP] = u32GOP_RegdmaLen;
2634 //printf("This RegDMA address is invalid for HW, Auto-adjusting...\n");
2635 _phy_to_miu_offset(u8MiuSel, u64GOP_REGDMABASE, u64GOP_REGDMABASE);
2636
2637 if(pGOPCtx->pGopChipProperty->bInternalMIUSelect[u8GOP]==TRUE)
2638 {
2639 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_MIU_SEL, u8MiuSel<<4, GOP_BIT4|GOP_BIT5 );//GWIN Palette MIU Select
2640 }
2641 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_REGDMA_END, 0x1ff, 0x01ff); // Setup REGDMA address
2642 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_REGDMA_END, (u64GOP_REGDMABASE/(512*GOP_WordUnit)&0x7f) << 9, 0xFE00); // Setup REGDMA address
2643 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_REGDMA_STR, (u64GOP_REGDMABASE/(512*GOP_WordUnit))>>7, 0xffff); // Setup REGDMA address
2644 }
2645
2646 /********************************************************************************/
2647 /// Set GOP progressive mode
2648 /// @param bEnable \b IN
2649 /// - # TRUE Progressive (read out the DRAM graphic data by FIELD)
2650 /// - # FALSE Interlaced (not care FIELD)
2651 /// @internal please verify the register document and the code
2652 /********************************************************************************/
MDrv_GOP_GWIN_EnableProgressive(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,MS_BOOL bEnable)2653 void MDrv_GOP_GWIN_EnableProgressive(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum, MS_BOOL bEnable)
2654 {
2655 MS_U16 regval;
2656 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2657 MS_U32 u32BankOffSet=0;
2658 _GetBnkOfstByGop(u8GOPNum, &u32BankOffSet);
2659
2660 if(bEnable)
2661 regval = 0x8;
2662 else
2663 regval = 0;
2664
2665 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, regval, 0x8);
2666 }
2667
2668 /********************************************************************************/
2669 /// Get GOP progressive mode
2670 /// @return
2671 /// - # TRUE Progressive (read out the DRAM graphic data by FIELD)
2672 /// - # FALSE Interlaced (not care FIELD)
2673 /// @internal please verify the register document and the code
2674 /********************************************************************************/
MDrv_GOP_GWIN_IsProgressive(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum)2675 MS_BOOL MDrv_GOP_GWIN_IsProgressive(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum)
2676 {
2677 MS_U16 regval;
2678 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2679 MS_U32 u32BankOffSet=0;
2680 _GetBnkOfstByGop(u8GOPNum, &u32BankOffSet);
2681
2682 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, ®val);
2683 if ((regval & 8) == 0)
2684 {
2685 return FALSE;
2686 }
2687 else
2688 {
2689 return TRUE;
2690 }
2691 }
2692
2693 /********************************************************************************/
2694 /// Set the time when new GWIN settings take effect
2695 /// @param bEnable \b IN
2696 /// - # TRUE the new setting moved from internal register buffer
2697 /// to active registers immediately
2698 /// - # FALSE new settings take effect when next VSYNC is coming
2699 /********************************************************************************/
MDrv_GOP_GWIN_SetForceWrite(MS_GOP_CTX_LOCAL * pGOPCtx,MS_BOOL bEnable)2700 void MDrv_GOP_GWIN_SetForceWrite(MS_GOP_CTX_LOCAL*pGOPCtx, MS_BOOL bEnable)
2701 {
2702 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2703 pGOPDrvLocalCtx->gop_gwin_frwr = bEnable;
2704 }
2705
MDrv_GOP_GWIN_SetBnkForceWrite(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_BOOL bEnable)2706 void MDrv_GOP_GWIN_SetBnkForceWrite(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP, MS_BOOL bEnable)
2707 {
2708 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2709 pGOPDrvLocalCtx->bGOPBankFwr[u8GOP] = bEnable;
2710 }
2711
MDrv_GOP_GWIN_ForceWrite_Update(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_BOOL bEnable)2712 void MDrv_GOP_GWIN_ForceWrite_Update(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP, MS_BOOL bEnable)
2713 {
2714 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2715
2716 if(pGOPDrvLocalCtx->apiCtxLocal.pGopChipProperty->bBnkForceWrite)
2717 pGOPDrvLocalCtx->bGOPBankFwr[u8GOP] = bEnable;
2718 pGOPDrvLocalCtx->gop_gwin_frwr = bEnable;
2719 }
2720
2721 /********************************************************************************/
2722 /// Get the status for GWIN settings take effect
2723 /// @param bEnable \b IN
2724 /// - # TRUE the new setting moved from internal register buffer
2725 /// to active registers immediately
2726 /// - # FALSE new settings take effect when next VSYNC is coming
2727 /********************************************************************************/
MDrv_GOP_GWIN_IsForceWrite(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP)2728 MS_BOOL MDrv_GOP_GWIN_IsForceWrite(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP)
2729 {
2730 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2731 return (MS_BOOL)(pGOPDrvLocalCtx->gop_gwin_frwr || pGOPDrvLocalCtx->bGOPBankFwr[u8GOP]);
2732 }
2733
2734 /********************************************************************************/
2735 /// Set GWIN output color domain
2736 /// @param type \b IN YUV or RGB
2737 /********************************************************************************/
MDrv_GOP_GWIN_OutputColor(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,GOP_OupputColor type)2738 void MDrv_GOP_GWIN_OutputColor(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, GOP_OupputColor type)
2739 {
2740 MS_U16 regval = 0;
2741 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2742 MS_U32 u32BankOffSet = 0;
2743 MS_BOOL bHDREnable=FALSE;
2744
2745 HAL_GOP_IsHDREnabled(&pGOPDrvLocalCtx->halCtxLocal, &bHDREnable);
2746 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
2747 if(bHDREnable == FALSE)
2748 {
2749 if(type == DRV_GOPOUT_YUV)
2750 regval |= 0x400;
2751
2752 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, regval, 0x400);
2753 }
2754 else
2755 {
2756 GOP_D_INFO("[%s][%d]HDR ON, only Set GOP RGB Domain==\n",__FUNCTION__,__LINE__);
2757 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, 0x000, 0x400);
2758 }
2759 }
2760
2761 /********************************************************************************/
2762 /// Set transparent color for the GWIN in ARGB8888 format
2763 /// @param clr \b IN transparent color
2764 /// @param mask \b IN mask for trs color
2765 /********************************************************************************/
MDrv_GOP_GWIN_SetTransClr_8888(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_U32 clr,MS_U32 mask)2766 void MDrv_GOP_GWIN_SetTransClr_8888(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, MS_U32 clr, MS_U32 mask)
2767 {
2768 MS_U16 regval;
2769 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2770 MS_U32 u32BankOffSet = 0;
2771
2772 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
2773 regval = (MS_U16)(clr&0xffff);
2774 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_TRSCLR_L, regval, GOP_REG_WORD_MASK);
2775
2776 regval = (MS_U16)((clr>>16&0xff))|(MS_U16)((mask&0xff)<<8) ;
2777 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_TRSCLR_H, regval, GOP_REG_WORD_MASK);
2778 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)u8GOP);
2779 }
2780 /********************************************************************************/
2781 /// Set transparent color for the GWIN in YUV format
2782 /// @param u8GOP \b IN GOP number
2783 /// @param clr \b IN transparent color
2784 /// @param mask \b IN mask for trs color
2785 /********************************************************************************/
2786
MDrv_GOP_GWIN_SetTransClr_YUV(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_U32 clr,MS_U32 mask)2787 void MDrv_GOP_GWIN_SetTransClr_YUV(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, MS_U32 clr, MS_U32 mask)
2788 {
2789 MS_U16 regval;
2790 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2791 MS_U32 u32BankOffSet = 0;
2792
2793 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
2794 regval = (MS_U16)(clr&0xffff);
2795 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_TRSCLR_TUV_L, regval, GOP_REG_WORD_MASK);
2796
2797 regval = (MS_U16)((clr>>16&0xff))|(MS_U16)((mask&0xff)<<8) ;
2798 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_TRSCLR_TUV_H, regval, GOP_REG_WORD_MASK);
2799 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)u8GOP);
2800 }
2801 /********************************************************************************/
2802 /// Enable or Disable transparent color
2803 /// @param fmt \b IN @copydoc EN_GOP_TRANSCLR_FMT
2804 /// @param bEnable \b IN
2805 /// - # TRUE enable transparent color
2806 /// - # FALSE disable transparent color
2807 /********************************************************************************/
MDrv_GOP_GWIN_EnableTransClr(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,GOP_TransClrFmt fmt,MS_BOOL bEnable)2808 void MDrv_GOP_GWIN_EnableTransClr(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, GOP_TransClrFmt fmt, MS_BOOL bEnable)
2809 {
2810 MS_U16 regval;
2811 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2812 MS_U32 u32BankOffSet = 0;
2813
2814 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
2815 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, ®val);
2816
2817 if(bEnable)
2818 {
2819 if(fmt == DRV_GOPTRANSCLR_FMT3)
2820 regval |= 0x020;
2821 else
2822 regval |= 0x0800;
2823 }
2824 else
2825 regval = 0x0000;
2826
2827 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, regval, 0x820);
2828 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)u8GOP);
2829 }
2830
MDrv_GOP_GWIN_GetGwinPriority(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8Gopnum,GOP_GwinPriority * GwinPri)2831 void MDrv_GOP_GWIN_GetGwinPriority(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8Gopnum, GOP_GwinPriority *GwinPri)
2832 {
2833 MS_U16 u16GetGwinPri =0;
2834 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2835
2836 if (u8Gopnum==0)
2837 {
2838 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_PRI0, &u16GetGwinPri);
2839 GwinPri->Gop0_GwinPri.u81stGwin = (u16GetGwinPri&0x3);
2840 GwinPri->Gop0_GwinPri.u82stGwin = (u16GetGwinPri&0x30)>>4;
2841 GwinPri->Gop0_GwinPri.u83stGwin = (u16GetGwinPri&0x300)>>8;
2842 GwinPri->Gop0_GwinPri.u84stGwin = (u16GetGwinPri&0x3000)>>12;
2843 }
2844 else if (u8Gopnum==1)
2845 {
2846 if(4 == MDrv_GOP_GetGwinNum(pGOPCtx,1))
2847 {
2848 GOP_D_DBUG("[%s][%d]=====TRACE!!!!!!!!!!!!====\n",__FUNCTION__,__LINE__);
2849 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PRI0, &u16GetGwinPri);
2850 GwinPri->Gop0_GwinPri.u81stGwin = (u16GetGwinPri&0x3);
2851 GwinPri->Gop0_GwinPri.u82stGwin = (u16GetGwinPri&0x30)>>4;
2852 GwinPri->Gop0_GwinPri.u83stGwin = (u16GetGwinPri&0x300)>>8;
2853 GwinPri->Gop0_GwinPri.u84stGwin = (u16GetGwinPri&0x3000)>>12;
2854 }
2855 else
2856 {
2857 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PRI0, &u16GetGwinPri);
2858 GwinPri->Gop1_1stGwin = GwinPri->Gop1_1stGwin&0x1;
2859 }
2860 }
2861 else
2862 {
2863 //only gop0 and gop1 need to get gwin Priority
2864 }
2865 }
2866
MDrv_GOP_GWIN_SetHSPipe(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,MS_U16 u16HSPipe)2867 void MDrv_GOP_GWIN_SetHSPipe(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum, MS_U16 u16HSPipe)
2868 {
2869 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2870 DRV_GOPDstType pGopDst = E_DRV_GOP_DST_INVALID;
2871 MS_U32 u32BankOffSet = 0;
2872 MS_U16 u16NonVS_PD_Delay=0;
2873
2874 if (FALSE== _IsGopNumVaild(pGOPCtx, u8GOPNum))
2875 {
2876 GOP_D_ERR("\n[%s] not support gop%d in this chip version!!",__FUNCTION__, u8GOPNum);
2877 return;
2878 }
2879
2880 HAL_GOP_GetGOPDst(&pGOPDrvLocalCtx->halCtxLocal, u8GOPNum, &pGopDst);
2881
2882 if (pGOPCtx->pGopChipProperty->bGOPVscalePipeDelay[u8GOPNum])
2883 {
2884 if (pGopDst == E_DRV_GOP_DST_OP_DUAL_RATE)
2885 {
2886 u16NonVS_PD_Delay = pGOPCtx->pGopChipProperty->GOP_NonVS_DualOpPD_Offset;
2887 u16HSPipe+= u16NonVS_PD_Delay;
2888 }
2889 else if(pGopDst != E_DRV_GOP_DST_IP0)
2890 {
2891 u16NonVS_PD_Delay = (pGOPCtx->pGopChipProperty->b2Pto1PSupport==TRUE)?\
2892 pGOPCtx->pGopChipProperty->GOP_NonVS_PD_Offset*2: pGOPCtx->pGopChipProperty->GOP_NonVS_PD_Offset;
2893 u16HSPipe+= u16NonVS_PD_Delay;
2894 }
2895 else
2896 {
2897 if(!pGOPCtx->pGopChipProperty->bIgnoreIPHPD)
2898 {
2899 u16NonVS_PD_Delay = (pGOPCtx->pGopChipProperty->b2Pto1PSupport==TRUE)?\
2900 pGOPCtx->pGopChipProperty->GOP_NonVS_PD_Offset*2: pGOPCtx->pGopChipProperty->GOP_NonVS_PD_Offset;
2901 u16HSPipe+= u16NonVS_PD_Delay;
2902 }
2903 }
2904 }
2905
2906 _GetBnkOfstByGop(u8GOPNum, &u32BankOffSet);
2907 #ifdef XC_FSC_FRC_PATCH
2908 MS_U16 XC_X_Offset = 0, XC_Y_Offset = 0;
2909 MDrv_SC_Get_GOPOffset(&XC_X_Offset, &XC_Y_Offset);
2910 u16HSPipe += XC_X_Offset;
2911 #endif
2912 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_HS_PIPE, u16HSPipe, 0x1FFF);
2913
2914 }
2915
MDrv_GOP_GWIN_GetMux(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 * u8GOPNum,Gop_MuxSel eGopMux)2916 void MDrv_GOP_GWIN_GetMux(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8* u8GOPNum, Gop_MuxSel eGopMux)
2917 {
2918
2919 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2920
2921 HAL_GOP_GWIN_GetMUX(&pGOPDrvLocalCtx->halCtxLocal, u8GOPNum, eGopMux);
2922
2923 }
2924
MDrv_GOP_GWIN_SetMux(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,Gop_MuxSel eGopMux)2925 void MDrv_GOP_GWIN_SetMux(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum, Gop_MuxSel eGopMux)
2926 {
2927 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2928
2929 if (!_IsMuxSelVaild(pGOPCtx, u8GOPNum))
2930 {
2931 GOP_D_ERR("\n[%s] not support gop%d in this chip version!!",__FUNCTION__, u8GOPNum);
2932 return;
2933 }
2934 HAL_GOP_GWIN_SetMUX(&pGOPDrvLocalCtx->halCtxLocal, u8GOPNum, eGopMux);
2935
2936 }
2937
MDrv_GOP_MapLayer2Mux(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U32 u32Layer,MS_U8 u8GopNum,MS_U32 * pu32Mux)2938 void MDrv_GOP_MapLayer2Mux(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U32 u32Layer, MS_U8 u8GopNum, MS_U32 *pu32Mux)
2939 {
2940 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2941 DRV_GOPDstType gopDst=E_DRV_GOP_DST_OP0;
2942
2943 MDrv_GOP_GWIN_GetDstPlane(pGOPCtx, u8GopNum, &gopDst);
2944
2945 *pu32Mux = pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_MapLayer2Mux[u32Layer];
2946 }
2947
MDrv_GOP_GWIN_SetGwinPriority(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GopNum,GOP_GwinPriority * GwinPri)2948 void MDrv_GOP_GWIN_SetGwinPriority(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GopNum, GOP_GwinPriority *GwinPri)
2949 {
2950 MS_U16 u16Regval;
2951 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2952
2953 if (FALSE== _IsGopNumVaild(pGOPCtx, u8GopNum))
2954 {
2955 GOP_D_ERR("\n[%s] not support gop%d in this chip version!!",__FUNCTION__, u8GopNum);
2956 return;
2957 }
2958 if (u8GopNum==0)
2959 {
2960 u16Regval = (GwinPri->Gop0_GwinPri.u81stGwin&0x3) | ((GwinPri->Gop0_GwinPri.u82stGwin&0x3)<<4) | \
2961 ((GwinPri->Gop0_GwinPri.u83stGwin&0x3)<<8) | ((GwinPri->Gop0_GwinPri.u84stGwin&0x3)<<12);
2962 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_PRI0, u16Regval, GOP_REG_WORD_MASK);
2963 }
2964 else if (u8GopNum==1)
2965 {
2966 if(4 == MDrv_GOP_GetGwinNum(pGOPCtx,1))
2967 {
2968 u16Regval = (GwinPri->Gop0_GwinPri.u81stGwin&0x3) | ((GwinPri->Gop0_GwinPri.u82stGwin&0x3)<<4) | \
2969 ((GwinPri->Gop0_GwinPri.u83stGwin&0x3)<<8) | ((GwinPri->Gop0_GwinPri.u84stGwin&0x3)<<12);
2970 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PRI0, u16Regval, GOP_REG_WORD_MASK);
2971 }
2972 else
2973 {
2974 u16Regval = (GwinPri->Gop1_1stGwin) | ((~GwinPri->Gop1_1stGwin &0x1)<<4); //Begrin from t8
2975 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PRI0, u16Regval, GOP_REG_LW_MASK);
2976 }
2977 }
2978 else
2979 {
2980 //note: only gop0 and gop1 need to set gwin priority
2981 }
2982
2983 }
2984
2985 /******************************************************************************/
2986 /// Enable/Disable multi alpha for one gop
2987 /// @param u32GopIdx \b IN: gop ID
2988 /// @param bEnable \b IN: TRUE/FALSE
2989 /********************************************************************************/
MDrv_GOP_GWIN_EnableMultiAlpha(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U32 u32GopIdx,MS_BOOL bEnable)2990 void MDrv_GOP_GWIN_EnableMultiAlpha(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U32 u32GopIdx, MS_BOOL bEnable)
2991 {
2992 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
2993 MS_U32 u32BankOffSet = 0;
2994
2995 _GetBnkOfstByGop(u32GopIdx, &u32BankOffSet);
2996 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_MULTI_ALPHA, bEnable<<7, GOP_BIT7);
2997 }
2998
2999 /******************************************************************************/
3000 /// get multi alpha status for one gop
3001 /// @param u32GopIdx \b IN: gop ID
3002 /// @return multi alpha status
3003 /******************************************************************************/
MDrv_GOP_GWIN_IsMultiAlphaEnable(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U32 u32GopIdx)3004 MS_BOOL MDrv_GOP_GWIN_IsMultiAlphaEnable(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U32 u32GopIdx)
3005 {
3006 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3007 MS_U16 u16Value = 0;
3008 MS_U32 u32BankOffSet = 0;
3009
3010 _GetBnkOfstByGop(u32GopIdx, &u32BankOffSet);
3011
3012 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_MULTI_ALPHA, &u16Value);
3013 if ((u16Value & GOP_BIT7) != 0)
3014 {
3015 return TRUE;
3016 }
3017 else
3018 {
3019 return FALSE;
3020 }
3021 }
3022
3023 #ifdef CONFIG_GOP_GWIN_MISC
3024 /********************************************************************************/
3025 /// Set GWIN Blink
3026 /// @param bEnable \b IN
3027 /// - # TRUE enable
3028 /// - # FALSE disable
3029 /// @param u8rate \b IN Blink frame rate
3030 /********************************************************************************/
MDrv_GOP_GWIN_SetBlink(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8win,MS_BOOL bEnable,MS_U8 u8rate)3031 void MDrv_GOP_GWIN_SetBlink(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8win, MS_BOOL bEnable, MS_U8 u8rate)
3032 {
3033 MS_U16 regval;
3034 MS_U8 u8GOP;
3035 MS_U32 u32BankOffSet = 0;
3036 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3037
3038 u8GOP = MDrv_DumpGopByGwinId(pGOPCtx,u8win);
3039 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
3040 if(bEnable)
3041 {
3042 regval = 0x8000 | u8rate <<8;
3043 }
3044 else
3045 {
3046 regval = 0;
3047 }
3048 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_RATE, regval, 0xff00);
3049 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)u8GOP);
3050 }
3051
3052 #endif
MDrv_GOP_SetGOPHighPri(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum)3053 GOP_Result MDrv_GOP_SetGOPHighPri(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum)
3054 {
3055 GOP_Result GOPRet;
3056 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3057
3058 if (FALSE== _IsGopNumVaild(pGOPCtx, u8GOPNum))
3059 {
3060 GOP_D_ERR("\n[%s] not support gop%d in this chip version!!",__FUNCTION__, u8GOPNum);
3061 return GOP_FAIL;
3062 }
3063 GOPRet = HAL_GOP_SetGOPHighPri(&pGOPDrvLocalCtx->halCtxLocal, u8GOPNum);
3064 return GOPRet;
3065 }
3066
3067
3068 /********************************************************************************/
3069 /// Set GOP0 and GOP1 scaler setting
3070 /// @param gopNum \b IN 0: GOP0 1:GOP1
3071 /// @param bEnable \b IN
3072 /// - # TRUE enable
3073 /// - # FALSE disable
3074 /********************************************************************************/
MDrv_GOP_SetGOPEnable2SC(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 gopNum,MS_BOOL bEnable)3075 void MDrv_GOP_SetGOPEnable2SC(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 gopNum, MS_BOOL bEnable)
3076 {
3077 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3078
3079 if (!_IsMuxSelVaild(pGOPCtx, gopNum))
3080 {
3081 GOP_D_ERR("\n[%s] not support gop%d in this chip version!!",__FUNCTION__, gopNum);
3082 return;
3083 }
3084 DRV_GOP_XC_GET_SEMPHORE();
3085 HAL_GOP_SetGOPEnable2SC(&pGOPDrvLocalCtx->halCtxLocal, gopNum, bEnable);
3086 DRV_GOP_XC_RELEASE_SEMPHORE();
3087 }
3088 #ifdef CONFIG_GOP_GWIN_MISC
MDrv_GOP_SetGOPEnable2Mode1(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 gopNum,MS_BOOL bEnable)3089 void MDrv_GOP_SetGOPEnable2Mode1(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 gopNum, MS_BOOL bEnable)
3090 {
3091 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3092 DRV_GOPDstType enGopDst = E_DRV_GOP_DST_INVALID;
3093 if (!_IsMuxSelVaild(pGOPCtx, gopNum))
3094 {
3095 GOP_D_ERR("\n[%s] not support gop%d in this chip version!!",__FUNCTION__, gopNum);
3096 return;
3097 }
3098 DRV_GOP_XC_GET_SEMPHORE();
3099 HAL_GOP_SetGOPEnable2Mode1(&pGOPDrvLocalCtx->halCtxLocal, gopNum, bEnable);
3100 DRV_GOP_XC_RELEASE_SEMPHORE();
3101
3102 HAL_GOP_GetGOPDst(&pGOPDrvLocalCtx->halCtxLocal, gopNum, &enGopDst);
3103 if (enGopDst == E_DRV_GOP_DST_OP0)
3104 {
3105 MDrv_GOP_GWIN_SetAlphaInverse(pGOPCtx, gopNum, !bEnable);
3106 }
3107 }
3108
MDrv_GOP_GetGOPEnable2Mode1(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 gopNum,MS_BOOL * pbEnable)3109 void MDrv_GOP_GetGOPEnable2Mode1(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 gopNum, MS_BOOL *pbEnable)
3110 {
3111 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3112 if (!_IsMuxSelVaild(pGOPCtx, gopNum))
3113 {
3114 GOP_D_ERR("\n[%s] not support gop%d in this chip version!!",__FUNCTION__, gopNum);
3115 return;
3116 }
3117 DRV_GOP_XC_GET_SEMPHORE();
3118 HAL_GOP_GetGOPAlphaMode1(&pGOPDrvLocalCtx->halCtxLocal, gopNum, pbEnable);
3119 DRV_GOP_XC_RELEASE_SEMPHORE();
3120 }
3121 #endif
3122
MDrv_GOP_MIXER_SetMux(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 gopNum,MS_U8 muxNum,MS_BOOL bEnable)3123 GOP_Result MDrv_GOP_MIXER_SetMux(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 gopNum, MS_U8 muxNum, MS_BOOL bEnable)
3124 {
3125 GOP_Result GOPRet;
3126 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3127
3128 GOPRet = HAL_GOP_MIXER_SetMux(&pGOPDrvLocalCtx->halCtxLocal, gopNum, muxNum, bEnable);
3129 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, E_GOP_MIXER);
3130 return GOPRet;
3131 }
3132
MDrv_GOP_MIXER_SetGOPEnable2Mixer(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 gopNum,MS_BOOL bEnable)3133 GOP_Result MDrv_GOP_MIXER_SetGOPEnable2Mixer(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 gopNum, MS_BOOL bEnable)
3134 {
3135 GOP_Result GOPRet;
3136 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3137
3138 if (FALSE== _IsGopNumVaild(pGOPCtx, gopNum))
3139 {
3140 GOP_D_ERR("\n[%s] not support gop%d in this chip version!!",__FUNCTION__, gopNum);
3141 return GOP_FAIL;
3142 }
3143 GOPRet = HAL_GOP_MIXER_SetGOPEnable2Mixer(&pGOPDrvLocalCtx->halCtxLocal, gopNum, bEnable);
3144 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, E_GOP_MIXER);
3145 return GOPRet;
3146 }
3147
MDrv_GOP_MIXER_EnableOldBlendMode(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 gopNum,MS_BOOL bEnable)3148 GOP_Result MDrv_GOP_MIXER_EnableOldBlendMode(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 gopNum, MS_BOOL bEnable)
3149 {
3150 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3151 HAL_GOP_MIXER_EnableOldBlendMode(&pGOPDrvLocalCtx->halCtxLocal, gopNum, bEnable);
3152 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)gopNum);
3153 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, E_GOP_MIXER);
3154 return GOP_SUCCESS;
3155 }
3156
MDrv_GOP_Set_VE_MUX(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 gopNum,MS_U8 bEn)3157 GOP_Result MDrv_GOP_Set_VE_MUX(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 gopNum, MS_U8 bEn)
3158 {
3159 GOP_Result GOPRet;
3160 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3161
3162 if (!_IsMuxSelVaild(pGOPCtx, gopNum))
3163 {
3164 GOP_D_ERR("\n[%s] not support gop%d in this chip version!!",__FUNCTION__, gopNum);
3165 return GOP_FAIL;
3166 }
3167 GOPRet = HAL_GOP_SetGOPToVE(&pGOPDrvLocalCtx->halCtxLocal, gopNum, bEn);
3168 return GOPRet;
3169 }
3170
3171 /********************************************************************************/
3172 /// Set GOP destination (OP/IP) setting to scaler
3173 /// @param ipSelGop \b IN \copydoc MS_IPSEL_GOP
3174 /********************************************************************************/
MDrv_GOP_SetIPSel2SC(MS_GOP_CTX_LOCAL * pGOPCtx,MS_IPSEL_GOP ipSelGop)3175 void MDrv_GOP_SetIPSel2SC(MS_GOP_CTX_LOCAL*pGOPCtx, MS_IPSEL_GOP ipSelGop)
3176 {
3177 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3178 DRV_GOP_XC_GET_SEMPHORE();
3179 HAL_GOP_SetIPSel2SC(&pGOPDrvLocalCtx->halCtxLocal, ipSelGop);
3180 DRV_GOP_XC_RELEASE_SEMPHORE();
3181 }
3182
3183 #ifdef CONFIG_GOP_FADE
MDrv_GOP_GWIN_SetFadeInOut(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 gId,DRV_GOP_FADE_TYPE eGwinFadeType,MS_BOOL bEnable,MS_U8 u8FadeRate)3184 GOP_Result MDrv_GOP_GWIN_SetFadeInOut(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 gId, DRV_GOP_FADE_TYPE eGwinFadeType, MS_BOOL bEnable, MS_U8 u8FadeRate)
3185 {
3186 #define FADE_RATE_MASK 0xF
3187
3188 GOP_Result ret = GOP_SUCCESS;
3189 MS_U8 u8GOP, u8Oftgid;
3190 MS_BOOL bIsFrwrBackup;
3191 MS_U32 u32BankOffSet = 0;
3192 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3193
3194 if (FALSE== _IsGwinIdValid(pGOPCtx, gId))
3195 {
3196 GOP_D_ERR("\ngId invalid in [%s]", __FUNCTION__);
3197 return GOP_FAIL;
3198 }
3199
3200 u8GOP = MDrv_DumpGopByGwinId(pGOPCtx,gId);
3201 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
3202 bIsFrwrBackup = MDrv_GOP_GWIN_IsForceWrite(pGOPCtx, u8GOP);
3203 MDrv_GOP_GWIN_ForceWrite_Update(pGOPCtx, u8GOP, TRUE);
3204
3205 u8Oftgid = gId;
3206 if ( (gId==GOP3_GwinIdBase) || (gId==GOP2_GwinIdBase) || (gId==GOP4_GwinIdBase) || (gId==GOP5_GwinIdBase))
3207 {
3208 u8Oftgid = 0;
3209 }
3210 else if (gId>=GOP1_GwinIdBase && gId<GOP2_GwinIdBase)
3211 {
3212 u8Oftgid -= GOP1_GwinIdBase;
3213 }
3214
3215 if (bEnable)
3216 {
3217 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_DRAM_FADE(u8Oftgid), \
3218 GOP_BIT5, GOP_BIT5);
3219 if (eGwinFadeType==E_DRV_GOP_GWIN_FADE_IN)
3220 {
3221 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_DRAM_FADE(u8Oftgid), \
3222 GOP_BIT6, GOP_BIT6);
3223 }
3224 else if (eGwinFadeType==E_DRV_GOP_GWIN_FADE_OUT)
3225 {
3226 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_DRAM_FADE(u8Oftgid), \
3227 0, GOP_BIT6);
3228 }
3229 else
3230 {
3231 GOP_D_DBUG("[%s] unknow gop fade type !\n", __FUNCTION__);
3232 ret = GOP_FAIL;
3233 }
3234 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_DRAM_FADE(u8Oftgid), \
3235 u8FadeRate&FADE_RATE_MASK, FADE_RATE_MASK);
3236 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_DRAM_FADE(u8Oftgid), \
3237 GOP_BIT4, GOP_BIT4);
3238 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)MDrv_DumpGopByGwinId(pGOPCtx,gId));
3239 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_DRAM_FADE(u8Oftgid), \
3240 0, GOP_BIT5);
3241 }
3242 else
3243 {
3244 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_DRAM_FADE(u8Oftgid), \
3245 0, GOP_REG_LW_MASK);
3246 }
3247
3248 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)MDrv_DumpGopByGwinId(pGOPCtx,gId));
3249 MDrv_GOP_GWIN_ForceWrite_Update(pGOPCtx, u8GOP, bIsFrwrBackup);
3250 return ret;
3251 }
3252 #endif
3253
3254 /********************************************************************************/
3255 /// Set GOP destination clock
3256 /// @param gopNum \b IN 0:GOP0 1:GOP1
3257 /// @param eDstType \b IN \copydoc EN_GOP_DST_TYPE
3258 /********************************************************************************/
MDrv_GOP_SetGOPClk(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 gopNum,DRV_GOPDstType eDstType)3259 GOP_Result MDrv_GOP_SetGOPClk(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 gopNum, DRV_GOPDstType eDstType)
3260 {
3261 GOP_Result GopRet;
3262 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3263
3264 if (FALSE== _IsGopNumVaild(pGOPCtx, gopNum))
3265 {
3266 GOP_D_ERR("\n[%s] not support gop%d in this chip version!!",__FUNCTION__, gopNum);
3267 return GOP_FAIL;
3268 }
3269 GopRet = HAL_GOP_SetGOPClk(&pGOPDrvLocalCtx->halCtxLocal, gopNum, eDstType);
3270 return GopRet;
3271 }
3272
MDrv_GOP_SetClkForCapture(MS_GOP_CTX_LOCAL * pGOPCtx,DRV_GOP_DWIN_SRC_SEL enSrcSel)3273 void MDrv_GOP_SetClkForCapture(MS_GOP_CTX_LOCAL*pGOPCtx, DRV_GOP_DWIN_SRC_SEL enSrcSel)
3274 {
3275 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3276 HAL_GOP_SetClkForCapture(&pGOPDrvLocalCtx->halCtxLocal, enSrcSel);
3277 }
3278
3279 //-------------------------------------------------------------------------------------------------
3280 /// Set GOP0 and GOP1 field inverse
3281 //-------------------------------------------------------------------------------------------------
MDrv_GOP_GWIN_SetFieldInver(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_BOOL enable)3282 void MDrv_GOP_GWIN_SetFieldInver(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, MS_BOOL enable)
3283 {
3284 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3285 MS_U32 u32BankOffSet = 0;
3286
3287 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
3288 if (enable)
3289 {
3290 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, 1<<4, 0x10);
3291 }
3292 else
3293 {
3294 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, 0<<4, 0x10);
3295 }
3296 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)u8GOP);
3297 }
3298
3299
3300 /********************************************************************************/
3301 /// Set GOP alpha inverse
3302 /// @param bEnable \b IN
3303 /// - # TRUE enable alpha inverse
3304 /// - # FALSE disable alpha inverse
3305 /********************************************************************************/
MDrv_GOP_GWIN_SetAlphaInverse(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8gopNum,MS_BOOL bEnable)3306 void MDrv_GOP_GWIN_SetAlphaInverse(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8gopNum, MS_BOOL bEnable)
3307 {
3308 MS_U32 u32BankOffSet=0;
3309 DRV_GOPDstType enGopDst = E_DRV_GOP_DST_INVALID;
3310 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3311
3312 _GetBnkOfstByGop(u8gopNum, &u32BankOffSet);
3313 HAL_GOP_GetGOPDst(&pGOPDrvLocalCtx->halCtxLocal, u8gopNum, &enGopDst);
3314 if (enGopDst == E_DRV_GOP_DST_OP0)
3315 {
3316 MS_BOOL bPreAlpha = FALSE;
3317
3318 MDrv_GOP_GetGOPEnable2Mode1(pGOPCtx, u8gopNum, &bPreAlpha);
3319 if(bPreAlpha)
3320 {
3321 if(bEnable)
3322 {
3323 GOP_D_WARN("GOP%d AlphaInverse will be set to false dueto new alpha mode,please ignore this message. %s\n",u8gopNum,__FUNCTION__);
3324 }
3325 bEnable = FALSE;
3326 }
3327 }
3328
3329 if (bEnable)
3330 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_CTRL0, (MS_U16)GOP_BIT15, GOP_BIT15);
3331 else
3332 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_CTRL0, (MS_U16)~GOP_BIT15, GOP_BIT15);
3333 }
3334
3335 /********************************************************************************/
3336 /// Set GOP VSync inverse
3337 /// @param bEnable \b IN
3338 /// - # TRUE enable VSync inverse
3339 /// - # FALSE disable VSync inverse
3340 /********************************************************************************/
MDrv_GOP_GWIN_SetVSyncinverse(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_BOOL bEnable)3341 void MDrv_GOP_GWIN_SetVSyncinverse(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, MS_BOOL bEnable)
3342 {
3343 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3344 MS_U32 u32BankOffSet = 0;
3345
3346 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
3347 if (bEnable)
3348 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, (MS_U16)GOP_BIT1, GOP_BIT1);
3349 else
3350 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, (MS_U16)~GOP_BIT1, GOP_BIT1);
3351 }
3352
3353
3354 /********************************************************************************/
3355 /// Get GOP alpha inverse
3356 /// - # TRUE alpha inverse is on
3357 /// - # FALSE alpha inverse is off
3358 /********************************************************************************/
MDrv_GOP_GWIN_GetAlphaInverse(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_BOOL * bBool)3359 void MDrv_GOP_GWIN_GetAlphaInverse(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, MS_BOOL *bBool)
3360 {
3361 MS_U16 regval=0;
3362 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3363
3364 switch(u8GOP)
3365 {
3366 case E_GOP0:
3367 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_CTRL0, ®val);
3368 break;
3369 case E_GOP1:
3370 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_CTRL0, ®val);
3371 break;
3372 case E_GOP2:
3373 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_1G_CTRL0, ®val);
3374 break;
3375 case E_GOP3:
3376 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_1GX_CTRL0, ®val);
3377 break;
3378 case E_GOP4:
3379 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_1GS0_CTRL0, ®val);
3380 break;
3381 case E_GOP5:
3382 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_1GS1_CTRL0, ®val);
3383 break;
3384 default:
3385 //??
3386 break;
3387 }
3388 if (regval&0x8000)
3389 *bBool = TRUE;
3390 else
3391 *bBool = FALSE;
3392
3393 }
3394
3395 //-------------------------------------------------------------------------------------------------
3396 /// Set GOP Destination DisplayPlane
3397 /// @param u8GOP_num \b IN: GOP number: 0 or 1
3398 /// @param eDstType \b IN: GOP Destination DisplayPlane Type
3399 /// @return TRUE: sucess / FALSE: fail
3400 //-------------------------------------------------------------------------------------------------
MDrv_GOP_GWIN_SetDstPlane(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,DRV_GOPDstType eDstType,MS_BOOL bOnlyCheck)3401 GOP_Result MDrv_GOP_GWIN_SetDstPlane(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum, DRV_GOPDstType eDstType,MS_BOOL bOnlyCheck)
3402 {
3403 GOP_Result ret;
3404 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3405
3406 if (FALSE== _IsGopNumVaild(pGOPCtx, u8GOPNum))
3407 {
3408 GOP_D_ERR("\n[%s] not support gop%d in this chip version!!",__FUNCTION__, u8GOPNum);
3409 return GOP_FAIL;
3410 }
3411 ret = HAL_GOP_GWIN_SetDstPlane(&pGOPDrvLocalCtx->halCtxLocal,u8GOPNum, eDstType,bOnlyCheck);
3412 if(bOnlyCheck == FALSE)
3413 {
3414 //Adjust field by dst
3415 HAL_GOP_AdjustField(&pGOPDrvLocalCtx->halCtxLocal,u8GOPNum,eDstType);
3416
3417 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)u8GOPNum);
3418 }
3419 return ret;
3420 }
3421
MDrv_GOP_GWIN_GetDstPlane(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,DRV_GOPDstType * pGopDst)3422 GOP_Result MDrv_GOP_GWIN_GetDstPlane(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum, DRV_GOPDstType *pGopDst)
3423 {
3424 GOP_Result ret;
3425
3426 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3427 if (FALSE== _IsGopNumVaild(pGOPCtx, u8GOPNum))
3428 {
3429 GOP_D_ERR("\n[%s] not support gop%d in this chip version!!",__FUNCTION__, u8GOPNum);
3430 return GOP_FAIL;
3431 }
3432 ret = HAL_GOP_GetGOPDst(&pGOPDrvLocalCtx->halCtxLocal, u8GOPNum, pGopDst);
3433 return ret;
3434 }
3435
3436
MDrv_GOP_GWIN_SetMixerDstPlane(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,DRV_GOPDstType eDstType)3437 GOP_Result MDrv_GOP_GWIN_SetMixerDstPlane(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum, DRV_GOPDstType eDstType)
3438 {
3439 GOP_Result ret;
3440
3441 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3442 if (FALSE== _IsGopNumVaild(pGOPCtx, u8GOPNum))
3443 {
3444 GOP_D_ERR("\n[%s] not support gop%d in this chip version!!",__FUNCTION__, u8GOPNum);
3445 return GOP_FAIL;
3446 }
3447
3448 ret = HAL_GOP_SetMixerDst(&pGOPDrvLocalCtx->halCtxLocal,eDstType);
3449 return ret;
3450 }
3451
3452
MDrv_GOP_GWIN_GetMixerDstPlane(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,DRV_GOPDstType * pGopDst)3453 GOP_Result MDrv_GOP_GWIN_GetMixerDstPlane(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum, DRV_GOPDstType *pGopDst)
3454 {
3455 GOP_Result ret;
3456
3457 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3458 if (FALSE== _IsGopNumVaild(pGOPCtx, u8GOPNum))
3459 {
3460 GOP_D_ERR("\n[%s] not support gop%d in this chip version!!",__FUNCTION__, u8GOPNum);
3461 return GOP_FAIL;
3462 }
3463 ret = HAL_GOP_GetMixerDst(&pGOPDrvLocalCtx->halCtxLocal,pGopDst);
3464 return ret;
3465 }
3466
3467 //-------------------------------------------------------------------------------------------------
3468 /// Set GOP 3D Middle, for 3D SBS/TPB etc
3469 /// @param u8GOP \b IN: GOP number: 0,1,2,3
3470 /// @return TRUE: sucess / FALSE: fail
3471 //-------------------------------------------------------------------------------------------------
MDrv_GOP_Set3DOSD_Middle(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP)3472 void MDrv_GOP_Set3DOSD_Middle(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP)
3473 {
3474 MS_U16 u16Middle=0, u16Ratio=0x1000;
3475 MS_U32 u32BankOffset = 0;
3476 GOP_CTX_DRV_LOCAL *pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3477
3478 _GetBnkOfstByGop(u8GOP, &u32BankOffset);
3479
3480 switch(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->enGOP3DType)
3481 {
3482 case E_DRV_3D_DUP_FULL:
3483 {
3484 switch(pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->GOP_StereoMode[u8GOP])
3485 {
3486 case E_DRV_GOP_3D_SIDE_BY_SYDE:
3487 //Agate: middle = PNL Size/Scaling Ratio/2
3488 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffset+GOP_4G_HSTRCH, &u16Ratio);
3489 u16Middle = ((pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u16PnlWidth[u8GOP]*u16Ratio)/SCALING_MULITPLIER + 1)>>1;
3490 HAL_GOP_3D_SetMiddle(&pGOPDrvLocalCtx->halCtxLocal,u8GOP,u16Middle);
3491 break;
3492 case E_DRV_GOP_3D_TOP_BOTTOM:
3493 case E_DRV_GOP_3D_LINE_ALTERNATIVE:
3494 //middle = PNL Size/Scaling Ratio/2
3495 if (pGOPCtx->pGopChipProperty->bGOPWithVscale[u8GOP])
3496 {
3497 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffset+GOP_4G_VSTRCH, &u16Ratio);
3498 u16Middle = ((pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u16PnlHeight[u8GOP]*u16Ratio)/SCALING_MULITPLIER + 1)>>1;
3499 }
3500 else
3501 {
3502 MS_U16 u16Vsize = 0;
3503 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffset+GOP_4G_STRCH_VSZ,&u16Vsize);
3504 if (pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u16VScaleDst[u8GOP] != 0)
3505 {
3506 u16Middle = (pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u16PnlHeight[u8GOP]*u16Vsize/pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u16VScaleDst[u8GOP] + 1)>>1;
3507 }
3508 else
3509 {
3510 u16Middle = (pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u16PnlHeight[u8GOP])>>1;
3511 }
3512 }
3513 HAL_GOP_3D_SetMiddle(&pGOPDrvLocalCtx->halCtxLocal,u8GOP,u16Middle);
3514 break;
3515 case E_DRV_GOP_3D_LINE_FRAMEPACKING:
3516 if (FRAMEPACKING_720P_GAP == pGOPDrvLocalCtx->apiCtxLocal.GOP_FramePacking_Gap)
3517 {
3518 u16Middle = 720;
3519 }
3520 else if (FRAMEPACKING_1080P_GAP == pGOPDrvLocalCtx->apiCtxLocal.GOP_FramePacking_Gap)
3521 {
3522 u16Middle = 1080;
3523 }
3524 HAL_GOP_3D_SetMiddle(&pGOPDrvLocalCtx->halCtxLocal,u8GOP,u16Middle);
3525 break;
3526 default:
3527 break;
3528 }
3529 break;
3530 }
3531
3532 case E_DRV_3D_DUP_HALF:
3533 {
3534 switch(pGOPCtx->pGOPCtxShared->GOP_StereoMode[u8GOP])
3535 {
3536 case E_DRV_GOP_3D_SIDE_BY_SYDE:
3537 u16Middle = pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u16PnlWidth[u8GOP]/2;
3538 HAL_GOP_3D_SetMiddle(&pGOPDrvLocalCtx->halCtxLocal,u8GOP,u16Middle);
3539 break;
3540 case E_DRV_GOP_3D_TOP_BOTTOM:
3541 case E_DRV_GOP_3D_LINE_ALTERNATIVE:
3542 case E_DRV_GOP_3D_LINE_FRAMEPACKING:
3543 u16Middle = pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u16PnlHeight[u8GOP]/2;
3544 HAL_GOP_3D_SetMiddle(&pGOPDrvLocalCtx->halCtxLocal,u8GOP,u16Middle);
3545 break;
3546 default:
3547 break;
3548 }
3549 break;
3550 }
3551
3552 default:
3553 break;
3554 }
3555 pGOPDrvLocalCtx->apiCtxLocal.u16GOPGWinMiddle[u8GOP] = u16Middle;
3556 }
3557
3558 /********************************************************************************/
3559 /// Set stretch window property
3560 /// @param u8GOP_num \b IN 0: GOP0 1:GOP1
3561 /// @param eDstType \b IN \copydoc EN_GOP_DST_TYPE
3562 /// @param x \b IN stretch window horizontal start position
3563 /// @param y \b IN stretch window vertical start position
3564 /// @param width \b IN stretch window width
3565 /// @param height \b IN stretch window height
3566 /********************************************************************************/
MDrv_GOP_GWIN_SetStretchWin(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_U16 x,MS_U16 y,MS_U16 width,MS_U16 height)3567 void MDrv_GOP_GWIN_SetStretchWin(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP,MS_U16 x, MS_U16 y, MS_U16 width, MS_U16 height)
3568 {
3569 MS_U32 u32BankOffSet=0;
3570 MS_U16 u16HStretchRatio = SCALING_MULITPLIER;
3571 MS_U16 u16VStretchRatio = SCALING_MULITPLIER;
3572 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3573 #ifdef GOP_SUPPORT_SPLIT_MODE
3574 DRV_GOPDstType GopDst;
3575 #endif
3576
3577 if ( (x > pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u16PnlWidth[u8GOP])
3578 || (y > pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u16PnlHeight[u8GOP]))
3579 {
3580 APIGOP_ASSERT(FALSE, GOP_D_FATAL("[%s]invalid parameters:x= %u,y= %u,PNL width= %u,PNL height= %u!'\n",__FUNCTION__,
3581 x, y, pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u16PnlWidth[u8GOP], pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u16PnlHeight[u8GOP]));
3582 }
3583 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
3584 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_STRCH_HSTR, x, GOP_REG_WORD_MASK);
3585 #ifdef XC_FSC_FRC_PATCH
3586 MS_U16 XC_X_Offset = 0, XC_Y_Offset = 0;
3587 MDrv_SC_Get_GOPOffset(&XC_X_Offset, &XC_Y_Offset);
3588 y += XC_Y_Offset;
3589 #endif
3590 #ifdef GOP_SUPPORT_SPLIT_MODE
3591 HAL_GOP_GetGOPDst(&pGOPDrvLocalCtx->halCtxLocal, u8GOP, &GopDst);
3592 if ((pGOPCtx->pGopChipProperty->bGOPNeedSplitMode4DualRate[u8GOP] == TRUE) &&
3593 (GopDst == E_DRV_GOP_DST_OP_DUAL_RATE)
3594 )
3595 {
3596 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_STRCH_HSZ, GOP_SPLIT_SUPPORT_MAXW/GOP_STRETCH_WIDTH_UNIT, GOP_REG_WORD_MASK);
3597 }
3598 else
3599 #endif
3600 {
3601 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_STRCH_HSZ, (width/GOP_STRETCH_WIDTH_UNIT) , GOP_REG_WORD_MASK);
3602 }
3603 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_STRCH_VSTR, y , GOP_REG_WORD_MASK);
3604 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_STRCH_VSZ, height , GOP_REG_WORD_MASK);
3605
3606 //H size change need to check reg_valid_pix_num_q (0x0c:GOP_4G_SVM_VSTR) value
3607 //GOP_4G_SVM_VSTR must be the size after scaling for gop_rdy
3608
3609 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_HSTRCH, &u16HStretchRatio);
3610 if(u16HStretchRatio == SCALING_MULITPLIER)
3611 {
3612 #ifndef OUTPUT_VAILD_SIZE_PATCH
3613 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_SVM_VSTR, (x+width), GOP_REG_WORD_MASK);
3614 #else
3615 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_SVM_VSTR, GOP_REG_WORD_MASK, GOP_REG_WORD_MASK);
3616 #endif
3617 }
3618 else
3619 {
3620 #ifndef OUTPUT_VAILD_SIZE_PATCH
3621 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_SVM_VSTR, (x+pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u16HScaleDst[u8GOP]), GOP_REG_WORD_MASK);
3622 #else
3623 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_SVM_VSTR, GOP_REG_WORD_MASK, GOP_REG_WORD_MASK);
3624 #endif
3625 }
3626
3627 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_VSTRCH, &u16VStretchRatio);
3628 if(u16VStretchRatio == SCALING_MULITPLIER)
3629 {
3630 #ifndef OUTPUT_VAILD_SIZE_PATCH
3631 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_SVM_VEND, y+height, GOP_REG_WORD_MASK);
3632 #else
3633 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_SVM_VEND, GOP_REG_WORD_MASK, GOP_REG_WORD_MASK);
3634 #endif
3635 }
3636 else
3637 {
3638 #ifndef OUTPUT_VAILD_SIZE_PATCH
3639 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_SVM_VEND, (y+pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u16VScaleDst[u8GOP]), GOP_REG_WORD_MASK);
3640 #else
3641 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_SVM_VEND, GOP_REG_WORD_MASK, GOP_REG_WORD_MASK);
3642 #endif
3643 }
3644 //GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)u8GOP);
3645
3646 if (E_DRV_GOP_DST_OP_DUAL_RATE == pGOPDrvLocalCtx->halCtxLocal.pHALShared->GOP_Dst[u8GOP])
3647 {
3648 Hal_SetCropWindow(&pGOPDrvLocalCtx->halCtxLocal, u8GOP, EN_GOP_CROP_ENABLE);
3649 }
3650 else
3651 {
3652 Hal_SetCropWindow(&pGOPDrvLocalCtx->halCtxLocal, u8GOP, EN_GOP_CROP_DISABLE);
3653 }
3654 }
3655
3656 /********************************************************************************/
3657 /// Set stretch window property
3658 /// @param u8GOP_num \b IN gop id
3659 /// @param eDstType \b IN \copydoc EN_GOP_DST_TYPE
3660 /// @param x \b IN stretch window horizontal start position
3661 /// @param y \b IN stretch window vertical start position
3662 /********************************************************************************/
MDrv_GOP_GWIN_SetStretchWinPosition(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_U16 u16x,MS_U16 u16y)3663 void MDrv_GOP_GWIN_SetStretchWinPosition(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP,MS_U16 u16x, MS_U16 u16y)
3664 {
3665 MS_U32 u32BankOffSet=0;
3666 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3667
3668 if ( (u16x > pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u16PnlWidth[u8GOP])
3669 || (u16y > pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u16PnlHeight[u8GOP]))
3670 {
3671 APIGOP_ASSERT(FALSE, GOP_D_FATAL("[%s]invalid parameters:x= %u,y= %u,PNL width= %u,PNL height= %u!'\n",__FUNCTION__,
3672 u16x, u16y, pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u16PnlWidth[u8GOP], pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->u16PnlHeight[u8GOP]));
3673 }
3674 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
3675 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_STRCH_HSTR, u16x, GOP_REG_WORD_MASK);
3676 #ifdef XC_FSC_FRC_PATCH
3677 MS_U16 XC_X_Offset = 0, XC_Y_Offset = 0;
3678 MDrv_SC_Get_GOPOffset(&XC_X_Offset, &XC_Y_Offset);
3679 u16y += XC_Y_Offset;
3680 #endif
3681 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_STRCH_VSTR, u16y , GOP_REG_WORD_MASK);
3682 }
3683
MDrv_GOP_GWIN_SetHTotal(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_U16 width)3684 void MDrv_GOP_GWIN_SetHTotal(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP, MS_U16 width)
3685 {
3686 MS_U32 u32BankOffSet=0;
3687
3688 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3689
3690 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
3691 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_RDMA_HT, (width+3)/2, 0x07ff);
3692 }
3693
3694 //Internal use only, get the real HW register setting on stretch win
3695 //For API usage, please use g_pGOPCtxLocal->pGOPCtxShared->u16StretchWinWidth
MDrv_GOP_GWIN_Get_StretchWin(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_U16 * x,MS_U16 * y,MS_U16 * width,MS_U16 * height)3696 void MDrv_GOP_GWIN_Get_StretchWin(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP,MS_U16 *x, MS_U16 *y, MS_U16 *width, MS_U16 *height)
3697 {
3698 MS_U16 u16RegWidth=0;
3699 MS_U32 u32BankOffSet=0;
3700
3701 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3702
3703 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
3704
3705 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_STRCH_HSTR, x);
3706 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_STRCH_VSTR, y);
3707 #ifdef XC_FSC_FRC_PATCH
3708 MS_U16 XC_X_Offset = 0, XC_Y_Offset = 0;
3709 MDrv_SC_Get_GOPOffset(&XC_X_Offset, &XC_Y_Offset);
3710 *y -= XC_Y_Offset;
3711 #endif
3712 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_STRCH_HSZ, &u16RegWidth);
3713 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_STRCH_VSZ, height);
3714 *width = u16RegWidth * GOP_STRETCH_WIDTH_UNIT;
3715 }
3716
3717 /********************************************************************************/
3718 /// Get stretch window H/V scale ratio
3719 /// @param u8GOP_num \b IN gop id
3720 /// @param HScaleRat \b IN h ratio value
3721 /// @param VScaleRat \b IN v ratio value
3722 /********************************************************************************/
MDrv_GOP_GWIN_Get_HVScaleRatio(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP_num,MS_U16 * pu16HScaleRat,MS_U16 * pu16VScaleRat)3723 MS_BOOL MDrv_GOP_GWIN_Get_HVScaleRatio(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP_num, MS_U16 *pu16HScaleRat, MS_U16 *pu16VScaleRat)
3724 {
3725 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3726 MS_U32 u32BankOffSet = 0;
3727
3728 _GetBnkOfstByGop(u8GOP_num, &u32BankOffSet);
3729 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_HSTRCH, pu16HScaleRat);
3730 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_VSTRCH, pu16VScaleRat);
3731 return TRUE;
3732 }
3733
3734 /********************************************************************************/
3735 /// Set stretch window H-Stretch
3736 /// @param bEnable \b IN
3737 /// - # TRUE enable
3738 /// - # FALSE disable
3739 /// @param src \b IN original stretch size
3740 /// @param dst \b IN stretch out size
3741 /********************************************************************************/
MDrv_GOP_GWIN_Set_HSCALE(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_BOOL bEnable,MS_U16 src,MS_U16 dst)3742 void MDrv_GOP_GWIN_Set_HSCALE(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, MS_BOOL bEnable, MS_U16 src, MS_U16 dst )
3743 {
3744 MS_U32 hratio;
3745 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3746 MS_U32 u32BankOffSet = 0;
3747 MS_U32 u32RegVal = 0;
3748 MS_U16 u16RegVal = 0;
3749
3750 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
3751
3752 if(dst > src)
3753 {
3754 if (bEnable)
3755 {
3756 hratio = (MS_U32)(src) * SCALING_MULITPLIER;
3757
3758 if(hratio %(MS_U32)dst !=0)
3759 {
3760 if(pGOPCtx->pGopChipProperty->bPixelModeSupport)
3761 hratio = (hratio/(MS_U32)dst );
3762 else
3763 hratio = (hratio/(MS_U32)dst )+1;
3764 }
3765 else
3766 hratio /= (MS_U32)dst;
3767 }
3768 else
3769 hratio = SCALING_MULITPLIER;
3770
3771 //H size change need to check reg_valid_pix_num_q (0x0c:GOP_4G_SVM_VSTR) value
3772 //GOP_4G_SVM_VSTR must be the size after scaling for gop_rdy
3773 if(hratio == SCALING_MULITPLIER)
3774 {
3775 MS_U16 u16StretchWidth = 1920;
3776 MS_U16 u16StretchX = 0;
3777 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_STRCH_HSZ, &u16StretchWidth);
3778 u16StretchWidth *= 2;
3779 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_STRCH_HSTR, &u16StretchX);
3780 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_SVM_VSTR, (u16StretchWidth + u16StretchX), GOP_REG_WORD_MASK);
3781 }
3782 else
3783 {
3784 MS_U16 u16StretchX = 0;
3785 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_STRCH_HSTR, &u16StretchX);
3786 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_SVM_VSTR, (u16StretchX + dst), GOP_REG_WORD_MASK);
3787 }
3788
3789 HAL_GOP_HScalingDown(&pGOPDrvLocalCtx->halCtxLocal,u8GOP ,FALSE, src,dst);
3790 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_HSTRCH, hratio , GOP_REG_WORD_MASK);
3791 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_HSTRCH_INI, 0 , GOP_REG_WORD_MASK);
3792 }
3793 else if(dst == src)
3794 {
3795 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_HSTRCH, SCALING_MULITPLIER , GOP_REG_WORD_MASK);
3796 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_HSTRCH_INI, 0 , GOP_REG_WORD_MASK);
3797
3798 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_SCALING_VRATIO_L, &u16RegVal);
3799 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_SCALING_VRATIO_H, (MS_U16*)&u32RegVal);
3800 if( ((u32RegVal<<16)+u16RegVal)== 0)
3801 {
3802 HAL_GOP_HScalingDown(&pGOPDrvLocalCtx->halCtxLocal,u8GOP ,FALSE, src,dst);
3803 }
3804 else
3805 {
3806 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_SCALING_HRATIO_L, 0);
3807 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_SCALING_CFG, 0 , GOP_BIT0);
3808 }
3809 }
3810 else
3811 {
3812 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_HSTRCH, SCALING_MULITPLIER , GOP_REG_WORD_MASK);
3813 HAL_GOP_HScalingDown(&pGOPDrvLocalCtx->halCtxLocal,u8GOP ,bEnable, src,dst);
3814 }
3815
3816 #ifdef OUTPUT_VAILD_SIZE_PATCH
3817 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_SVM_VSTR, GOP_REG_WORD_MASK, GOP_REG_WORD_MASK);
3818 #else
3819 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_SVM_VSTR, dst, GOP_REG_WORD_MASK);
3820 #endif
3821 }
3822
3823 /********************************************************************************/
3824 /// Set stretch window V-Stretch
3825 /// @param bEnable \b IN
3826 /// - # TRUE enable
3827 /// - # FALSE disable
3828 /// @param src \b IN original stretch size
3829 /// @param dst \b IN stretch out size
3830 /********************************************************************************/
MDrv_GOP_GWIN_Set_VSCALE(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_BOOL bEnable,MS_U16 src,MS_U16 dst)3831 void MDrv_GOP_GWIN_Set_VSCALE(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, MS_BOOL bEnable, MS_U16 src, MS_U16 dst )
3832 {
3833 MS_U32 ratio = 0;
3834 MS_U16 u16x = 0,u16y = 0,u16w = 0,u16h = 0;
3835 MS_U16 u16RegVal = 0;
3836 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3837 MS_U32 u32BankOffSet = 0;
3838 MS_U32 u32RegVal = 0;
3839
3840 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
3841
3842 if(dst > src)
3843 {
3844 if (bEnable)
3845 {
3846 if(!pGOPCtx->pGopChipProperty->bGOPWithVscale[u8GOP])
3847 {
3848 if((src<1)||(dst<1))
3849 {
3850 GOP_D_ERR("%s,Invalid Vscale size,u8GOP%d, src=0x%x, dst=0x%x\n",__FUNCTION__,u8GOP,src,dst);
3851 return;
3852 }
3853 else
3854 {
3855 src=src-1;
3856 dst=dst-1;
3857 }
3858 }
3859 ratio = (MS_U32)(src) * SCALING_MULITPLIER;
3860
3861 if(ratio %(MS_U32)dst !=0)
3862 {
3863 if(pGOPCtx->pGopChipProperty->bPixelModeSupport)
3864 ratio = (ratio/(MS_U32)dst );
3865 else
3866 ratio = (ratio/(MS_U32)dst )+1;
3867 }
3868 else
3869 ratio /= (MS_U32)dst;
3870 }
3871 else
3872 ratio = SCALING_MULITPLIER;
3873
3874
3875 MDrv_GOP_GWIN_Get_StretchWin(pGOPCtx, u8GOP,&u16x,&u16y,&u16w,&u16h);
3876
3877 if((u16w > 1376) && (pGOPCtx->pGOPCtxShared->GOP_StereoMode[u8GOP] == E_DRV_GOP_3D_SIDE_BY_SYDE) && (ratio != SCALING_MULITPLIER))
3878 {
3879 //enable v duplicate mode on 3D side by side.
3880 u16RegVal = GOP_BIT10;
3881 }
3882 else
3883 {
3884 u16RegVal = 0;
3885 }
3886
3887 HAL_GOP_VScalingDown(&pGOPDrvLocalCtx->halCtxLocal,u8GOP ,FALSE, src,dst);
3888 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_YUV_SWAP, u16RegVal, GOP_BIT10);
3889 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_VSTRCH, ratio , GOP_REG_WORD_MASK);
3890 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_VSTRCH_INI, 0 , GOP_REG_WORD_MASK);
3891 }
3892 else if(dst == src)
3893 {
3894 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_VSTRCH, SCALING_MULITPLIER, GOP_REG_WORD_MASK);
3895 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_VSTRCH_INI, 0 , GOP_REG_WORD_MASK);
3896
3897 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_SCALING_HRATIO_L, &u16RegVal);
3898 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_SCALING_HRATIO_H, (MS_U16*)&u32RegVal);
3899 if( ((u32RegVal<<16)+u16RegVal)== 0)
3900 {
3901 HAL_GOP_VScalingDown(&pGOPDrvLocalCtx->halCtxLocal,u8GOP ,FALSE, src,dst);
3902 }
3903 else
3904 {
3905 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_SCALING_VRATIO_L, 0);
3906 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_SCALING_CFG, 0 , GOP_BIT4);
3907 }
3908 }
3909 else
3910 {
3911 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_VSTRCH, SCALING_MULITPLIER , GOP_REG_WORD_MASK);
3912 HAL_GOP_VScalingDown(&pGOPDrvLocalCtx->halCtxLocal,u8GOP ,bEnable, src,dst);
3913 }
3914
3915 #ifdef OUTPUT_VAILD_SIZE_PATCH
3916 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_SVM_VEND, GOP_REG_WORD_MASK, GOP_REG_WORD_MASK);
3917 #else
3918 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_SVM_VEND, dst, GOP_REG_WORD_MASK);
3919 #endif
3920 }
3921
3922
3923 //-------------------------------------------------------------------------------------------------
3924 /// Set GOP H-Stretch Mode
3925 /// @param HStrchMode \b IN \copydoc EN_GOP_STRETCH_HMODE
3926 //-------------------------------------------------------------------------------------------------
MDrv_GOP_GWIN_Set_HStretchMode(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,DRV_GOPStrchHMode HStrchMode)3927 void MDrv_GOP_GWIN_Set_HStretchMode(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, DRV_GOPStrchHMode HStrchMode)
3928 {
3929 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3930 MS_U32 u32BankOffSet = 0;
3931 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
3932
3933 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_HVSTRCHMD, _GOP_MAP_DRVHscale2Reg_Emun(HStrchMode), GOP_BIT0|GOP_BIT1);
3934 }
3935
3936
3937 //-------------------------------------------------------------------------------------------------
3938 /// Set GOP V-Stretch Mode
3939 /// @param VStrchMode \b IN \copydoc EN_GOP_STRETCH_VMODE
3940 //-------------------------------------------------------------------------------------------------
MDrv_GOP_GWIN_Set_VStretchMode(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,DRV_GOPStrchVMode VStrchMode)3941 void MDrv_GOP_GWIN_Set_VStretchMode(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, DRV_GOPStrchVMode VStrchMode)
3942 {
3943 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3944 MS_U32 u32BankOffSet = 0;
3945 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
3946
3947 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_HVSTRCHMD, _GOP_MAP_DRVVscale2Reg_Emun(VStrchMode)<<2, GOP_BIT2|GOP_BIT3);
3948 #ifdef SUPPORT_V4TAP_MODE
3949 if(VStrchMode == E_DRV_GOP_VSTRCH_4TAP)
3950 {
3951 if(u8GOP == 0 || u8GOP == 2)
3952 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_HVSTRCHMD, GOP_BIT6, GOP_BIT6);
3953 else
3954 GOP_D_INFO("\nGOP_%d Not Support 4-Tap V stretch mode!'\n",u8GOP);
3955 }
3956 else
3957 {
3958 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_HVSTRCHMD, 0, GOP_BIT6);
3959 }
3960 #endif
3961 }
3962
3963 //-------------------------------------------------------------------------------------------------
3964 /// Set GOP Transparent color Stretch Mode
3965 /// @param HStrchMode \b IN \copydoc DRV_GOPSTRCH_TRANSPCOLORMODE
3966 //-------------------------------------------------------------------------------------------------
MDrv_GOP_GWIN_Set_TranspColorStretchMode(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,DRV_GOPSTRCH_TRANSPCOLORMODE TColorStrchMode)3967 GOP_Result MDrv_GOP_GWIN_Set_TranspColorStretchMode(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, DRV_GOPSTRCH_TRANSPCOLORMODE TColorStrchMode)
3968 {
3969 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
3970 MS_U32 u32BankOffSet = 0;
3971
3972 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
3973 if(TColorStrchMode < MAX_GOP_TRANSPCOLOR_STRETCH_MODE_SUPPORT)
3974 {
3975 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_HVSTRCHMD, TColorStrchMode<<4, GOP_BIT4);
3976 return GOP_SUCCESS;
3977 }
3978 else
3979 {
3980 return GOP_ENUM_NOT_SUPPORTED;
3981 }
3982 }
3983 /********************************************************************************/
3984 /// Write optional palette values to GOP0 registers
3985 /// Note that this GOP0 palette table only support 256 group palette data
3986 /// @param *pPalArray \b IN Pointer to pallete list gonna set into pallete table
3987 /// @param u32PalStart \b IN start of pallete table gonna be overwrite
3988 /// @param u32PalEnd \b IN end of pallete table gonna be overwrite
3989 /// @param ePalType \b IN Pallete format, true/false ARGB8888
3990 /********************************************************************************/
MDrv_GOP_GWIN_SetPaletteOpt(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,DRV_GopPaletteEntry * pPalArray,MS_U16 u32PalStart,MS_U16 u32PalEnd,DRV_GopPalType ePalType)3991 void MDrv_GOP_GWIN_SetPaletteOpt(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, DRV_GopPaletteEntry *pPalArray, MS_U16 u32PalStart, MS_U16 u32PalEnd, DRV_GopPalType ePalType)
3992 {
3993
3994 //----------------------------------------------------------------------
3995 // Write palette
3996 //----------------------------------------------------------------------
3997 MS_U32 regform;
3998 MS_U32 u32BankOffSet=0;
3999 MS_U8 j=0;
4000 MS_U16 i;
4001 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
4002 MS_U16 u16ClkGated=0, u16tmp =0;
4003
4004 regform = MDrv_GOP_GetRegForm(pGOPCtx, u8GOP, PAR_IGNORE);
4005 if((regform & E_GOP_PAL_SIZE_MASK) == E_GOP_PAL_SIZE_256)
4006 {
4007 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
4008 }
4009 else
4010 {
4011 GOP_D_ERR("\nNot support GOP_%d palette!'\n",u8GOP);
4012 return;
4013 }
4014
4015 if(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bGOPAutoClkGating)
4016 {
4017 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_OLDADDR, &u16ClkGated); //Get GOP clk dynamical gated
4018 if(u16ClkGated & 0x03)
4019 {
4020 //Disable clk gated when R/W palette
4021 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_OLDADDR, 0x00, (GOP_BIT1 | GOP_BIT0)); //enable GOP clk dynamical gated
4022 }
4023 }
4024
4025 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_PALCTRL, &u16tmp);
4026 if ( ((u16tmp&0x3000)>>12) < 2 ) // internal palette
4027 {
4028 if (MDrv_GOP_GWIN_IsForceWrite(pGOPCtx, u8GOP))
4029 {
4030 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_PALCTRL, E_DRV_GOP_PAL_GOP_RIU<<12, 0x3000); // Set RIU access
4031 }
4032 else
4033 {
4034 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_PALCTRL, E_DRV_GOP_PAL_GOP_REGDMA<<12, 0x3000); // Set REGDMA access
4035 }
4036 }
4037
4038 for(i=u32PalStart; i<=u32PalEnd ; i++)
4039 {
4040 #if 0
4041 printf("MDrv_GOP_GWIN_SetPaletteOpt : Array[%03d]. u8A %02bX | u8R %02bX | u8G %02bX |u8B %02bX\n",i,
4042 pPalArray[j].RGB.u8A,
4043 pPalArray[j].RGB.u8R,
4044 pPalArray[j].RGB.u8G,
4045 pPalArray[j].RGB.u8B);
4046 #endif
4047
4048 if(MDrv_GOP_GWIN_IsForceWrite(pGOPCtx, u8GOP))
4049 {
4050 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_PALDATA_L, ((pPalArray[j].RGB.u8A<<24)|\
4051 (pPalArray[j].RGB.u8R<<16)|(pPalArray[j].RGB.u8G<<8)|(pPalArray[j].RGB.u8B)));
4052 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_PALCTRL, i, GOP_REG_LW_MASK);
4053 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_PALCTRL, GOP_BIT8, GOP_BIT8);
4054 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_PALCTRL, 0, GOP_BIT8);
4055 }
4056 else
4057 {
4058 HAL_GOP_Write32Pal(&pGOPDrvLocalCtx->halCtxLocal, (MS_U8*)pGOPDrvLocalCtx->pu8REGMAP_Base[u8GOP], &pGOPDrvLocalCtx->u16REGMAP_Offset[u8GOP], pGOPDrvLocalCtx->u32REGMAP_Len[u8GOP],
4059 i, pPalArray[j].RGB.u8A,
4060 pPalArray[j].RGB.u8R,
4061 pPalArray[j].RGB.u8G,
4062 pPalArray[j].RGB.u8B);
4063 }
4064
4065 pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.GOPPaletteInfo[u8GOP].PalSWArray[i]=((((MS_U32)pPalArray[j].RGB.u8A)<<24)|\
4066 (((MS_U32)pPalArray[j].RGB.u8R)<<16)|(((MS_U16)pPalArray[j].RGB.u8G)<<8)|((MS_U32)pPalArray[j].RGB.u8B));
4067 j++;
4068 }
4069
4070 if(!MDrv_GOP_GWIN_IsForceWrite(pGOPCtx, u8GOP))
4071 {
4072 //pGOPDrvLocalCtx->pu8REGMAP_Base[u8CurGOP] is VA,
4073 //to check this address aligned must use VA2PA
4074 if((MS_VA2PA((MS_VIRT)pGOPDrvLocalCtx->pu8REGMAP_Base[u8GOP]) % (512*GOP_WordUnit)) != 0)
4075 {
4076 //If not align, use message to warn user.
4077 //Do not return here because of excuting GOP_RegdmaEnable
4078 GOP_D_DBUG("\n[%s] GOP_REGDMABASE_ADR need %dK aligment !!", __FUNCTION__, ((512*GOP_WordUnit)/1024));
4079 }
4080 GOP_RegdmaEnable(pGOPDrvLocalCtx, u8GOP);
4081 }
4082
4083
4084 if(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bGOPAutoClkGating)
4085 {
4086 if(u16ClkGated & 0x03)
4087 {
4088 //Restore clk gated when R/W palette
4089 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_OLDADDR, u16ClkGated, (GOP_BIT1 | GOP_BIT0)); //enable GOP clk dynamical gated
4090 }
4091 }
4092
4093 }
4094
4095 /********************************************************************************/
4096 /// Set GOP0 palette table read out control
4097 /// @param type \b IN \copydoc EN_GOP_PALETTE_READTYPE
4098 /********************************************************************************/
MDrv_GOP_GWIN_SetPaletteRead(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,DRV_GopPalReadType type)4099 void MDrv_GOP_GWIN_SetPaletteRead(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, DRV_GopPalReadType type)
4100 {
4101 MS_U32 u32CurGOPRegForm, u32BankOffSet=0;
4102 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
4103
4104 u32CurGOPRegForm = MDrv_GOP_GetRegForm(pGOPCtx, u8GOP, PAR_IGNORE);
4105 if(((u32CurGOPRegForm & E_GOP_PAL_SIZE_MASK) == E_GOP_PAL_SIZE_256) || ((u32CurGOPRegForm & E_GOP_PAL_SIZE_MASK) == E_GOP_PAL_SIZE_64))
4106 {
4107 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
4108 }
4109 else if( type == E_DRV_GOP1_PAL_GOP_RIU || type==E_DRV_GOP1_PAL_GOP_REGDMA ) //use other GOP's Palette(4G) table
4110 {
4111 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
4112 }
4113 else
4114 {
4115 GOP_D_FATAL("\nNot support GOP_%d palette!'\n",u8GOP);
4116 GOP_ASSERT(0);
4117 return;
4118 }
4119
4120 //Set cur gop's palette
4121 if(pGOPCtx->pGopChipProperty->bNewPalette)
4122 {
4123 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_PALCTRL, type<<12, 0x3000);
4124 if(u32BankOffSet == (GOP_4G_OFST<<16))
4125 {
4126 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PALCTRL, type<<12, 0x3000);
4127 }
4128 else
4129 {
4130 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_PALCTRL, type<<12, 0x3000);
4131 }
4132 }
4133 else
4134 {
4135 if ( (type == E_DRV_GOP1_PAL_GOP_RIU) || (type==E_DRV_GOP1_PAL_GOP_REGDMA ))
4136 {
4137 //For GOP1 use GOP0's palette, GOP0_PALCTRL should not config as "GOP0 use palette"
4138 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_PALCTRL, (type>>1)<<12, 0x3000);
4139 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_PALCTRL, type<<12, 0x3000);
4140 }
4141 else
4142 {
4143 //For GOP0 use GOP0's palette, GOP1_PALCTRL should not config as "GOP1 use palette"
4144 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_PALCTRL, type<<12, 0x3000);
4145 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PALCTRL, type<<12|GOP_BIT13, 0x3000);
4146 }
4147 }
4148
4149 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)u8GOP);
4150 }
4151
4152
4153 /********************************************************************************/
4154 /// Read GOP4G(GOP0) palette values From Pallete
4155 /// @param idx \b IN Index for pallete wanna retrieve
4156 /// @param clr \b OUT color of specific pallete index
4157 /********************************************************************************/
MDrv_GOP_GWIN_ReadPalette(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_U8 idx,MS_U32 * clr)4158 void MDrv_GOP_GWIN_ReadPalette(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, MS_U8 idx, MS_U32* clr)
4159 {
4160 MS_U16 regval =0,regval1 =0, u16ClkGated=0;
4161 MS_U32 regform,u32BankOffSet=0;
4162
4163 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
4164
4165 regform = MDrv_GOP_GetRegForm(pGOPCtx, u8GOP, PAR_IGNORE);
4166 if((regform & E_GOP_PAL_SIZE_MASK) == E_GOP_PAL_SIZE_256)
4167 {
4168 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
4169 }
4170 else
4171 {
4172 GOP_D_FATAL("\nNot support GOP_%d palette!'\n",u8GOP);
4173 GOP_ASSERT(0);
4174 return;
4175 }
4176
4177 //----------------------------------------------------------------------
4178 // Read palette
4179 //----------------------------------------------------------------------
4180
4181 *clr = 0;
4182
4183 regval = idx;
4184
4185 if(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bGOPAutoClkGating)
4186 {
4187 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_OLDADDR, &u16ClkGated); //Get GOP clk dynamical gated
4188 if(u16ClkGated & 0x03)
4189 {
4190 //Disable clk gated when R/W palette
4191 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_OLDADDR, 0x00, (GOP_BIT1 | GOP_BIT0)); //enable GOP clk dynamical gated
4192 }
4193 }
4194
4195 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_BAK_SEL, 1<<9, 1<<9);
4196 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_PALCTRL, E_DRV_GOP_PAL_GOP_RIU<<12, 0x3000); // Set RIU access
4197 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_PALCTRL, idx, GOP_REG_LW_MASK);
4198 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_PALCTRL, 1<<9, 1<<9); // Enable pallete read
4199 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_PALCTRL, 0<<9, 1<<9); // Clear pallete read
4200 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_BAK_SEL, 0<<9, 1<<9);
4201
4202 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_PALDATA_L, ®val);
4203 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_PALDATA_H, ®val1);
4204
4205 if(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bGOPAutoClkGating)
4206 {
4207 if(u16ClkGated & 0x03)
4208 {
4209 //Restore clk gated when R/W palette
4210 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_OLDADDR, u16ClkGated, (GOP_BIT1 | GOP_BIT0)); //enable GOP clk dynamical gated
4211 }
4212 }
4213
4214
4215 *clr = pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.GOPPaletteInfo[u8GOP].PalSWArray[idx];
4216 }
4217
4218 #ifdef CONFIG_GOP_2ND_PAL
4219 /********************************************************************************/
4220 /// Write optional palette values to GOP1 registers
4221 /// Note that this GOP1 palette table only support 64 group palette data
4222 /// @param *pPalArray \b IN Pointer to pallete list gonna set into pallete table
4223 /// @param u32PalStart \b IN start of pallete table gonna be overwrite
4224 /// @param u32PalEnd \b IN end of pallete table gonna be overwrite
4225 /********************************************************************************/
MDrv_GOP_GWIN_2GSetPaletteOpt(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,DRV_GopPaletteEntry * pPalArray,MS_U16 u32PalStart,MS_U16 u32PalEnd)4226 void MDrv_GOP_GWIN_2GSetPaletteOpt(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, DRV_GopPaletteEntry *pPalArray, MS_U16 u32PalStart, MS_U16 u32PalEnd)
4227 {
4228 MS_U16 i, u16ClkGated=0;
4229 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
4230 //----------------------------------------------------------------------
4231 // Write palette
4232 //----------------------------------------------------------------------
4233 MS_U8 j=0;
4234 MS_U32 regform ;
4235
4236 regform = MDrv_GOP_GetRegForm(pGOPCtx, E_GOP1, PAR_IGNORE);
4237 if((regform & E_GOP_PAL_SIZE_MASK) == E_GOP_PAL_SIZE_NONE)
4238 {
4239 GOP_D_ERR("\nNot support 2G palette!'\n");
4240 return;
4241 }
4242
4243 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_OLDADDR, &u16ClkGated); //Get GOP clk dynamical gated
4244 if(u16ClkGated & 0x03)
4245 {
4246 //Disable clk gated when R/W palette
4247 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_OLDADDR, 0x00, (GOP_BIT1 | GOP_BIT0)); //enable GOP clk dynamical gated
4248 }
4249
4250 if(pGOPDrvLocalCtx->apiCtxLocal.pGopChipProperty->bNewMux)
4251 {
4252 if (MDrv_GOP_GWIN_IsForceWrite(pGOPCtx, u8GOP))
4253 {
4254 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PALCTRL, E_DRV_GOP_PAL_GOP_RIU<<12, 0x3000); // Set RIU access
4255 }
4256 else
4257 {
4258 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PALCTRL, E_DRV_GOP_PAL_GOP_REGDMA<<12, 0x3000); // Set REGDMA access
4259 }
4260 }else
4261 {
4262 if (MDrv_GOP_GWIN_IsForceWrite(pGOPCtx, u8GOP))
4263 {
4264 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PALCTRL, E_DRV_GOP1_PAL_GOP_RIU<<12, 0x3000); // Set RIU access
4265 }
4266 else
4267 {
4268 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PALCTRL, E_DRV_GOP1_PAL_GOP_REGDMA<<12, 0x3000); // Set REGDMA access
4269 }
4270 }
4271
4272 for(i=u32PalStart; i<=u32PalEnd ; i++)
4273 {
4274 #if 0
4275 printf("MDrv_GOP_GWIN_SetPaletteOpt : Array[%03d]. u8A %02bX | u8R %02bX | u8G %02bX |u8B %02bX\n",i,
4276 pPalArray[j].RGB.u8A,
4277 pPalArray[j].RGB.u8R,
4278 pPalArray[j].RGB.u8G,
4279 pPalArray[j].RGB.u8B);
4280 #endif
4281
4282 if (MDrv_GOP_GWIN_IsForceWrite(pGOPCtx, u8GOP))
4283 {
4284 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PALDATA_L, (pPalArray[j].RGB.u8A<<24)|\
4285 (pPalArray[j].RGB.u8R<<16)|(pPalArray[j].RGB.u8G<<8)|(pPalArray[j].RGB.u8B));
4286 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PALCTRL, i, GOP_REG_LW_MASK);
4287 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PALCTRL, GOP_BIT8, GOP_BIT8);
4288 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PALCTRL, 0, GOP_BIT8);
4289 }
4290 else
4291 {
4292 HAL_GOP_Write32Pal(&pGOPDrvLocalCtx->halCtxLocal,
4293 pGOPDrvLocalCtx->pu8REGMAP_Base[1], &pGOPDrvLocalCtx->u16REGMAP_Offset[1], pGOPDrvLocalCtx->u32REGMAP_Len[1],
4294 i, pPalArray[j].RGB.u8A,
4295 pPalArray[j].RGB.u8R,
4296 pPalArray[j].RGB.u8G,
4297 pPalArray[j].RGB.u8B);
4298 }
4299
4300 pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.GOPPaletteInfo[u8GOP].PalSWArray[i]=((((MS_U32)pPalArray[j].RGB.u8A)<<24)|\
4301 (((MS_U32)pPalArray[j].RGB.u8R)<<16)|(((MS_U32)pPalArray[j].RGB.u8G)<<8)|((MS_U32)pPalArray[j].RGB.u8B));
4302 j++;
4303
4304 }
4305
4306 if (!MDrv_GOP_GWIN_IsForceWrite(pGOPCtx, u8GOP))
4307 GOP_RegdmaEnable(pGOPDrvLocalCtx, 1);
4308
4309 if(u16ClkGated & 0x03)
4310 {
4311 //Restore clk gated when R/W palette
4312 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_OLDADDR, u16ClkGated, (GOP_BIT1 | GOP_BIT0)); //enable GOP clk dynamical gated
4313 }
4314 }
4315
4316
4317 /********************************************************************************/
4318 /// Set GOP1 palette table read out control
4319 /// @param type \b IN \copydoc EN_GOP_PALETTE_READTYPE
4320 /********************************************************************************/
MDrv_GOP_GWIN_2GSetPaletteRead(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,DRV_GopPalReadType type)4321 void MDrv_GOP_GWIN_2GSetPaletteRead(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, DRV_GopPalReadType type)
4322 {
4323 MS_U16 u16tmp =0;
4324 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
4325
4326 if ( type == E_DRV_GOP1_PAL_GOP_RIU || type==E_DRV_GOP1_PAL_GOP_REGDMA )
4327 {
4328 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_PALCTRL, &u16tmp);
4329 if ( ((u16tmp&0x3000)>>12)==E_DRV_GOP_PAL_GOP_RIU || ((u16tmp&0x3000)>>12)==E_DRV_GOP_PAL_GOP_REGDMA)
4330 {
4331 //if GOP0 and GOP1 palette control are set for GOP0 GWIN at the same time, GOP0 palette will be used for GOP0 GWIN
4332 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_PALCTRL, E_DRV_GOP1_PAL_GOP_RIU<<12, 0x3000);
4333 }
4334 }
4335 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PALCTRL, type<<12, 0x3000);
4336 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)u8GOP);
4337 }
4338
4339
4340 /********************************************************************************/
4341 /// Read GOP2G(GOP1) palette values From Pallete
4342 /// @param idx \b IN Index for pallete wanna retrieve
4343 /// @param clr \b OUT color of specific pallete index
4344 /********************************************************************************/
MDrv_GOP_GWIN_2GReadPalette(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_U8 idx,MS_U32 * clr)4345 void MDrv_GOP_GWIN_2GReadPalette(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, MS_U8 idx, MS_U32* clr)
4346 {
4347 MS_U16 regval =0,regval1 =0, u16ClkGated=0;
4348 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
4349
4350 //----------------------------------------------------------------------
4351 // Read palette
4352 //----------------------------------------------------------------------
4353 *clr = 0;
4354
4355 regval = idx;
4356 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_OLDADDR, &u16ClkGated); //Get GOP clk dynamical gated
4357 if(u16ClkGated & 0x03)
4358 {
4359 //Disable clk gated when R/W palette
4360 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_OLDADDR, 0x00, (GOP_BIT1 | GOP_BIT0)); //enable GOP clk dynamical gated
4361 }
4362 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_BAK_SEL, 1<<9, 1<<9);
4363 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PALCTRL, E_DRV_GOP1_PAL_GOP_RIU<<12, E_DRV_GOP1_PAL_GOP_RIU); // Set RIU access
4364 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PALCTRL, idx, GOP_REG_LW_MASK);
4365 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PALCTRL, 1<<9, 1<<9); // Enable pallete read
4366 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PALCTRL, 0<<9, 1<<9); // Clear pallete read
4367 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_BAK_SEL, 0<<9, 1<<9);
4368
4369 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PALDATA_L, ®val);
4370 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_PALDATA_H, ®val1);
4371 if(u16ClkGated & 0x03)
4372 {
4373 //Restore clk gated when R/W palette
4374 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_OLDADDR, u16ClkGated, (GOP_BIT1 | GOP_BIT0)); //enable GOP clk dynamical gated
4375 }
4376 *clr = pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.GOPPaletteInfo[u8GOP].PalSWArray[idx];
4377 }
4378 #endif
4379
4380 #ifdef CONFIG_GOP_SCROLL
4381 /********************************************************************************/
4382 /// Set GWIN auto scrolling frame rate (0~63)
4383 /// @param u8rate \b IN frame rate
4384 /********************************************************************************/
MDrv_GOP_GWIN_SetScrollRate(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8rate)4385 void MDrv_GOP_GWIN_SetScrollRate(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8rate)
4386 {
4387 /*only gop0 has scrolling*/
4388 MS_U16 regval;
4389 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
4390
4391 regval = u8rate;
4392 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_RATE, regval&0x3f, 0x3f);
4393 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)pGOPDrvLocalCtx->current_gop);
4394 }
4395
4396
4397 /********************************************************************************/
4398 /// Set horizontal auto scroll
4399 /// @param u8win \b IN GWIN id 0 ~ (MAX_GWIN_SUPPORT-1)
4400 /// @param type \b IN @copydoc GOPSCROLLTYPE
4401 /// @param bEnable \b IN
4402 /// - # TRUE enable
4403 /// - # FALSE disable
4404 /********************************************************************************/
MDrv_GOP_GWIN_SetHScroll(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8win,E_GOP_SCROLL_TYPE type,MS_U32 offset,MS_BOOL bEnable)4405 void MDrv_GOP_GWIN_SetHScroll(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8win, E_GOP_SCROLL_TYPE type, MS_U32 offset, MS_BOOL bEnable)
4406 {
4407 MS_U8 u8GOP;
4408 MS_U16 regval = 0x0;
4409 MS_U16 u16GOP_Unit=0;
4410 MS_U32 u32regval =0;
4411 MS_U16 u16VaildMask=0;
4412
4413 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
4414
4415 if (FALSE== _IsGwinIdValid(pGOPCtx, u8win))
4416 {
4417 GOP_D_ERR("\n[%s] not support gwin id:%d in this chip version",__FUNCTION__, u8win);
4418 return;
4419 }
4420 u8GOP = MDrv_DumpGopByGwinId(pGOPCtx,u8win);
4421 u16GOP_Unit = MDrv_GOP_GetWordUnit(pGOPCtx, u8GOP);
4422
4423 if(type == GOP_DRV_SCROLL_KERNEL)
4424 {
4425 if(bEnable)
4426 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_INT, 0x0, GOP_BIT0);
4427 else
4428 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_INT, GOP_BIT0, GOP_BIT0); //disable gop isr
4429 }
4430 else if(type == GOP_DRV_SCROLL_SW)
4431 {
4432 MS_U32 u32RegAddr;
4433 MS_U16 u16RegVal;
4434 MS_U16 MaxScrollNum, idx;
4435 MS_U32 u32ScrollAddr;
4436
4437 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_GWIN0_CTRL(u8win),®val );
4438 regval &= ~0x8;
4439 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_GWIN0_CTRL(u8win), regval, GOP_REG_WORD_MASK);
4440
4441
4442 u32RegAddr = GOP_4G_INT;
4443 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32RegAddr, &u16RegVal);
4444
4445 MaxScrollNum = pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.ScrollBufNum;
4446 idx = pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.ScrollBufIdx;
4447
4448 if(idx > MaxScrollNum)
4449 idx = 0;
4450
4451 idx++;
4452 idx %= MaxScrollNum;
4453
4454 if(idx == 0)
4455 {
4456 offset /= 8;
4457 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_HSTR(u8win), offset, GOP_REG_WORD_MASK);
4458 //printf("[%s (%d) MaxScrollNum:%d idx:%d offset:%d\n",__FUNCTION__,__LINE__,MaxScrollNum, idx,offset);
4459
4460 }
4461
4462 u32ScrollAddr = pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.ScrollBuffer[idx];
4463 u32ScrollAddr /= u16GOP_Unit;
4464 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_RBLK_L(u8win), u32ScrollAddr);
4465
4466 pGOPDrvLocalCtx->pDrvCtxShared->apiCtxShared.ScrollBufIdx = idx;
4467
4468 //clear int
4469 u16RegVal = GOP_BIT1;
4470 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_INT, u16RegVal, GOP_BIT1);
4471
4472
4473 u16RegVal = 0x0;
4474 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_INT, u16RegVal, GOP_BIT1);
4475
4476
4477 //HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_BAK_SEL, 0x0, GOP_REG_LW_MASK);
4478 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_BAK_SEL, (GOP_BIT10 | 0x0), GOP_REG_HW_MASK);
4479 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_BAK_SEL, 0x0000, GOP_REG_HW_MASK);
4480
4481
4482 //HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_BAK_SEL, GOP_VAL_WR, GOP_REG_HW_MASK);
4483 //HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_BAK_SEL, 0x0000, GOP_REG_HW_MASK);
4484
4485
4486 if(bEnable)
4487 {
4488 MsOS_EnableInterrupt(E_INT_IRQ_GOP); //Need check if needed.
4489 }
4490 else
4491 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_INT, GOP_BIT1, GOP_BIT1);
4492
4493
4494
4495 }
4496 else
4497 {
4498 if(pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->bPixelMode[u8GOP] == TRUE)
4499 {
4500 offset &= 0xFFF; //horizontal use [12:0], 12 is sign bit.
4501 u16VaildMask = 0x1FFF;
4502 }
4503 else
4504 {
4505 offset &= 0x7F; //Horizontal use [7:0], [7] is sign bit
4506 u16VaildMask = 0xFF;
4507 }
4508
4509 u32regval = offset;
4510 if(type == GOP_DRV_SCROLL_RIGHT)
4511 {
4512 u32regval = (MS_U32)u16VaildMask - u32regval+1;
4513 }
4514
4515 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_RLEN_L(u8win), (u32regval&u16VaildMask), GOP_REG_WORD_MASK);
4516 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_RLEN_H(u8win), (u32regval>>16), GOP_REG_WORD_MASK);
4517 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_GWIN0_CTRL(u8win), bEnable==TRUE?GOP_BIT3:0, GOP_BIT3);
4518
4519 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)MDrv_DumpGopByGwinId(pGOPCtx,u8win));
4520 }
4521 }
4522
4523 /********************************************************************************/
4524 /// Set GWIN vertical auto scrolling
4525 /// @param u8win \b IN GWIN id 0 ~ (MAX_GWIN_SUPPORT - 1)
4526 /// @param type \b IN \copydoc GOPSCROLLTYPE
4527 /// @param bEnable \b IN
4528 /// - # TRUE enable
4529 /// - # FALSE disable
4530 /********************************************************************************/
MDrv_GOP_GWIN_SetVScroll(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8win,E_GOP_SCROLL_TYPE type,MS_U32 offset,MS_BOOL bEnable)4531 void MDrv_GOP_GWIN_SetVScroll(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8win, E_GOP_SCROLL_TYPE type, MS_U32 offset, MS_BOOL bEnable)
4532 {
4533 MS_U16 regval =0;
4534 MS_U32 Ringoffset=0;
4535 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
4536
4537 if (FALSE== _IsGwinIdValid(pGOPCtx, u8win))
4538 {
4539 GOP_D_ERR("\n[%s] not support gwin id:%d in this chip version",__FUNCTION__, u8win);
4540 return;
4541 }
4542
4543 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_RBLK_HSIZE(u8win), ®val);
4544 Ringoffset = regval * offset;
4545 if(type == GOP_DRV_SCROLL_DOWN)
4546 {
4547 Ringoffset = 0x0 - Ringoffset;
4548 }
4549 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_RLEN_L(u8win), (Ringoffset&0xFF), GOP_REG_WORD_MASK);
4550 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_RLEN_H(u8win), (Ringoffset>>16), GOP_REG_WORD_MASK);
4551 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_GWIN0_CTRL(u8win), bEnable== TRUE?GOP_BIT2:0, GOP_BIT2);
4552
4553 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)MDrv_DumpGopByGwinId(pGOPCtx,u8win));
4554 }
4555
4556
4557 //-------------------------------------------------------------------------------------------------
4558 /// Set Scroll auto stop
4559 /// @param u8Wid \b IN: GWin ID
4560 /// @param bTrue \b IN: TRUE: enable auto-stop mode, FALSE: disable auto-stop modea
4561 //-------------------------------------------------------------------------------------------------
MDrv_GOP_GWIN_Scroll_EnableAutoStop(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8win,MS_BOOL bEnable)4562 void MDrv_GOP_GWIN_Scroll_EnableAutoStop(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8win, MS_BOOL bEnable)
4563 {
4564 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
4565
4566 if (FALSE== _IsGwinIdValid(pGOPCtx, u8win))
4567 {
4568 GOP_D_ERR("\n[%s] not support gwin id:%d in this chip version",__FUNCTION__, u8win);
4569 return;
4570 }
4571 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_GWIN0_CTRL(u8win), bEnable==TRUE?GOP_BIT1:0, GOP_BIT1);
4572 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)MDrv_DumpGopByGwinId(pGOPCtx,u8win));
4573 }
4574
4575
4576 //-------------------------------------------------------------------------------------------------
4577 /// Set Scroll auto stop Horizontal offset
4578 /// @param u8Wid \b IN: GWin ID
4579 /// @param u32ScrollAutoHStop \b IN: scorll auto stop H offset (GWIN H scrolling will stop when moving count meet this offset)
4580 /// @return TRUE: sucess / FALSE: fail
4581 //-------------------------------------------------------------------------------------------------
MDrv_GOP_GWIN_Scroll_AutoStop_HSet(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8win,MS_U32 u32AutoHStopOffset)4582 MS_BOOL MDrv_GOP_GWIN_Scroll_AutoStop_HSet(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8win, MS_U32 u32AutoHStopOffset)
4583 {
4584 MS_U8 u8GOP;
4585 MS_U16 u16Meet;
4586 MS_U16 u16DramHStop;
4587 MS_U16 u16RegVal =0,u16tmp =0;
4588 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
4589
4590 if (FALSE== _IsGwinIdValid(pGOPCtx, u8win))
4591 {
4592 GOP_D_ERR("\n[%s] not support gwin id:%d in this chip version",__FUNCTION__, u8win);
4593 return false;
4594 }
4595 u8GOP = MDrv_DumpGopByGwinId(pGOPCtx,u8win);
4596
4597 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_RLEN_L(u8win), &u16RegVal);
4598
4599 if(pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->bPixelMode[u8GOP] == TRUE)
4600 {
4601 u16Meet = u16RegVal & GOP_BIT12;
4602 }
4603 else
4604 {
4605 u16Meet = u16RegVal & GOP_BIT7;
4606 }
4607
4608 if(u16Meet) //scroll right to left
4609 {
4610 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_RBLK_HSIZE(u8win), &u16tmp); //pixel
4611 u16DramHStop = u16tmp - (((0-u16RegVal)&0xFF)*(MS_U16)u32AutoHStopOffset);
4612 }
4613 else //scroll left to right
4614 {
4615 u16DramHStop = (MS_U32)u16RegVal*u32AutoHStopOffset;
4616 }
4617
4618 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_HVSTOP_L(u8win), u16DramHStop , GOP_REG_WORD_MASK);
4619 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_HVSTOP_H(u8win), 0 , GOP_REG_WORD_MASK);
4620 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)MDrv_DumpGopByGwinId(pGOPCtx,u8win));
4621
4622 return TRUE;
4623 }
4624
4625
4626 //-------------------------------------------------------------------------------------------------
4627 /// Set Scroll auto stop Verticall offset
4628 /// @param u8Wid \b IN: GWin ID
4629 /// @param u32AutoVStopOffset \b IN: scorll auto stop V offset (GWIN V scrolling will stop when moving count meet this offset)
4630 /// @return TRUE: sucess / FALSE: fail
4631 //-------------------------------------------------------------------------------------------------
MDrv_GOP_GWIN_Scroll_AutoStop_VSet(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8win,MS_U32 u32AutoVStopOffset)4632 MS_BOOL MDrv_GOP_GWIN_Scroll_AutoStop_VSet(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8win, MS_U32 u32AutoVStopOffset)
4633 {
4634 MS_U8 u8GOP;
4635 MS_U16 u32RegVal =0, u16tmp =0, u16tmp1 =0;
4636 MS_U32 u32DramVStop, u32RBLKSize;
4637 MS_U32 u32Meet,u32Mask;
4638 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
4639
4640 if (FALSE== _IsGwinIdValid(pGOPCtx, u8win))
4641 {
4642 GOP_D_ERR("\n[%s] not support gwin id:%d in this chip version",__FUNCTION__, u8win);
4643 return false;
4644 }
4645 u8GOP = MDrv_DumpGopByGwinId(pGOPCtx,u8win);
4646
4647 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_RLEN_L(u8win), &u16tmp);
4648 u32RegVal = u16tmp;
4649 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_RLEN_H(u8win), &u16tmp);
4650 u32RegVal += (u16tmp<<16);
4651
4652 if(pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->bPixelMode[u8GOP] == TRUE)
4653 {
4654 u32Meet = u32RegVal & 0x100000; //BIT20
4655 u32Mask = 0x1FFF;
4656 }
4657 else
4658 {
4659 u32Meet = u32RegVal & GOP_BIT15;
4660 u32Mask = 0xFF;
4661 }
4662
4663 if(u32Meet) //scroll up to down
4664 {
4665 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_RBLK_SIZE_L(u8win), &u16tmp);
4666 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_RBLK_SIZE_H(u8win), &u16tmp1);
4667 u32RBLKSize = (MS_U32)u16tmp1<<16 | (MS_U32)u16tmp;
4668 u32DramVStop = u32RBLKSize-(((0-u32RegVal)&u32Mask)*u32AutoVStopOffset);
4669 }
4670 else //scroll down to up
4671 {
4672 u32DramVStop = (MS_U32)u32RegVal*u32AutoVStopOffset;
4673 }
4674
4675 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_HVSTOP_L(u8win), u32DramVStop&0xffff , GOP_REG_WORD_MASK);
4676 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_HVSTOP_H(u8win), u32DramVStop >> 16 , GOP_REG_WORD_MASK);
4677 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)MDrv_DumpGopByGwinId(pGOPCtx,u8win));
4678
4679 return TRUE;
4680 }
4681 #endif
4682
4683 /********************************************************************************/
4684 /// Set GWIN alpha blending
4685 /// @param u8win \b IN \copydoc GWINID
4686 /// @param bEnable \b IN
4687 /// - # TRUE enable alpha blending
4688 /// - # FALSE disable alpha blending
4689 /// @param u8coef \b IN alpha blending coefficient (0-7)
4690 /********************************************************************************/
MDrv_GOP_GWIN_SetBlending(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8win,MS_BOOL bEnable,MS_U8 u8coef)4691 void MDrv_GOP_GWIN_SetBlending(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8win, MS_BOOL bEnable, MS_U8 u8coef)
4692 {
4693 DRV_GOP_CONSALPHA_BITS* pVal;
4694
4695 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
4696
4697 if (FALSE== _IsGwinIdValid(pGOPCtx, u8win))
4698 {
4699 GOP_D_ERR("\n[%s] not support gwin id:%d in this chip version",__FUNCTION__, u8win);
4700 return;
4701 }
4702 pVal = pGOPCtx->pGopConsAlphaBits;
4703 #ifndef MSOS_TYPE_NOS
4704 if(DRV_NONE_SETTING == *pVal)
4705 {
4706 *pVal = pGOPCtx->pGopChipProperty->Default_ConsAlpha_bits;
4707 GOP_D_DBUG("\n[%s] because User_ConsAlpha_bits is not set by user, so drv set it to the default bits enum(%d)!!!\n",__FUNCTION__,
4708 pGOPCtx->pGopChipProperty->Default_ConsAlpha_bits);
4709 }
4710 #endif
4711 pGOPDrvLocalCtx->halCtxLocal.User_ConsAlpha_bits = *pVal;
4712 HAL_GOP_GWIN_SetBlending(&pGOPDrvLocalCtx->halCtxLocal, u8win, bEnable, u8coef);
4713 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)MDrv_DumpGopByGwinId(pGOPCtx,u8win));
4714 }
4715
4716 /********************************************************************************/
4717 /// Set GWIN data format to GOP registers
4718 /// @param u8win \b IN \copydoc GWINID
4719 /// @param clrtype \b IN \copydoc EN_GOP_COLOR_TYPE
4720 /********************************************************************************/
MDrv_GOP_GWIN_SetWinFmt(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8win,DRV_GOPColorType clrtype)4721 void MDrv_GOP_GWIN_SetWinFmt(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8win, DRV_GOPColorType clrtype)
4722 {
4723 MS_U8 u8GOP = 0;
4724 MS_U8 regform = 0;
4725
4726 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
4727
4728 if (FALSE== _IsGwinIdValid(pGOPCtx, u8win))
4729 {
4730 GOP_D_ERR("\n[%s] not support gwin id:%d in this chip version",__FUNCTION__, u8win);
4731 return;
4732 }
4733
4734 u8GOP = MDrv_DumpGopByGwinId(pGOPCtx,u8win);
4735
4736 // add GOP reg struct type.
4737 regform = MDrv_GOP_GetRegForm(pGOPCtx, PAR_IGNORE, u8win);
4738
4739 HAL_GOP_SetWinFmt(&pGOPDrvLocalCtx->halCtxLocal, regform, u8GOP, u8win, GOP_SetFmt(clrtype)<<4);
4740 }
4741
4742 /********************************************************************************/
4743 /// Enable GWIN for display
4744 /// @param u8win \b IN GWIN id
4745 /// @param bEnable \b IN
4746 /// - # TRUE Show GWIN
4747 /// - # FALSE Hide GWIN
4748 /********************************************************************************/
MDrv_GOP_GWIN_EnableGwin(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8win,MS_BOOL bEnable)4749 void MDrv_GOP_GWIN_EnableGwin(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8win, MS_BOOL bEnable)
4750 {
4751 MS_U8 u8GOP =0;
4752 MS_U32 u32BankOffSet = 0;
4753 MS_U8 regform;
4754 #ifdef CONFIG_MSTAR_SRAMPD
4755 MS_U8 u8Idx=0,u8MaxWinNum=0;
4756 MS_U16 u16tmp=0;
4757 MS_BOOL bGOPUsed=FALSE;
4758 #endif
4759
4760 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
4761
4762 if (FALSE== _IsGwinIdValid(pGOPCtx, u8win))
4763 {
4764 GOP_D_ERR("\n[%s] not support gwin id:%d in this chip version",__FUNCTION__, u8win);
4765 return;
4766 }
4767 GOP_D_INFO("MDrv_GOP_GWIN_Enable(gId=%d) == %d\n",u8win, bEnable);
4768
4769 pGOPDrvLocalCtx->apiCtxLocal.pGOPCtxShared->bGWINEnable[u8win] = bEnable;
4770 u8GOP = MDrv_DumpGopByGwinId(pGOPCtx,u8win);
4771 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
4772
4773
4774 if(bEnable == TRUE)
4775 {
4776 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_MULTI_ALPHA, 0, GOP_BIT11);
4777 #ifdef CONFIG_MSTAR_SRAMPD
4778 pGOPCtx->pGOPCtxShared->bGOPPowerDown[u8GOP]=FALSE;
4779 #endif
4780 }
4781
4782 //do gwin addr check to avoid invalid addr display
4783 if(_GWIN_ADDR_Invalid_Check(pGOPCtx,u8win) == FALSE)
4784 {
4785 GOP_D_ERR("\n[%s] Current Gwin(%d) Addr is invalid XXXX\n",__FUNCTION__, u8win);
4786 return;
4787 }
4788
4789 regform = MDrv_GOP_GetRegForm(pGOPCtx, PAR_IGNORE, u8win);
4790
4791 #ifdef GOP_AUTO_CLK_GATING_PATCH
4792 if(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bGOPAutoClkGating)
4793 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_OLDADDR, 0x0, (GOP_BIT1 | GOP_BIT0) );
4794 #endif
4795
4796 if (((regform & E_GOP_REG_FORM_MASK) == E_GOP_REG_FORM_T21G) || ((regform & E_GOP_REG_FORM_MASK) == E_GOP_REG_FORM_T81G))
4797 {
4798 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_GWIN0_CTRL(Gop23_GwinCtl_Ofet), \
4799 bEnable?TRUE:FALSE, 0x0001);
4800 }
4801 else
4802 {
4803 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_GWIN0_CTRL(u8win), \
4804 bEnable?TRUE:FALSE, 0x0001);
4805 }
4806 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)MDrv_DumpGopByGwinId(pGOPCtx,u8win));
4807
4808 #ifdef GOP_AUTO_CLK_GATING_PATCH
4809 if(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bGOPAutoClkGating)
4810 {
4811 if(bEnable == FALSE)
4812 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_OLDADDR, (GOP_BIT1 | GOP_BIT0), (GOP_BIT1 | GOP_BIT0) );
4813 }
4814 #endif
4815
4816 #ifdef CONFIG_MSTAR_SRAMPD
4817 bGOPUsed = FALSE;
4818 if(bEnable == FALSE)
4819 {
4820 u8MaxWinNum = HAL_GOP_GetMaxGwinNumByGOP(&pGOPDrvLocalCtx->halCtxLocal, u8GOP);
4821 for (u8Idx=0; u8Idx<u8MaxWinNum; u8Idx++)
4822 {
4823 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_GWIN0_CTRL(u8Idx),&u16tmp);
4824 if(u16tmp&GOP_BIT0)
4825 {
4826 bGOPUsed=TRUE;
4827 }
4828 }
4829 if(bGOPUsed==TRUE)
4830 pGOPCtx->pGOPCtxShared->bGOPPowerDown[u8GOP]=FALSE;
4831 else
4832 pGOPCtx->pGOPCtxShared->bGOPPowerDown[u8GOP]=TRUE;
4833 }
4834 #endif
4835 }
4836
MDrv_GOP_InitMux(MS_GOP_CTX_LOCAL * pGOPCtx)4837 GOP_Result MDrv_GOP_InitMux(MS_GOP_CTX_LOCAL*pGOPCtx)
4838 {
4839 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
4840 return HAL_GOP_InitMux(&pGOPDrvLocalCtx->halCtxLocal);
4841 }
4842
MDrv_GOP_HasGop1GPalette(MS_GOP_CTX_LOCAL * pGOPCtx)4843 MS_BOOL MDrv_GOP_HasGop1GPalette(MS_GOP_CTX_LOCAL*pGOPCtx)
4844 {
4845 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
4846 return pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bGop1GPalette;
4847 }
_GOPFBAddCheck(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 gopnum,DRV_GOP_GWIN_INFO * pinfo)4848 static GOP_Result _GOPFBAddCheck(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 gopnum,DRV_GOP_GWIN_INFO* pinfo)
4849 {
4850 MS_U8 u8MiuSel;
4851
4852 _phy_to_miu_offset(u8MiuSel, pinfo->u64DRAMRBlkStart, pinfo->u64DRAMRBlkStart);
4853 if (FALSE==_IsGopNumVaild(pGOPCtx, gopnum))
4854 {
4855 GOP_D_ERR("\n[%s] not support gop id:%d in this chip version",__FUNCTION__, gopnum);
4856 return GOP_FAIL;
4857 }
4858
4859 if(pGOPCtx->pGOPCtxShared->bTLB[gopnum] != TRUE)
4860 {
4861 if(MDrv_GOP_Get_MIU_Sel(pGOPCtx,gopnum) != u8MiuSel)
4862 {
4863 GOP_D_DBUG("\n %s GOP[%d] address(0x%tx) select from %d to %d\n",__FUNCTION__,gopnum,(ptrdiff_t)pinfo->u64DRAMRBlkStart,MDrv_GOP_Get_MIU_Sel(pGOPCtx,gopnum),u8MiuSel);
4864 }
4865 }
4866 return GOP_SUCCESS;
4867 }
MDrv_GOP_GWIN_SetGwinInfo(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8win,DRV_GOP_GWIN_INFO * pinfo)4868 GOP_Result MDrv_GOP_GWIN_SetGwinInfo(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8win, DRV_GOP_GWIN_INFO* pinfo)
4869 {
4870 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
4871 MS_U8 u8GOP;
4872
4873 if (FALSE== _IsGwinIdValid(pGOPCtx, u8win))
4874 {
4875 GOP_D_ERR("\n[%s] not support gwin id:%d in this chip version",__FUNCTION__, u8win);
4876 return GOP_FAIL;
4877 }
4878 u8GOP = MDrv_DumpGopByGwinId(pGOPCtx,u8win);
4879
4880 if (FALSE== _IsGopNumVaild(pGOPCtx, u8GOP))
4881 {
4882 GOP_D_ERR("\n[%s] not support gop id:%d in this chip version",__FUNCTION__, u8GOP);
4883 return GOP_FAIL;
4884 }
4885
4886 switch(u8GOP)
4887 {
4888 case E_GOP0:
4889 if (GOP_SUCCESS ==_GOPFBAddCheck(pGOPCtx,0,pinfo))
4890 GOP_SetGop0GwinInfo(pGOPDrvLocalCtx, u8win, pinfo);
4891 else
4892 return GOP_FAIL;
4893
4894 break;
4895 case E_GOP1:
4896 if (GOP_SUCCESS ==_GOPFBAddCheck(pGOPCtx,1,pinfo))
4897 GOP_SetGop1GwinInfo(pGOPDrvLocalCtx, u8win, pinfo);
4898 else
4899 return GOP_FAIL;
4900
4901 break;
4902 case E_GOP2:
4903 case E_GOP3:
4904 case E_GOP4:
4905 case E_GOP5:
4906 if (!pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bGop1GPalette && (pinfo->clrType==E_DRV_GOP_COLOR_I8 || pinfo->clrType==E_DRV_GOP_COLOR_2266\
4907 ||pinfo->clrType==E_DRV_GOP_COLOR_RGB555_BLINK))
4908 {
4909 GOP_D_ERR("\n[%s] u8win:%d not support index mode",__FUNCTION__, u8win);
4910 return GOP_FAIL;
4911 }
4912
4913 if (GOP_SUCCESS ==_GOPFBAddCheck(pGOPCtx,u8GOP,pinfo))
4914 GOP_SetGopExtendGwinInfo(pGOPDrvLocalCtx, u8win, pinfo);
4915 else
4916 return GOP_FAIL;
4917 break;
4918 default:
4919 break;
4920 }
4921
4922 return GOP_SUCCESS;
4923 }
4924
MDrv_GOP_GWIN_GetGwinInfo(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8win,DRV_GOP_GWIN_INFO * pinfo)4925 GOP_Result MDrv_GOP_GWIN_GetGwinInfo(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8win, DRV_GOP_GWIN_INFO* pinfo)
4926 {
4927 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
4928 MS_U8 u8GOP;
4929 GOP_WinFB_INFO pwinFB;
4930
4931 if (FALSE== _IsGwinIdValid(pGOPCtx, u8win))
4932 {
4933 GOP_D_ERR("\n[%s] not support gwin id:%d in this chip version",__FUNCTION__, u8win);
4934 return GOP_FAIL;
4935 }
4936
4937 if(pGOPCtx->pGOPCtxShared->gwinMap[u8win].u32CurFBId > DRV_MAX_GWIN_FB_SUPPORT)
4938 {
4939 GOP_D_ERR("[%s][%d] WrongFBID=%td\n",__FUNCTION__,__LINE__,(ptrdiff_t)pGOPCtx->pGOPCtxShared->gwinMap[u8win].u32CurFBId);
4940 return GOP_FAIL;
4941 }
4942
4943 #if WINFB_INSHARED
4944 pwinFB = pGOPCtx->pGOPCtxShared->winFB[pGOPCtx->pGOPCtxShared->gwinMap[u8win].u32CurFBId];
4945 #else
4946 pwinFB = pGOPCtx->winFB[pGOPCtx->pGOPCtxShared->gwinMap[u8win].u32CurFBId];
4947 #endif
4948
4949 pinfo->u16RBlkHPixSize = pwinFB.width;
4950 pinfo->u16RBlkVPixSize = pwinFB.height;
4951
4952 u8GOP = MDrv_DumpGopByGwinId(pGOPCtx,u8win);
4953 switch(u8GOP)
4954 {
4955 case E_GOP0:
4956 GOP_ReadGop0GwinInfo(pGOPDrvLocalCtx, u8win, pinfo);
4957 HAL_ConvertAPIAddr(&pGOPDrvLocalCtx->halCtxLocal, u8win, &(pinfo->u64DRAMRBlkStart));
4958 break;
4959 case E_GOP1:
4960 GOP_ReadGop1GwinInfo(pGOPDrvLocalCtx, u8win, pinfo);
4961 HAL_ConvertAPIAddr(&pGOPDrvLocalCtx->halCtxLocal, u8win, &(pinfo->u64DRAMRBlkStart));
4962 break;
4963 case E_GOP2:
4964 case E_GOP3:
4965 case E_GOP4:
4966 case E_GOP5:
4967 if (!pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bGop1GPalette && (pinfo->clrType==E_DRV_GOP_COLOR_I8 || pinfo->clrType==E_DRV_GOP_COLOR_2266))
4968 {
4969 GOP_D_ERR("\n[%s] u8win:%d not support index mode",__FUNCTION__, u8win);
4970 return GOP_FAIL;
4971 }
4972 GOP_ReadGopExtendGwinInfo(pGOPDrvLocalCtx, u8win, pinfo);
4973 HAL_ConvertAPIAddr(&pGOPDrvLocalCtx->halCtxLocal, u8win, &(pinfo->u64DRAMRBlkStart));
4974 break;
4975 default:
4976 break;
4977 }
4978
4979 return GOP_SUCCESS;
4980 }
4981
4982 #ifdef CONFIG_GOP_BG
4983 /********************************************************************************/
4984 /// Enable GWIN background window
4985 /// @param bgwID \b IN GWIN ID
4986 /// @param MS_BOOL \b IN
4987 /// - # TRUE enable
4988 /// - # FALSE disable
4989 /********************************************************************************/
MDrv_GOP_GWIN_Enable_BGWIN(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 bgwID,MS_BOOL bEnable)4990 GOP_Result MDrv_GOP_GWIN_Enable_BGWIN(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 bgwID, MS_BOOL bEnable)
4991 {
4992 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
4993
4994 /*only gop4g has background window*/
4995 if(bgwID >= HAL_GOP_GetMaxGwinNumByGOP(&pGOPDrvLocalCtx->halCtxLocal, 0))
4996 {
4997 GOP_ASSERT(0);
4998 return GOP_FAIL;
4999 }
5000
5001 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_FADE(bgwID), bEnable==TRUE?GOP_BIT13:0, GOP_BIT13);
5002 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, E_GOP0);
5003 return GOP_SUCCESS;
5004 }
5005
5006
5007 /********************************************************************************/
5008 /// Set GWIN background window property
5009 /// @param bgwID \b IN GWIN ID
5010 /// @param x0 \b IN background window horizontal start position
5011 /// @param y0 \b IN background window vertical start position
5012 /// @param w \b IN background window width
5013 /// @param h \b IN background window height
5014 /// @param color \b IN background window color
5015 /********************************************************************************/
MDrv_GOP_GWIN_Set_BGWIN(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 bgwID,MS_U16 x0,MS_U16 y0,MS_U16 w,MS_U16 h,MS_U16 color)5016 void MDrv_GOP_GWIN_Set_BGWIN(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 bgwID, MS_U16 x0, MS_U16 y0, MS_U16 w, MS_U16 h, MS_U16 color)
5017 {
5018 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5019 if(bgwID >= HAL_GOP_GetMaxGwinNumByGOP(&pGOPDrvLocalCtx->halCtxLocal, 0))
5020 {
5021 GOP_ASSERT(0);
5022 return;
5023 }
5024
5025 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_BG_VSTR(bgwID), y0 , GOP_REG_WORD_MASK);
5026 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_BG_HSTR(bgwID), x0 , GOP_REG_WORD_MASK);
5027 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_BG_VEND(bgwID), y0 + h , GOP_REG_WORD_MASK);
5028 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_BG_HEND(bgwID), x0 + w , GOP_REG_WORD_MASK);
5029 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_BG_CLR(bgwID), color , GOP_REG_WORD_MASK);
5030 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, E_GOP0);
5031 }
5032
MDrv_GOP_GWIN_Set_BGWIN_Alpha(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 bgwID,MS_BOOL bEnable,MS_U8 alpha)5033 void MDrv_GOP_GWIN_Set_BGWIN_Alpha(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 bgwID, MS_BOOL bEnable, MS_U8 alpha)
5034 {
5035 MS_U16 u16reg;
5036 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5037 if(bgwID >= HAL_GOP_GetMaxGwinNumByGOP(&pGOPDrvLocalCtx->halCtxLocal, 0))
5038 {
5039 GOP_ASSERT(0);
5040 return;
5041 }
5042 u16reg = (alpha|(bEnable<<4))<<8;
5043 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_DRAM_FADE(bgwID), u16reg , 0x1F00);
5044
5045 }
5046 #endif
MDrv_GOP_GWIN_IsGWINEnabled(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8win,MS_BOOL * pbEnable)5047 void MDrv_GOP_GWIN_IsGWINEnabled(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8win, MS_BOOL* pbEnable )
5048 {
5049 MS_U16 regval=0;
5050 MS_U8 u8GOP;
5051 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5052
5053 if (FALSE== _IsGwinIdValid(pGOPCtx, u8win))
5054 {
5055 GOP_D_ERR("\n[%s] not support gwin id:%d in this chip version",__FUNCTION__, u8win);
5056 return;
5057 }
5058 u8GOP = MDrv_DumpGopByGwinId(pGOPCtx,u8win);
5059 switch(u8GOP)
5060 {
5061 case E_GOP0:
5062 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_GWIN0_CTRL(u8win), ®val);
5063 break;
5064 case E_GOP1:
5065 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_2G_GWIN0_CTRL(u8win-HAL_GOP_GetMaxGwinNumByGOP(&pGOPDrvLocalCtx->halCtxLocal, 0)), ®val);
5066 break;
5067 case E_GOP2:
5068 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_1G_GWIN0_CTRL, ®val);
5069 break;
5070 case E_GOP3:
5071 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_1GX_GWIN0_CTRL, ®val);
5072 break;
5073 case E_GOP4:
5074 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_1GS0_GWIN0_CTRL, ®val);
5075 break;
5076 case E_GOP5:
5077 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_1GS1_GWIN0_CTRL, ®val);
5078 break;
5079 default:
5080 break;
5081 }
5082
5083 if(regval & 0x0001)
5084 {
5085 *pbEnable = TRUE;
5086 }
5087 else
5088 {
5089 *pbEnable = FALSE;
5090 }
5091 }
5092
MDrv_GOP_IsGOPMirrorEnable(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,MS_BOOL * bHMirror,MS_BOOL * bVMirror)5093 void MDrv_GOP_IsGOPMirrorEnable(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum, MS_BOOL *bHMirror, MS_BOOL *bVMirror)
5094 {
5095 MS_U16 u16RegVal = 0;
5096 MS_U32 u32BankOffSet = 0;
5097 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5098 if (FALSE== _IsGopNumVaild((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, u8GOPNum))
5099 {
5100 GOP_D_ERR("\n[%s] not support gop%d in this chip version!!",__FUNCTION__, u8GOPNum);
5101 return;
5102 }
5103 _GetBnkOfstByGop(u8GOPNum, &u32BankOffSet);
5104
5105 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, &u16RegVal);
5106 *bHMirror = (u16RegVal & GOP_BIT12)>>12;
5107 *bVMirror = (u16RegVal & GOP_BIT13)>>13;
5108 }
5109
MDrv_GOP_GWIN_EnableHMirror(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,MS_BOOL bEnable)5110 void MDrv_GOP_GWIN_EnableHMirror(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum, MS_BOOL bEnable)
5111 {
5112 MS_U32 u32BankOffSet = 0;
5113 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5114
5115 if (FALSE== _IsGopNumVaild((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, u8GOPNum))
5116 {
5117 GOP_D_ERR("\n[%s] not support gop%d in this chip version!!",__FUNCTION__, u8GOPNum);
5118 return;
5119 }
5120 _GetBnkOfstByGop(u8GOPNum, &u32BankOffSet);
5121
5122 if(bEnable == TRUE)
5123 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, GOP_BIT12, GOP_BIT12);
5124 else
5125 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, 0, GOP_BIT12);
5126 }
5127
5128
MDrv_GOP_GWIN_EnableVMirror(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,MS_BOOL bEnable)5129 void MDrv_GOP_GWIN_EnableVMirror(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum, MS_BOOL bEnable)
5130 {
5131 MS_U32 u32BankOffSet = 0;
5132 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5133
5134 if (FALSE== _IsGopNumVaild((MS_GOP_CTX_LOCAL*)pGOPDrvLocalCtx, u8GOPNum))
5135 {
5136 GOP_D_ERR("\n[%s] not support gop%d in this chip version!!",__FUNCTION__, u8GOPNum);
5137 return;
5138 }
5139 _GetBnkOfstByGop(u8GOPNum, &u32BankOffSet);
5140
5141 if(bEnable == TRUE)
5142 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, GOP_BIT13, GOP_BIT13);
5143 else
5144 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, 0, GOP_BIT13);
5145
5146 }
5147
MDrv_GOP_TLBEnable(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_BOOL bTLBEn)5148 GOP_Result MDrv_GOP_TLBEnable(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP, MS_BOOL bTLBEn)
5149 {
5150 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5151
5152 HAL_GOP_EnableTLB(&pGOPDrvLocalCtx->halCtxLocal, u8GOP, bTLBEn);
5153
5154 return GOP_SUCCESS;
5155 }
5156
MDrv_GOP_SetTLBAddr(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_PHY u64TLBAddr,MS_BOOL bHMirror,MS_BOOL bVMirror,DRV_GOP_GWIN_INFO * pinfo)5157 GOP_Result MDrv_GOP_SetTLBAddr(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, MS_PHY u64TLBAddr, MS_BOOL bHMirror,MS_BOOL bVMirror,DRV_GOP_GWIN_INFO* pinfo)
5158 {
5159 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5160 MS_U32 u32offsetsize=0;
5161 MS_U16 bpp;
5162
5163 if(!pGOPDrvLocalCtx->apiCtxLocal.pGopChipProperty->bTLBSupport[u8GOP])
5164 {
5165 GOP_D_ERR("\n[%s] not support TLB feature in this chip version",__FUNCTION__);
5166 return GOP_FAIL;
5167 }
5168
5169 bpp = HAL_GOP_GetBPP(&pGOPDrvLocalCtx->halCtxLocal, pinfo->clrType);
5170 if(bpp == FB_FMT_AS_DEFAULT)
5171 {
5172 return GOP_FAIL;
5173 }
5174
5175 if((bHMirror)&&(bVMirror))
5176 {
5177 u32offsetsize = (pinfo->u16RBlkHPixSize)*(pinfo->u16RBlkVPixSize)*(bpp/PER_BYTE_BITS);
5178 }
5179 else if(bHMirror)
5180 {
5181 u32offsetsize = pinfo->u16RBlkHPixSize*(bpp/PER_BYTE_BITS);
5182 }
5183 else if(bVMirror)
5184 {
5185 u32offsetsize = (pinfo->u16RBlkHPixSize)*((pinfo->u16RBlkVPixSize)-1)*(bpp/PER_BYTE_BITS);
5186 }
5187 else
5188 {
5189 u32offsetsize=0;
5190 }
5191
5192 u32offsetsize=(u32offsetsize/(PER_MIU_TLB_ENTRY_COUNT*PAGE_SIZE))*(PER_MIU_TLB_ENTRY_COUNT*PAGE_SIZE);
5193
5194 u64TLBAddr /=ADDRESSING_8BYTE_UNIT;
5195 u32offsetsize /=ADDRESSING_8BYTE_UNIT;
5196
5197 HAL_GOP_SetTLBAddr(&pGOPDrvLocalCtx->halCtxLocal, u8GOP, u64TLBAddr,u32offsetsize);
5198
5199 return GOP_SUCCESS;
5200 }
5201
MDrv_GOP_SetTLBSubAddr(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_PHY u64TLBAddr)5202 GOP_Result MDrv_GOP_SetTLBSubAddr(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, MS_PHY u64TLBAddr)
5203 {
5204 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5205
5206 if(!pGOPDrvLocalCtx->apiCtxLocal.pGopChipProperty->bTLBSupport[u8GOP])
5207 {
5208 GOP_D_ERR("\n[%s] not support TLB feature in this chip version",__FUNCTION__);
5209 return GOP_FAIL;
5210 }
5211
5212 u64TLBAddr /=ADDRESSING_8BYTE_UNIT;
5213
5214 HAL_GOP_SetTLBSubAddr(&pGOPDrvLocalCtx->halCtxLocal, u8GOP, u64TLBAddr);
5215
5216 return GOP_SUCCESS;
5217 }
5218
5219 /******************************************************************************/
5220 /// Set the time when new DWIN settings take effect
5221 /// @param bEnable \b IN
5222 /// - # TRUE the new setting moved from internal register buffer
5223 /// to active registers immediately
5224 /// - # FALSE new settings take effect when next VSYNC is coming
5225 /******************************************************************************/
MDrv_GOP_DWIN_SetForceWrite(MS_GOP_CTX_LOCAL * pGOPCtx,MS_BOOL bEnable)5226 void MDrv_GOP_DWIN_SetForceWrite(MS_GOP_CTX_LOCAL*pGOPCtx, MS_BOOL bEnable)
5227 {
5228 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5229 pGOPDrvLocalCtx->gop_dwin_frwr = bEnable;
5230 }
5231
5232
5233 /******************************************************************************/
5234 /// Capture every frames
5235 /// @param bEnable \b IN
5236 /// - # TRUE start capture
5237 /// - # FALSE stop capture
5238 /******************************************************************************/
MDrv_GOP_DWIN_EnableCaptureStream(MS_GOP_CTX_LOCAL * pGOPCtx,MS_BOOL bEnable)5239 void MDrv_GOP_DWIN_EnableCaptureStream(MS_GOP_CTX_LOCAL*pGOPCtx, MS_BOOL bEnable)
5240 {
5241 MS_U16 regval =0;
5242 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5243
5244 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN, ®val);
5245
5246 if(bEnable)
5247 {
5248 regval &= ~0x0080;
5249 regval |= 0x0001;
5250 }
5251 else
5252 {
5253 regval |= 0x0080;
5254 regval &= ~0x0001;
5255 }
5256
5257 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN, regval, GOP_REG_WORD_MASK);
5258
5259 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx,E_GOP_Dwin);
5260 }
5261
5262
5263 /******************************************************************************/
5264 /// Capture one frame
5265 /******************************************************************************/
5266 #define DWIN_CAPTURE_TIMEOUT_CNT_I 80UL //frame rate 50, maximum time is button + top + button = 20+20+20 = 60ms, and give extra 20ms
5267 #define DWIN_CAPTURE_TIMEOUT_CNT_P 40UL //frame rate 50, maximum time is 20ms, and give extra 20ms
MDrv_GOP_DWIN_CaptureOneFrame(MS_GOP_CTX_LOCAL * pGOPCtx)5268 void MDrv_GOP_DWIN_CaptureOneFrame(MS_GOP_CTX_LOCAL*pGOPCtx)
5269 {
5270 MS_U16 regval =0, u16DWinState=0;
5271 MS_U32 u32StartT = 0,u32EndT = 0;
5272 MS_BOOL bInterlace = FALSE, bTOPOK= FALSE;
5273 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5274 MS_BOOL bForceWrite= MDrv_GOP_GWIN_IsForceWrite(pGOPCtx, E_GOP0);
5275
5276 //mj@ 2008.09.22 avoid DWIN lack the most left line
5277 //HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN, GOP_BIT11, GOP_BIT11);
5278
5279 // Reset
5280 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN, ®val);
5281 bInterlace = !((regval & BIT(4)) >> 4);
5282 regval &= ~0x01;
5283 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN, regval, GOP_REG_WORD_MASK);
5284
5285 if(bInterlace)
5286 {
5287 regval &= ~0x80; //Use stream capture mode to capture 2 field continuously
5288 regval |= 0x01;
5289 }
5290 else
5291 {
5292 regval |= 0x81; //Stop capture if one frame/field is done
5293 }
5294
5295 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN, regval, GOP_REG_WORD_MASK);
5296 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, E_GOP_Dwin);
5297
5298 u32StartT = MsOS_GetSystemTime();
5299 if(bInterlace)
5300 {
5301 do
5302 {
5303 MsOS_DelayTask(1);//check every 1ms
5304 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_DEBUG, &u16DWinState);
5305 u16DWinState = u16DWinState & 0x7;
5306 if(bTOPOK == FALSE)
5307 {
5308 if(u16DWinState == 0x2)
5309 {
5310 bTOPOK = TRUE; //TOP field is done
5311 }
5312 }
5313 else
5314 {
5315 if(u16DWinState == 0x4)
5316 {
5317 u32EndT = MsOS_GetSystemTime();
5318 break; //Bottom field is done
5319 }
5320 }
5321 u32EndT = MsOS_GetSystemTime() ;
5322 }while( (u32EndT - u32StartT)< DWIN_CAPTURE_TIMEOUT_CNT_I);
5323 }
5324 else
5325 {
5326 do
5327 {
5328 MsOS_DelayTask(1);//check every 1ms
5329 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_DEBUG, &u16DWinState);
5330 u16DWinState = u16DWinState & 0x7;
5331 if(u16DWinState == 0x1 || u16DWinState == 0x2 || u16DWinState == 0x4)
5332 {
5333 u32EndT = MsOS_GetSystemTime();
5334 break;
5335 }
5336 u32EndT = MsOS_GetSystemTime() ;
5337 }while( (u32EndT - u32StartT)< DWIN_CAPTURE_TIMEOUT_CNT_P );
5338 }
5339
5340 regval |= 0x80;
5341 regval &= ~0x01;
5342 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN, regval, GOP_REG_WORD_MASK);
5343
5344 if(!bForceWrite)
5345 {
5346 MDrv_GOP_GWIN_ForceWrite_Update(pGOPCtx, E_GOP0, TRUE);//Force write to turn off DWIN
5347 }
5348 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, E_GOP_Dwin);
5349
5350 if(!bForceWrite)
5351 {
5352 MDrv_GOP_GWIN_ForceWrite_Update(pGOPCtx, E_GOP0, bForceWrite);
5353 }
5354
5355 if( ((bInterlace == TRUE) && ((u32EndT - u32StartT) >= DWIN_CAPTURE_TIMEOUT_CNT_I))
5356 ||((bInterlace == FALSE) && ((u32EndT - u32StartT) >= DWIN_CAPTURE_TIMEOUT_CNT_P)))
5357 {
5358 GOP_D_DBUG("[%s][%d]!!!Alert !!! DWIN Capture[i=%u, bTOPOK=%u, Reg_DW_CTL0=%x], wait ack time out!\n",__FUNCTION__,__LINE__, bInterlace, bTOPOK, regval);
5359 }
5360 }
5361
MDrv_GOP_DWIN_CaptureOneFrame2(MS_GOP_CTX_LOCAL * pGOPCtx)5362 void MDrv_GOP_DWIN_CaptureOneFrame2(MS_GOP_CTX_LOCAL*pGOPCtx)
5363 {
5364 MS_U16 regval =0;
5365 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5366
5367 MDrv_GOP_GWIN_SetForceWrite(pGOPCtx, TRUE);
5368
5369 // Reset
5370 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN, ®val);
5371
5372 regval |= 0x80;
5373 regval &= ~0x01;
5374 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN, regval, GOP_REG_WORD_MASK);
5375
5376 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, E_GOP_Dwin);
5377
5378 regval |= 0x0c81; // NULL Mode for 1/2 down scaling, for shift 1 pixl
5379 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN, regval, GOP_REG_WORD_MASK);
5380
5381 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, E_GOP_Dwin);
5382
5383 MDrv_GOP_GWIN_SetForceWrite(pGOPCtx, FALSE);
5384 }
5385
MDrv_GOP_DWIN_SetSourceSel(MS_GOP_CTX_LOCAL * pGOPCtx,DRV_GOP_DWIN_SRC_SEL enSrcSel)5386 GOP_Result MDrv_GOP_DWIN_SetSourceSel(MS_GOP_CTX_LOCAL*pGOPCtx, DRV_GOP_DWIN_SRC_SEL enSrcSel)
5387 {
5388 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5389 GOP_Result enRet = GOP_FAIL;
5390
5391 DRV_GOP_XC_GET_SEMPHORE();
5392 enRet = HAL_GOP_DWIN_SetSourceSel(&pGOPDrvLocalCtx->halCtxLocal, enSrcSel);
5393 DRV_GOP_XC_RELEASE_SEMPHORE();
5394 return enRet;
5395 }
5396
5397 /******************************************************************************/
5398 /// Set DWIN setting to registers
5399 /// @param pinfo \b IN \copydoc GOP_DwinInfo
5400 /******************************************************************************/
MDrv_GOP_DWIN_SetWinInfo(MS_GOP_CTX_LOCAL * pGOPCtx,DRV_GOP_DWIN_INFO * pinfo)5401 void MDrv_GOP_DWIN_SetWinInfo(MS_GOP_CTX_LOCAL*pGOPCtx, DRV_GOP_DWIN_INFO* pinfo)
5402 {
5403 MS_U32 u32tmp =0,u32tmp1 =0;
5404 MS_U16 u16tmp =0;
5405 MS_U8 bpp; // byte per pixel
5406 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5407 MS_U8 u8MiuSel;
5408
5409 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN,&u16tmp);
5410 if ((u16tmp >> 14) == 0x2) //ARGB8888
5411 bpp=4;
5412 else
5413 bpp=2;
5414
5415 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_LSTR_WBE, 0xff, GOP_REG_LW_MASK);
5416
5417 u16tmp = pinfo->u16VPixelStart; // pix
5418 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_VSTR, u16tmp, GOP_REG_WORD_MASK);
5419
5420 u16tmp = pinfo->u16VPixelEnd; // pix
5421 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_VEND, u16tmp, GOP_REG_WORD_MASK);
5422
5423 u16tmp = pinfo->u16HPixelStart/(GOP_DWIN_WordUnit/bpp); // 4 pixels
5424 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_HSTR, u16tmp, GOP_REG_WORD_MASK);
5425
5426 u16tmp = pinfo->u16HPixelEnd/(GOP_DWIN_WordUnit/bpp); // 4 pixels
5427 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_HEND, u16tmp, GOP_REG_WORD_MASK);
5428
5429 u16tmp = (pinfo->u16HPixelEnd - pinfo->u16HPixelStart)/(GOP_DWIN_WordUnit/bpp); // 4 pixels
5430 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_HSIZE, u16tmp, GOP_REG_WORD_MASK);
5431
5432 //GOP HW just read the relative offset of each MIU
5433 _phy_to_miu_offset(u8MiuSel, u32tmp, pinfo->u64TFDRAMAddr);
5434 u32tmp /= GOP_DWIN_WordUnit; // word(8-byte)
5435 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal,GOP_DW_DSTR_L, u32tmp);
5436 //GOP HW just read the relative offset of each MIU
5437 _phy_to_miu_offset(u8MiuSel, u32tmp, pinfo->u64BFDRAMAddr);
5438 u32tmp /= GOP_DWIN_WordUnit; // word(8-byte)
5439 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal,GOP_DW_UB_L, u32tmp);
5440
5441 //Ring size
5442 u16tmp = (pinfo->u16HPixelEnd - pinfo->u16HPixelStart)/(GOP_DWIN_WordUnit/bpp);
5443 u32tmp = u16tmp * (pinfo->u16VPixelEnd - pinfo->u16VPixelStart);
5444 //Buffer size
5445 u32tmp1 = (pinfo->u64BFDRAMAddr - pinfo->u64TFDRAMAddr)/GOP_DWIN_WordUnit;
5446 HAL_GOP_DWIN_SetRingBuffer(&pGOPDrvLocalCtx->halCtxLocal,u32tmp,u32tmp1);
5447
5448 u16tmp = pinfo->u16DRAMJumpLen/GOP_DWIN_WordUnit; // word(8-byte)
5449 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_JMPLEN, u16tmp, GOP_REG_WORD_MASK);
5450 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, E_GOP_Dwin);
5451 }
5452
5453
5454 /******************************************************************************/
5455 /// Get DWIN setting fromo registers
5456 /// @param pinfo \b IN \copydoc GOP_DwinInfo
5457 /******************************************************************************/
MDrv_GOP_DWIN_GetWinInfo(MS_GOP_CTX_LOCAL * pGOPCtx,DRV_GOP_DWIN_INFO * pinfo)5458 void MDrv_GOP_DWIN_GetWinInfo(MS_GOP_CTX_LOCAL*pGOPCtx, DRV_GOP_DWIN_INFO* pinfo)
5459 {
5460 MS_U16 u16tmp =0;
5461 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5462 MS_U8 u8MiuSel;
5463
5464 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_VSTR, &u16tmp);
5465 pinfo->u16VPixelStart = u16tmp; // pix
5466
5467 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_VEND, &u16tmp);
5468 pinfo->u16VPixelEnd = u16tmp; // pix
5469
5470 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_HSTR, &u16tmp);
5471 pinfo->u16HPixelStart = u16tmp << 2; // 4 pixels
5472
5473 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_HEND, &u16tmp);
5474 pinfo->u16HPixelEnd = u16tmp << 2; // 4 pixels
5475
5476 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_DSTR_H, &u16tmp);
5477 pinfo->u64TFDRAMAddr = u16tmp; // word
5478 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_DSTR_L, &u16tmp);
5479 pinfo->u64TFDRAMAddr <<= 16;
5480 pinfo->u64TFDRAMAddr |= u16tmp; // word
5481 pinfo->u64TFDRAMAddr = pinfo->u64TFDRAMAddr*GOP_DWIN_WordUnit;
5482
5483 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_UB_H, &u16tmp);
5484 pinfo->u64BFDRAMAddr = u16tmp; // word
5485 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_UB_L, &u16tmp);
5486 pinfo->u64BFDRAMAddr <<= 16;
5487 pinfo->u64BFDRAMAddr |= u16tmp ; // word
5488 pinfo->u64BFDRAMAddr = pinfo->u64BFDRAMAddr*GOP_DWIN_WordUnit;
5489
5490 u8MiuSel = HAL_GOP_GetDWINMIU(&pGOPDrvLocalCtx->halCtxLocal);
5491 _miu_offset_to_phy(u8MiuSel, pinfo->u64BFDRAMAddr, pinfo->u64BFDRAMAddr);
5492 _miu_offset_to_phy(u8MiuSel, pinfo->u64TFDRAMAddr, pinfo->u64TFDRAMAddr);
5493
5494 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_JMPLEN, &u16tmp);
5495 pinfo->u16DRAMJumpLen = u16tmp *GOP_DWIN_WordUnit; // word
5496 MDrv_GOP_DWIN_GetDataFmt(pGOPCtx, &(pinfo->u8fmt));
5497 }
5498
5499
5500 /******************************************************************************/
5501 /// Set DWIN capture in interlaced or progressive mode
5502 /// @param bEnable \b IN
5503 /// - # TRUE DWIN progressive mode
5504 /// - # FALSE DWIN interlaced mode
5505 /// @see MDrv_GOP_DWIN_SetMode
5506 /******************************************************************************/
MDrv_GOP_DWIN_EnableProgressive(MS_GOP_CTX_LOCAL * pGOPCtx,MS_BOOL bEnable)5507 void MDrv_GOP_DWIN_EnableProgressive(MS_GOP_CTX_LOCAL*pGOPCtx, MS_BOOL bEnable)
5508 {
5509 MS_U16 regval =0;
5510 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5511
5512 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN, ®val);
5513
5514 if(bEnable)
5515 regval |= 0x10;
5516 else
5517 regval &= ~0x10;
5518
5519 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN, regval, GOP_BIT4);
5520
5521 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, E_GOP_Dwin);
5522 }
5523
5524
5525 /******************************************************************************/
5526 /// Set DWIN data source
5527 /// @param enScan \b IN \copydoc EN_GOP_DWIN_DATA_SRC
5528 /// @see MDrv_GOP_DWIN_EnableProgressive
5529 /// @see MDrv_GOP_DWIN_SetMode
5530 /******************************************************************************/
MDrv_GOP_DWIN_SelectSource(MS_GOP_CTX_LOCAL * pGOPCtx,EN_GOP_DWIN_DATA_SRC enSrc)5531 void MDrv_GOP_DWIN_SelectSource(MS_GOP_CTX_LOCAL*pGOPCtx, EN_GOP_DWIN_DATA_SRC enSrc)
5532 {
5533 MS_U16 regval;
5534 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5535
5536 if (enSrc == GOPDWIN_DATA_SRC_SCALAR)
5537 {
5538 regval = 0x0000;
5539 }
5540 else if (enSrc == GOPDWIN_DATA_SRC_EXTRGB)
5541 {
5542 regval = 0x0200;
5543 }
5544 else
5545 {
5546 regval = 0x0300;
5547 }
5548
5549 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN, regval, 0x0300);
5550
5551 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, E_GOP_Dwin);
5552 }
5553
5554
5555 /******************************************************************************/
5556 /// Set DWIN source scan type
5557 /// @param enScan \b IN \copydoc EN_GOP_DWIN_SCAN_TYPE
5558 /******************************************************************************/
MDrv_GOP_DWIN_SelectSourceScanType(MS_GOP_CTX_LOCAL * pGOPCtx,EN_GOP_DWIN_SCAN_TYPE enScan)5559 void MDrv_GOP_DWIN_SelectSourceScanType(MS_GOP_CTX_LOCAL*pGOPCtx, EN_GOP_DWIN_SCAN_TYPE enScan)
5560 {
5561 MS_U16 regval =0;
5562 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5563
5564 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN, ®val);
5565
5566 if (enScan == GOPDWIN_SCAN_MODE_PROGRESSIVE)
5567 {
5568 regval |= 0x10;
5569 regval &= ~0x20; //off field inverse
5570 }
5571 else if (enScan == GOPDWIN_SCAN_MODE_INTERLACE)
5572 {
5573 regval &= ~0x10;
5574 regval |= 0x20; //Interlace, always turn on field inverse(Tested HDMI/DTV/AV)
5575 }
5576
5577 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN, regval, GOP_BIT4);
5578 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, E_GOP_Dwin);
5579
5580 }
5581
5582
5583 /******************************************************************************/
5584 /// Set interrupt mask of GOP DWIN.
5585 /// @param u8mask \b IN bitmask of interrupt type
5586 /// - bit7 DWIN VSYNC interrupt mask
5587 /// - bit6 Dump Window interlace Bottom Field ACK Interrupt Mask
5588 /// - bit5 Dump Window interlace Top Field ACK Interrupt Mask
5589 /// - bit4 Dump Window Progressive ACK Interrupt Mask
5590 /// - bit3:1 Reserved
5591 /// - bit0 GWIN VSYNC Interrupt Mask
5592 /// @param bEnable \b IN
5593 /// - # TRUE enable interrupts specified by u8mask
5594 /// - # FALSE disable interrupts specified by u8mask
5595 /// @see MDrv_GOP_ClearIntr
5596 /// @see MDrv_GOP_GetIntrStatus
5597 /******************************************************************************/
MDrv_GOP_DWIN_EnableIntr(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U16 u8mask,MS_BOOL bEnable)5598 void MDrv_GOP_DWIN_EnableIntr(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U16 u8mask, MS_BOOL bEnable)
5599 {
5600 MS_U16 regval =0;
5601 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5602
5603 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_INT_MASK, ®val);
5604
5605 if(bEnable)
5606 regval &= ~u8mask;
5607 else
5608 regval |= u8mask;
5609
5610 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_INT_MASK, regval, GOP_REG_LW_MASK);
5611 }
5612
5613
5614 /******************************************************************************/
5615 /// Clear Interrupt
5616 /// @param u8mask \b IN see u8mask in MDrv_GOP_EnableIntr()
5617 /// @see MDrv_GOP_GetIntrStatus
5618 /// @see MDrv_GOP_EnableIntr
5619 /******************************************************************************/
MDrv_GOP_DWIN_ClearIntr(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U16 u8mask)5620 void MDrv_GOP_DWIN_ClearIntr(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U16 u8mask)
5621 {
5622 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5623
5624 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_INT_MASK, u8mask&0xff, GOP_REG_LW_MASK);
5625 }
5626
5627 /******************************************************************************/
5628 /// Get DWin Interrupt Information
5629 /// @param pDWinIntInfo \b OUT: dwin interrup flag
5630 /******************************************************************************/
MDrv_GOP_DWIN_GetDWinIntInfo(MS_GOP_CTX_LOCAL * pGOPCtx,DRV_GOP_DWinIntInfo * pGopDWinIntInfo,MS_U32 u32Timeout)5631 GOP_Result MDrv_GOP_DWIN_GetDWinIntInfo(MS_GOP_CTX_LOCAL *pGOPCtx, DRV_GOP_DWinIntInfo *pGopDWinIntInfo, MS_U32 u32Timeout)
5632 {
5633 GFLIP_DWININT_INFO gflipDWinIntInfo;
5634
5635 gflipDWinIntInfo.u8DWinIntInfo = 0x0;
5636
5637 if(MDrv_GFLIP_GetDWinIntInfo(pGOPCtx, &gflipDWinIntInfo,u32Timeout))
5638 {
5639 pGopDWinIntInfo->u8DWinIntInfo = gflipDWinIntInfo.u8DWinIntInfo;
5640 return GOP_SUCCESS;
5641 }
5642
5643 return GOP_FAIL;
5644 }
5645
5646 /******************************************************************************/
5647 /// Set DWIN control word
5648 /// @param val \b IN value wanna write to control word
5649 /// @param mask \b IN mask of control word
5650 /******************************************************************************/
MDrv_GOP_DWIN_Set_CTRL0(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U16 val,MS_U16 mask)5651 void MDrv_GOP_DWIN_Set_CTRL0(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U16 val, MS_U16 mask)
5652 {
5653 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5654 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN, val, mask);
5655 // GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, E_GOP_Dwin);
5656 }
5657
MDrv_GOP_ConvertAPIAddr2HAL(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8Gwinid,MS_PHY * u64ApiAdr)5658 GOP_Result MDrv_GOP_ConvertAPIAddr2HAL(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8Gwinid, MS_PHY* u64ApiAdr)
5659 {
5660 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5661 return HAL_ConvertAPIAddr(&pGOPDrvLocalCtx->halCtxLocal, u8Gwinid, u64ApiAdr);
5662 }
5663
5664 /******************************************************************************/
5665 /// Set DWIN output data format
5666 /// @param fmt \b IN DWIN output format(RGB565/YUV...)
5667 /******************************************************************************/
MDrv_GOP_DWIN_SetDataFmt(MS_GOP_CTX_LOCAL * pGOPCtx,DRV_GOP_DWIN_DATA_FMT fmt)5668 void MDrv_GOP_DWIN_SetDataFmt(MS_GOP_CTX_LOCAL*pGOPCtx, DRV_GOP_DWIN_DATA_FMT fmt)
5669 {
5670 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5671
5672 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN, (MS_U16)fmt<<14, 0xC000);
5673 }
5674
5675
5676 /******************************************************************************/
5677 /// Get DWIN output data format
5678 /// @param fmt \b IN DWIN output format(RGB565/YUV...)
5679 /******************************************************************************/
MDrv_GOP_DWIN_GetDataFmt(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 * fmt)5680 void MDrv_GOP_DWIN_GetDataFmt(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 *fmt)
5681 {
5682 MS_U16 u16Temp=0;
5683 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5684 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN, &u16Temp);
5685 *fmt = (DRV_GOP_DWIN_DATA_FMT)(u16Temp>>14);
5686 }
5687
5688 /******************************************************************************/
5689 /// Set DWIN output data constant alpha value for ARGB8888
5690 /// @param u8AlphaVal \b IN: constant alpha value
5691 /******************************************************************************/
MDrv_GOP_DWIN_SetAlphaValue(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8AlphaVal)5692 void MDrv_GOP_DWIN_SetAlphaValue(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8AlphaVal)
5693 {
5694 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5695
5696 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_ALPHA, ((MS_U16)u8AlphaVal)<<8, 0xFF00);
5697 }
5698
5699 /******************************************************************************/
5700 /// Set DWIN output Alpha source
5701 /// @param source \b IN: alpha source
5702 /******************************************************************************/
MDrv_GOP_DWIN_SetAlphaSrc(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 source)5703 void MDrv_GOP_DWIN_SetAlphaSrc(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 source)
5704 {
5705 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5706
5707 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_ALPHA, source<<1, GOP_BIT1);
5708 }
5709
5710 /******************************************************************************/
5711 /// Set DWIN output Alpha inverse
5712 /// @param source \b IN: enable alpha inverse
5713 /******************************************************************************/
MDrv_GOP_DWIN_SetAlphaInverse(MS_GOP_CTX_LOCAL * pGOPCtx,MS_BOOL bEnable)5714 void MDrv_GOP_DWIN_SetAlphaInverse(MS_GOP_CTX_LOCAL*pGOPCtx, MS_BOOL bEnable)
5715 {
5716 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5717
5718 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_ALPHA, bEnable<<7, GOP_BIT7);
5719 }
5720
5721 /******************************************************************************/
5722 /// Set DWIN UVSample mode
5723 /// @param mode \b IN: UVSample mode
5724 /******************************************************************************/
MDrv_GOP_DWIN_SetUVSample(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 mode)5725 void MDrv_GOP_DWIN_SetUVSample(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 mode)
5726 {
5727 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5728
5729 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_ALPHA, mode<<2, (GOP_BIT2|GOP_BIT3));
5730 }
5731
5732 /******************************************************************************/
5733 /// Set DWIN skipframe mode
5734 /// @param mode \b IN: skipframe count
5735 /******************************************************************************/
MDrv_GOP_DWIN_SetSkipFrame(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U32 framecount)5736 void MDrv_GOP_DWIN_SetSkipFrame(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U32 framecount)
5737 {
5738 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5739
5740 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_FRAME_CTRL, framecount<<4, (GOP_BIT4|GOP_BIT5|GOP_BIT6|GOP_BIT7));
5741 }
5742
5743 /******************************************************************************/
5744 /// Set DWIN output data format
5745 /// @param fmt \b IN DWIN output format(RGB565/YUV...)
5746 /******************************************************************************/
MDrv_GOP_DWIN_EnableDither(MS_GOP_CTX_LOCAL * pGOPCtx,MS_BOOL bEnable)5747 void MDrv_GOP_DWIN_EnableDither(MS_GOP_CTX_LOCAL*pGOPCtx, MS_BOOL bEnable)
5748 {
5749 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5750
5751 if (bEnable)
5752 {
5753 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_ALPHA, (MS_U16)0x0020, 0x0020);
5754 }
5755 else
5756 {
5757 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_ALPHA, ~(MS_U16)0x0020, 0x0020);
5758 }
5759 }
5760
5761
5762 /******************************************************************************/
5763 /// Get Interrupt Status
5764 /// @return see u8mask in MDrv_GOP_EnableIntr()
5765 /// @see MDrv_GOP_EnableIntr
5766 /// @see MDrv_GOP_ClearIntr
5767 /******************************************************************************/
MDrv_GOP_DWIN_GetIntrStatus(MS_GOP_CTX_LOCAL * pGOPCtx)5768 MS_U16 MDrv_GOP_DWIN_GetIntrStatus(MS_GOP_CTX_LOCAL*pGOPCtx)
5769 {
5770 MS_U16 regval =0;
5771 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5772
5773 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_INT_MASK, ®val);
5774 return (regval>>8);
5775 }
5776 /******************************************************************************/
5777 /// Set DWIN output data format
5778 /// @param fmt \b IN DWIN output format(RGB565/YUV...)
5779 /******************************************************************************/
MDrv_GOP_DWIN_EnableR2YCSC(MS_GOP_CTX_LOCAL * pGOPCtx,MS_BOOL bEnable)5780 GOP_Result MDrv_GOP_DWIN_EnableR2YCSC(MS_GOP_CTX_LOCAL*pGOPCtx, MS_BOOL bEnable)
5781 {
5782 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5783 return HAL_GOP_DWIN_EnableR2YCSC(&pGOPDrvLocalCtx->halCtxLocal,bEnable);
5784 }
5785
5786 /******************************************************************************/
5787 /// Set DWIN output data UV SWAP
5788 /// @param ENABLE
5789 /// - # TRUE enable UV SWAP
5790 /// - # FALSE disable UV SWAP
5791 /******************************************************************************/
MDrv_GOP_DWIN_SetUVSwap(MS_GOP_CTX_LOCAL * pGOPCtx,MS_BOOL bEnable)5792 void MDrv_GOP_DWIN_SetUVSwap(MS_GOP_CTX_LOCAL*pGOPCtx, MS_BOOL bEnable)
5793 {
5794 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5795 if (bEnable)
5796 {
5797 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN, (MS_U16)GOP_BIT11, GOP_BIT11);
5798 }
5799 else
5800 {
5801 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_CTL0_EN, (~(MS_U16)GOP_BIT11), GOP_BIT11);
5802 }
5803 }
5804
5805
5806 /******************************************************************************/
5807 /// Set Scaler VOP New blending level
5808 /******************************************************************************/
MDrv_GOP_SetVOPNBL(MS_GOP_CTX_LOCAL * pGOPCtx,MS_BOOL bEnable)5809 void MDrv_GOP_SetVOPNBL(MS_GOP_CTX_LOCAL*pGOPCtx,MS_BOOL bEnable)
5810 {
5811 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5812 DRV_GOP_XC_GET_SEMPHORE();
5813
5814 if(bEnable == TRUE)
5815 {
5816 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_SC_VOPNBL, 0x20, 0x20);
5817 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_SC_OSD_CHECK_ALPHA, 0x0, 0x40);
5818 }
5819 else
5820 {
5821 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_SC_VOPNBL, 0x0, 0x20);
5822 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_SC_OSD_CHECK_ALPHA, 0x40, 0x40);
5823 }
5824 DRV_GOP_XC_RELEASE_SEMPHORE();
5825 }
5826
5827
5828 //******************************************************************************
5829 // [Doxygen]
5830 /// Get DWIN property
5831 /// @param pproperty \b OUT buffer to store DWIN property
5832 //******************************************************************************
MDrv_GOP_DWIN_GetWinProperty(MS_GOP_CTX_LOCAL * pGOPCtx,DRV_GOP_DwinProperty * pproperty)5833 void MDrv_GOP_DWIN_GetWinProperty(MS_GOP_CTX_LOCAL*pGOPCtx, DRV_GOP_DwinProperty *pproperty)
5834 {
5835 DRV_GOP_DWIN_INFO info;
5836
5837 MDrv_GOP_DWIN_GetWinInfo(pGOPCtx, &info);
5838 pproperty->u64fbaddr0 = info.u64TFDRAMAddr;
5839 pproperty->u64fbaddr1 = info.u64BFDRAMAddr;
5840
5841 pproperty->u16x = info.u16HPixelStart;
5842 pproperty->u16w = info.u16HPixelEnd - info.u16HPixelStart ;
5843 pproperty->u16y = info.u16VPixelStart;
5844 pproperty->u16h = info.u16VPixelEnd - info.u16VPixelStart ;
5845 pproperty->u16fbw = pproperty->u16w - info.u16DRAMJumpLen/2;
5846 }
5847
5848 //******************************************************************************
5849 // [Doxygen]
5850 /// Set DWIN property
5851 /// @param pproperty \b IN buffer to store DWIN property
5852 //******************************************************************************
MDrv_GOP_DWIN_SetWinProperty(MS_GOP_CTX_LOCAL * pGOPCtx,DRV_GOP_DwinProperty * pproperty)5853 void MDrv_GOP_DWIN_SetWinProperty(MS_GOP_CTX_LOCAL*pGOPCtx, DRV_GOP_DwinProperty *pproperty)
5854 {
5855 DRV_GOP_DWIN_INFO info;
5856
5857 info.u16HPixelStart = pproperty->u16x;// + PANEL_H_DE;
5858 info.u16HPixelEnd = info.u16HPixelStart + pproperty->u16w ;
5859 info.u16VPixelStart = (pproperty->u16y == 0) ? (pproperty->u16y+1) : pproperty->u16y;// + PANEL_H_DE;
5860 info.u16VPixelEnd = info.u16VPixelStart + pproperty->u16h;// - 1;
5861 info.u64TFDRAMAddr = pproperty->u64fbaddr0;
5862 info.u64BFDRAMAddr = pproperty->u64fbaddr1;
5863 info.u16DRAMJumpLen = (pproperty->u16fbw - pproperty->u16w) * 2; // 1 pixel occupy 2 bytes
5864 MDrv_GOP_DWIN_SetWinInfo(pGOPCtx, &info);
5865 }
5866
MDrv_GOP_SwitchGWIN2Addr(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 gWinId,MS_PHY u64MainAddress,MS_PHY u64SubAddress,MS_U32 u32WaitTagID,MS_U32 * pU32QueueCnt)5867 MS_BOOL MDrv_GOP_SwitchGWIN2Addr(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 gWinId, MS_PHY u64MainAddress, MS_PHY u64SubAddress, MS_U32 u32WaitTagID, MS_U32 *pU32QueueCnt)
5868 {
5869 MS_U32 u32GwinIdx=0;
5870 MS_U8 u8GOP;
5871
5872 if (FALSE== _IsGwinIdValid(pGOPCtx, gWinId))
5873 {
5874 GOP_D_ERR("\n[%s] not support gwin id:%d in this chip version",__FUNCTION__, gWinId);
5875 return false;
5876 }
5877
5878 u8GOP = MDrv_DumpGopByGwinId(pGOPCtx,gWinId);
5879 switch(u8GOP)
5880 {
5881 case E_GOP0:
5882 u32GwinIdx=gWinId;
5883 break;
5884 case E_GOP1:
5885 u32GwinIdx=gWinId-MAX_GOP0_GWIN;
5886 break;
5887 case E_GOP2:
5888 u32GwinIdx=gWinId-GOP2_Gwin0Id;
5889 break;
5890 case E_GOP3:
5891 u32GwinIdx=gWinId-GOP3_Gwin0Id;
5892 break;
5893 case E_GOP4:
5894 u32GwinIdx=gWinId-GOP4_Gwin0Id;
5895 break;
5896 case E_GOP5:
5897 u32GwinIdx=gWinId-GOP5_Gwin0Id;
5898 break;
5899 default:
5900 break;
5901 }
5902
5903 return MDrv_GFLIP_SetFlipInfo(pGOPCtx, (MS_U32)MDrv_DumpGopByGwinId(pGOPCtx,gWinId), u32GwinIdx, u64MainAddress, u64SubAddress, u32WaitTagID, pU32QueueCnt);
5904 }
5905
MDrv_GOP_GWIN_SendGwinInfo2Flip(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8win,DRV_GOP_GWIN_INFO * pinfo)5906 MS_BOOL MDrv_GOP_GWIN_SendGwinInfo2Flip(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8win, DRV_GOP_GWIN_INFO* pinfo)
5907 {
5908 MS_U8 u8GOP,u8GwinIdx=0;
5909
5910
5911 if (FALSE== _IsGwinIdValid(pGOPCtx, u8win))
5912 {
5913 GOP_D_ERR("\n[%s] not support gwin id:%d in this chip version",__FUNCTION__, u8win);
5914 return false;
5915 }
5916 u8GOP = MDrv_DumpGopByGwinId(pGOPCtx,u8win);
5917
5918 if (FALSE== _IsGopNumVaild(pGOPCtx, u8GOP))
5919 {
5920 GOP_D_ERR("\n[%s] not support gop id:%d in this chip version",__FUNCTION__, u8GOP);
5921 return GOP_FAIL;
5922 }
5923
5924 switch(u8GOP)
5925 {
5926 case E_GOP0:
5927 u8GwinIdx=u8win;
5928 break;
5929 case E_GOP1:
5930 u8GwinIdx=u8win-MAX_GOP0_GWIN;
5931 break;
5932 case E_GOP2:
5933 u8GwinIdx=u8win-GOP2_Gwin0Id;
5934 break;
5935 case E_GOP3:
5936 u8GwinIdx=u8win-GOP3_Gwin0Id;
5937 break;
5938 case E_GOP4:
5939 u8GwinIdx=u8win-GOP4_Gwin0Id;
5940 break;
5941 case E_GOP5:
5942 u8GwinIdx=u8win-GOP5_Gwin0Id;
5943 break;
5944 default:
5945 break;
5946 }
5947
5948 return MDrv_GFLIP_SetGwinInfo(pGOPCtx,u8GOP,u8GwinIdx,pinfo);
5949 }
5950
5951
MDrv_GOP_GWIN_UpdateReg(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP)5952 void MDrv_GOP_GWIN_UpdateReg(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP)
5953 {
5954 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5955 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)u8GOP);
5956 }
5957
MDrv_GOP_GWIN_UpdateRegWithSync(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_BOOL bSync)5958 void MDrv_GOP_GWIN_UpdateRegWithSync(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP, MS_BOOL bSync)
5959 {
5960 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5961 GOP_GWIN_TriggerRegWriteIn(pGOPDrvLocalCtx, (E_GOP_TYPE)u8GOP, MDrv_GOP_GWIN_IsForceWrite(pGOPCtx, u8GOP), bSync);
5962 }
5963
MDrv_GOP_TriggerRegWriteIn(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_BOOL bForceWriteIn,MS_BOOL bSync)5964 void MDrv_GOP_TriggerRegWriteIn(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP, MS_BOOL bForceWriteIn, MS_BOOL bSync)
5965 {
5966 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5967 GOP_GWIN_TriggerRegWriteIn(pGOPDrvLocalCtx, (E_GOP_TYPE)u8GOP, bForceWriteIn, bSync);
5968 }
5969
MDrv_GOP_GWIN_UpdateRegWithMaskSync(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U16 u16GopMask,MS_BOOL bSync)5970 void MDrv_GOP_GWIN_UpdateRegWithMaskSync(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U16 u16GopMask, MS_BOOL bSync)
5971 {
5972 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
5973
5974 MS_U16 u16GopAck=0;
5975 MS_U32 goptimeout = 0;
5976 MS_U16 u16GopIdx = 0;
5977 #ifdef GOP_CMDQ_ENABLE
5978 MS_BOOL bGOPMIUSelect = FALSE;
5979 MS_BOOL bGOPAFBCMIUSelect = FALSE;
5980 #endif
5981 #ifdef CONFIG_MSTAR_SRAMPD
5982 MS_U8 u8GOP=0;
5983 MS_U32 u32BankOffSet =0;
5984 #endif
5985
5986 for (u16GopIdx = 0; u16GopIdx < MAX_GOP_SUPPORT; u16GopIdx++)
5987 {
5988 if ((u16GopMask | (1<<u16GopIdx))!=0)
5989 {
5990 break;
5991 }
5992 }
5993 if (u16GopIdx == MAX_GOP_SUPPORT)
5994 {
5995 return;
5996 }
5997 #ifdef GOP_CMDQ_ENABLE
5998 for (u16GopIdx = 0; u16GopIdx < MAX_GOP_SUPPORT; u16GopIdx++)
5999 {
6000 if ((u16GopMask | (1<<u16GopIdx))!=0)
6001 {
6002 if(bMIUSelect[u16GopIdx] == TRUE)
6003 {
6004 bGOPMIUSelect = TRUE;
6005 }
6006 if(bAFBCMIUSelect[u16GopIdx] == TRUE)
6007 {
6008 bGOPAFBCMIUSelect = TRUE;
6009 }
6010 }
6011 }
6012 #endif
6013 if(pGOPDrvLocalCtx->gop_gwin_frwr)
6014 {
6015 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_BAK_SEL, GOP_VAL_FWR, GOP_REG_HW_MASK);
6016 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_BAK_SEL, 0x0000, GOP_REG_HW_MASK);
6017
6018 if(pGOPDrvLocalCtx->apiCtxLocal.pGopChipProperty->bAFBC_Merge_GOP_Trig ==FALSE)
6019 {
6020 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_TRIGGER, 0, GOP_BIT0);
6021 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_TRIGGER, GOP_BIT0, GOP_BIT0);
6022 }
6023 }
6024 else
6025 {
6026 #ifdef GOP_CMDQ_ENABLE
6027 if(bGOPMIUSelect == TRUE || bGOPAFBCMIUSelect == TRUE || bAFBCTrigger==TRUE)
6028 {
6029 HAL_GOP_CMDQ_SetGOPACKMask(&pGOPDrvLocalCtx->halCtxLocal, u16GopMask);
6030 bAFBCTrigger= FALSE;
6031 return;
6032 }
6033 else
6034 #endif
6035 {
6036 HAL_GOP_SetGOPACKMask(&pGOPDrvLocalCtx->halCtxLocal, u16GopMask);
6037 }
6038
6039 if(bSync == TRUE)
6040 {
6041 MS_U32 u32DelayTimems = 0;
6042 MS_U32 u32TimeoutCnt = 0;
6043 _GetGOPAckDelayTimeAndCnt(&u32DelayTimems, &u32TimeoutCnt);
6044 do
6045 {
6046 goptimeout++;
6047 u16GopAck = HAL_GOP_GetGOPACK(&pGOPDrvLocalCtx->halCtxLocal,u16GopIdx);
6048 if (0 != u32DelayTimems)
6049 {
6050 MsOS_DelayTask(u32DelayTimems); //delay 1 ms
6051 }
6052 } while((!u16GopAck) &&(goptimeout <= u32TimeoutCnt) );
6053
6054 // Perform force write if wr timeout.
6055 if(goptimeout > u32TimeoutCnt)
6056 {
6057 //printf("Perform fwr if wr timeout!!\n");
6058 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_BAK_SEL, GOP_VAL_FWR, GOP_REG_HW_MASK);
6059 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_BAK_SEL, 0x0000, GOP_REG_HW_MASK);
6060 }
6061 #ifdef CONFIG_MSTAR_SRAMPD
6062 for(u8GOP=0;u8GOP<MAX_GOP_SUPPORT;u8GOP++)
6063 {
6064 if((u16GopMask&(GOP_BIT0<<u8GOP))&& (pGOPCtx->pGOPCtxShared->bGOPPowerDown[u8GOP]==TRUE))
6065 {
6066 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
6067 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_MULTI_ALPHA, GOP_BIT11, GOP_BIT11);
6068 }
6069 }
6070 #endif
6071 }
6072 }
6073 }
6074
MDrv_GOP_Restore_Ctx(MS_GOP_CTX_LOCAL * pGOPCtx)6075 void MDrv_GOP_Restore_Ctx(MS_GOP_CTX_LOCAL*pGOPCtx)
6076 {
6077
6078 }
6079
MDrv_GOP_GetWordUnit(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum)6080 MS_U8 MDrv_GOP_GetWordUnit(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum)
6081 {
6082 MS_U16 u16GOP_Unit=0;
6083
6084 if(pGOPCtx->pGOPCtxShared->bPixelMode[u8GOPNum])
6085 {
6086 u16GOP_Unit = 1;
6087 }
6088 else
6089 {
6090 u16GOP_Unit = GOP_WordUnit;
6091 }
6092 return u16GOP_Unit;
6093 }
6094
MDrv_GOP_SetClock(MS_GOP_CTX_LOCAL * pGOPCtx,MS_BOOL bEnable)6095 GOP_Result MDrv_GOP_SetClock(MS_GOP_CTX_LOCAL*pGOPCtx,MS_BOOL bEnable)
6096 {
6097 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6098 return HAL_GOP_SetClock(&pGOPDrvLocalCtx->halCtxLocal,bEnable);
6099 }
MDrv_GOP_GetMIULen(MS_GOP_CTX_LOCAL * pGOPCtx)6100 MS_U32 MDrv_GOP_GetMIULen(MS_GOP_CTX_LOCAL*pGOPCtx)
6101 {
6102 return GOP_MIU0_LENGTH;
6103 }
6104
6105
MDrv_GOP_SetGOPBWStrength(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,EN_GOP_BURST_LEN eGOPBWStr)6106 void MDrv_GOP_SetGOPBWStrength(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP, EN_GOP_BURST_LEN eGOPBWStr)
6107 {
6108 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6109 MS_U32 u32BankOffSet =0;
6110
6111 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
6112
6113 switch (eGOPBWStr)
6114 {
6115 case E_GOP_BURSTLEN_LONG:
6116 if(u8GOP != 0xC)
6117 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_BW, GOP_FIFO_BURST_ALL, GOP_FIFO_BURST_MASK ); //set GOP DMA Burst length to "all"
6118 else
6119 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_BW, (GOP_BIT2|GOP_BIT1|GOP_BIT0), (GOP_BIT2|GOP_BIT1|GOP_BIT0) ); //set GOP DMA Burst length to "all"
6120 break;
6121
6122 case E_GOP_BURSTLEN_MIDDLE:
6123 if(u8GOP != 0xC)
6124 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_BW, GOP_FIFO_BURST_MIDDLE, GOP_FIFO_BURST_MASK ); //set GOP DMA Burst length to "32"
6125 else
6126 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_BW, (GOP_BIT2|GOP_BIT0), (GOP_BIT2|GOP_BIT1|GOP_BIT0) ); //set GOP DMA Burst length to "32"
6127 break;
6128
6129 case E_GOP_BURSTLEN_SHORT:
6130 if(u8GOP != 0xC)
6131 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_BW, GOP_FIFO_BURST_SHORT, GOP_FIFO_BURST_MASK); //set GOP DMA Burst length to "4"
6132 else
6133 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_BW, GOP_BIT1, (GOP_BIT2|GOP_BIT1|GOP_BIT0)); //set GOP DMA Burst length to "4"
6134 break;
6135 default:
6136 GOP_ASSERT(0);
6137 break;
6138 }
6139 }
6140
6141
MDrv_GOP_GetGOPBWStrength(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP)6142 EN_GOP_BURST_LEN MDrv_GOP_GetGOPBWStrength(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP)
6143 {
6144 MS_U16 u16RegVal =0;
6145 MS_U32 u32BankOffSet = 0;
6146
6147 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6148 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
6149
6150 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CTRL1, &u16RegVal);
6151 u16RegVal &= (GOP_BIT3|GOP_BIT2);
6152 u16RegVal >>= 2;
6153
6154 switch (u16RegVal)
6155 {
6156 case 1:
6157 case 0:
6158 return E_GOP_BURSTLEN_SHORT;
6159 case 3:
6160 return E_GOP_BURSTLEN_LONG;
6161 case 2:
6162 default:
6163 return E_GOP_BURSTLEN_MIDDLE;
6164 }
6165
6166 }
6167 #ifdef CONFIG_GOP_GWIN_MISC
MDrv_GOP_SetGOPYUV(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP)6168 void MDrv_GOP_SetGOPYUV(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP)
6169 {
6170 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6171 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_DW_ALPHA, GOP_BIT6, GOP_BIT6);
6172 }
6173 #endif
6174 //-------------------------------------------------------------------------------------------------
6175 /// Get GOP Current Hsync Pipeline Delay Offset
6176 //-------------------------------------------------------------------------------------------------
MDrv_GOP_GetCurrentHSPipe(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP)6177 MS_U16 MDrv_GOP_GetCurrentHSPipe(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP)
6178 {
6179 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6180 MS_U16 u16HSPD = 0;
6181 MS_U32 u32BankOffSet = 0;
6182
6183 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
6184
6185 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_HS_PIPE, &u16HSPD);
6186 #ifdef XC_FSC_FRC_PATCH
6187 MS_U16 XC_X_Offset = 0, XC_Y_Offset = 0;
6188 MDrv_SC_Get_GOPOffset(&XC_X_Offset, &XC_Y_Offset);
6189 u16HSPD -= XC_X_Offset;
6190 #endif
6191 return u16HSPD;
6192 }
6193
6194 //-------------------------------------------------------------------------------------------------
6195 /// Set GOP Hsync Pipeline Delay Offset
6196 //-------------------------------------------------------------------------------------------------
MDrv_GOP_GetHPipeOfst(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP_num,DRV_GOPDstType GopDst)6197 MS_U8 MDrv_GOP_GetHPipeOfst(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP_num, DRV_GOPDstType GopDst)
6198 {
6199 MS_U8 u8Gop=0, i=0;
6200 MS_U8 u8Offset=0;
6201 MS_BOOL bHDREnable=FALSE;
6202 MS_U8 u8mux_sel=0;
6203 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6204 if (!_IsGopNumVaild(pGOPCtx, u8GOP_num))
6205 {
6206 GOP_D_ERR("\n[%s] not support gop id:%d in this chip version",__FUNCTION__, u8GOP_num);
6207 return GOP_FAIL;
6208 }
6209
6210 switch(GopDst)
6211 {
6212 case E_DRV_GOP_DST_FRC:
6213 case E_DRV_GOP_DST_OP1:
6214 case E_DRV_GOP_DST_VE:
6215 break;
6216 case E_DRV_GOP_DST_BYPASS:
6217 for (i=E_GOP_FRC_MUX0; i<=E_GOP_FRC_MUX3; i++)
6218 {
6219 MDrv_GOP_GWIN_GetMux(pGOPCtx, &u8Gop, (Gop_MuxSel)i);
6220 if (u8Gop==u8GOP_num)
6221 {
6222 u8Offset = i/E_GOP_FRC_MUX2* pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_MUX_Delta;
6223 break;
6224 }
6225 }
6226 break;
6227
6228 case E_DRV_GOP_DST_OP_DUAL_RATE:
6229 for (i=E_GOP_DUALRATE_OP_MUX0; i<=E_GOP_DUALRATE_OP_MUX2; i++)
6230 {
6231 MDrv_GOP_GWIN_GetMux(pGOPCtx, &u8Gop, (Gop_MuxSel)i);
6232 if (u8Gop==u8GOP_num)
6233 {
6234 u8Offset = pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_DualRateMux_Offset[(i-E_GOP_DUALRATE_OP_MUX0)];
6235 break;
6236 }
6237 }
6238 break;
6239
6240 case E_DRV_GOP_DST_OP0:
6241 {
6242 MDrv_GOP_IsHDREnabled(pGOPCtx, &bHDREnable);
6243 if(bHDREnable==FALSE)
6244 {
6245 for (i=0; i<MAX_GOP_MUX; i++)
6246 {
6247 MDrv_GOP_GWIN_GetMux(pGOPCtx, &u8Gop, (Gop_MuxSel)i);
6248 if (u8Gop==u8GOP_num)
6249 {
6250 #ifdef GOP_ZORDER_PD_PATCH
6251 MS_U16 u16tmp =0;
6252 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_GOP_INTERNAL_ZORDER, &u16tmp);
6253 //check OSD layer
6254 if((u16tmp & 0xF) != 0)
6255 {
6256 u8Offset = pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_Zorder_Mux_Offset[i]* pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_MUX_Delta;
6257 }
6258 else
6259 {
6260 u8Offset = pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_Mux_Offset[i]* pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_MUX_Delta + GOP_ZORDER_LAYER0_MUX_OFFSET;
6261 }
6262 #else
6263 u8Offset = pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_Mux_Offset[i]* pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_MUX_Delta;
6264 #endif
6265 break;
6266 }
6267 }
6268 }
6269 else
6270 {
6271 for (i=0; i<MAX_GOP_MUX; i++)
6272 {
6273 MDrv_GOP_GWIN_GetMux(pGOPCtx, &u8mux_sel, (Gop_MuxSel)i);
6274 if (u8mux_sel==GOP_MIXER_MUX)
6275 {
6276 #ifdef GOP_ZORDER_PD_PATCH
6277 MS_U16 u16tmp =0;
6278 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_GOP_INTERNAL_ZORDER, &u16tmp);
6279 //check OSD layer
6280 if((u16tmp & 0xF) != 0)
6281 {
6282 u8Offset = pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_Zorder_Mux_Offset[i]* pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_MUX_Delta;
6283 }
6284 else
6285 {
6286 u8Offset = pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_Mux_Offset[i]* pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_MUX_Delta + GOP_ZORDER_LAYER0_MUX_OFFSET;
6287 }
6288 #else
6289 u8Offset = pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_Mux_Offset[i]* pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_MUX_Delta;
6290 #endif
6291 break;
6292 }
6293 }
6294 }
6295 break;
6296 }
6297 default:
6298 for (i=0; i<MAX_GOP_MUX; i++)
6299 {
6300 MDrv_GOP_GWIN_GetMux(pGOPCtx, &u8Gop, (Gop_MuxSel)i);
6301 if (u8Gop==u8GOP_num)
6302 {
6303 #ifdef GOP_ZORDER_PD_PATCH
6304 MS_U16 u16tmp =0;
6305 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_GOP_INTERNAL_ZORDER, &u16tmp);
6306 //check OSD layer
6307 if((u16tmp & 0xF) != 0)
6308 {
6309 u8Offset = pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_Zorder_Mux_Offset[i]* pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_MUX_Delta;
6310 }
6311 else
6312 {
6313 u8Offset = pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_Mux_Offset[i]* pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_MUX_Delta + GOP_ZORDER_LAYER0_MUX_OFFSET;
6314 }
6315 #else
6316 u8Offset = pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_Mux_Offset[i]* pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_MUX_Delta;
6317 #endif
6318 break;
6319 }
6320 }
6321 break;
6322 }
6323
6324 if ((!pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bGop2VStretch) && u8GOP_num==2)
6325 {
6326 /*if gop2 no v stretch, gop2 will have 2 level HSPD*/
6327 u8Offset+=5;
6328 }
6329 return u8Offset;
6330 }
6331
MDrv_GOP_GetDWINMIU(MS_GOP_CTX_LOCAL * pGOPCtx)6332 MS_U8 MDrv_GOP_GetDWINMIU(MS_GOP_CTX_LOCAL*pGOPCtx)
6333 {
6334 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6335 if (HAL_GOP_GetDWINMIU(&pGOPDrvLocalCtx->halCtxLocal)==MIU_1)
6336 {
6337 return MIU_1;
6338 }
6339 else
6340 {
6341 return MIU_0;
6342 }
6343 }
6344
MDrv_GOP_SetDWINMIU(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 miu)6345 GOP_Result MDrv_GOP_SetDWINMIU(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 miu)
6346 {
6347 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6348 return (GOP_Result)HAL_GOP_SetDWINMIU(&pGOPDrvLocalCtx->halCtxLocal,miu);
6349 }
6350
6351 #ifdef CONFIG_GOP_VE_CAPTURE
MDrv_GOP_VE_SetOutputTiming(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U32 u32mode)6352 GOP_Result MDrv_GOP_VE_SetOutputTiming(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U32 u32mode)
6353 {
6354 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6355
6356 if(u32mode >= E_GOP_VE_TIMEING_MAX)
6357 return GOP_INVALID_PARAMETERS;
6358
6359 HAL_GOP_VE_SetOutputTiming(&pGOPDrvLocalCtx->halCtxLocal, u32mode);
6360 return GOP_SUCCESS;
6361 }
6362 #endif
6363
MDrv_GOP_MIXER_SetOutputTiming(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U32 u32mode,GOP_DRV_MixerTiming * pTM)6364 GOP_Result MDrv_GOP_MIXER_SetOutputTiming(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U32 u32mode, GOP_DRV_MixerTiming *pTM)
6365 {
6366 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6367
6368 if(u32mode >= E_GOP_MIXER_TIMEING_MAX)
6369 return GOP_INVALID_PARAMETERS;
6370
6371 HAL_GOP_MIXER_SetOutputTiming(&pGOPDrvLocalCtx->halCtxLocal, u32mode, pTM);
6372 return GOP_SUCCESS;
6373 }
6374
MDrv_GOP_MIXER_EnableVfilter(MS_GOP_CTX_LOCAL * pGOPCtx,MS_BOOL bEnable)6375 GOP_Result MDrv_GOP_MIXER_EnableVfilter(MS_GOP_CTX_LOCAL*pGOPCtx, MS_BOOL bEnable)
6376 {
6377 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6378 HAL_GOP_MIXER_EnableVfilter(&pGOPDrvLocalCtx->halCtxLocal, bEnable);
6379 return GOP_SUCCESS;
6380 }
6381
MDrv_GOP_RestoreFromVsyncLimitation(MS_GOP_CTX_LOCAL * pGOPCtx)6382 MS_BOOL MDrv_GOP_RestoreFromVsyncLimitation(MS_GOP_CTX_LOCAL *pGOPCtx)
6383 {
6384 return MDrv_GFLIP_RestoreFromVsyncLimitation(pGOPCtx);
6385 }
6386
MDrv_GOP_SelGwinIdByGOP(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_U8 u8GWinIdx)6387 MS_U8 MDrv_GOP_SelGwinIdByGOP(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP, MS_U8 u8GWinIdx)
6388 {
6389 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6390
6391 return HAL_GOP_SelGwinIdByGOP(&pGOPDrvLocalCtx->halCtxLocal, u8GOP, u8GWinIdx);
6392 }
6393
MDrv_GOP_SetGOPBrightness(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_U16 u16BriVal,MS_BOOL bMSB)6394 GOP_Result MDrv_GOP_SetGOPBrightness(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP, MS_U16 u16BriVal,MS_BOOL bMSB)
6395 {
6396 MS_U32 u32BankOffSet =0;
6397 MS_U16 u16RegVal =0;
6398 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6399
6400 u16RegVal = (bMSB<<8) | u16BriVal;
6401
6402 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
6403
6404 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_BRI, u16RegVal, 0x1FF );
6405
6406 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)u8GOP);
6407
6408 return GOP_SUCCESS;
6409 }
6410 #ifdef CONFIG_GOP_GWIN_MISC
MDrv_GOP_EnableLBCouple(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_BOOL bEnable)6411 GOP_Result MDrv_GOP_EnableLBCouple(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP, MS_BOOL bEnable)
6412 {
6413 MS_U32 u32BankOffSet =0;
6414 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6415
6416 if (FALSE== _IsGopNumVaild(pGOPCtx, u8GOP))
6417 {
6418 GOP_D_ERR("\n[%s] not support gop%d in this chip version!!", __FUNCTION__, u8GOP);
6419 return GOP_FAIL;
6420 }
6421
6422 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
6423
6424 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_NEW_BW, bEnable << 15, GOP_BIT15);
6425
6426 return GOP_SUCCESS;
6427 }
6428 #endif
MDrv_GOP_GetGOPBrightness(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_U16 * u16BriVal,MS_BOOL * bMSB)6429 GOP_Result MDrv_GOP_GetGOPBrightness(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP,MS_U16* u16BriVal,MS_BOOL* bMSB)
6430 {
6431 MS_U32 u32BankOffSet =0;
6432 MS_U16 u16RegVal =0;
6433 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6434
6435 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
6436
6437 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_BRI, &u16RegVal);
6438
6439 *bMSB = (MS_BOOL)((u16RegVal&0x100)>>8);
6440 *u16BriVal = u16RegVal & 0xFF;
6441
6442 return GOP_SUCCESS;
6443 }
MDrv_GOP_GWIN_EnableTileMode(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8win,MS_BOOL bEnable,E_GOP_TILE_DATA_TYPE tilemode)6444 GOP_Result MDrv_GOP_GWIN_EnableTileMode(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8win, MS_BOOL bEnable, E_GOP_TILE_DATA_TYPE tilemode)
6445 {
6446 MS_U8 u8GOP;
6447 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6448 MS_U32 u32BankOffSet = 0;
6449
6450 if (pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bhastilemode)// Currently, T8,Janus support this function
6451 {
6452 if (FALSE== _IsGwinIdValid(pGOPCtx, u8win))
6453 {
6454 GOP_D_ERR("\n[%s] not support gwin id:%d in this chip version",__FUNCTION__, u8win);
6455 return GOP_FAIL;
6456 }
6457 GOP_D_INFO("[%s](gId=%d) == %d\n",__FUNCTION__, u8win, bEnable);
6458
6459 u8GOP = MDrv_DumpGopByGwinId(pGOPCtx,u8win);
6460 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
6461 /*
6462 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_DRAM_FADE(u8win), \
6463 tilemode?GOP_BIT7:~GOP_BIT7, GOP_BIT7);
6464
6465 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_GWIN0_CTRL(u8win), \
6466 bEnable?GOP_BIT15:~GOP_BIT15, GOP_BIT15);
6467 */
6468
6469 u8GOP = MDrv_DumpGopByGwinId(pGOPCtx,u8win);
6470 if(u8GOP > MAX_GOP_SUPPORT)
6471 {
6472 GOP_D_ERR("\n[%s] not support gop num:%d in this chip version",__FUNCTION__, u8GOP);
6473 return GOP_FAIL;
6474 }
6475
6476 if(tilemode == E_DRV_GOP_TILE_DATA_32BPP)
6477 {
6478 pGOPDrvLocalCtx->b32BPPTileMode[u8GOP] = bEnable;
6479 if(bEnable)
6480 pGOPDrvLocalCtx->b16BPPTileMode[u8GOP] = FALSE;
6481 }
6482 else
6483 {
6484 pGOPDrvLocalCtx->b16BPPTileMode[u8GOP] = bEnable;
6485 if(bEnable)
6486 pGOPDrvLocalCtx->b32BPPTileMode[u8GOP] =FALSE;
6487 }
6488
6489 HAL_GOP_GWIN_EnableTileMode(&pGOPDrvLocalCtx->halCtxLocal, u8win, bEnable, tilemode);
6490 //GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)MDrv_DumpGopByGwinId(pGOPCtx,u8win));
6491
6492 return GOP_SUCCESS;
6493 }
6494 else
6495 {
6496 return GOP_FUN_NOT_SUPPORTED;
6497 }
6498
6499 }
6500
MDrv_GOP_GWIN_Load_HStretchModeTable(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,DRV_GOPStrchHMode HStrchMode)6501 void MDrv_GOP_GWIN_Load_HStretchModeTable(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP,DRV_GOPStrchHMode HStrchMode)
6502 {
6503 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6504
6505 switch(HStrchMode)
6506 {
6507 case E_DRV_GOP_HSTRCH_6TAPE:
6508 case E_DRV_GOP_HSTRCH_6TAPE_LINEAR:
6509 case E_DRV_GOP_HSTRCH_6TAPE_NEAREST:
6510 case E_DRV_GOP_HSTRCH_6TAPE_GAIN0:
6511 case E_DRV_GOP_HSTRCH_6TAPE_GAIN1:
6512 case E_DRV_GOP_HSTRCH_6TAPE_GAIN2:
6513 case E_DRV_GOP_HSTRCH_6TAPE_GAIN3:
6514 case E_DRV_GOP_HSTRCH_6TAPE_GAIN4:
6515 case E_DRV_GOP_HSTRCH_6TAPE_GAIN5:
6516 case E_DRV_GOP_HSTRCH_2TAPE:
6517 _GOP_Load_Stretch_Mode_Table(pGOPDrvLocalCtx,u8GOP,_GopHStretchTable[HStrchMode]);
6518 break;
6519 case E_DRV_GOP_HSTRCH_DUPLICATE:
6520 case E_DRV_GOP_HSTRCH_4TAPE:
6521 default:
6522 break;
6523
6524 }
6525
6526
6527 }
6528
MDrv_GOP_GWIN_Load_VStretchModeTable(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,DRV_GOPStrchVMode VStrchMode)6529 void MDrv_GOP_GWIN_Load_VStretchModeTable(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, DRV_GOPStrchVMode VStrchMode)
6530 {
6531 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6532
6533 switch(VStrchMode)
6534 {
6535 case E_DRV_GOP_VSTRCH_LINEAR:
6536 _GOP_Load_VStretch_Mode_Table(pGOPDrvLocalCtx,u8GOP,_GopVStretchTable[VStrchMode]);
6537 break;
6538 case E_DRV_GOP_VSTRCH_LINEAR_GAIN0:
6539 case E_DRV_GOP_VSTRCH_LINEAR_GAIN1:
6540 _GOP_Load_VStretch_Mode_Table(pGOPDrvLocalCtx,u8GOP,_GopVStretchTable[VStrchMode]);
6541 break;
6542 case E_DRV_GOP_VSTRCH_DUPLICATE:
6543 case E_DRV_GOP_VSTRCH_NEAREST:
6544 break;
6545 default:
6546 break;
6547
6548 }
6549 }
MDrv_GOP_Set_PINPON(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,MS_BOOL bEn,E_DRV_GOP_PINPON_MODE pinpon_mode)6550 GOP_Result MDrv_GOP_Set_PINPON(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum,MS_BOOL bEn, E_DRV_GOP_PINPON_MODE pinpon_mode)
6551 {
6552 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6553
6554 HAL_GOP_Set_PINPON(&pGOPDrvLocalCtx->halCtxLocal, u8GOPNum, bEn, pinpon_mode);
6555
6556 return GOP_SUCCESS;
6557 }
6558
MDrv_GOP_Set_BufferPINPON(MS_GOP_CTX_LOCAL * pGOPCtx,MS_PHY u64fbaddr0,MS_PHY u64fbaddr1)6559 GOP_Result MDrv_GOP_Set_BufferPINPON(MS_GOP_CTX_LOCAL*pGOPCtx,MS_PHY u64fbaddr0,MS_PHY u64fbaddr1)
6560 {
6561 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6562 MS_PHY u64tmp;
6563 MS_U8 u8MiuSel;
6564
6565 //GOP HW just read the relative offset of each MIU
6566 _phy_to_miu_offset(u8MiuSel, u64tmp, u64fbaddr0);
6567 u64tmp /= GOP_WordUnit; // word(8-byte)
6568 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal,GOP_DW_UB_L, u64tmp);
6569
6570 //GOP HW just read the relative offset of each MIU
6571 _phy_to_miu_offset(u8MiuSel, u64tmp, u64fbaddr1);
6572 u64tmp /= GOP_WordUnit; // word(8-byte)
6573 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal,GOP_DW_UB_H, u64tmp);
6574 return GOP_SUCCESS;
6575
6576 }
6577
MDrv_GOP_Set_16bBus(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,MS_BOOL bEn)6578 GOP_Result MDrv_GOP_Set_16bBus(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum,MS_BOOL bEn)
6579 {
6580 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6581 MS_U32 u32BankOffSet =0;
6582
6583 _GetBnkOfstByGop(u8GOPNum, &u32BankOffSet);
6584
6585 //pGOPDrvLocalCtx->b16BPPTileMode = bEn;
6586
6587 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CTRL1, bEn<<4, GOP_BIT4);
6588 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_OLDADDR, bEn<<3, GOP_BIT3);
6589
6590 return GOP_SUCCESS;
6591
6592 }
6593
MDrv_GOP_GWIN_SetGPUTileMode(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8win,EN_DRV_GOP_GPU_TILE_MODE mode)6594 GOP_Result MDrv_GOP_GWIN_SetGPUTileMode(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8win, EN_DRV_GOP_GPU_TILE_MODE mode)
6595 {
6596 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6597
6598 HAL_GOP_GWIN_SetGPUTileMode(&pGOPDrvLocalCtx->halCtxLocal, u8win, (EN_DRV_GOP_GPU_TILE_MODE)mode);
6599 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)MDrv_DumpGopByGwinId(pGOPCtx,u8win));
6600 return GOP_SUCCESS;
6601 }
6602
6603 #ifdef CONFIG_GOP_YUV_SWAP
6604
MDrv_GOP_SetUVSwap(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,MS_BOOL bEn)6605 GOP_Result MDrv_GOP_SetUVSwap(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum,MS_BOOL bEn)
6606 {
6607 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6608
6609 HAL_GOP_SetUVSwap(&pGOPDrvLocalCtx->halCtxLocal,u8GOPNum,bEn);
6610
6611 return GOP_SUCCESS;
6612 }
6613
MDrv_GOP_SetYCSwap(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,MS_BOOL bEn)6614 GOP_Result MDrv_GOP_SetYCSwap(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum,MS_BOOL bEn)
6615 {
6616 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6617
6618 HAL_GOP_SetYCSwap(&pGOPDrvLocalCtx->halCtxLocal,u8GOPNum,bEn);
6619
6620 return GOP_SUCCESS;
6621 }
6622 #endif
6623 //-------------------------------------------------------------------------------------------------
6624 /// Set GWIN New Alpha Mode
6625 /// @param u8Wid \b IN: GWin ID
6626 /// @param bTrue \b IN: TRUE: enable new alpha mode, FALSE: disable new alpha mode
6627 //-------------------------------------------------------------------------------------------------
6628 #ifdef CONFIG_GOP_GWIN_MISC
MDrv_GOP_GWIN_GetGwinNewAlphaModeEnable(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8win,MS_BOOL * pEnable)6629 GOP_Result MDrv_GOP_GWIN_GetGwinNewAlphaModeEnable(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8win, MS_BOOL* pEnable)
6630 {
6631 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6632
6633 HAL_GOP_GWIN_GetNewAlphaMode(&pGOPDrvLocalCtx->halCtxLocal, u8win, pEnable);
6634 return GOP_SUCCESS;
6635 }
6636
MDrv_GOP_GWIN_SetNewAlphaMode(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8win,MS_BOOL bEnable)6637 GOP_Result MDrv_GOP_GWIN_SetNewAlphaMode(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8win, MS_BOOL bEnable)
6638 {
6639 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6640
6641 HAL_GOP_GWIN_SetNewAlphaMode(&pGOPDrvLocalCtx->halCtxLocal, u8win, bEnable);
6642
6643 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)MDrv_DumpGopByGwinId(pGOPCtx,u8win));
6644
6645 return GOP_SUCCESS;
6646 }
6647 #endif
6648
6649 #ifdef CONFIG_GOP_CONTRAST
MDrv_GOP_SetGOPContrast(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_U16 u16YContrast,MS_U16 u16UContrast,MS_U16 u16VContrast)6650 GOP_Result MDrv_GOP_SetGOPContrast(MS_GOP_CTX_LOCAL* pGOPCtx, MS_U8 u8GOP
6651 , MS_U16 u16YContrast, MS_U16 u16UContrast, MS_U16 u16VContrast )
6652 {
6653 MS_U32 u32BankOffSet =0;
6654 MS_U16 u16YMask = 0x7E00;
6655 MS_U16 u16UMask = 0x003F;
6656 MS_U16 u16VMask = 0x3F00;
6657 GOP_CTX_DRV_LOCAL* pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6658
6659 if ( ((u16YContrast) > 0x3F) | ((u16UContrast) > 0x3F) | ((u16VContrast) > 0x3F) ) // Y, U, V = 6, 6, 6 bits each
6660 {
6661 return GOP_FAIL ;
6662 }
6663
6664 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
6665 // if gain = 1, we set 16, which is << (#+4)
6666 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_BRI, (u16YContrast) << 9, u16YMask);
6667 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CON
6668 , (u16UContrast)|((u16VContrast) << 8), u16UMask|u16VMask);
6669 //HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CON, u16VContrast << (8+4), u16VMask);
6670
6671 GOP_GWIN_UpdateReg(pGOPDrvLocalCtx, (E_GOP_TYPE)u8GOP);
6672
6673 return GOP_SUCCESS;
6674 }
6675
MDrv_GOP_GetGOPContrast(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_U32 * u32YContrast,MS_U32 * u32UContrast,MS_U32 * u32VContrast)6676 GOP_Result MDrv_GOP_GetGOPContrast(MS_GOP_CTX_LOCAL* pGOPCtx, MS_U8 u8GOP
6677 , MS_U32* u32YContrast, MS_U32* u32UContrast, MS_U32* u32VContrast )
6678 {
6679 MS_U32 u32BankOffSet =0;
6680 MS_U16 u16RegVal =0;
6681 MS_U16 u16YMask = 0x7E00; // by spec
6682 MS_U16 u16UMask = 0x003F; // by spec
6683 MS_U16 u16VMask = 0x3F00; // by spec
6684 GOP_CTX_DRV_LOCAL* pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6685
6686 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
6687 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_BRI, &u16RegVal);
6688 *u32YContrast= (u16RegVal & u16YMask) >> 9; // y starts at bit 9
6689
6690 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CON, &u16RegVal);
6691 *u32UContrast= (u16RegVal & u16UMask); // u starts at bit 0
6692
6693 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_CON, &u16RegVal);
6694 *u32VContrast= (u16RegVal & u16VMask) >> 8; // u starts at bit 8
6695
6696 return GOP_SUCCESS;
6697 }
6698 #endif
6699 #ifdef CONFIG_GOP_VE_CAPTURE
MDrv_GOP_GetVECaptureState(MS_GOP_CTX_LOCAL * pGOPCtx,PMS_DRVGOP_VECAPTURESTATE pstVECapState)6700 MS_BOOL MDrv_GOP_GetVECaptureState(MS_GOP_CTX_LOCAL *pGOPCtx, PMS_DRVGOP_VECAPTURESTATE pstVECapState)
6701 {
6702 return MDrv_GFLIP_GetVECaptureState(pGOPCtx, pstVECapState);
6703 }
6704
MDrv_GOP_VECaptureWaitOnFrame(MS_GOP_CTX_LOCAL * pGOPCtx,PMS_DRVGOP_VECAPTURESTATE pstVECapState)6705 MS_BOOL MDrv_GOP_VECaptureWaitOnFrame(MS_GOP_CTX_LOCAL *pGOPCtx, PMS_DRVGOP_VECAPTURESTATE pstVECapState)
6706 {
6707 return MDrv_GFLIP_VECaptureWaitOnFrame(pGOPCtx, pstVECapState);
6708 }
6709
MDrv_GOP_EnaVECapture(MS_GOP_CTX_LOCAL * pGOPCtx,PMS_DRVGOP_VECAPTURESTATE pstVECapState)6710 MS_BOOL MDrv_GOP_EnaVECapture(MS_GOP_CTX_LOCAL *pGOPCtx, PMS_DRVGOP_VECAPTURESTATE pstVECapState)
6711 {
6712 return MDrv_GFLIP_EnaVECapture(pGOPCtx, pstVECapState);
6713 }
6714 #endif
MDrv_GOP_Set3D_LR_FrameExchange(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP)6715 GOP_Result MDrv_GOP_Set3D_LR_FrameExchange(MS_GOP_CTX_LOCAL* pGOPCtx, MS_U8 u8GOP)
6716 {
6717 MS_U32 u32BankOffSet =0, u32MainBase=0, u32SubBase=0;
6718 MS_U16 u16Tmp=0;
6719 MS_U8 u8Win = 0, u8MaxWinNum=0;
6720 GOP_CTX_DRV_LOCAL* pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6721 if(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->enGOP3DType == E_DRV_3D_NONE)
6722 {
6723 return GOP_FUN_NOT_SUPPORTED;
6724 }
6725
6726 if(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->enGOP3DType != E_DRV_3D_NONE)
6727 {
6728 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
6729 u8MaxWinNum = HAL_GOP_GetMaxGwinNumByGOP(&pGOPDrvLocalCtx->halCtxLocal, u8GOP);
6730
6731 for(u8Win=0; u8Win<u8MaxWinNum; u8Win++)
6732 {
6733 //Read back main/sub base registers
6734 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_DRAM_RBLK_L(u8Win), (MS_U16*)&u16Tmp);
6735 u32MainBase = ((MS_U32)u16Tmp) & GOP_REG_WORD_MASK;
6736 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_DRAM_RBLK_H(u8Win), (MS_U16*)&u16Tmp);
6737 u32MainBase += (((MS_U32)u16Tmp) << 16);
6738
6739 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_3DOSD_SUB_RBLK_L(u8Win), (MS_U16*)&u16Tmp);
6740 u32SubBase = ((MS_U32)u16Tmp) & GOP_REG_WORD_MASK;
6741 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_3DOSD_SUB_RBLK_H(u8Win), (MS_U16*)&u16Tmp);
6742 u32SubBase += (((MS_U32)u16Tmp) << 16);
6743 //Swap main/sub base register value
6744 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_3DOSD_SUB_RBLK_L(u8Win), u32MainBase);
6745 HAL_GOP_Write32Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_DRAM_RBLK_L(u8Win), u32SubBase);
6746 }
6747 }
6748 pGOPCtx->pGOPCtxShared->bGOP3DLRSwitch[u8GOP] = !pGOPCtx->pGOPCtxShared->bGOP3DLRSwitch[u8GOP]; //Invert L/R swap flag
6749 return GOP_SUCCESS;
6750 }
6751
MDrv_GOP_Set3DOSD_Mode(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,EN_DRV_GOP_3D_MODE en3DOSDMode)6752 GOP_Result MDrv_GOP_Set3DOSD_Mode(MS_GOP_CTX_LOCAL* pGOPCtx, MS_U8 u8GOP ,EN_DRV_GOP_3D_MODE en3DOSDMode)
6753 {
6754 MS_U32 u32BankOffSet = 0;
6755 MS_U16 u16GOPScalingDownEnable;
6756 GOP_Result enGOPRet = GOP_SUCCESS;
6757
6758 GOP_CTX_DRV_LOCAL* pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6759 if(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->enGOP3DType == E_DRV_3D_NONE)
6760 {
6761 return GOP_FUN_NOT_SUPPORTED;
6762 }
6763
6764 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
6765
6766 pGOPCtx->pGOPCtxShared->GOP_StereoMode[u8GOP] = en3DOSDMode;
6767
6768 // 4K120Hz only support frame alternative / line alternative;
6769 switch(en3DOSDMode)
6770 {
6771 case E_DRV_GOP_3D_SWITH_BY_FRAME:
6772 //Frame by Frame output, default enable GOP 3D invert to match with scaler
6773 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_YUV_SWAP, (((MS_U16)en3DOSDMode)<<1)|GOP_BIT0, GOP_BIT3|GOP_BIT2|GOP_BIT1|GOP_BIT0);
6774 HAL_GOP_EnableTwoLineBufferMode(&pGOPDrvLocalCtx->halCtxLocal, u8GOP, TRUE);
6775 break;
6776 case E_DRV_GOP_3D_LINE_FRAMEPACKING:
6777 if (pGOPDrvLocalCtx->halCtxLocal.pHALShared->GOP_Dst[u8GOP] != E_DRV_GOP_DST_OP_DUAL_RATE)
6778 {
6779 en3DOSDMode = E_DRV_GOP_3D_TOP_BOTTOM;
6780 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_YUV_SWAP, ((MS_U16)en3DOSDMode)<<1, GOP_BIT3|GOP_BIT2|GOP_BIT1);
6781 HAL_GOP_EnableTwoLineBufferMode(&pGOPDrvLocalCtx->halCtxLocal, u8GOP, TRUE);
6782 }
6783 else
6784 {
6785 enGOPRet = GOP_FAIL;
6786 }
6787 break;
6788 case E_DRV_GOP_3D_SIDE_BY_SYDE:
6789 if (pGOPDrvLocalCtx->halCtxLocal.pHALShared->GOP_Dst[u8GOP] != E_DRV_GOP_DST_OP_DUAL_RATE)
6790 {
6791 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_SCALING_CFG, &u16GOPScalingDownEnable);
6792 if( u16GOPScalingDownEnable & (GOP_BIT0|GOP_BIT4))
6793 {
6794 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_SCALING_CFG, GOP_BIT5 ,GOP_BIT5);
6795 }
6796 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_YUV_SWAP, ((MS_U16)en3DOSDMode)<<1, GOP_BIT3|GOP_BIT2|GOP_BIT1);
6797 HAL_GOP_EnableTwoLineBufferMode(&pGOPDrvLocalCtx->halCtxLocal, u8GOP, FALSE);
6798 }
6799 else
6800 {
6801 enGOPRet = GOP_FAIL;
6802 }
6803 break;
6804 case E_DRV_GOP_3D_LINE_ALTERNATIVE:
6805 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_SCALING_CFG, &u16GOPScalingDownEnable);
6806 if( u16GOPScalingDownEnable & (GOP_BIT0|GOP_BIT4))
6807 {
6808 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_SCALING_CFG, GOP_BIT5 ,GOP_BIT5);
6809 }
6810 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_YUV_SWAP, ((MS_U16)en3DOSDMode)<<1, GOP_BIT3|GOP_BIT2|GOP_BIT1);
6811 HAL_GOP_EnableTwoLineBufferMode(&pGOPDrvLocalCtx->halCtxLocal, u8GOP, FALSE);
6812 break;
6813 case E_DRV_GOP_3D_TOP_BOTTOM:
6814 if (pGOPDrvLocalCtx->halCtxLocal.pHALShared->GOP_Dst[u8GOP] != E_DRV_GOP_DST_OP_DUAL_RATE)
6815 {
6816 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_YUV_SWAP, ((MS_U16)en3DOSDMode)<<1, GOP_BIT3|GOP_BIT2|GOP_BIT1);
6817 HAL_GOP_EnableTwoLineBufferMode(&pGOPDrvLocalCtx->halCtxLocal, u8GOP, TRUE);
6818 }
6819 else
6820 {
6821 enGOPRet = GOP_FAIL;
6822 }
6823 break;
6824 case E_DRV_GOP_3D_DISABLE:
6825 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_YUV_SWAP, ((MS_U16)en3DOSDMode)<<1, GOP_BIT3|GOP_BIT2|GOP_BIT1);
6826 HAL_GOP_EnableTwoLineBufferMode(&pGOPDrvLocalCtx->halCtxLocal, u8GOP, TRUE);
6827 break;
6828 default:
6829 GOP_D_ERR("\n[%s] not support 3D mode:%d in this chip version",__FUNCTION__, en3DOSDMode);
6830 enGOPRet = GOP_INVALID_PARAMETERS;
6831 break;
6832 }
6833
6834 return enGOPRet;
6835 }
6836
MDrv_GOP_Set3DOSD_Sub(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8Gwin,MS_PHY u64SubAddr)6837 GOP_Result MDrv_GOP_Set3DOSD_Sub(MS_GOP_CTX_LOCAL* pGOPCtx, MS_U8 u8Gwin, MS_PHY u64SubAddr)
6838 {
6839 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6840 MS_U8 u8GOP;
6841 MS_U8 u8MiuSel=0xFF;
6842 UNUSED(u8MiuSel);
6843
6844 u8GOP = MDrv_DumpGopByGwinId(pGOPCtx,u8Gwin);
6845 //GOP HW just read the relative offset of each MIU
6846 _phy_to_miu_offset(u8MiuSel, u64SubAddr, u64SubAddr);
6847 HAL_GOP_GWiN_Set3DOSD_Sub(&pGOPDrvLocalCtx->halCtxLocal,u8GOP ,u8Gwin,u64SubAddr);
6848
6849 return GOP_SUCCESS;
6850
6851 }
6852
6853
MDrv_GOP_GWIN_ClearFlipQueue(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8win)6854 GOP_Result MDrv_GOP_GWIN_ClearFlipQueue(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8win)
6855 {
6856
6857 MS_U32 u32GwinIdx=0;
6858 MS_U8 u8GOP;
6859
6860 if (FALSE== _IsGwinIdValid(pGOPCtx, u8win))
6861 {
6862 GOP_D_ERR("\n[%s] not support gwin id:%d in this chip version",__FUNCTION__, u8win);
6863 return GOP_FAIL;
6864 }
6865
6866 u8GOP = MDrv_DumpGopByGwinId(pGOPCtx,u8win);
6867
6868 if (FALSE== _IsGopNumVaild(pGOPCtx, u8GOP))
6869 {
6870 GOP_D_ERR("\n[%s] not support GOPNum:%d in this chip version",__FUNCTION__, u8GOP);
6871 return GOP_FAIL;
6872 }
6873
6874 switch(u8GOP)
6875 {
6876 case E_GOP0:
6877 u32GwinIdx=u8win;
6878 break;
6879 case E_GOP1:
6880 u32GwinIdx=u8win-MAX_GOP0_GWIN;
6881 break;
6882 case E_GOP2:
6883 u32GwinIdx=u8win-GOP2_Gwin0Id;
6884 break;
6885 case E_GOP3:
6886 u32GwinIdx=u8win-GOP3_Gwin0Id;
6887 break;
6888 case E_GOP4:
6889 u32GwinIdx=u8win-GOP4_Gwin0Id;
6890 break;
6891 case E_GOP5:
6892 u32GwinIdx=u8win-GOP5_Gwin0Id;
6893 break;
6894 default:
6895 break;
6896 }
6897 MDrv_GFLIP_ClearFlipQueue(pGOPCtx,u8GOP,u32GwinIdx);
6898 return GOP_SUCCESS;
6899 }
6900
6901 /********************************************************************************/
6902 /// To Mask 1st Hsync
6903 /// @param bMask \b IN
6904 /// - # TRUE Mask first Hsync when field is odd
6905 /// - # FALSE UnMask first Hsync when field is odd
6906 /// @internal please verify the register document and the code
6907 /********************************************************************************/
MDrv_GOP_Mask_First_Hsync(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_BOOL bMask)6908 void MDrv_GOP_Mask_First_Hsync(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8GOP, MS_BOOL bMask )
6909 {
6910 MS_U16 regval;
6911 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6912 MS_U32 u32BankOffSet = 0;
6913
6914 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
6915 if(bMask)
6916 regval = 0x4;
6917 else
6918 regval = 0;
6919
6920 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_BOT_HS, regval, 0x4);
6921 }
6922
MDrv_GOP_GetBPP(MS_GOP_CTX_LOCAL * pGOPCtx,DRV_GOPColorType fbFmt)6923 MS_U16 MDrv_GOP_GetBPP(MS_GOP_CTX_LOCAL*pGOPCtx, DRV_GOPColorType fbFmt)
6924 {
6925 return HAL_GOP_GetBPP(&(((GOP_CTX_DRV_LOCAL*)pGOPCtx)->halCtxLocal), fbFmt);
6926 }
6927
Mdrv_GOP_GetDWinCapability(MS_GOP_CTX_LOCAL * pGOPCtx,PDRV_GOP_DWIN_CAP pDwinCap)6928 void Mdrv_GOP_GetDWinCapability(MS_GOP_CTX_LOCAL*pGOPCtx, PDRV_GOP_DWIN_CAP pDwinCap)
6929 {
6930 pDwinCap->bSupportWindowDECapture = DWIN_SUPPORT_WINDOWDE_CAPTURE;
6931 pDwinCap->bSupportOSDCapture = DWIN_SUPPORT_OSD_CAPTURE;
6932 }
6933
6934 //Return an array of mux, sorted by mux priority, the first is the highest
Mdrv_GOP_GetMuxPriority(MS_GOP_CTX_LOCAL * pGOPCtx,PST_DRV_GOP_MUX_CAP_EX pstMuxPriEx)6935 MS_BOOL Mdrv_GOP_GetMuxPriority(MS_GOP_CTX_LOCAL*pGOPCtx, PST_DRV_GOP_MUX_CAP_EX pstMuxPriEx)
6936 {
6937 MS_U8 i=0,j=0;
6938 MS_U16 u16MuxTemp[2]={0,0};
6939 GOP_CTX_DRV_LOCAL *pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
6940 MS_U16 au16Mux[MAX_GOP_MUX_OPNum][2] ={};
6941
6942 if( (pGOPDrvLocalCtx == NULL)
6943 ||(pstMuxPriEx == NULL))
6944 {
6945 return FALSE;
6946 }
6947
6948 //u8Mux[x][0]=Mux number, u8Mux[x][1]=Mux's offset
6949 for(i=0; i<MAX_GOP_MUX_OPNum-1; i++)
6950 {
6951 #ifdef GOP_ZORDER_PD_PATCH
6952 MS_U16 u16tmp =0;
6953 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_4G_GOP_INTERNAL_ZORDER, &u16tmp);
6954 //check OSD layer
6955 if((u16tmp & 0xF) != 0)
6956 {
6957 au16Mux[i][0]= i;
6958 au16Mux[i][1]= pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_Zorder_Mux_Offset[i]* pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_MUX_Delta;
6959 }
6960 else
6961 {
6962 au16Mux[i][0]= i;
6963 au16Mux[i][1]= pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_Mux_Offset[i] * pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_MUX_Delta + GOP_ZORDER_LAYER0_MUX_OFFSET;
6964 }
6965 #else
6966 au16Mux[i][0]= i;
6967 au16Mux[i][1]= pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_Mux_Offset[i] * pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->GOP_MUX_Delta;
6968 #endif
6969 }
6970
6971 //Use Mux offset to sort array of u8Mux[][]
6972 for(i=0; i<MAX_MUX_NUMBER_SUPPORT-1; i++)
6973 {
6974 for(j=0; j<MAX_MUX_NUMBER_SUPPORT-i-1; j++)
6975 {
6976 //Sort Descending by GOP_Mux Offset
6977 if(au16Mux[j][1] < au16Mux[j+1][1])
6978 {
6979 memcpy(u16MuxTemp, au16Mux[j+1], sizeof(au16Mux[0]));
6980 memcpy(au16Mux[j+1], au16Mux[j], sizeof(au16Mux[0]));
6981 memcpy(au16Mux[j], u16MuxTemp, sizeof(au16Mux[0]));
6982 }
6983 }
6984 }
6985
6986 if(pstMuxPriEx->u8MuxNumber > MAX_MUX_NUMBER_SUPPORT)
6987 {
6988 pstMuxPriEx->u8MuxNumber = MAX_MUX_NUMBER_SUPPORT;
6989 }
6990
6991 for(i=0; i<pstMuxPriEx->u8MuxNumber; i++)
6992 {
6993 if(i>=MAX_GOP_INFO_COUNT)
6994 return FALSE;
6995 pstMuxPriEx->pu8MuxProrityArray[i] = (MS_U8)(au16Mux[i][0]); //Store sorted mux number
6996 }
6997 return TRUE;
6998 }
6999 #ifdef CONFIG_GOP_GWIN_MISC
MDrv_GOP_SetGPIO3DPin(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U32 u32GPIO3DPin)7000 MS_BOOL MDrv_GOP_SetGPIO3DPin(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U32 u32GPIO3DPin)
7001 {
7002 return MDrv_GFLIP_SetGPIO3DPin(pGOPCtx, u32GPIO3DPin);
7003 }
7004 #endif
7005
Mdrv_GOP_GetVideoTimingMirrorType(MS_GOP_CTX_LOCAL * pGOPCtx,MS_BOOL bHorizontal)7006 E_GOP_VIDEOTIMING_MIRRORTYPE Mdrv_GOP_GetVideoTimingMirrorType(MS_GOP_CTX_LOCAL* pGOPCtx, MS_BOOL bHorizontal)
7007 {
7008 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7009 return HAL_GOP_GetVideoTimingMirrorType(&pGOPDrvLocalCtx->halCtxLocal, bHorizontal);
7010 }
7011
7012 /********************************************************************************/
7013 /// Set GOP OC(OSD Compression)
7014 /********************************************************************************/
MDrv_GOP_OC_SetOCEn(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOPNum,MS_BOOL bOCEn)7015 GOP_Result MDrv_GOP_OC_SetOCEn(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOPNum, MS_BOOL bOCEn)
7016 {
7017 GOP_Result ret;
7018
7019 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7020
7021 ret = HAL_GOP_OC_SetOCEn(&pGOPDrvLocalCtx->halCtxLocal, u8GOPNum, bOCEn);
7022
7023 return ret;
7024
7025 }
7026
MDrv_GOP_OC_SetOCInfo(MS_GOP_CTX_LOCAL * pGOPCtx,DRV_GOP_OC_INFO * OCinfo)7027 GOP_Result MDrv_GOP_OC_SetOCInfo(MS_GOP_CTX_LOCAL*pGOPCtx,DRV_GOP_OC_INFO* OCinfo)
7028 {
7029 MS_U8 regmiu =0;
7030 MS_U8 u8MiuSel;
7031
7032 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7033
7034 //OC HW just read the relative offset of each MIU
7035 _phy_to_miu_offset(u8MiuSel, OCinfo->u64GOP_OC_DRAM_RBLK, OCinfo->u64GOP_OC_DRAM_RBLK);
7036 HAL_GOP_OC_Get_MIU_Sel(&pGOPDrvLocalCtx->halCtxLocal, ®miu);
7037 if( regmiu != u8MiuSel)
7038 {
7039 GOP_D_ERR("\n %s, Wrong MIU setting! Your address(0x%tx) is across MIU0, but OC MIU setting is still MIU:%d\n",__FUNCTION__,\
7040 (ptrdiff_t)OCinfo->u64GOP_OC_DRAM_RBLK , regmiu);
7041 return GOP_FAIL;
7042 }
7043
7044 HAL_GOP_OC_SetOCInfo(&pGOPDrvLocalCtx->halCtxLocal, OCinfo);
7045
7046 return GOP_SUCCESS;
7047 }
7048 /********************************************************************************/
7049 ///GOP Bank Backup/Restore
7050 /********************************************************************************/
7051 #ifdef CONFIG_GOP_TEST_PATTERN
MDrv_GOP_BNK(MS_GOP_CTX_LOCAL * pGOPCtx,E_DRV_GOP_BNK_STATUS bBnkOP)7052 GOP_Result MDrv_GOP_BNK(MS_GOP_CTX_LOCAL*pGOPCtx, E_DRV_GOP_BNK_STATUS bBnkOP)
7053 {
7054 MS_U32 u32BankOffSet = 0x0;
7055 MS_U16 reg_val = 0x0;
7056 MS_U8 u8CurrentGOP;
7057 MS_U8 i;
7058
7059 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7060
7061 u8CurrentGOP = MDrv_GOP_Get(pGOPCtx);
7062 _GetBnkOfstByGop(u8CurrentGOP, &u32BankOffSet);
7063
7064 if( bBnkOP == E_DRV_GOP_BNK_READ)
7065 {
7066 for(i =0; i<GOP_REG_MAX ; i++)
7067 {
7068 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_REG(GOP_4G_OFST,i), ®_val);
7069 pGOPCtx->GOPBnk[u8CurrentGOP][i] = reg_val;
7070 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_REG(GOP_4G_OFST+1,i), ®_val);
7071 pGOPCtx->GWINBnk[u8CurrentGOP][i] = reg_val;
7072 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_REG(GOP_4G_OFST+2,i), ®_val);
7073 pGOPCtx->GOPStBnk[u8CurrentGOP][i] = reg_val;
7074
7075 }
7076 }
7077 else
7078 {
7079 MS_U16 tmp;
7080 for(i =0; i<GOP_REG_MAX ; i++)
7081 {
7082 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_REG(GOP_4G_OFST,i), pGOPCtx->GOPBnk[u8CurrentGOP][i], GOP_REG_WORD_MASK);
7083
7084 if(i == 0)
7085 {
7086 tmp = pGOPCtx->GWINBnk[u8CurrentGOP][i] & 0xFFFE;
7087 }
7088 else
7089 tmp = pGOPCtx->GWINBnk[u8CurrentGOP][i];
7090
7091 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_REG(GOP_4G_OFST+1,i), tmp, GOP_REG_WORD_MASK);
7092 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_REG(GOP_4G_OFST+2,i), pGOPCtx->GOPStBnk[u8CurrentGOP][i], GOP_REG_WORD_MASK);
7093 }
7094 if((pGOPCtx->GWINBnk[u8CurrentGOP][0] & 0x1) == TRUE) // if gwin is enable, enable it. otherwise, skip gwin enable.
7095 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_REG(GOP_4G_OFST+1,i), 0x1, 0x1);
7096
7097 MDrv_GOP_GWIN_UpdateReg(pGOPCtx, u8CurrentGOP);
7098
7099 }
7100
7101 return GOP_SUCCESS;
7102 }
7103
7104 /********************************************************************************/
7105 /// Set Test Pattern Type
7106 /********************************************************************************/
MDrv_GOP_TestPattern_IsVaild(MS_GOP_CTX_LOCAL * pGOPCtx)7107 GOP_Result MDrv_GOP_TestPattern_IsVaild(MS_GOP_CTX_LOCAL*pGOPCtx)
7108 {
7109 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7110 GOP_Result ret;
7111 MS_U8 u8CurrentGOP;
7112
7113 u8CurrentGOP= MDrv_GOP_Get(pGOPCtx);
7114 ret = HAL_GOP_TestPattern_IsVaild(&pGOPDrvLocalCtx->halCtxLocal,u8CurrentGOP);
7115 if( ret == GOP_FUN_NOT_SUPPORTED)
7116 {
7117 GOP_D_ERR("\n[%s] GOP%d not support Test Pattern\n",__FUNCTION__, u8CurrentGOP);
7118 }
7119 return ret;
7120 }
7121
MDrv_GOP_TestPatternAlpha_Enable(MS_GOP_CTX_LOCAL * pGOPCtx,MS_BOOL bTSTClr_Alpha_En)7122 GOP_Result MDrv_GOP_TestPatternAlpha_Enable(MS_GOP_CTX_LOCAL*pGOPCtx, MS_BOOL bTSTClr_Alpha_En)
7123 {
7124 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7125
7126 if(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bTstPatternAlpha== TRUE)
7127 {
7128 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal,REG_TSTCLR_ALPHA_EN, (!bTSTClr_Alpha_En)<<SHIFT_TSTCLR_ALPHA_EN, MASK_TSTCLR_ALPHA_EN);
7129 }
7130
7131 return GOP_SUCCESS;
7132 }
7133
MDrv_GOP_TestPattern(MS_GOP_CTX_LOCAL * pGOPCtx,MS_BOOL bTSTClr_En,MS_U8 u8TSTClr_Alpha)7134 GOP_Result MDrv_GOP_TestPattern(MS_GOP_CTX_LOCAL*pGOPCtx, MS_BOOL bTSTClr_En, MS_U8 u8TSTClr_Alpha)
7135 {
7136 MS_U16 u16TSTClr_Alpha=0;
7137
7138 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7139
7140 if(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bTstPatternAlpha== TRUE)
7141 {
7142 u16TSTClr_Alpha = TESTPATTERN_CALC(u8TSTClr_Alpha);
7143 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal,REG_TSTCLR_ALPHA, (u16TSTClr_Alpha<<SHIFT_TSTCLR_ALPHA), MASK_TSTCLR_ALPHA);
7144 }
7145
7146 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal,REG_TSTCLR_EN, bTSTClr_En<<SHIFT_TSTCLR_EN, MASK_TSTCLR_EN);
7147
7148 return GOP_SUCCESS;
7149 }
7150
MDrv_GOP_TestPattern_SetStartClr(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8StartR,MS_U8 u8StartG,MS_U8 u8StartB)7151 GOP_Result MDrv_GOP_TestPattern_SetStartClr(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8StartR,MS_U8 u8StartG,MS_U8 u8StartB)
7152 {
7153 MS_U16 u16StartR=u8StartR, u16StartG=u8StartG, u16StartB=u8StartB;
7154
7155 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7156
7157 u16StartR = u8StartR & MASK_RGB_STC_VALID;
7158 u16StartG = u8StartG & MASK_RGB_STC_VALID;
7159 u16StartB = u8StartB & MASK_RGB_STC_VALID;
7160
7161 if(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bTstPatternAlpha== TRUE)
7162 {
7163 u16StartR = TESTPATTERN_CALC(u16StartR);
7164 u16StartG = TESTPATTERN_CALC(u16StartG);
7165 u16StartB = TESTPATTERN_CALC(u16StartB);
7166 }
7167
7168 Merge(pGOPCtx, REG_R_STC, REG_G_STC, REG_B_STC, \
7169 u16StartR<<SHIFT_R_STC, u16StartG<<SHIFT_G_STC,u16StartB<<SHIFT_B_STC, \
7170 MASK_R_STC, MASK_G_STC, MASK_B_STC);
7171 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal,REG_TSTCLR_ALPHA_EN, GOP_BIT0, MASK_INI_TSTCLR_EN);
7172
7173 return GOP_SUCCESS;
7174 }
7175
MDrv_GOP_TestPattern_SetHInitColor(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8HIniR,MS_U8 u8HIniG,MS_U8 u8HIniB)7176 GOP_Result MDrv_GOP_TestPattern_SetHInitColor(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8HIniR,MS_U8 u8HIniG,MS_U8 u8HIniB)
7177 {
7178 MS_U16 u16HIniR =u8HIniR, u16HIniG =u8HIniG, u16HIniB =u8HIniB;
7179
7180 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7181
7182 if(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bTstPatternAlpha== TRUE)
7183 {
7184 u16HIniR = TESTPATTERN_CALC(u8HIniR);
7185 u16HIniG = TESTPATTERN_CALC(u8HIniG);
7186 u16HIniB = TESTPATTERN_CALC(u8HIniB);
7187 }
7188
7189 Merge(pGOPCtx, REG_HR_INC, REG_HG_INC, REG_HB_INC, \
7190 u16HIniR<<SHIFT_HR_INC, u16HIniG<<SHIFT_HG_INC, u16HIniB<<SHIFT_HB_INC, \
7191 MASK_HR_INC, MASK_HG_INC, MASK_HB_INC);
7192
7193 return GOP_SUCCESS;
7194 }
7195
MDrv_GOP_TestPattern_SetVInitColor(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8VIniR,MS_U8 u8VIniG,MS_U8 u8VIniB)7196 GOP_Result MDrv_GOP_TestPattern_SetVInitColor(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8VIniR,MS_U8 u8VIniG,MS_U8 u8VIniB)
7197 {
7198 MS_U16 u16VIniR =u8VIniR, u16VIniG =u8VIniG, u16VIniB =u8VIniB;
7199
7200 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7201
7202 if(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bTstPatternAlpha== TRUE)
7203 {
7204 u16VIniR = TESTPATTERN_CALC(u8VIniR);
7205 u16VIniG = TESTPATTERN_CALC(u8VIniG);
7206 u16VIniB = TESTPATTERN_CALC(u8VIniB);
7207 }
7208
7209 Merge(pGOPCtx, REG_VR_INC, REG_VG_INC, REG_VB_INC, \
7210 u16VIniR<<SHIFT_VR_INC, u16VIniG<<SHIFT_VG_INC, u16VIniB<<SHIFT_VB_INC, \
7211 MASK_VR_INC, MASK_VG_INC, MASK_VB_INC);
7212
7213 return GOP_SUCCESS;
7214 }
7215
MDrv_GOP_TestPattern_SetHIncremental_Signz(MS_GOP_CTX_LOCAL * pGOPCtx,MS_BOOL bHIncreSigR,MS_BOOL bHIncreSigG,MS_BOOL bHIncreSigB)7216 GOP_Result MDrv_GOP_TestPattern_SetHIncremental_Signz(MS_GOP_CTX_LOCAL*pGOPCtx,MS_BOOL bHIncreSigR,MS_BOOL bHIncreSigG,MS_BOOL bHIncreSigB)
7217 {
7218 Merge(pGOPCtx, REG_HR_INC, REG_HG_INC, REG_HB_INC, \
7219 bHIncreSigR<<SHIFT_HR_INC_SIGNZ, bHIncreSigG<<SHIFT_HG_INC_SIGNZ, bHIncreSigB<<SHIFT_HB_INC_SIGNZ, \
7220 MASK_HR_INC_SIGNZ, MASK_HG_INC_SIGNZ, MASK_HB_INC_SIGNZ);
7221
7222 return GOP_SUCCESS;
7223 }
7224
MDrv_GOP_TestPattern_SetVIncremental_Signz(MS_GOP_CTX_LOCAL * pGOPCtx,MS_BOOL bVIncreSigR,MS_BOOL bVIncreSigG,MS_BOOL bVIncreSigB)7225 GOP_Result MDrv_GOP_TestPattern_SetVIncremental_Signz(MS_GOP_CTX_LOCAL*pGOPCtx,MS_BOOL bVIncreSigR,MS_BOOL bVIncreSigG,MS_BOOL bVIncreSigB)
7226 {
7227 Merge(pGOPCtx, REG_VR_INC, REG_VG_INC, REG_VB_INC, \
7228 bVIncreSigR<<SHIFT_VR_INC_SIGNZ, bVIncreSigG<<SHIFT_VG_INC_SIGNZ, bVIncreSigB<<SHIFT_VB_INC_SIGNZ, \
7229 MASK_VR_INC_SIGNZ, MASK_VG_INC_SIGNZ, MASK_VB_INC_SIGNZ);
7230
7231 return GOP_SUCCESS;
7232 }
7233
7234
MDrv_GOP_TestPattern_SetHStep(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8HStepR,MS_U8 u8HStepG,MS_U8 u8HStepB)7235 GOP_Result MDrv_GOP_TestPattern_SetHStep(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8HStepR,MS_U8 u8HStepG,MS_U8 u8HStepB)
7236 {
7237 MS_U16 u16HStepR =u8HStepR, u16HStepG =u8HStepG, u16HStepB =u8HStepB;
7238
7239 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7240
7241 if(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bTstPatternAlpha== TRUE)
7242 {
7243 u16HStepR = TESTPATTERN_CALC(u8HStepR);
7244 u16HStepG = TESTPATTERN_CALC(u8HStepG);
7245 u16HStepB = TESTPATTERN_CALC(u8HStepB);
7246 }
7247
7248 Merge(pGOPCtx, REG_HR_STEP, REG_HG_STEP, REG_HB_STEP, \
7249 u16HStepR<<SHIFT_HR_STEP, u16HStepG<<SHIFT_HG_STEP, u16HStepB<<SHIFT_HB_STEP, \
7250 MASK_HR_STEP, MASK_HG_STEP, MASK_HB_STEP);
7251
7252 return GOP_SUCCESS;
7253 }
MDrv_GOP_TestPattern_SetVStep(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8VStepR,MS_U8 u8VStepG,MS_U8 u8VStepB)7254 GOP_Result MDrv_GOP_TestPattern_SetVStep(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8VStepR,MS_U8 u8VStepG,MS_U8 u8VStepB)
7255 {
7256 MS_U16 u16VStepR =u8VStepR, u16VStepG =u8VStepG, u16VStepB =u8VStepB;
7257
7258 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7259
7260 if(pGOPDrvLocalCtx->halCtxLocal.pGopChipPro->bTstPatternAlpha== TRUE)
7261 {
7262 u16VStepR = TESTPATTERN_CALC(u8VStepR);
7263 u16VStepG = TESTPATTERN_CALC(u8VStepG);
7264 u16VStepB = TESTPATTERN_CALC(u8VStepB);
7265 }
7266
7267 Merge(pGOPCtx, REG_VR_STEP, REG_VG_STEP, REG_VB_STEP, \
7268 u16VStepR<<SHIFT_VR_STEP, u16VStepG<<SHIFT_VG_STEP, u16VStepB<<SHIFT_VB_STEP, \
7269 MASK_VR_STEP, MASK_VG_STEP, MASK_VB_STEP);
7270
7271 return GOP_SUCCESS;
7272 }
7273
MDrv_GOP_TestPattern_SetHVDuplicate(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8HDup,MS_U8 u8VDup)7274 GOP_Result MDrv_GOP_TestPattern_SetHVDuplicate(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8HDup,MS_U8 u8VDup)
7275 {
7276 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7277
7278 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal,REG_TSTCLR_HDUP, u8HDup<<SHIFT_TSTCLR_HDUP, MASK_TSTCLR_HDUP);
7279 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal,REG_TSTCLR_VDUP, u8VDup<<SHIFT_TSTCLR_VDUP, MASK_TSTCLR_VDUP);
7280 return GOP_SUCCESS;
7281 }
7282 #endif
MDrv_GOP_GWIN_BeginDraw(void)7283 MS_BOOL MDrv_GOP_GWIN_BeginDraw(void)
7284 {
7285 #if 0//GOP_LOCK_SUPPORT
7286 if (g_gopDrvCtxLocal.apiCtxLocal.s32GOPMutex >= 0)
7287 {
7288 DRV_GOP_ENTRY();
7289 }
7290 else
7291 {
7292 printf("%s: Error, no mutex to obtain\n", __FUNCTION__);
7293 return FALSE;
7294 }
7295 #endif
7296 return TRUE;
7297 }
7298
MDrv_GOP_GWIN_EndDraw(void)7299 MS_BOOL MDrv_GOP_GWIN_EndDraw(void)
7300 {
7301 #if 0//GOP_LOCK_SUPPORT
7302 if (g_gopDrvCtxLocal.apiCtxLocal.s32GOPMutex >= 0)
7303 {
7304 DRV_GOP_RETURN();
7305 }
7306 else
7307 {
7308 printf("%s: Error, no mutex to obtain\n", __FUNCTION__);
7309 return FALSE;
7310 }
7311 #endif
7312 return TRUE;
7313 }
7314
MDrv_GOP_AFBC_Core_Reset(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP)7315 GOP_Result MDrv_GOP_AFBC_Core_Reset(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP)
7316 {
7317 MS_U8 u8Core=0;
7318 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7319
7320 if(pGOPCtx->pGopChipProperty->bAFBC_Support[u8GOP] ==FALSE)
7321 {
7322 GOP_D_ERR("[%s] GOP AFBC mode not support GOP %d \n",__FUNCTION__, u8GOP);
7323 return GOP_FUN_NOT_SUPPORTED;
7324 }
7325
7326 HAL_GOP_AFBC_GetCore(&pGOPDrvLocalCtx->halCtxLocal, u8GOP, &u8Core);
7327 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal,REG_AFBC_MIU,GOP_BIT15, GOP_BIT15);
7328 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal,REG_AFBC_CORE_EN(u8Core),GOP_BIT8, GOP_BIT8);
7329 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal,REG_AFBC_MIU,0, GOP_BIT15);
7330 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal,REG_AFBC_CORE_EN(u8Core),0, GOP_BIT8);
7331
7332 return GOP_SUCCESS;
7333 }
7334
MDrv_GOP_AFBC_Core_Enable(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_BOOL bEna)7335 GOP_Result MDrv_GOP_AFBC_Core_Enable(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP, MS_BOOL bEna)
7336 {
7337 MS_U8 u8Core=0;
7338 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7339
7340 if(pGOPCtx->pGopChipProperty->bAFBC_Support[u8GOP] ==FALSE)
7341 {
7342 GOP_D_ERR("[%s] GOP AFBC mode not support GOP %d \n",__FUNCTION__, u8GOP);
7343 return GOP_FUN_NOT_SUPPORTED;
7344 }
7345 HAL_GOP_AFBC_GetCore(&pGOPDrvLocalCtx->halCtxLocal, u8GOP, &u8Core);
7346 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal,REG_AFBC_CORE_EN(u8Core),bEna, GOP_BIT0);
7347
7348 return GOP_SUCCESS;
7349 }
7350
MDrv_GOP_GWIN_AFBCMode(MS_GOP_CTX_LOCAL * pGOPCtx,MS_BOOL u8GOP,MS_BOOL bEnable,EN_DRV_GOP_AFBC_CNTL eCTL)7351 GOP_Result MDrv_GOP_GWIN_AFBCMode(MS_GOP_CTX_LOCAL*pGOPCtx, MS_BOOL u8GOP, MS_BOOL bEnable, EN_DRV_GOP_AFBC_CNTL eCTL)
7352 {
7353 MS_U32 u32BankOffSet=0;
7354 MS_U8 u8Core=0;
7355 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7356
7357 _GetBnkOfstByGop(u8GOP, &u32BankOffSet);
7358 if(pGOPCtx->pGopChipProperty->bAFBC_Support[u8GOP] ==FALSE)
7359 {
7360 GOP_D_ERR("[%s] GOP AFBC mode not support GOP %d \n",__FUNCTION__, u8GOP);
7361 return GOP_FUN_NOT_SUPPORTED;
7362 }
7363
7364 HAL_GOP_AFBC_GetCore(&pGOPDrvLocalCtx->halCtxLocal, u8GOP, &u8Core);
7365 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_FMT(u8Core), (eCTL&E_DRV_GOP_AFBC_SPILT)? GOP_BIT6: 0 , GOP_BIT6); //Spilt
7366 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_FMT(u8Core), (eCTL&E_DRV_GOP_AFBC_YUV_TRANSFER)? GOP_BIT4: 0 , GOP_BIT4); //YUV transfer
7367 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_CORE_EN(u8Core), bEnable, GOP_BIT0); //CoreEn
7368 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+ GOP_4G_YUV_SWAP, bEnable<<14, GOP_BIT14); //GOP U/V swap
7369 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+ GOP_4G_MIU_SEL, bEnable<<12, GOP_BIT12); //GOP afbc en
7370
7371 if(pGOPCtx->pGopChipProperty->bAFBC_Merge_GOP_Trig ==FALSE)
7372 {
7373 bAFBCTrigger=TRUE;
7374 }
7375 return GOP_SUCCESS;
7376 }
7377
MDrv_GOP_GWIN_AFBCSetWindow(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,DRV_GOP_AFBC_Info * pinfo,MS_BOOL bChangePitch)7378 GOP_Result MDrv_GOP_GWIN_AFBCSetWindow(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP, DRV_GOP_AFBC_Info* pinfo, MS_BOOL bChangePitch)
7379 {
7380 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7381 MS_U8 u8Core=0,alignfactor=0;
7382 MS_U16 u16Pitch=0,u16Height=0;
7383
7384 u16Pitch = pinfo->u16Pitch/4;
7385
7386 //16*16 block
7387 alignfactor =16;
7388 u16Pitch = (u16Pitch + alignfactor - 1) & (~(alignfactor - 1));
7389 u16Height= pinfo->u16VPixelEnd-pinfo->u16VPixelStart;
7390 u16Height = (u16Height + alignfactor - 1) & (~(alignfactor - 1));
7391
7392 if(pGOPCtx->pGopChipProperty->bAFBC_Support[u8GOP] ==FALSE)
7393 {
7394 GOP_D_ERR("[%s] GOP AFBC mode not support GOP %d \n",__FUNCTION__, u8GOP);
7395 return GOP_FUN_NOT_SUPPORTED;
7396 }
7397
7398 if(pinfo->u16Pitch ==0 || u16Height==0)
7399 {
7400 GOP_D_ERR("[%s][%d] Fail!!! Width=%d, Height=%d,Pitch=%d \n",__FUNCTION__,__LINE__,\
7401 pinfo->u16HPixelEnd-pinfo->u16HPixelStart, pinfo->u16VPixelEnd-pinfo->u16VPixelStart, pinfo->u16Pitch);
7402 return GOP_FAIL;
7403 }
7404
7405 HAL_GOP_AFBC_GetCore(&pGOPDrvLocalCtx->halCtxLocal, u8GOP, &u8Core);
7406 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_ADDR_L(u8Core), pinfo->u64DRAMAddr, GOP_REG_WORD_MASK);
7407 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_ADDR_H(u8Core), pinfo->u64DRAMAddr>>16, GOP_REG_WORD_MASK);
7408 if(bChangePitch==TRUE)
7409 {
7410 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_WIDTH(u8Core), u16Pitch-1, GOP_REG_WORD_MASK);
7411 }
7412 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_HEIGHT(u8Core), u16Height-1, GOP_REG_WORD_MASK);
7413 if((pinfo->u8Fmt&E_DRV_GOP_AFBC_ARGB8888) ==E_DRV_GOP_AFBC_ARGB8888)
7414 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_FMT(u8Core), 0x5 , GOP_BIT0|GOP_BIT1|GOP_BIT2|GOP_BIT3); //Fmt
7415
7416 #ifdef GOP_AFBC_PRELOAD_PATCH
7417 if((u16Pitch==560)||((u16Pitch==1920)&&(u16Height<416)))
7418 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_CORE_EN(u8Core), 0, GOP_BIT4);
7419 else
7420 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, REG_AFBC_CORE_EN(u8Core), GOP_BIT4, GOP_BIT4);
7421 #endif
7422
7423 if(pGOPCtx->pGopChipProperty->bAFBC_Merge_GOP_Trig ==FALSE)
7424 {
7425 bAFBCTrigger=TRUE;
7426 }
7427 return GOP_SUCCESS;
7428 }
7429
MDrv_GOP_GWIN_DeleteWinHVSize(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8GOP,MS_U16 u16HSize,MS_U16 u16VSize)7430 GOP_Result MDrv_GOP_GWIN_DeleteWinHVSize(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8GOP, MS_U16 u16HSize, MS_U16 u16VSize)
7431 {
7432
7433 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7434
7435 HAL_GOP_DeleteWinHVSize(&pGOPDrvLocalCtx->halCtxLocal,u8GOP, u16HSize, u16VSize);
7436 return GOP_SUCCESS;
7437 }
7438
MDrv_GOP_SelfFirstHs(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8Gop,MS_BOOL bEnable)7439 void MDrv_GOP_SelfFirstHs(MS_GOP_CTX_LOCAL*pGOPCtx, MS_U8 u8Gop, MS_BOOL bEnable)
7440 {
7441 MS_U32 u32BankOffSet = 0;
7442 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7443
7444 _GetBnkOfstByGop(u8Gop, &u32BankOffSet);
7445 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet + GOP_4G_RATE, bEnable<<7, BIT(7));
7446 }
7447
MDrv_GOP_GetIPCaptureHStart(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U32 * u32Hstart,E_DRV_GOP_SCALER_WIN eWindow)7448 GOP_Result MDrv_GOP_GetIPCaptureHStart(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U32 *u32Hstart,E_DRV_GOP_SCALER_WIN eWindow)
7449 {
7450 #ifdef MSOS_TYPE_LINUX_KERNEL
7451 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7452 MS_U16 reg_val = 0;
7453
7454 DRV_GOP_XC_GET_SEMPHORE();
7455
7456 if(eWindow == E_DRV_GOP_MAIN_WINDOW)
7457 {
7458 HAL_GOP_Read16Reg(&pGOPDrvLocalCtx->halCtxLocal, GOP_SC_IP_MAIN_HSTART, ®_val);
7459 *u32Hstart = (MS_U32)reg_val;
7460 }
7461
7462 DRV_GOP_XC_RELEASE_SEMPHORE();
7463 #else
7464 if( _fpXCGetCapHStart != NULL )
7465 *u32Hstart = (MS_U32)_fpXCGetCapHStart();
7466 else
7467 printf("[%s] [%d]Callback function fpXCGetCapHStart is NULL\n",__FUNCTION__,__LINE__);
7468 #endif
7469 return GOP_SUCCESS;
7470 }
7471
MDrv_GOP_GetIPInterlace(MS_GOP_CTX_LOCAL * pGOPCtx,MS_BOOL * bInterlace,E_DRV_GOP_SCALER_WIN eWindow)7472 GOP_Result MDrv_GOP_GetIPInterlace(MS_GOP_CTX_LOCAL*pGOPCtx,MS_BOOL *bInterlace,E_DRV_GOP_SCALER_WIN eWindow)
7473 {
7474 #ifdef MSOS_TYPE_LINUX_KERNEL
7475 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7476
7477 DRV_GOP_XC_GET_SEMPHORE();
7478
7479 if(eWindow == E_DRV_GOP_MAIN_WINDOW)
7480 {
7481 //GOP_CTX_DRV_LOCAL *pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7482 HAL_GOP_GetIPInterlace(&pGOPDrvLocalCtx->halCtxLocal, bInterlace);
7483 }
7484
7485 DRV_GOP_XC_RELEASE_SEMPHORE();
7486 #else
7487 if( _fpXCIsInterlace != NULL )
7488 {
7489 *bInterlace = _fpXCIsInterlace();
7490 }else{
7491 // _fpXCIsInterlace is NULL
7492
7493 GOP_CTX_DRV_LOCAL *pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7494 DRV_GOP_XC_GET_SEMPHORE();
7495
7496 if(eWindow == E_DRV_GOP_MAIN_WINDOW)
7497 {
7498 //GOP_CTX_DRV_LOCAL *pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7499 HAL_GOP_GetIPInterlace(&pGOPDrvLocalCtx->halCtxLocal, bInterlace);
7500 }
7501
7502 DRV_GOP_XC_RELEASE_SEMPHORE();
7503 }
7504 #endif
7505 return GOP_SUCCESS;
7506 }
7507
MDrv_GOP_IsHDREnabled(MS_GOP_CTX_LOCAL * pGOPCtx,MS_BOOL * pbHDREnable)7508 GOP_Result MDrv_GOP_IsHDREnabled(MS_GOP_CTX_LOCAL*pGOPCtx, MS_BOOL* pbHDREnable)
7509 {
7510 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7511
7512 HAL_GOP_IsHDREnabled(&pGOPDrvLocalCtx->halCtxLocal, pbHDREnable);
7513
7514 return GOP_SUCCESS;
7515 }
7516
MDrv_GOP_SetDbgLevel(EN_GOP_DEBUG_LEVEL level)7517 GOP_Result MDrv_GOP_SetDbgLevel(EN_GOP_DEBUG_LEVEL level)
7518 {
7519 u32GOPDbgLevel_drv = level;
7520 HAL_GOP_SetDbgLevel(level);
7521 return GOP_SUCCESS;
7522 }
7523
MDrv_GOP_GWIN_PowerState(void * pInstance,MS_U32 u32PowerState,void * pModule)7524 GOP_Result MDrv_GOP_GWIN_PowerState(void* pInstance, MS_U32 u32PowerState, void* pModule)
7525 {
7526 MS_U8 i=0,j=0;
7527 MS_U8 GopIdx=0xF, GopBks=0xF;
7528 MS_U32 u32BankOffSet=0;
7529 MS_VIRT MMIOBaseAdr=0xFFFF;
7530 MS_PHY u32NonPMBankSize=0xFFFF;
7531 GFLIP_REGS_SAVE_AREA* pGOP_STRPrivate=NULL;
7532 GOP_CTX_DRV_SHARED* pDrvGOPShared=NULL;
7533 MS_BOOL bNeedInitShared = FALSE;
7534
7535 #if defined(MSOS_TYPE_LINUX_KERNEL)
7536 UtopiaModuleGetSTRPrivate(pModule, (void**)&pGOP_STRPrivate);
7537 #else
7538 GOP_INSTANT_PRIVATE* psGOPInstPri = NULL;
7539 UtopiaInstanceGetPrivate(pInstance, (void**)&psGOPInstPri);
7540 pGOP_STRPrivate =&(psGOPInstPri->pGOP_STRPrivate);
7541 #endif
7542
7543 if( !MDrv_MMIO_GetBASE(&MMIOBaseAdr, &u32NonPMBankSize, MS_MODULE_GOP))
7544 {
7545 GOP_D_FATAL("[%s][%d]Get GOP IOMap failure\n",__FUNCTION__,__LINE__);
7546 GOP_ASSERT(0);
7547 return FALSE;
7548 }
7549 HAL_GOP_SetIOMapBase(&pGOP_STRPrivate->GOPHalSTRCtx, MMIOBaseAdr);
7550 pDrvGOPShared = (GOP_CTX_DRV_SHARED*)MDrv_GOP_GetShareMemory(&bNeedInitShared);
7551 pGOP_STRPrivate->GOPHalSTRCtx.pHALShared = &(pDrvGOPShared->halCtxShared);
7552 switch(u32PowerState)
7553 {
7554 case E_POWER_SUSPEND:
7555 {
7556 for(i=0;i<GFLIP_REG_BANKS;i++)
7557 {
7558 if (i < 12)
7559 {
7560 GopIdx=i/GOP_BANK_OFFSET;
7561 GopBks=i%GOP_BANK_OFFSET;
7562 }
7563 else if (i == 12)
7564 {
7565 //DWIN
7566 continue;
7567 }
7568 else if (i == 13)
7569 {
7570 //MIXER
7571 continue;
7572 }
7573 else
7574 {
7575 GopIdx=(i-2)/GOP_2G_OFST;
7576 GopBks=(i-2)%GOP_2G_OFST;
7577 }
7578
7579 //GOP reg
7580 for(j=0;j<GFLIP_REG16_NUM_PER_BANK;j++)
7581 {
7582 HAL_GOP_DumpGOPReg(&pGOP_STRPrivate->GOPHalSTRCtx, GopIdx,
7583 GopBks, j, &(pGOP_STRPrivate->BankReg[i][j]));
7584 }
7585 }
7586 HAL_GOP_PowerState(&pGOP_STRPrivate->GOPHalSTRCtx, u32PowerState, pGOP_STRPrivate);
7587 //Close Win
7588 for(i=0; i<MAX_GOP_SUPPORT;i++)
7589 {
7590 _GetBnkOfstByGop(i, &u32BankOffSet);
7591 HAL_GOP_Write16Reg(&pGOP_STRPrivate->GOPHalSTRCtx, (u32BankOffSet + GOP_4G_CTRL0), 0, GOP_BIT0);
7592 }
7593 }
7594 break;
7595 case E_POWER_RESUME:
7596 {
7597 HAL_GOP_PowerState(&pGOP_STRPrivate->GOPHalSTRCtx, u32PowerState, pGOP_STRPrivate);
7598 for(i=0;i<GFLIP_REG_BANKS;i++)
7599 {
7600 if (i < 12)
7601 {
7602 GopIdx=i/GOP_2G_OFST;
7603 GopBks=i%GOP_2G_OFST;
7604 }
7605 else if (i == 12)
7606 {
7607 //DWIN
7608 continue;
7609 }
7610 else if (i == 13)
7611 {
7612 //MIXER
7613 continue;
7614 }
7615 else
7616 {
7617 GopIdx=(i-2)/GOP_2G_OFST;
7618 GopBks=(i-2)%GOP_2G_OFST;
7619 }
7620
7621 for(j=0;j<GFLIP_REG16_NUM_PER_BANK;j++)
7622 {
7623 HAL_GOP_RestoreGOPReg(&pGOP_STRPrivate->GOPHalSTRCtx, GopIdx,
7624 GopBks, j, (pGOP_STRPrivate->BankReg[i][j]));
7625 }
7626 }
7627
7628 //ForceWrite
7629 HAL_GOP_Write16Reg(&pGOP_STRPrivate->GOPHalSTRCtx, GOP_BAK_SEL, GOP_BIT9, GOP_BIT9);
7630 HAL_GOP_Write16Reg(&pGOP_STRPrivate->GOPHalSTRCtx, GOP_BAK_SEL, 0, GOP_BIT9);
7631 }
7632 break;
7633 default:
7634 break;
7635 }
7636 return GOP_SUCCESS;
7637 }
7638
7639
MDrv_GOP_GWIN_Interrupt(MS_GOP_CTX_LOCAL * pGOPCtx,MS_U8 u8Gop,MS_BOOL bEable)7640 void MDrv_GOP_GWIN_Interrupt(MS_GOP_CTX_LOCAL*pGOPCtx,MS_U8 u8Gop,MS_BOOL bEable)
7641 {
7642 GOP_CTX_DRV_LOCAL*pGOPDrvLocalCtx = (GOP_CTX_DRV_LOCAL*)pGOPCtx;
7643 MS_U32 u32BankOffSet=0;
7644
7645 _GetBnkOfstByGop(u8Gop, &u32BankOffSet);
7646 HAL_GOP_Write16Reg(&pGOPDrvLocalCtx->halCtxLocal, u32BankOffSet+GOP_4G_INT, (bEable?0:GOP_BIT0) , GOP_BIT0);
7647 }
7648
7649 #ifdef CONFIG_UTOPIA_PROC_DBG_SUPPORT
MDrv_GOP_MDCMD_GETINFO(void * pInstance,MS_U64 * u64ReqHdl)7650 void MDrv_GOP_MDCMD_GETINFO(void* pInstance, MS_U64* u64ReqHdl)
7651 {
7652 MS_U8 gop=0, Bpp = 0, u8Miu=0xff;
7653 MS_U16 u16temp = 0x0, u16temp1 = 0x0, u16Regval = 0x0, u16Regval1= 0x0;
7654 MS_U32 u32colorInfo = 0x0, u32BankOffSet = 0, DramOffset=0;
7655
7656 #ifdef INSTANT_PRIVATE
7657 GOP_INSTANT_PRIVATE* psGOPInstPri = NULL;
7658 UtopiaInstanceGetPrivate(pInstance, (void*)&psGOPInstPri);
7659 #endif
7660
7661 MdbPrint(u64ReqHdl, "Total GOP: %d\n", MAX_GOP_SUPPORT);
7662 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_MUX, &u16Regval);
7663 MdbPrint(u64ReqHdl, "OP mux setting: %d:%d:%d:%d:%d\n", ((u16Regval & 0x7000)>>12), ((u16Regval & 0xE00)>>9), ((u16Regval & 0x1C0)>>6), ((u16Regval & 0x38)>>3), (u16Regval & 0x7));
7664
7665 for(gop = 0; gop < MAX_GOP_SUPPORT; gop++)
7666 {
7667 _GetBnkOfstByGop(gop, &u32BankOffSet);
7668 MdbPrint(u64ReqHdl, "----------MStar GOP%d Info----------\n\n", gop);
7669 MdbPrint(u64ReqHdl, "GOP%d Initialized: %d\n", gop, g_gopDrvCtxLocal.apiCtxLocal.pGOPCtxShared->bGopHasInitialized[gop]);
7670
7671 //===== Stretch Window info=====
7672 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_STRCH_HSZ,&u16Regval);
7673 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_STRCH_VSZ,&u16Regval1);
7674 MdbPrint(u64ReqHdl, "Stretch Original Window(%d, %d)\n", (u16Regval*2), u16Regval1);
7675 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_HSTRCH,&u16temp);
7676 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_VSTRCH,&u16temp1);
7677 MdbPrint(u64ReqHdl, "Stretch Output Window(%d, %d)\n", ((u16Regval*2*4096)/u16temp), ((u16Regval1*4096)/u16temp1));
7678
7679 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_STRCH_HSTR, &u16Regval);
7680 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_STRCH_VSTR, &u16Regval1);
7681 MdbPrint(u64ReqHdl, "Stretch Window Position(%d,%d)\n", u16Regval, u16Regval1);
7682
7683 //===== GOP Destination info=====
7684 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_CTRL1, &u16Regval);
7685 switch(u16Regval&0xF)
7686 {
7687 case 0:
7688 MdbPrint(u64ReqHdl, "Destination: IP0\n");
7689 break;
7690 case 1:
7691 MdbPrint(u64ReqHdl, "Destination: IP0_SUB\n");
7692 break;
7693 case 2:
7694 MdbPrint(u64ReqHdl, "Destination: OP0\n");
7695 break;
7696 case 3:
7697 MdbPrint(u64ReqHdl, "Destination: VOP\n");
7698 break;
7699 case 4:
7700 MdbPrint(u64ReqHdl, "Destination: VOP_SUB\n");
7701 break;
7702 case 6:
7703 MdbPrint(u64ReqHdl, "Destination: FRC\n");
7704 break;
7705 case 0xB:
7706 MdbPrint(u64ReqHdl, "Destination: OP_DUAL_RATE\n");
7707 break;
7708 case 8:
7709 MdbPrint(u64ReqHdl, "Destination: DIP\n");
7710 break;
7711 default:
7712 MdbPrint(u64ReqHdl, "Destination: INVALID\n");
7713 break;
7714 }
7715
7716 u8Miu = HAL_GOP_GetMIUDst(&g_gopDrvCtxLocal.halCtxLocal, gop);
7717 MdbPrint(u64ReqHdl, "Address MIU of GOP%d: %d\n", gop,u8Miu);
7718
7719 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, &u16Regval);
7720 MdbPrint(u64ReqHdl, "H Mirror: %d\n", (u16Regval & GOP_BIT12)>>12);
7721 MdbPrint(u64ReqHdl, "V Mirror: %d\n", (u16Regval & GOP_BIT13)>>13);
7722
7723 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_GWIN_ALPHA01(0), &u16Regval);
7724 MdbPrint(u64ReqHdl, "Alpha pre-multiplex mode: %d\n", (u16Regval>>15));
7725
7726 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_HS_PIPE, &u16Regval);
7727 MdbPrint(u64ReqHdl, "Pipe Value: 0x%lx\n", u16Regval);
7728
7729 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, &u16Regval);
7730 MdbPrint(u64ReqHdl, "Progressive: %d\n", (u16Regval & 8));
7731
7732 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, &u16Regval);
7733 if(u16Regval&GOP_BIT10)
7734 MdbPrint(u64ReqHdl, "Color Space: YUV\n");
7735 else
7736 MdbPrint(u64ReqHdl, "Color Space: RGB\n");
7737
7738 //===== GOP Transparent ColorKey info=====
7739 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, &u16Regval);
7740 if(u16Regval&GOP_BIT11)
7741 {
7742 MdbPrint(u64ReqHdl, "RGB Color key Enable: Enable\n");
7743 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_TRSCLR_L, &u16Regval);
7744 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_TRSCLR_H, &u16Regval1);
7745 u32colorInfo = (MS_U32)((u16Regval1&GOP_REG_LW_MASK)<<16) | (MS_U32)(u16Regval&GOP_REG_WORD_MASK);
7746 MdbPrint(u64ReqHdl, "RGB Color key value: 0x%lx\n", u32colorInfo);
7747 }
7748 else
7749 MdbPrint(u64ReqHdl, "Color key Enable: Disable\n");
7750
7751 //===== GOP GWIN info=====
7752 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_GWIN0_CTRL(0), &u16Regval);
7753 if(u16Regval&GOP_BIT0)
7754 MdbPrint(u64ReqHdl, "GWIN Enable: Enable\n");
7755 else
7756 MdbPrint(u64ReqHdl, "GWIN Enable: Disable\n");
7757
7758
7759 switch((u16Regval>>GOP_REG_COLORTYPE_SHIFT)&GOP_REG_COLORTYPE_MASK)
7760 {
7761 case GOP_FMT_RGB555_BLINK:
7762 MdbPrint(u64ReqHdl, "GWIN Format: RGB555_BLINK\n");
7763 Bpp = 2;
7764 break;
7765 case GOP_FMT_RGB565:
7766 MdbPrint(u64ReqHdl, "GWIN Format: RGB565\n");
7767 Bpp = 2;
7768 break;
7769 case GOP_FMT_ARGB4444:
7770 MdbPrint(u64ReqHdl, "GWIN Format: ARGB4444\n");
7771 Bpp = 2;
7772 break;
7773 case GOP_FMT_FaBaFgBg2266:
7774 MdbPrint(u64ReqHdl, "GWIN Format: FaBaFgBg2266\n");
7775 Bpp = 2;
7776 break;
7777 case GOP_FMT_I8:
7778 MdbPrint(u64ReqHdl, "GWIN Format: I8\n");
7779 Bpp = 1;
7780 break;
7781 case GOP_FMT_ARGB8888:
7782 MdbPrint(u64ReqHdl, "GWIN Format: ARGB8888\n");
7783 Bpp = 4;
7784 break;
7785 case GOP_FMT_ARGB1555:
7786 MdbPrint(u64ReqHdl, "GWIN Format: ARGB1555\n");
7787 Bpp = 2;
7788 break;
7789 case GOP_FMT_ABGR8888:
7790 MdbPrint(u64ReqHdl, "GWIN Format: ABGR8888\n");
7791 Bpp = 4;
7792 break;
7793 case GOP_FMT_ARGB1555_DST:
7794 MdbPrint(u64ReqHdl, "GWIN Format: ARGB1555\n");
7795 Bpp = 2;
7796 break;
7797 case GOP_FMT_YUV422:
7798 MdbPrint(u64ReqHdl, "GWIN Format: YUV422\n");
7799 Bpp = 2;
7800 break;
7801 case GOP_FMT_RGBA5551:
7802 MdbPrint(u64ReqHdl, "GWIN Format: RGBA5551\n");
7803 Bpp = 2;
7804 break;
7805 case GOP_FMT_RGBA4444:
7806 MdbPrint(u64ReqHdl, "GWIN Format: RGBA4444\n");
7807 Bpp = 2;
7808 break;
7809 case GOP_FMT_RGBA8888:
7810 MdbPrint(u64ReqHdl, "GWIN Format: RGBA8888\n");
7811 Bpp = 4;
7812 break;
7813 case GOP_FMT_BGR565:
7814 MdbPrint(u64ReqHdl, "GWIN Format: BGR565\n");
7815 Bpp = 2;
7816 break;
7817 case GOP_FMT_ABGR4444:
7818 MdbPrint(u64ReqHdl, "GWIN Format: ABGR4444\n");
7819 Bpp = 2;
7820 break;
7821 case GOP_FMT_ABGR1555:
7822 MdbPrint(u64ReqHdl, "GWIN Format: ABGR1555\n");
7823 Bpp = 2;
7824 break;
7825 case GOP_FMT_BGRA5551:
7826 MdbPrint(u64ReqHdl, "GWIN Format: BGRA5551\n");
7827 Bpp = 2;
7828 break;
7829 case GOP_FMT_BGRA4444:
7830 MdbPrint(u64ReqHdl, "GWIN Format: BGRA4444\n");
7831 Bpp = 2;
7832 break;
7833 case GOP_FMT_BGRA8888:
7834 MdbPrint(u64ReqHdl, "GWIN Format: BGRA8888\n");
7835 Bpp = 4;
7836 break;
7837 default:
7838 MdbPrint(u64ReqHdl, "GWIN Format: Invalid\n");
7839 break;
7840 }
7841
7842 if(u16Regval&GOP_BIT14)
7843 MdbPrint(u64ReqHdl, "GWIN Pixel Alpha: True\n");
7844 else
7845 {
7846 MdbPrint(u64ReqHdl, "GWIN Pixel Alpha: False\n");
7847 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_GWIN_ALPHA01(0), &u16Regval);
7848 MdbPrint(u64ReqHdl, "GWIN Global Alpha Value: %x\n", (MS_U8)(u16Regval&0xFF));
7849 }
7850
7851 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_HSTR(0), &u16Regval);
7852 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_VSTR(0), &u16Regval1);
7853 MdbPrint(u64ReqHdl, "GWIN Position(%d,%d)\n", u16Regval, u16Regval1);
7854
7855 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_DRAM_RBLK_HSIZE(0), &u16Regval);
7856 MdbPrint(u64ReqHdl, "GWIN Pitch: %d\n", u16Regval);
7857
7858 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_HSTR(0), &u16Regval);
7859 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_HEND(0), &u16Regval1);
7860 u16temp = u16Regval1 - u16Regval;
7861 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_VSTR(0), &u16Regval);
7862 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_VEND(0), &u16Regval1);
7863 u16temp1 = u16Regval1 - u16Regval;
7864 if(g_gopDrvCtxLocal.halCtxLocal.pGopChipPro->bPixelModeSupport)
7865 {
7866 MdbPrint(u64ReqHdl, "GWIN Resolution(%d,%d)\n", u16temp, u16temp1);
7867 }
7868 else
7869 {
7870 u16temp = (u16temp*GOP_WordUnit)/Bpp;
7871 MdbPrint(u64ReqHdl, "GWIN Resolution(%d,%d)\n", u16temp, u16temp1);
7872 }
7873 MdbPrint(u64ReqHdl, "GWIN Buffer Size: 0x%lx\n", (MS_U64)(u16temp*u16temp1*Bpp));
7874
7875 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_DRAM_RBLK_L(0), &u16Regval);
7876 HAL_GOP_Read16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_DRAM_RBLK_H(0), &u16Regval1);
7877 DramOffset = ((MS_U32)u16Regval1 << 16) | ((MS_U32)u16Regval);
7878 MdbPrint(u64ReqHdl, "GWIN miu offset address: 0x%lx\n\n", DramOffset);
7879 }
7880
7881 }
7882
MDrv_GOP_MDCMD_EchoCmd(void * pInstance,MS_U64 * u64ReqHdl,char * pcCmdLine)7883 void MDrv_GOP_MDCMD_EchoCmd(void* pInstance, MS_U64* u64ReqHdl, char* pcCmdLine)
7884 {
7885 MS_BOOL enable = FALSE;
7886 MS_U8 GOPnum = 0;
7887 MS_U32 u32BankOffSet = 0;
7888 char pch[] = "=,";
7889 char* psep;
7890
7891 #ifdef INSTANT_PRIVATE
7892 GOP_INSTANT_PRIVATE* psGOPInstPri = NULL;
7893 UtopiaInstanceGetPrivate(pInstance, (void*)&psGOPInstPri);
7894 #endif
7895
7896 psep = strsep(&pcCmdLine,pch);
7897
7898 if(strncmp("GOPOn", psep, 5)==0)
7899 {
7900 psep = strsep(&pcCmdLine,pch);
7901 GOPnum = (MS_U8)atoi(psep);
7902 psep = strsep(&pcCmdLine,pch);
7903 enable = (MS_BOOL)atoi(psep);
7904
7905 if(GOPnum < MAX_GOP_SUPPORT)
7906 {
7907 _GetBnkOfstByGop(GOPnum, &u32BankOffSet);
7908 HAL_GOP_Write16Reg(&g_gopDrvCtxLocal.halCtxLocal, u32BankOffSet+GOP_4G_CTRL0, (enable?0:GOP_BIT0) , GOP_BIT0);
7909 if(enable == TRUE)
7910 MdbPrint(u64ReqHdl,"Enable GOP%d\n", GOPnum);
7911 else
7912 MdbPrint(u64ReqHdl,"Disable GOP%d\n", GOPnum);
7913 }
7914 else
7915 {
7916 MdbPrint(u64ReqHdl,"error GOP num %d, the arg should follow this form [GOPOnOff num=x,x] \n",GOPnum);
7917 }
7918 }
7919
7920 if(strncmp("testpattern", psep, 11)==0)
7921 {
7922 psep = strsep(&pcCmdLine,pch);
7923 enable = (MS_BOOL)atoi(psep);
7924 HAL_GOP_Write16Reg(&g_gopDrvCtxLocal.halCtxLocal,REG_TSTCLR_EN, enable<<SHIFT_TSTCLR_EN, MASK_TSTCLR_EN);
7925 if(enable==1)
7926 MdbPrint(u64ReqHdl,"Enable GOP Test Pattern\n");
7927 else
7928 MdbPrint(u64ReqHdl,"Disable GOP Test Pattern\n");
7929 }
7930 }
7931 #endif
7932