xref: /utopia/UTPA2-700.0.x/modules/xc/drv/xc/mdrv_frc.c (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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94 
95 ///////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// file    mdrv_frc.c
98 /// @brief  Driver Interface
99 /// @author MStar Semiconductor Inc.
100 ///////////////////////////////////////////////////////////////////////////////////////////////////
101 #define MDRV_FRC_C
102 
103 #ifdef MSOS_TYPE_LINUX_KERNEL
104 #include <linux/string.h>
105 #else
106 #include <string.h>
107 #endif
108 // Common Definition
109 #include "MsCommon.h"
110 #include "MsOS.h"
111 #include "utopia_dapi.h"
112 #include "mhal_xc_chip_config.h"
113 #include "xc_hwreg_utility2.h"
114 #include "drvXC_IOPort.h"
115 #include "apiXC.h"
116 #include "apiXC_Adc.h"
117 #include "apiXC_Auto.h"
118 #include "apiXC_ModeParse.h"
119 #include "apiXC_PCMonitor.h"
120 #include "drvXC_HDMI_if.h"
121 #include "drv_sc_display.h"
122 #include "drv_sc_isr.h"
123 #include "mvideo_context.h"
124 #if (LD_ENABLE==1)
125 #include "mdrv_ld.h"
126 #include "mdrv_ldalgo.h"
127 #endif
128 #include "mdrv_sc_3d.h"
129 #include "drv_sc_menuload.h"
130 #include "drvXC_ADC_Internal.h"
131 #include "drv_sc_ip.h"
132 #include "mhal_frc.h"
133 #include "mdrv_frc.h"
134 #include "mhal_sc.h"
135 #include "XC_private.h"
136 #include "mdrv_sc_dynamicscaling.h"
137 #include "drvMIU.h"
138 #include "halCHIP.h"
139 
140 
141 //-------------------------------------------------------------------------------------------------
142 //  Local Defines
143 //-------------------------------------------------------------------------------------------------
144 //static MS_FRC_RGBGAINOFFSET_INFO stGainOffsetSetting;
145 
146 
147 /******************************************************************************/
148 /*                      Debug information                                      */
149 /******************************************************************************/
150 #define _u16FRCDbgSwitch 0
151 
152 #define FRC_DBG_MSG(fmt,...)                                                                 \
153     MS_DEBUG_MSG(do{                                                                                      \
154         if(_u16FRCDbgSwitch){                                                                   \
155            printf( "[PNL_DBG_MSG]: %s: %d \n"  fmt, __FUNCTION__, __LINE__, ## __VA_ARGS__); \
156           }                                                                                  \
157       } while(0))
158 
159 #define FRC_PRINT_VAR(var)                                                                   \
160     do{                                                                                      \
161         if(_u16FRCDbgSwitch){                                                                   \
162           FRC_DBG_MSG("%30s: %d\n", #var, (var));                                            \
163           }                                                                                  \
164       }while(0)
165 
166 #ifndef UNUSED
167 #define UNUSED(x) ((x)=(x))
168 #endif
169 
MDrv_FRC_ByPass_Enable(void * pInstance,MS_BOOL bEnable)170 void MDrv_FRC_ByPass_Enable(void *pInstance, MS_BOOL bEnable)
171 {
172     MHal_FRC_ByPass_Enable(pInstance, bEnable);
173 }
174 
MDrv_FRC_UpdateMDE(void * pInstance,MS_WINDOW_TYPE stDisplayWin)175 void MDrv_FRC_UpdateMDE(void *pInstance, MS_WINDOW_TYPE stDisplayWin)
176 {
177     #if (FRC_INSIDE && (HW_DESIGN_4K2K_VER == 6))
178     XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
179     UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
180     XC_RESOURCE_PRIVATE* pXCResourcePrivate = NULL;
181     UtopiaResourceGetPrivate(g_pXCResource[_XC_SELECT_INTERNAL_VARIABLE(psXCInstPri->u32DeviceID)],(void**)(&pXCResourcePrivate));
182 
183     MS_U16 u16DsipX = (stDisplayWin.x +1) &~1; // Hstart need to be even
184     if ((pXCResourcePrivate->stdrvXC_MVideo_Context.g_bFSCEnabled) &&
185         MHal_FRC_IsFHDToFSC(pInstance,MAIN_WINDOW))
186     {
187         u16DsipX = (stDisplayWin.x/2 +1) &~1; // Hstart need to be even
188         MHal_FRC_TGEN_SetMdeStartEndY(pInstance, stDisplayWin.y/2, (stDisplayWin.y/2 + stDisplayWin.height/2 - 1));
189         MHal_FRC_TGEN_SetMdeStartEndX(pInstance, u16DsipX, (u16DsipX + stDisplayWin.width/2 - 1));
190     }
191     else if (MDrv_XC_Get_3D_Output_Mode(pInstance) != E_XC_3D_OUTPUT_MODE_NONE)
192     {
193         // 3D case, copy bk10 disp to bk68
194         MS_U16 u16Start = 0, u16End = 0, u16DispStart = 0, u16DispEnd = 0, u16Height = 0;
195 
196         // copy main disp Y
197         u16DispStart = SC_R2BYTE(psXCInstPri->u32DeviceID,REG_SC_BK10_0A_L);
198         u16DispEnd = SC_R2BYTE(psXCInstPri->u32DeviceID,REG_SC_BK10_0B_L);
199         u16Height = u16DispEnd - u16DispStart + 1;
200         // FRC 3D,SC transfer to TB,FRC transfer to LA,tb out 3D main display window height is 1/2 of LA
201         if(MHal_FRC_IsEnableFRC3D(pInstance, MAIN_WINDOW) && (pXCResourcePrivate->stdrvXC_3D._bLAToTB) && IS_OUTPUT_4K2K_60HZ_PANEL())
202         {
203             if(!IsVMirrorMode(MAIN_WINDOW))
204             {
205                 u16End = (u16DispStart -pXCResourcePrivate->stdrvXC_MVideo_Context.g_XC_InitData.stPanelInfo.u16VStart)/2 + pXCResourcePrivate->stdrvXC_MVideo_Context.g_XC_InitData.stPanelInfo.u16VStart + u16Height/2 -1;
206                 u16Start = (u16DispStart -pXCResourcePrivate->stdrvXC_MVideo_Context.g_XC_InitData.stPanelInfo.u16VStart)/2 + pXCResourcePrivate->stdrvXC_MVideo_Context.g_XC_InitData.stPanelInfo.u16VStart;
207             }
208             else
209             {
210                 u16Start = (u16DispStart -pXCResourcePrivate->stdrvXC_MVideo_Context.g_XC_InitData.stPanelInfo.u16VStart)/2 + pXCResourcePrivate->stdrvXC_MVideo_Context.g_XC_InitData.stPanelInfo.u16VStart + u16Height/2 -1;
211                 u16End = u16Start + u16Height/2 -1;
212             }
213         }
214         else
215         {
216             u16Start = u16DispStart;
217             u16End = u16DispEnd;
218         }
219         MHal_FRC_TGEN_SetMdeStartEndY(pInstance, u16Start, u16End);
220 
221         // copy main disp X
222         u16Start = SC_R2BYTE(psXCInstPri->u32DeviceID,REG_SC_BK10_08_L);
223         u16End = SC_R2BYTE(psXCInstPri->u32DeviceID,REG_SC_BK10_09_L);
224         MHal_FRC_TGEN_SetMdeStartEndX(pInstance, u16Start, u16End);
225 
226         // copy sub disp Y
227         u16Start = SC_R2BYTE(psXCInstPri->u32DeviceID,REG_SC_BK0F_09_L);
228         u16End = SC_R2BYTE(psXCInstPri->u32DeviceID,REG_SC_BK0F_0A_L);
229         MHal_FRC_TGEN_SetSubMdeStartEndY(pInstance, u16Start, u16End);
230 
231         // copy sub disp X
232         u16Start = SC_R2BYTE(psXCInstPri->u32DeviceID,REG_SC_BK0F_07_L);
233         u16End = SC_R2BYTE(psXCInstPri->u32DeviceID,REG_SC_BK0F_08_L);
234         MHal_FRC_TGEN_SetSubMdeStartEndX(pInstance, u16Start, u16End);
235     }
236     else
237     {
238         MHal_FRC_TGEN_SetMdeStartEndY(pInstance, stDisplayWin.y, (stDisplayWin.y + stDisplayWin.height - 1));
239         MHal_FRC_TGEN_SetMdeStartEndX(pInstance, u16DsipX, (u16DsipX + stDisplayWin.width - 1));
240     }
241     #endif
242 }
243 
MDrv_FRC_Tx_SetTgen(void * pInstance,PMST_PANEL_INFO_t pPanelInfo)244 void MDrv_FRC_Tx_SetTgen(void *pInstance, PMST_PANEL_INFO_t pPanelInfo)
245 {
246     XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING, "pPanelInfo->u16VTotal = %d\n", pPanelInfo->u16VTotal);
247     XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING, "pPanelInfo->u16HTotal = %d\n", pPanelInfo->u16HTotal);
248     XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING, "pPanelInfo->u16DE_VStart = %d\n", pPanelInfo->u16DE_VStart);
249     XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING, "pPanelInfo->u16Height = %d\n", pPanelInfo->u16Height);
250     XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING, "pPanelInfo->u16HStart = %d\n", pPanelInfo->u16HStart);
251     XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING, "pPanelInfo->u16u16Width = %d\n", pPanelInfo->u16Width);
252     XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING, "pPanelInfo->u16HSyncStart = %d, pPanelInfo->u16HSyncEnd = %d\n", pPanelInfo->u16HSyncStart, pPanelInfo->u16HSyncEnd);
253     XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING, "pPanelInfo->u16VSyncStart = %d, pPanelInfo->u16VSyncEnd = %d\n", pPanelInfo->u16VSyncStart, pPanelInfo->u16VSyncEnd);
254     XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING, "pPanelInfo->u16VTrigY = %d\n", pPanelInfo->u16VTrigY);
255     XC_LOG_TRACE(XC_DBGLEVEL_SETTIMING, "pPanelInfo->u16VTrigX = %d\n", pPanelInfo->u16VTrigX);
256 
257     MHal_FRC_TGEN_SetVTotal(pInstance, pPanelInfo->u16VTotal);
258     MHal_FRC_TGEN_SetHTotal(pInstance, pPanelInfo->u16HTotal);
259     MHal_FRC_TGEN_SetFdeStartEndY(pInstance, pPanelInfo->u16DE_VStart, (pPanelInfo->u16DE_VStart + pPanelInfo->u16Height - 1));
260     MHal_FRC_TGEN_SetFdeStartEndX(pInstance, pPanelInfo->u16HStart, (pPanelInfo->u16HStart + pPanelInfo->u16Width - 1));
261 
262     #if (FRC_INSIDE && (HW_DESIGN_4K2K_VER == 6))
263     XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
264     UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
265     XC_RESOURCE_PRIVATE* pXCResourcePrivate = NULL;
266     UtopiaResourceGetPrivate(g_pXCResource[_XC_SELECT_INTERNAL_VARIABLE(psXCInstPri->u32DeviceID)],(void**)(&pXCResourcePrivate));
267     MDrv_FRC_UpdateMDE(pInstance, gSrcInfo[MAIN_WINDOW].stDispWin);
268     #else
269     MHal_FRC_TGEN_SetMdeStartEndY(pInstance, pPanelInfo->u16DE_VStart, (pPanelInfo->u16DE_VStart + pPanelInfo->u16Height - 1));
270     MHal_FRC_TGEN_SetMdeStartEndX(pInstance, pPanelInfo->u16HStart, (pPanelInfo->u16HStart + pPanelInfo->u16Width - 1));
271     #endif
272     MHal_FRC_TGEN_SetHSyncStartEndX(pInstance, pPanelInfo->u16HSyncStart, pPanelInfo->u16HSyncEnd);
273     MHal_FRC_TGEN_SetVSyncStartEndY(pInstance, pPanelInfo->u16VSyncStart, pPanelInfo->u16VSyncEnd);
274     MHal_FRC_TGEN_SetVTrigY(pInstance, pPanelInfo->u16VTrigY);
275     MHal_FRC_TGEN_SetVTrigX(pInstance, pPanelInfo->u16VTrigX);
276     MHal_FRC_SetYTrig(pInstance, 0x88f, 0x890);
277 
278     #if (FRC_INSIDE && (HW_DESIGN_4K2K_VER == 6))
279     MS_U8 u8LPLL_Type = (MS_U8)pXCResourcePrivate->stdrvXC_MVideo_Context.g_XC_InitData.stPanelInfo.eLPLL_Type;
280     if (IsVBY1_16LANE(u8LPLL_Type))
281     {
282         // for maserati mode,
283         // input 50/60 switch, LPLL needs to lock at 100/120Hz
284         // need to adjust FO_TGEN Vtt for LPLL lock
285         MHal_FRC_FO_TGEN_SetVTotal(pInstance, pXCResourcePrivate->stdrvXC_MVideo_Context.g_XC_InitData.stPanelInfo.u16VTotal);
286     }
287     MHal_XC_PixelShiftStatusChange(pInstance, EN_XC_PIXEL_SHIFT_FORCE_UPDATE);
288     #endif
289 }
290 
MDrv_FRC_SetCSC(void * pInstance,MS_BOOL bEnable)291 void MDrv_FRC_SetCSC(void *pInstance, MS_BOOL bEnable)
292 {
293     MHal_FRC_IPM_Csc(pInstance, bEnable);
294     MHal_FRC_OP2_ColorMatrixEn(pInstance, bEnable);
295 }
296 
MDrv_FRC_SetMemFormat(void * pInstance,PFRC_INFO_t pFRCInfo)297 void MDrv_FRC_SetMemFormat(void *pInstance, PFRC_INFO_t pFRCInfo)
298 {
299     MS_U16 u16LineLimit;
300 
301     XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
302     UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
303     XC_RESOURCE_PRIVATE* pXCResourcePrivate = NULL;
304     UtopiaResourceGetPrivate(g_pXCResource[_XC_SELECT_INTERNAL_VARIABLE(psXCInstPri->u32DeviceID)],(void**)(&pXCResourcePrivate));
305 #if 0
306 
307 printf("[%s][%d]pFRCInfo->u32FRC_FrameSize=%lu,pFRCInfo->u16FB_YcountLinePitch=%u,pFRCInfo->u16PanelWidth=%u\n",
308 		__FUNCTION__,__LINE__,pFRCInfo->u32FRC_FrameSize,pFRCInfo->u16FB_YcountLinePitch,pFRCInfo->u16PanelWidth);
309 printf("pFRCInfo->u16PanelHeigh=%u,pFRCInfo->u8FRC3DPanelType=%u,pFRCInfo->u83Dmode=%u\n",
310 		pFRCInfo->u16PanelHeigh,pFRCInfo->u8FRC3DPanelType,pFRCInfo->u83Dmode);
311 printf("pFRCInfo->u8IpMode=%u,pFRCInfo->u8MirrorMode=%u,pFRCInfo->u83D_FI_out=%u,pFRCInfo->bFRC=%u\n",
312 		pFRCInfo->u8IpMode,pFRCInfo->u8MirrorMode,pFRCInfo->u83D_FI_out,pFRCInfo->bFRC);
313 #endif
314     u16LineLimit = MHal_FRC_IPM_GetLineLimit(pInstance, pFRCInfo->u8IpMode, pFRCInfo->u16PanelWidth, pFRCInfo->u8MirrorMode);
315     pFRCInfo->u16FB_YcountLinePitch = MHal_FRC_IPM_GetYcoutLinePitch(pInstance, pFRCInfo->u8IpMode, u16LineLimit);
316 
317     MHal_FRC_SetMemMode(pInstance, pFRCInfo->u8MirrorMode, pFRCInfo->u8IpMode);
318 
319 	MHal_FRC_IPM_SetYCoutLinePitch(pInstance, pFRCInfo->u16FB_YcountLinePitch);
320 
321 //=-------------------
322 ///  set frame buffer.
323     MHal_FRC_IPM_PacketInitCnt(pInstance, pFRCInfo->u8IpMode, u16LineLimit);
324     if(pXCResourcePrivate->stdrvXC_MVideo_Context.g_XC_Pnl_Misc.FRCInfo.u8IpMode == FRC_IP_MEM_IP_RGB_10_SPECIAL)
325     {
326         MHal_FRC_IPM_SetFrameBufferNum(pInstance, 7);
327     }
328     else
329     {
330         MHal_FRC_IPM_SetFrameBufferNum(pInstance, 10);
331     }
332     pFRCInfo->u32FRC_FrameSize = MHal_FRC_IPM_GetFrameYcout(pInstance, pFRCInfo->u16PanelHeigh, pFRCInfo->u16FB_YcountLinePitch);
333     MHal_FRC_IPM_SetBaseAddr(pInstance, pFRCInfo->u32FRC_MEMC_MemAddr, pFRCInfo->u32FRC_FrameSize, pFRCInfo->u16FB_YcountLinePitch, pFRCInfo->u8MirrorMode);
334     MHal_FRC_OPM_SetBaseAddr(pInstance, pFRCInfo->u32FRC_MEMC_MemAddr, pFRCInfo->u32FRC_FrameSize);
335 
336 }
337 
MDrv_FRC_IPM_Init(void * pInstance,PMST_PANEL_INFO_t pPanelInfo,PFRC_INFO_t pFRCInfo)338 void MDrv_FRC_IPM_Init(void *pInstance, PMST_PANEL_INFO_t pPanelInfo, PFRC_INFO_t pFRCInfo)
339 {
340 
341     MHal_FRC_IPM_TestPattern(pInstance, FALSE, 0);
342     MHal_FRC_IPM_SetHTotal(pInstance, pPanelInfo->u16HTotal);
343     MHal_FRC_IPM_SetVTotal(pInstance, pPanelInfo->u16VTotal);
344     MHal_FRC_IPM_HActive(pInstance, 0, pPanelInfo->u16Width);
345     MHal_FRC_IPM_VActive(pInstance, 0, pPanelInfo->u16Height);
346 
347     MHal_FRC_IPM_SetIp2Mc(pInstance, ENABLE);
348     MHal_FRC_IPM_SetRfifoThr(pInstance, 0x1F10); //0x1F2F for Film 32 mode
349     MHal_FRC_IPM_SetWfifoThr(pInstance, 0x4020);
350     MHal_FRC_IPM_SetReadLength(pInstance, 0x0820);
351     MHal_FRC_IPM_SetWriteLength(pInstance, 0x0040);
352     MHal_FRC_IPM_SetRmaskNum(pInstance, 0x00);
353     MHal_FRC_IPM_SetWmaskNum(pInstance, 0x00);
354     MHal_FRC_IPM_SetLvdsInputMode(pInstance, 0x03);
355 
356     MHal_FRC_IPM_SetOsdWinIdx(pInstance, 0x00);
357     MHal_FRC_IPM_SetVPulseLineRst(pInstance, 0x0003);
358     MHal_FRC_IPM_SetVPulseLoc(pInstance, 0x0001);
359     MHal_FRC_IPM_SetLockIntCtrl(pInstance, 0x10);
360     MHal_FRC_IPM_SetBlankBoundary(pInstance, 0x00DB);
361     MHal_FRC_IPM_SetIpCtrl(pInstance, ENABLE, 0x03, 0x00);
362     MHal_FRC_IPM_SetHRefLock(pInstance, 0x05);
363 
364     if(MHal_FRC_IsRGB(pInstance, pFRCInfo->u8IpMode))
365     {
366         MHal_FRC_IPM_RWEn(pInstance, DISABLE,ENABLE);
367     }
368     else
369     {
370         MHal_FRC_IPM_RWEn(pInstance, ENABLE, ENABLE);
371     }
372     MHal_FRC_IPM_CscDither(pInstance, FALSE);
373     MHal_FRC_IPM_CscRound(pInstance, TRUE);
374     MHal_FRC_IPM_CscSaturation(pInstance, TRUE);
375 }
376 
MDrv_FRC_OPM_Init(void * pInstance)377 void MDrv_FRC_OPM_Init(void *pInstance)
378 {
379 
380     MHal_FRC_OPM_SetMlbOutRstCycle(pInstance, 0x08);
381     MHal_FRC_OPM_SetFifoTrigThr(pInstance, 0x6060);
382 
383 
384     // 0x40, fine tune BW at frameinterleave @ 120Hz.
385     // 0x20, decrease BW at 720P frameinterleave
386     MHal_FRC_OPM_SetFifoMaxReadReq(pInstance, 0x60);//40);   // 0x50 //0x7f
387 
388     MHal_FRC_OPM_FuncEn(pInstance, 0x01, 0x02);
389     MHal_FRC_OPM_SetGatingClk(pInstance, 0x20, 0);
390 }
391 
MDrv_FRC_Init(void * pInstance,PMST_PANEL_INFO_t pPanelInfo,PFRC_INFO_t pFRCInfo)392 void MDrv_FRC_Init(void *pInstance, PMST_PANEL_INFO_t pPanelInfo, PFRC_INFO_t pFRCInfo)
393 {
394 #ifdef UFO_XC_SUPPORT_DUAL_MIU
395     MDrv_FRC_IsDdr4Dram(pInstance,pFRCInfo);
396 #endif
397     MHal_FRC_Init(pInstance, pPanelInfo, pFRCInfo);
398 }
399 
400 
401 //FRC_3D_FHD_FI_2x_Passive,       // 3,  1920x1080
402 //FRC_3D_FHD_HH_FI_2x_Passive, // 4,  960x1080
403 //FRC_3D_FHD_HV_FI_2x_Passive, // 5,  1920x540
404 
MDrv_FRC_Set_3D_QMap(void * pInstance,MS_U8 u8FRC3DPanelType,MS_U16 u16sc_in_3dformat,MS_U16 u16sc_out_3dformat,MS_U8 u83D_FI_out)405 void MDrv_FRC_Set_3D_QMap(void *pInstance, MS_U8 u8FRC3DPanelType, MS_U16 u16sc_in_3dformat, MS_U16 u16sc_out_3dformat, MS_U8 u83D_FI_out)
406 {
407     MHal_FRC_Set_3D_QMap(pInstance, u8FRC3DPanelType,  u16sc_in_3dformat,  u16sc_out_3dformat,  u83D_FI_out);
408 }
409 
MDrv_FRC_OPM_SetBaseOfset(void * pInstance,FRC_INFO_t * FRCInfo,E_XC_3D_OUTPUT_MODE u16out_3dformat)410 void MDrv_FRC_OPM_SetBaseOfset(void *pInstance, FRC_INFO_t *FRCInfo, E_XC_3D_OUTPUT_MODE u16out_3dformat)
411 {
412 	#ifdef Eagle_Bringup
413 		return;
414 	#endif
415     XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
416     UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
417     XC_RESOURCE_PRIVATE* pXCResourcePrivate = NULL;
418     UtopiaResourceGetPrivate(g_pXCResource[_XC_SELECT_INTERNAL_VARIABLE(psXCInstPri->u32DeviceID)],(void**)(&pXCResourcePrivate));
419     if ((u16out_3dformat == E_XC_3D_OUTPUT_TOP_BOTTOM) ||
420         (u16out_3dformat == E_XC_3D_OUTPUT_MODE_NONE))
421     {
422         if(pXCResourcePrivate->stdrvXC_MVideo_Context.g_XC_Init_Misc.u32MISC_A & E_XC_INIT_MISC_A_FRC_INSIDE_240HZ)
423         {
424             MHal_FRC_OPM_SetBaseOffset_Data0(pInstance, FRCInfo->u32FRC_FrameSize);
425             MHal_FRC_OPM_SetBaseOffset_Data1(pInstance, FRCInfo->u32FRC_FrameSize);
426             MHal_FRC_OPM_SetBaseOffset_Me0(pInstance, FRCInfo->u32FRC_FrameSize);
427             MHal_FRC_OPM_SetBaseOffset_Me1(pInstance, FRCInfo->u32FRC_FrameSize);
428             MHal_FRC_OPM_SetBaseOffset_Me3(pInstance, FRCInfo->u32FRC_FrameSize);
429             MHal_FRC_OPM_SetBaseOffset_Mr1(pInstance, FRCInfo->u32FRC_FrameSize);
430         }
431         else
432         {
433             MHal_FRC_OPM_SetBaseOffset_Data0(pInstance, FRCInfo->u32FRC_FrameSize/2);
434             MHal_FRC_OPM_SetBaseOffset_Data1(pInstance, FRCInfo->u32FRC_FrameSize/2);
435             MHal_FRC_OPM_SetBaseOffset_Me0(pInstance, FRCInfo->u32FRC_FrameSize/2);
436             MHal_FRC_OPM_SetBaseOffset_Me1(pInstance, FRCInfo->u32FRC_FrameSize/2);
437             MHal_FRC_OPM_SetBaseOffset_Me3(pInstance, FRCInfo->u32FRC_FrameSize/2);
438             MHal_FRC_OPM_SetBaseOffset_Mr1(pInstance, FRCInfo->u32FRC_FrameSize/2);
439         }
440     }
441     else if (u16out_3dformat == E_XC_3D_OUTPUT_FRAME_ALTERNATIVE)
442     {
443         MHal_FRC_OPM_SetBaseOffset_Data0(pInstance, FRCInfo->u32FRC_FrameSize);
444         MHal_FRC_OPM_SetBaseOffset_Data1(pInstance, FRCInfo->u32FRC_FrameSize);
445         MHal_FRC_OPM_SetBaseOffset_Me0(pInstance, FRCInfo->u32FRC_FrameSize);
446         MHal_FRC_OPM_SetBaseOffset_Me1(pInstance, FRCInfo->u32FRC_FrameSize);
447         MHal_FRC_OPM_SetBaseOffset_Me3(pInstance, FRCInfo->u32FRC_FrameSize);
448         MHal_FRC_OPM_SetBaseOffset_Mr1(pInstance, FRCInfo->u32FRC_FrameSize);
449 
450         if ((FRCInfo->u83D_FI_out== E_XC_3D_OUTPUT_FI_1920x1080) ||
451            (FRCInfo->u83D_FI_out == E_XC_3D_OUTPUT_FI_960x1080))
452         {
453             MHal_FRC_OPM_SetBaseOffset_Da0_L(pInstance, (FRCInfo->u32FRC_FrameSize + FRCInfo->u16FB_YcountLinePitch));
454             MHal_FRC_OPM_SetBaseOffset_Da1_L(pInstance, (FRCInfo->u32FRC_FrameSize + FRCInfo->u16FB_YcountLinePitch));
455             MHal_FRC_OPM_SetBaseOffset_Me0_L(pInstance, (FRCInfo->u32FRC_FrameSize + FRCInfo->u16FB_YcountLinePitch));
456             MHal_FRC_OPM_SetBaseOffset_Me1_L(pInstance, (FRCInfo->u32FRC_FrameSize + FRCInfo->u16FB_YcountLinePitch));
457             MHal_FRC_OPM_SetBaseOffset_Me3_L(pInstance, (FRCInfo->u32FRC_FrameSize + FRCInfo->u16FB_YcountLinePitch));
458             MHal_FRC_OPM_SetBaseOffset_Mr1_L(pInstance, (FRCInfo->u32FRC_FrameSize + FRCInfo->u16FB_YcountLinePitch));
459         }
460         else if(FRCInfo->u83D_FI_out == E_XC_3D_OUTPUT_FI_1920x540)
461         {
462             MHal_FRC_OPM_SetBaseOffset_Da0_L(pInstance, 0);
463             MHal_FRC_OPM_SetBaseOffset_Da1_L(pInstance, 0);
464             MHal_FRC_OPM_SetBaseOffset_Me0_L(pInstance, 0);
465             MHal_FRC_OPM_SetBaseOffset_Me1_L(pInstance, 0);
466             MHal_FRC_OPM_SetBaseOffset_Me3_L(pInstance, 0);
467             MHal_FRC_OPM_SetBaseOffset_Mr1_L(pInstance, 0);
468         }
469     }
470     else if(u16out_3dformat == E_XC_3D_OUTPUT_SIDE_BY_SIDE_HALF)
471     {
472         MHal_FRC_OPM_SetBaseOffset_Data0(pInstance, FRCInfo->u16FB_YcountLinePitch/2);
473         MHal_FRC_OPM_SetBaseOffset_Data1(pInstance, FRCInfo->u16FB_YcountLinePitch/2);
474         MHal_FRC_OPM_SetBaseOffset_Me0(pInstance, FRCInfo->u16FB_YcountLinePitch/2);
475         MHal_FRC_OPM_SetBaseOffset_Me1(pInstance, FRCInfo->u16FB_YcountLinePitch/2);
476         MHal_FRC_OPM_SetBaseOffset_Me3(pInstance, FRCInfo->u16FB_YcountLinePitch/2);
477         MHal_FRC_OPM_SetBaseOffset_Mr1(pInstance, FRCInfo->u16FB_YcountLinePitch/2);
478     }
479 }
480 
MDrv_XC_SendCmdToFRC(void * pInstance,MS_U8 u8Cmd,MS_U8 count,FRC_R2_CMD_PARAMETER_t pFRC_R2_Para)481 MS_BOOL MDrv_XC_SendCmdToFRC(void *pInstance, MS_U8 u8Cmd, MS_U8 count, FRC_R2_CMD_PARAMETER_t pFRC_R2_Para )
482 {
483     XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
484     UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
485     XC_RESOURCE_PRIVATE* pXCResourcePrivate = NULL;
486     UtopiaResourceGetPrivate(g_pXCResource[_XC_SELECT_INTERNAL_VARIABLE(psXCInstPri->u32DeviceID)],(void**)(&pXCResourcePrivate));
487 
488     MS_BOOL bValue = FALSE;
489 
490     if(u8Cmd == E_XC_FRC_MB_CMD_SET_MFC_MDOE)
491     {
492 #if (HW_DESIGN_4K2K_VER == 6) // For Manhattan, FSC+FRC
493 //g_u16MEMCLevel defined only by  (HW_DESIGN_4K2K_VER == 6)
494         pXCResourcePrivate->stdrvXC_MVideo_Context.g_u16MEMCLevel =  pFRC_R2_Para.p1;
495 #endif
496         if((gSrcInfo[MAIN_WINDOW].bEnableFPLL == FALSE)
497             &&((pFRC_R2_Para.p1 >= MEMC_LEVEL_LOW) && (pFRC_R2_Para.p1 <= MEMC_LEVEL_HIGH)))
498         {
499             pFRC_R2_Para.p1 = MEMC_LEVEL_OFF;
500         }
501 
502         if(pXCResourcePrivate->stdrvXC_MVideo_Context.g_XC_Init_Misc.u32MISC_B & E_XC_INIT_MISC_B_HDMITX_FREERUN_UCNR_ENABLE)
503         {
504             pFRC_R2_Para.p1 = MEMC_LEVEL_OFF;
505         }
506     }
507     if (pXCResourcePrivate->stdrvXC_MVideo_Context.g_XC_Pnl_Misc.FRCInfo.bFRC)
508     {
509         bValue = MHal_XC_SendCmdToFRC(pInstance, u8Cmd, count, pFRC_R2_Para.p1, pFRC_R2_Para.p2, pFRC_R2_Para.p3,
510                           pFRC_R2_Para.p4, pFRC_R2_Para.p5, pFRC_R2_Para.p6, pFRC_R2_Para.p7, pFRC_R2_Para.p8);
511 
512 #if (HW_DESIGN_3D_VER == 4)
513         // for 2Dto3D case, the FRC FICLK need to be changed
514         //E_MAPI_FRC_MB_CMD_SET_2D_TO_3D_MODE = 0x40,  ParaCnt=5,
515         //          P0 = 2D to 3D ConversionMode(0=Disable, 1=Enable)
516         //          P1 = 3D Depth Gain(0~31)
517         //          P2 = 3D Depth Offset(0~127)
518         //          P3 = Artificial Gain(0~15)
519         //          P4 = L/R Swap (0=Normal, 1=L/R Swap)
520         if(u8Cmd == 0x40)
521         {
522             if(pFRC_R2_Para.p1==ENABLE)
523             {
524                 W2BYTEMSK(L_CLKGEN1(0x35), 0x0004, 0x0004); // clk_idclk_frc
525                 W2BYTEMSK(L_CLKGEN1(0x35), 0x0000, 0x0002); // Not Invert
526                 W2BYTEMSK(L_CLKGEN1(0x35), 0x0000, 0x0001); // Enable clock
527             }
528             else
529             {
530                 W2BYTEMSK(L_CLKGEN1(0x35), 0x0000, 0x0004); // clk_fdclk_frc
531                 W2BYTEMSK(L_CLKGEN1(0x35), 0x0000, 0x0002); // Not Invert
532                 W2BYTEMSK(L_CLKGEN1(0x35), 0x0000, 0x0001); // Enable clock
533             }
534         }
535 #endif
536     }
537 
538     return bValue;
539 }
MDrv_XC_GetMsgFromFRC(void * pInstance,MS_U8 * pu8Cmd,MS_U8 * pu8ParaCount,MS_U8 * pu8Para)540 MS_BOOL MDrv_XC_GetMsgFromFRC(void *pInstance, MS_U8* pu8Cmd, MS_U8* pu8ParaCount, MS_U8* pu8Para)
541 {
542     MS_BOOL bValue;
543     bValue = MHal_XC_GetMsgFromFRC(pInstance, pu8Cmd, pu8ParaCount, pu8Para);
544     return bValue;
545 }
546 
MDrv_XC_set_OC_Reg(void * pInstance,PMST_PANEL_INFO_t pPanelInfo)547 void MDrv_XC_set_OC_Reg(void *pInstance, PMST_PANEL_INFO_t pPanelInfo)
548 {
549     MHal_XC_OC_set_HSyncStartEnd(pInstance, pPanelInfo->u16HSyncStart, pPanelInfo->u16HSyncEnd);
550     MHal_XC_OC_set_VSyncStartEnd(pInstance, pPanelInfo->u16VSyncStart, pPanelInfo->u16VSyncEnd);
551     MHal_XC_OC_set_HFdeStartEnd(pInstance, pPanelInfo->u16HStart, (pPanelInfo->u16HStart + pPanelInfo->u16Width -1));
552     MHal_XC_OC_set_VFdeStartEnd(pInstance, pPanelInfo->u16VStart, (pPanelInfo->u16VStart+pPanelInfo->u16Height-1));
553     MHal_XC_OC_set_HTotal(pInstance, (pPanelInfo->u16HTotal-1));
554     MHal_XC_OC_set_VTotal(pInstance, (pPanelInfo->u16VTotal-1));
555 }
556 
MDrv_FRC_OP2_ColorMatrixEn(void * pInstance,MS_BOOL bEnable)557 void MDrv_FRC_OP2_ColorMatrixEn(void *pInstance, MS_BOOL bEnable)
558 {
559     MHal_FRC_OP2_ColorMatrixEn(pInstance, bEnable);
560 }
MDrv_FRC_OP2_CscDitherEn(void * pInstance,MS_BOOL bEnable)561 void MDrv_FRC_OP2_CscDitherEn(void *pInstance, MS_BOOL bEnable)
562 {
563     MHal_FRC_OP2_CscDitherEn(pInstance, bEnable);
564 }
565 /// FRC_SC30_0x5F[15]
MDrv_FRC_OP2_BrightnessEn(void * pInstance,MS_BOOL bEnable)566 void MDrv_FRC_OP2_BrightnessEn(void *pInstance, MS_BOOL bEnable)
567 {
568     if(bEnable)
569     {
570         MHal_FRC_OP2_DataPathEn(pInstance, BIT(15),  0x00);
571     }
572     else
573     {
574         MHal_FRC_OP2_DataPathEn(pInstance, 0x00,  BIT(15));
575     }
576 }
577 /// FRC_SC30_0x5F[14]
MDrv_FRC_OP2_ContrastEn(void * pInstance,MS_BOOL bEnable)578 void MDrv_FRC_OP2_ContrastEn(void *pInstance, MS_BOOL bEnable)
579 {
580     if(bEnable)
581     {
582         MHal_FRC_OP2_DataPathEn(pInstance, BIT(14), 0x00);
583     }
584     else
585     {
586         MHal_FRC_OP2_DataPathEn(pInstance, 0x00, BIT(14));
587     }
588 }
589 /// FRC_SC30_0x5F[13]
MDrv_FRC_OP2_NoiseRoundEn(void * pInstance,MS_BOOL bEnable)590 void MDrv_FRC_OP2_NoiseRoundEn(void *pInstance, MS_BOOL bEnable)
591 {
592     if(bEnable)
593     {
594         MHal_FRC_OP2_DataPathEn(pInstance, BIT(13), 0x00);
595     }
596     else
597     {
598         MHal_FRC_OP2_DataPathEn(pInstance, 0x00, BIT(13));
599     }
600 }
601 
MDrv_FRC_OP2_SetRGBGain(void * pInstance,MS_U16 u16RedGain,MS_U16 u16GreenGain,MS_U16 u16BlueGain)602 void MDrv_FRC_OP2_SetRGBGain(void *pInstance, MS_U16 u16RedGain, MS_U16 u16GreenGain, MS_U16 u16BlueGain)
603 {
604 //    stGainOffsetSetting.u16RedGain = u16RedGain ;
605 //    stGainOffsetSetting.u16GreenGain = u16GreenGain ;
606 //    stGainOffsetSetting.u16BlueGain = u16BlueGain ;
607 
608     MHal_FRC_OP2_SetGain_R(pInstance, u16RedGain);
609     MHal_FRC_OP2_SetGain_G(pInstance, u16GreenGain);
610     MHal_FRC_OP2_SetGain_B(pInstance, u16BlueGain);
611 }
612 
MDrv_FRC_OP2_SetRGBOffset(void * pInstance,MS_U16 u16RedOffset,MS_U16 u16GreenOffset,MS_U16 u16BlueOffset)613 void MDrv_FRC_OP2_SetRGBOffset(void *pInstance, MS_U16 u16RedOffset, MS_U16 u16GreenOffset, MS_U16 u16BlueOffset)
614 {
615 //    stGainOffsetSetting.u16RedGain = u16RedOffset ;
616 //    stGainOffsetSetting.u16GreenGain = u16GreenOffset ;
617 //    stGainOffsetSetting.u16BlueGain = u16BlueOffset ;
618 
619     MHal_FRC_OP2_SetOffset_R(pInstance, u16RedOffset);
620     MHal_FRC_OP2_SetOffset_G(pInstance, u16GreenOffset);
621     MHal_FRC_OP2_SetOffset_B(pInstance, u16BlueOffset);
622 }
623 
MDrv_FRC_OP2_SetDither(void * pInstance,MS_U16 u16dither)624 void MDrv_FRC_OP2_SetDither(void *pInstance, MS_U16 u16dither)
625 {
626     MHal_FRC_OP2_SetDither(pInstance, u16dither);
627 }
628 
MDrv_FRC_TGEN_SetHTotal(void * pInstance,MS_U16 u16HTotal)629 void MDrv_FRC_TGEN_SetHTotal(void *pInstance, MS_U16 u16HTotal)
630 {
631 	MHal_FRC_TGEN_SetHTotal(pInstance, u16HTotal);
632 }
633 
MDrv_FRC_TGEN_SetVTotal(void * pInstance,MS_U16 u16VTotal)634 void MDrv_FRC_TGEN_SetVTotal(void *pInstance, MS_U16 u16VTotal)
635 {
636 	MHal_FRC_TGEN_SetVTotal(pInstance, u16VTotal);
637 }
638 
639 //FRC IPM/OPM
MDrv_FRC_IPM_SetOffset(void * pInstance,MS_U16 offset)640 void MDrv_FRC_IPM_SetOffset(void *pInstance, MS_U16 offset)
641 {
642     return MHal_FRC_IPM_SetOffset(pInstance, offset);
643 }
644 
MDrv_FRC_IPM_SetFetchNum(void * pInstance,MS_U16 fetch)645 void MDrv_FRC_IPM_SetFetchNum(void *pInstance,MS_U16 fetch)
646 {
647     return MHal_FRC_IPM_SetFetchNum(pInstance, fetch);
648 }
649 
MDrv_FRC_OPM_SetOffset(void * pInstance,MS_U16 offset)650 void MDrv_FRC_OPM_SetOffset(void *pInstance,MS_U16 offset)
651 {
652     return MHal_FRC_OPM_SetOffset(pInstance, offset);
653 }
654 
MDrv_FRC_OPM_SetFetchNum(void * pInstance,MS_U16 fetch)655 void MDrv_FRC_OPM_SetFetchNum(void *pInstance,MS_U16 fetch)
656 {
657     return MHal_FRC_OPM_SetFetchNum(pInstance, fetch);
658 }
659 
660 //FRC OP HSU/VSU
MDrv_FRC_HSU_SetScalingSize(void * pInstance,MS_U16 input,MS_U16 output)661 void MDrv_FRC_HSU_SetScalingSize(void *pInstance, MS_U16 input, MS_U16 output)
662 {
663     return MHal_FRC_HSU_SetScalingSize(pInstance, input, output);
664 }
665 
MDrv_FRC_VSU_SetScalingSize(void * pInstance,MS_U16 input,MS_U16 output)666 void MDrv_FRC_VSU_SetScalingSize(void *pInstance, MS_U16 input, MS_U16 output)
667 {
668     return MHal_FRC_VSU_SetScalingSize(pInstance, input, output);
669 }
670 
671 //force RGB 444
MDrv_FRC_CSC_SelectPath(void * pInstance,MS_U8 type)672 void MDrv_FRC_CSC_SelectPath(void *pInstance, MS_U8 type)
673 {
674     return MHal_FRC_CSC_SelectPath(pInstance, type);
675 }
676 
MDrv_FRC_PNLInfo_Transform(void * pInstance,XC_PANEL_INFO * XC_PNLInfo,XC_PREINIT_INFO_t * XC_PNLInfo_Adv,MST_PANEL_INFO_t * PanelInfo)677 void MDrv_FRC_PNLInfo_Transform(void *pInstance, XC_PANEL_INFO *XC_PNLInfo, XC_PREINIT_INFO_t *XC_PNLInfo_Adv,
678                                                  MST_PANEL_INFO_t *PanelInfo)
679 {
680     XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
681     UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
682     XC_RESOURCE_PRIVATE* pXCResourcePrivate = NULL;
683     UtopiaResourceGetPrivate(g_pXCResource[_XC_SELECT_INTERNAL_VARIABLE(psXCInstPri->u32DeviceID)],(void**)(&pXCResourcePrivate));
684 
685 
686     PanelInfo->u16VSyncStart        = (XC_PNLInfo->u16VTotal -
687                                      (MS_U16)(XC_PNLInfo_Adv->u8PanelVSyncBackPorch + XC_PNLInfo_Adv->u8PanelVSyncWidth));
688     PanelInfo->u16VSyncEnd          = (XC_PNLInfo->u16VTotal -
689                                      (MS_U16)(XC_PNLInfo_Adv->u8PanelVSyncBackPorch));
690     // 4K2K patch, 3840x2160, 4096x2160
691     if( (XC_PNLInfo->u16Width >= 3840) && (XC_PNLInfo->u16Height == 2160) )
692     {
693         PanelInfo->u16HSyncStart        = 0;
694         PanelInfo->u16HSyncEnd          = XC_PNLInfo_Adv->u8PanelHSyncWidth;
695 
696         printf("@@@ 4K2K patch for VTrigX/VtrigY tunning\n");
697         PanelInfo->u16VTrigX           = PanelInfo->u16HSyncEnd + 0x150;
698         PanelInfo->u16VTrigY           = PanelInfo->u16VSyncEnd + 6;
699     }
700     else
701     {
702         PanelInfo->u16HSyncStart        = (XC_PNLInfo->u16HTotal -
703                                          (MS_U16)(XC_PNLInfo_Adv->u8PanelHSyncBackPorch + XC_PNLInfo_Adv->u8PanelHSyncWidth));
704         PanelInfo->u16HSyncEnd          = (XC_PNLInfo->u16HTotal -
705                                          (MS_U16)(XC_PNLInfo_Adv->u8PanelHSyncBackPorch));
706 
707         PanelInfo->u16VTrigX           = XC_PNLInfo_Adv->u16VTrigX;
708         PanelInfo->u16VTrigY           = XC_PNLInfo_Adv->u16VTrigY;
709     }
710 
711     PanelInfo->u16HTotal           = XC_PNLInfo->u16HTotal;
712     PanelInfo->u16VTotal           = XC_PNLInfo->u16VTotal;
713     // DE
714     PanelInfo->u16HStart           = XC_PNLInfo->u16HStart;
715     PanelInfo->u16DE_VStart        = XC_PNLInfo->u16VStart;
716     PanelInfo->u16Width            = XC_PNLInfo->u16Width;
717     PanelInfo->u16Height           = XC_PNLInfo->u16Height;
718     PanelInfo->u16DefaultVFreq     = XC_PNLInfo->u16DefaultVFreq;
719 
720     if (pXCResourcePrivate->stdrvXC_MVideo_Context.g_XC_Init_Misc.u32MISC_A & E_XC_INIT_MISC_A_FRC_INSIDE_4K1K_120HZ)
721     {
722         PanelInfo->u16VTotal           = PanelInfo->u16VTotal/2;
723         PanelInfo->u16VSyncStart       = PanelInfo->u16VSyncStart/2;
724         PanelInfo->u16VSyncEnd         = PanelInfo->u16VSyncStart + XC_PNLInfo_Adv->u8PanelVSyncWidth;
725         PanelInfo->u16DE_VStart        = PanelInfo->u16DE_VStart/2;
726         PanelInfo->u16Height           = PanelInfo->u16Height/2;
727     }
728     else if (pXCResourcePrivate->stdrvXC_MVideo_Context.g_XC_Init_Misc.u32MISC_A & E_XC_INIT_MISC_A_FRC_INSIDE_4K_HALFK_240HZ)
729     {
730         PanelInfo->u16VTotal           = PanelInfo->u16VTotal/4;
731         PanelInfo->u16VSyncStart       = PanelInfo->u16VSyncStart/4;
732         PanelInfo->u16VSyncEnd         = PanelInfo->u16VSyncStart + XC_PNLInfo_Adv->u8PanelVSyncWidth;
733         PanelInfo->u16DE_VStart        = PanelInfo->u16DE_VStart/4;
734         PanelInfo->u16Height           = PanelInfo->u16Height/4;
735     }
736 
737 #if (FRC_INSIDE && (HW_DESIGN_4K2K_VER == 6))
738     if (pXCResourcePrivate->stdrvXC_MVideo_Context.g_bFSCEnabled)
739     {
740         // Manhattan FSC enable case, if SD/FHD input, STGEN need to set as FHD size
741         if (MHal_FRC_IsFHDToFSC(pInstance, MAIN_WINDOW))
742         {
743             PanelInfo->u16HTotal           = PanelInfo->u16HTotal/2;
744             PanelInfo->u16HSyncStart       = PanelInfo->u16HSyncStart/2;
745             PanelInfo->u16HSyncEnd         = PanelInfo->u16HSyncStart + XC_PNLInfo_Adv->u8PanelHSyncWidth;
746             PanelInfo->u16HStart           = (PanelInfo->u16HStart/2 +1) & ~1;  // Hstart need to be even
747             PanelInfo->u16Width            = PanelInfo->u16Width/2;
748 
749             PanelInfo->u16VTotal           = PanelInfo->u16VTotal/2;
750             PanelInfo->u16VSyncStart       = PanelInfo->u16VSyncStart/2;
751             PanelInfo->u16VSyncEnd         = PanelInfo->u16VSyncStart + XC_PNLInfo_Adv->u8PanelVSyncWidth;
752             PanelInfo->u16DE_VStart        = PanelInfo->u16DE_VStart/2;
753             PanelInfo->u16Height           = PanelInfo->u16Height/2;
754         }
755         else if(MHal_FRC_IsEnableFRC3D(pInstance, MAIN_WINDOW))
756         {
757             if(IS_OUTPUT_4K1K_120HZ_PANEL() || IS_OUTPUT_4K0_5K_240HZ_PANEL())
758            {
759                 PanelInfo->u16VTotal           = PanelInfo->u16VTotal*2;
760                 PanelInfo->u16VSyncStart       = PanelInfo->u16VSyncStart*2;
761                 PanelInfo->u16VSyncEnd         = PanelInfo->u16VSyncStart + XC_PNLInfo_Adv->u8PanelVSyncWidth;
762                 //PanelInfo->u16DE_VStart        = PanelInfo->u16DE_VStart*2;
763                 PanelInfo->u16Height           = PanelInfo->u16Height*2;
764             }
765         }
766     }
767 #endif
768 }
769 
MDrv_FRC_Mute(void * pInstance,MS_BOOL bEnable)770 void MDrv_FRC_Mute(void *pInstance, MS_BOOL bEnable)
771 {
772     XC_LOG_TRACE(XC_DBGLEVEL_SETWINDOW, "FRC Mute enable = %d\n", bEnable);
773     MHal_FRC_Mute(pInstance, bEnable);
774 }
775 
MDrv_XC_Set_FRC_InputTiming(void * pInstance,E_XC_FRC_InputTiming enFRC_InputTiming)776 MS_BOOL MDrv_XC_Set_FRC_InputTiming(void *pInstance, E_XC_FRC_InputTiming enFRC_InputTiming)
777 {
778     XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
779     UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
780     XC_RESOURCE_PRIVATE* pXCResourcePrivate = NULL;
781     UtopiaResourceGetPrivate(g_pXCResource[_XC_SELECT_INTERNAL_VARIABLE(psXCInstPri->u32DeviceID)],(void**)(&pXCResourcePrivate));
782 
783     #if FRC_INSIDE
784     pXCResourcePrivate->stdrvXC_MVideo_Context.enFRC_CurrentInputTiming = enFRC_InputTiming;
785     #endif
786     return TRUE;
787 }
788 
MDrv_XC_FRC_Set_Input3DFormat(void * pInstance,E_XC_3D_INPUT_MODE enFrcInput3DType)789 void MDrv_XC_FRC_Set_Input3DFormat(void *pInstance, E_XC_3D_INPUT_MODE enFrcInput3DType)
790 {
791     MS_U8 u8FrcInput3DType = 0;
792     XC_LOG_TRACE(XC_DBGLEVEL_SETWINDOW, "FRC Input 3D Type= %d\n", enFrcInput3DType);
793 
794     switch (enFrcInput3DType) //R2 Input3DFormat(0: 2D, 1: Side-by-side, 2: Top-Bottom, 4: Frame alternative)
795     {
796         case E_XC_3D_INPUT_MODE_NONE:
797             u8FrcInput3DType = E_FRC_INPUT_2D;   //R2 : 2D
798             break;
799         case E_XC_3D_INPUT_SIDE_BY_SIDE_HALF:
800             u8FrcInput3DType = E_FRC_INPUT_3D_SBS;   //R2 : side by side
801             break;
802         case E_XC_3D_INPUT_TOP_BOTTOM:
803             u8FrcInput3DType = E_FRC_INPUT_3D_TD;   //R2 : Top-Down
804             break;
805         case E_XC_3D_INPUT_FRAME_ALTERNATIVE:
806             u8FrcInput3DType = E_FRC_INPUT_3D_FI;    //R2 :  Frame Interleave
807             break;
808         default :
809             u8FrcInput3DType = E_FRC_INPUT_2D;    //R2 : 2D
810             break;
811     }
812 
813     Hal_XC_FRC_R2_Set_Input3DFormat(pInstance, u8FrcInput3DType);
814 }
815 
MDrv_XC_FRC_R2_Set_InputFrameSize(void * pInstance,MS_U16 u16HSize,MS_U16 u16VSize)816 MS_BOOL MDrv_XC_FRC_R2_Set_InputFrameSize(void *pInstance, MS_U16 u16HSize, MS_U16 u16VSize )
817 {
818     return Hal_XC_FRC_R2_Set_InputFrameSize(pInstance, u16HSize, u16VSize );
819 }
820 
MDrv_XC_FRC_R2_Set_OutputFrameSize(void * pInstance,MS_U16 u16HSize,MS_U16 u16VSize)821 MS_BOOL MDrv_XC_FRC_R2_Set_OutputFrameSize(void *pInstance, MS_U16 u16HSize, MS_U16 u16VSize )
822 {
823     return Hal_XC_FRC_R2_Set_OutputFrameSize(pInstance, u16HSize, u16VSize );
824 }
825 
MDrv_FRC_IsDdr4Dram(void * pInstance,PFRC_INFO_t pFRCInfo)826 MS_BOOL MDrv_FRC_IsDdr4Dram(void *pInstance,PFRC_INFO_t pFRCInfo)
827 {
828     XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
829     UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
830     XC_RESOURCE_PRIVATE* pXCResourcePrivate = NULL;
831     UtopiaResourceGetPrivate(g_pXCResource[_XC_SELECT_INTERNAL_VARIABLE(psXCInstPri->u32DeviceID)],(void**)(&pXCResourcePrivate));
832 
833     MS_U8 u8MIUSel_L = 0,u8MIUSel_R=0;
834     MS_U32 u32OffsetAddr = 0;
835     MIU_DDR_TYPE eFrc_L_Type = E_MIU_DDR3,eFrc_R_Type = E_MIU_DDR3;
836     MS_BOOL bRet = FALSE;
837 
838     _phy_to_miu_offset(u8MIUSel_L, u32OffsetAddr, pFRCInfo->u32FRC_MEMC_MemAddr);
839 
840     if ((pXCResourcePrivate->stdrvXC_MVideo_Context.g_XC_Init_Misc.u32MISC_A & E_XC_INIT_MISC_A_FRC_DUAL_MIU) &&
841     (pFRCInfo->u32FRC_R2_MemSize != 0))
842     {
843         _phy_to_miu_offset(u8MIUSel_R, u32OffsetAddr, pFRCInfo->u32FRC_MEMC_MemAddr);
844     }
845     else
846     {
847         u8MIUSel_R = u8MIUSel_L;
848     }
849 
850     bRet = MDrv_MIU_GetDramType(u8MIUSel_L,&eFrc_L_Type);
851     if(bRet == FALSE)
852     {
853         printf("Get dram type fail %s,%d\n",__FUNCTION__,__LINE__);
854     }
855 
856     bRet = MDrv_MIU_GetDramType(u8MIUSel_R,&eFrc_R_Type);
857     if(bRet == FALSE)
858     {
859         printf("Get dram type fail %s,%d\n",__FUNCTION__,__LINE__);
860     }
861 
862     if((eFrc_L_Type == E_MIU_DDR4) || (eFrc_R_Type == E_MIU_DDR4))
863     {
864         pXCResourcePrivate->stdrvXC_MVideo.bUseDdr4DramForFrc = TRUE;
865 
866     }
867     else
868     {
869         pXCResourcePrivate->stdrvXC_MVideo.bUseDdr4DramForFrc = FALSE;
870     }
871 
872     return bRet;
873 }
874 
MDrv_FRC_SetMemoryAddress(void * pInstance,PXC_FRC_ADDRESS_INFO pFRCAddrInfo)875 void MDrv_FRC_SetMemoryAddress(void *pInstance, PXC_FRC_ADDRESS_INFO pFRCAddrInfo)
876 {
877     #if (FRC_INSIDE && (HW_DESIGN_4K2K_VER == 6))
878     XC_INSTANCE_PRIVATE *psXCInstPri = NULL;
879     UtopiaInstanceGetPrivate(pInstance, (void**)&psXCInstPri);
880     XC_RESOURCE_PRIVATE* pXCResourcePrivate = NULL;
881     UtopiaResourceGetPrivate(g_pXCResource[_XC_SELECT_INTERNAL_VARIABLE(psXCInstPri->u32DeviceID)],(void**)(&pXCResourcePrivate));
882 
883     pXCResourcePrivate->stdrvXC_MVideo_Context.g_bIsAddrUpdated = TRUE;
884 
885     pXCResourcePrivate->stdrvXC_MVideo_Context.g_stXC_FRC_Address.u64FRC_IPM_L_MemAddr = pFRCAddrInfo->u64FRC_IPM_L_MemAddr;
886     pXCResourcePrivate->stdrvXC_MVideo_Context.g_stXC_FRC_Address.u64FRC_IPM_L_MemSize = pFRCAddrInfo->u64FRC_IPM_L_MemSize;
887     pXCResourcePrivate->stdrvXC_MVideo_Context.g_stXC_FRC_Address.u64FRC_IPM_R_MemAddr = pFRCAddrInfo->u64FRC_IPM_R_MemAddr;
888     pXCResourcePrivate->stdrvXC_MVideo_Context.g_stXC_FRC_Address.u64FRC_IPM_R_MemSize = pFRCAddrInfo->u64FRC_IPM_R_MemSize;
889     pXCResourcePrivate->stdrvXC_MVideo_Context.g_stXC_FRC_Address.u64FRC_PQ_MemAddr = pFRCAddrInfo->u64FRC_PQ_MemAddr;
890     pXCResourcePrivate->stdrvXC_MVideo_Context.g_stXC_FRC_Address.u64FRC_PQ_MemSize = pFRCAddrInfo->u64FRC_PQ_MemSize;
891     #endif
892 
893 }
894 
895 
896