1 /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 * 3 * Copyright (C) 2021 Rockchip Electronics Co., Ltd. 4 */ 5 6 #ifndef _RKISP_REGS_ISP3X_H 7 #define _RKISP_REGS_ISP3X_H 8 9 #define ISP3X_CTRL_BASE 0x00000000 10 #define ISP3X_VI_ISP_EN (ISP3X_CTRL_BASE + 0x00000) 11 #define ISP3X_VI_ISP_PATH (ISP3X_CTRL_BASE + 0x00004) 12 #define ISP3X_VI_ID (ISP3X_CTRL_BASE + 0x00008) 13 #define ISP3X_VI_ISP_CLK_CTRL (ISP3X_CTRL_BASE + 0x0000c) 14 #define ISP3X_VI_ICCL (ISP3X_CTRL_BASE + 0x00010) 15 #define ISP3X_VI_IRCL (ISP3X_CTRL_BASE + 0x00014) 16 #define ISP3X_VI_DPCL (ISP3X_CTRL_BASE + 0x00018) 17 #define ISP3X_SWS_CFG (ISP3X_CTRL_BASE + 0x0001c) 18 19 #define ISP3X_IMG_EFF_BASE 0x00000200 20 #define ISP3X_IMG_EFF_CTRL (ISP3X_IMG_EFF_BASE + 0x00000) 21 #define ISP3X_IMG_EFF_COLOR_SEL (ISP3X_IMG_EFF_BASE + 0x00004) 22 #define ISP3X_IMG_EFF_TINT (ISP3X_IMG_EFF_BASE + 0x0001c) 23 #define ISP3X_IMG_EFF_CTRL_SHD (ISP3X_IMG_EFF_BASE + 0x00020) 24 25 #define ISP3X_CMSK_BASE 0x00000230 26 #define ISP3X_CMSK_CTRL0 (ISP3X_CMSK_BASE + 0x00000) 27 #define ISP3X_CMSK_CTRL1 (ISP3X_CMSK_BASE + 0x00004) 28 #define ISP3X_CMSK_CTRL2 (ISP3X_CMSK_BASE + 0x00008) 29 #define ISP3X_CMSK_CTRL3 (ISP3X_CMSK_BASE + 0x0000c) 30 #define ISP3X_CMSK_CTRL4 (ISP3X_CMSK_BASE + 0x00010) 31 #define ISP3X_CMSK_CTRL5 (ISP3X_CMSK_BASE + 0x00014) 32 #define ISP3X_CMSK_CTRL6 (ISP3X_CMSK_BASE + 0x00018) 33 #define ISP3X_CMSK_PIC_SIZE (ISP3X_CMSK_BASE + 0x0001c) 34 #define ISP3X_CMSK_YUV0 (ISP3X_CMSK_BASE + 0x00020) 35 #define ISP3X_CMSK_YUV1 (ISP3X_CMSK_BASE + 0x00024) 36 #define ISP3X_CMSK_YUV2 (ISP3X_CMSK_BASE + 0x00028) 37 #define ISP3X_CMSK_YUV3 (ISP3X_CMSK_BASE + 0x0002c) 38 #define ISP3X_CMSK_YUV4 (ISP3X_CMSK_BASE + 0x00030) 39 #define ISP3X_CMSK_YUV5 (ISP3X_CMSK_BASE + 0x00034) 40 #define ISP3X_CMSK_YUV6 (ISP3X_CMSK_BASE + 0x00038) 41 #define ISP3X_CMSK_YUV7 (ISP3X_CMSK_BASE + 0x0003c) 42 #define ISP32_CMSK_YUV8 (ISP3X_CMSK_BASE + 0x00040) 43 #define ISP32_CMSK_YUV9 (ISP3X_CMSK_BASE + 0x00044) 44 #define ISP32_CMSK_YUV10 (ISP3X_CMSK_BASE + 0x00048) 45 #define ISP32_CMSK_YUV11 (ISP3X_CMSK_BASE + 0x0004c) 46 #define ISP3X_CMSK_OFFS0 (ISP3X_CMSK_BASE + 0x00050) 47 #define ISP3X_CMSK_SIZE0 (ISP3X_CMSK_BASE + 0x00054) 48 #define ISP3X_CMSK_OFFS1 (ISP3X_CMSK_BASE + 0x00058) 49 #define ISP3X_CMSK_SIZE1 (ISP3X_CMSK_BASE + 0x0005c) 50 #define ISP3X_CMSK_OFFS2 (ISP3X_CMSK_BASE + 0x00060) 51 #define ISP3X_CMSK_SIZE2 (ISP3X_CMSK_BASE + 0x00064) 52 #define ISP3X_CMSK_OFFS3 (ISP3X_CMSK_BASE + 0x00068) 53 #define ISP3X_CMSK_SIZE3 (ISP3X_CMSK_BASE + 0x0006c) 54 #define ISP3X_CMSK_OFFS4 (ISP3X_CMSK_BASE + 0x00070) 55 #define ISP3X_CMSK_SIZE4 (ISP3X_CMSK_BASE + 0x00074) 56 #define ISP3X_CMSK_OFFS5 (ISP3X_CMSK_BASE + 0x00078) 57 #define ISP3X_CMSK_SIZE5 (ISP3X_CMSK_BASE + 0x0007c) 58 #define ISP3X_CMSK_OFFS6 (ISP3X_CMSK_BASE + 0x00080) 59 #define ISP3X_CMSK_SIZE6 (ISP3X_CMSK_BASE + 0x00084) 60 #define ISP3X_CMSK_OFFS7 (ISP3X_CMSK_BASE + 0x00088) 61 #define ISP3X_CMSK_SIZE7 (ISP3X_CMSK_BASE + 0x0008c) 62 #define ISP32_CMSK_OFFS8 (ISP3X_CMSK_BASE + 0x00090) 63 #define ISP32_CMSK_SIZE8 (ISP3X_CMSK_BASE + 0x00094) 64 #define ISP32_CMSK_OFFS9 (ISP3X_CMSK_BASE + 0x00098) 65 #define ISP32_CMSK_SIZE9 (ISP3X_CMSK_BASE + 0x0009c) 66 #define ISP32_CMSK_OFFS10 (ISP3X_CMSK_BASE + 0x000a0) 67 #define ISP32_CMSK_SIZE10 (ISP3X_CMSK_BASE + 0x000a4) 68 #define ISP32_CMSK_OFFS11 (ISP3X_CMSK_BASE + 0x000a8) 69 #define ISP32_CMSK_SIZE11 (ISP3X_CMSK_BASE + 0x000ac) 70 71 #define ISP3X_SUPER_IMP_BASE 0x00000300 72 #define ISP3X_SUPER_IMP_CTRL (ISP3X_SUPER_IMP_BASE + 0x00000) 73 #define ISP3X_SUPER_IMP_OFFSET_X (ISP3X_SUPER_IMP_BASE + 0x00004) 74 #define ISP3X_SUPER_IMP_OFFSET_Y (ISP3X_SUPER_IMP_BASE + 0x00008) 75 #define ISP3X_SUPER_IMP_COLOR_Y (ISP3X_SUPER_IMP_BASE + 0x0000c) 76 #define ISP3X_SUPER_IMP_COLOR_CB (ISP3X_SUPER_IMP_BASE + 0x00010) 77 #define ISP3X_SUPER_IMP_COLOR_CR (ISP3X_SUPER_IMP_BASE + 0x00014) 78 79 #define ISP3X_ISP_BASE 0x00000400 80 #define ISP3X_ISP_CTRL0 (ISP3X_ISP_BASE + 0x00000) 81 #define ISP3X_ISP_CTRL1 (ISP3X_ISP_BASE + 0x00004) 82 #define ISP3X_ISP_ACQ_H_OFFS (ISP3X_ISP_BASE + 0x00008) 83 #define ISP3X_ISP_ACQ_V_OFFS (ISP3X_ISP_BASE + 0x0000c) 84 #define ISP3X_ISP_ACQ_H_SIZE (ISP3X_ISP_BASE + 0x00010) 85 #define ISP3X_ISP_ACQ_V_SIZE (ISP3X_ISP_BASE + 0x00014) 86 #define ISP3X_ISP_ACQ_NR_FRAMES (ISP3X_ISP_BASE + 0x00018) 87 #define ISP3X_ISP_GAMMA_DX_LO (ISP3X_ISP_BASE + 0x0001c) 88 #define ISP3X_ISP_GAMMA_DX_HI (ISP3X_ISP_BASE + 0x00020) 89 #define ISP3X_ISP_GAMMA_R_Y_0 (ISP3X_ISP_BASE + 0x00024) 90 #define ISP3X_ISP_GAMMA_R_Y_1 (ISP3X_ISP_BASE + 0x00028) 91 #define ISP3X_ISP_GAMMA_R_Y_2 (ISP3X_ISP_BASE + 0x0002c) 92 #define ISP3X_ISP_GAMMA_R_Y_3 (ISP3X_ISP_BASE + 0x00030) 93 #define ISP3X_ISP_GAMMA_R_Y_4 (ISP3X_ISP_BASE + 0x00034) 94 #define ISP3X_ISP_GAMMA_R_Y_5 (ISP3X_ISP_BASE + 0x00038) 95 #define ISP3X_ISP_GAMMA_R_Y_6 (ISP3X_ISP_BASE + 0x0003c) 96 #define ISP3X_ISP_GAMMA_R_Y_7 (ISP3X_ISP_BASE + 0x00040) 97 #define ISP3X_ISP_GAMMA_R_Y_8 (ISP3X_ISP_BASE + 0x00044) 98 #define ISP3X_ISP_GAMMA_R_Y_9 (ISP3X_ISP_BASE + 0x00048) 99 #define ISP3X_ISP_GAMMA_R_Y_10 (ISP3X_ISP_BASE + 0x0004c) 100 #define ISP3X_ISP_GAMMA_R_Y_11 (ISP3X_ISP_BASE + 0x00050) 101 #define ISP3X_ISP_GAMMA_R_Y_12 (ISP3X_ISP_BASE + 0x00054) 102 #define ISP3X_ISP_GAMMA_R_Y_13 (ISP3X_ISP_BASE + 0x00058) 103 #define ISP3X_ISP_GAMMA_R_Y_14 (ISP3X_ISP_BASE + 0x0005c) 104 #define ISP3X_ISP_GAMMA_R_Y_15 (ISP3X_ISP_BASE + 0x00060) 105 #define ISP3X_ISP_GAMMA_R_Y_16 (ISP3X_ISP_BASE + 0x00064) 106 #define ISP3X_ISP_GAMMA_G_Y_0 (ISP3X_ISP_BASE + 0x00068) 107 #define ISP3X_ISP_GAMMA_G_Y_1 (ISP3X_ISP_BASE + 0x0006c) 108 #define ISP3X_ISP_GAMMA_G_Y_2 (ISP3X_ISP_BASE + 0x00070) 109 #define ISP3X_ISP_GAMMA_G_Y_3 (ISP3X_ISP_BASE + 0x00074) 110 #define ISP3X_ISP_GAMMA_G_Y_4 (ISP3X_ISP_BASE + 0x00078) 111 #define ISP3X_ISP_GAMMA_G_Y_5 (ISP3X_ISP_BASE + 0x0007c) 112 #define ISP3X_ISP_GAMMA_G_Y_6 (ISP3X_ISP_BASE + 0x00080) 113 #define ISP3X_ISP_GAMMA_G_Y_7 (ISP3X_ISP_BASE + 0x00084) 114 #define ISP3X_ISP_GAMMA_G_Y_8 (ISP3X_ISP_BASE + 0x00088) 115 #define ISP3X_ISP_GAMMA_G_Y_9 (ISP3X_ISP_BASE + 0x0008c) 116 #define ISP3X_ISP_GAMMA_G_Y_10 (ISP3X_ISP_BASE + 0x00090) 117 #define ISP3X_ISP_GAMMA_G_Y_11 (ISP3X_ISP_BASE + 0x00094) 118 #define ISP3X_ISP_GAMMA_G_Y_12 (ISP3X_ISP_BASE + 0x00098) 119 #define ISP3X_ISP_GAMMA_G_Y_13 (ISP3X_ISP_BASE + 0x0009c) 120 #define ISP3X_ISP_GAMMA_G_Y_14 (ISP3X_ISP_BASE + 0x000a0) 121 #define ISP3X_ISP_GAMMA_G_Y_15 (ISP3X_ISP_BASE + 0x000a4) 122 #define ISP3X_ISP_GAMMA_G_Y_16 (ISP3X_ISP_BASE + 0x000a8) 123 #define ISP3X_ISP_GAMMA_B_Y_0 (ISP3X_ISP_BASE + 0x000ac) 124 #define ISP3X_ISP_GAMMA_B_Y_1 (ISP3X_ISP_BASE + 0x000b0) 125 #define ISP3X_ISP_GAMMA_B_Y_2 (ISP3X_ISP_BASE + 0x000b4) 126 #define ISP3X_ISP_GAMMA_B_Y_3 (ISP3X_ISP_BASE + 0x000b8) 127 #define ISP3X_ISP_GAMMA_B_Y_4 (ISP3X_ISP_BASE + 0x000bc) 128 #define ISP3X_ISP_GAMMA_B_Y_5 (ISP3X_ISP_BASE + 0x000c0) 129 #define ISP3X_ISP_GAMMA_B_Y_6 (ISP3X_ISP_BASE + 0x000c4) 130 #define ISP3X_ISP_GAMMA_B_Y_7 (ISP3X_ISP_BASE + 0x000c8) 131 #define ISP3X_ISP_GAMMA_B_Y_8 (ISP3X_ISP_BASE + 0x000cc) 132 #define ISP3X_ISP_GAMMA_B_Y_9 (ISP3X_ISP_BASE + 0x000d0) 133 #define ISP3X_ISP_GAMMA_B_Y_10 (ISP3X_ISP_BASE + 0x000d4) 134 #define ISP3X_ISP_GAMMA_B_Y_11 (ISP3X_ISP_BASE + 0x000d8) 135 #define ISP3X_ISP_GAMMA_B_Y_12 (ISP3X_ISP_BASE + 0x000dc) 136 #define ISP3X_ISP_GAMMA_B_Y_13 (ISP3X_ISP_BASE + 0x000e0) 137 #define ISP3X_ISP_GAMMA_B_Y_14 (ISP3X_ISP_BASE + 0x000e4) 138 #define ISP3X_ISP_GAMMA_B_Y_15 (ISP3X_ISP_BASE + 0x000e8) 139 #define ISP3X_ISP_GAMMA_B_Y_16 (ISP3X_ISP_BASE + 0x000ec) 140 #define ISP32_ISP_AWB1_GAIN_G (ISP3X_ISP_BASE + 0x00130) 141 #define ISP32_ISP_AWB1_GAIN_RB (ISP3X_ISP_BASE + 0x00134) 142 #define ISP3X_ISP_AWB_GAIN0_G (ISP3X_ISP_BASE + 0x00138) 143 #define ISP3X_ISP_AWB_GAIN0_RB (ISP3X_ISP_BASE + 0x0013c) 144 #define ISP3X_ISP_AWB_GAIN1_G (ISP3X_ISP_BASE + 0x00140) 145 #define ISP3X_ISP_AWB_GAIN1_RB (ISP3X_ISP_BASE + 0x00144) 146 #define ISP3X_ISP_AWB_GAIN2_G (ISP3X_ISP_BASE + 0x00148) 147 #define ISP3X_ISP_AWB_GAIN2_RB (ISP3X_ISP_BASE + 0x0014C) 148 #define ISP3X_ISP_HURRY_CTRL (ISP3X_ISP_BASE + 0x00158) 149 #define ISP3X_ISP_AWQOS_CTRL (ISP3X_ISP_BASE + 0x0015C) 150 #define ISP3X_ISP_ARQOS_CTRL (ISP3X_ISP_BASE + 0x00160) 151 #define ISP32_ISP_IRQ_CFG0 (ISP3X_ISP_BASE + 0x00164) 152 #define ISP32_ISP_IRQ_CFG1 (ISP3X_ISP_BASE + 0x00168) 153 #define ISP3X_ISP_CC_COEFF_0 (ISP3X_ISP_BASE + 0x00170) 154 #define ISP3X_ISP_CC_COEFF_1 (ISP3X_ISP_BASE + 0x00174) 155 #define ISP3X_ISP_CC_COEFF_2 (ISP3X_ISP_BASE + 0x00178) 156 #define ISP3X_ISP_CC_COEFF_3 (ISP3X_ISP_BASE + 0x0017c) 157 #define ISP3X_ISP_CC_COEFF_4 (ISP3X_ISP_BASE + 0x00180) 158 #define ISP3X_ISP_CC_COEFF_5 (ISP3X_ISP_BASE + 0x00184) 159 #define ISP3X_ISP_CC_COEFF_6 (ISP3X_ISP_BASE + 0x00188) 160 #define ISP3X_ISP_CC_COEFF_7 (ISP3X_ISP_BASE + 0x0018c) 161 #define ISP3X_ISP_CC_COEFF_8 (ISP3X_ISP_BASE + 0x00190) 162 #define ISP3X_ISP_OUT_H_OFFS (ISP3X_ISP_BASE + 0x00194) 163 #define ISP3X_ISP_OUT_V_OFFS (ISP3X_ISP_BASE + 0x00198) 164 #define ISP3X_ISP_OUT_H_SIZE (ISP3X_ISP_BASE + 0x0019c) 165 #define ISP3X_ISP_OUT_V_SIZE (ISP3X_ISP_BASE + 0x001a0) 166 #define ISP3X_ISP_FLAGS_SHD (ISP3X_ISP_BASE + 0x001a8) 167 #define ISP3X_ISP_OUT_H_OFFS_SHD (ISP3X_ISP_BASE + 0x001ac) 168 #define ISP3X_ISP_OUT_V_OFFS_SHD (ISP3X_ISP_BASE + 0x001b0) 169 #define ISP3X_ISP_OUT_H_SIZE_SHD (ISP3X_ISP_BASE + 0x001b4) 170 #define ISP3X_ISP_OUT_V_SIZE_SHD (ISP3X_ISP_BASE + 0x001b8) 171 #define ISP3X_ISP_IMSC (ISP3X_ISP_BASE + 0x001bc) 172 #define ISP3X_ISP_RIS (ISP3X_ISP_BASE + 0x001c0) 173 #define ISP3X_ISP_MIS (ISP3X_ISP_BASE + 0x001c4) 174 #define ISP3X_ISP_ICR (ISP3X_ISP_BASE + 0x001c8) 175 #define ISP3X_ISP_ISR (ISP3X_ISP_BASE + 0x001cc) 176 #define ISP3X_ISP_3A_IMSC (ISP3X_ISP_BASE + 0x001d0) 177 #define ISP3X_ISP_3A_RIS (ISP3X_ISP_BASE + 0x001d4) 178 #define ISP3X_ISP_3A_MIS (ISP3X_ISP_BASE + 0x001d8) 179 #define ISP3X_ISP_3A_ICR (ISP3X_ISP_BASE + 0x001dc) 180 #define ISP3X_ISP_ERR (ISP3X_ISP_BASE + 0x0023c) 181 #define ISP3X_ISP_ERR_CLR (ISP3X_ISP_BASE + 0x00240) 182 #define ISP3X_ISP_FRAME_COUNT (ISP3X_ISP_BASE + 0x00244) 183 #define ISP3X_ISP_DEBUG1 (ISP3X_ISP_BASE + 0x00248) 184 #define ISP3X_ISP_DEBUG2 (ISP3X_ISP_BASE + 0x0024C) 185 #define ISP3X_ISP_DEBUG3 (ISP3X_ISP_BASE + 0x00250) 186 #define ISP32_ISP_DEBUG4 (ISP3X_ISP_BASE + 0x00254) 187 #define ISP32_YNR_LUMA_RCTRL (ISP3X_ISP_BASE + 0x00290) 188 #define ISP32_YNR_LUMA_RDATA (ISP3X_ISP_BASE + 0x00294) 189 190 #define ISP3X_FLASH_BASE 0x00000660 191 #define ISP3X_FLASH_CMD (ISP3X_FLASH_BASE + 0x00000) 192 #define ISP3X_FLASH_CONFIG (ISP3X_FLASH_BASE + 0x00004) 193 #define ISP3X_FLASH_PREDIV (ISP3X_FLASH_BASE + 0x00008) 194 #define ISP3X_FLASH_DELAY (ISP3X_FLASH_BASE + 0x0000c) 195 #define ISP3X_FLASH_TIME (ISP3X_FLASH_BASE + 0x00010) 196 #define ISP3X_FLASH_MAXP (ISP3X_FLASH_BASE + 0x00014) 197 198 #define ISP3X_SHUTTER_BASE 0x00000680 199 #define ISP3X_SHUTTER_CTRL (ISP3X_SHUTTER_BASE + 0x00000) 200 #define ISP3X_SHUTTER_PREDIV (ISP3X_SHUTTER_BASE + 0x00004) 201 #define ISP3X_SHUTTER_DELAY (ISP3X_SHUTTER_BASE + 0x00008) 202 #define ISP3X_SHUTTER_TIME (ISP3X_SHUTTER_BASE + 0x0000c) 203 204 #define ISP3X_CCM_BASE 0x00000700 205 #define ISP3X_CCM_CTRL (ISP3X_CCM_BASE + 0x00000) 206 #define ISP3X_CCM_COEFF0_R (ISP3X_CCM_BASE + 0x00004) 207 #define ISP3X_CCM_COEFF1_R (ISP3X_CCM_BASE + 0x00008) 208 #define ISP3X_CCM_COEFF0_G (ISP3X_CCM_BASE + 0x0000c) 209 #define ISP3X_CCM_COEFF1_G (ISP3X_CCM_BASE + 0x00010) 210 #define ISP3X_CCM_COEFF0_B (ISP3X_CCM_BASE + 0x00014) 211 #define ISP3X_CCM_COEFF1_B (ISP3X_CCM_BASE + 0x00018) 212 #define ISP3X_CCM_COEFF0_Y (ISP3X_CCM_BASE + 0x0001c) 213 #define ISP3X_CCM_COEFF1_Y (ISP3X_CCM_BASE + 0x00020) 214 #define ISP3X_CCM_ALP_Y0 (ISP3X_CCM_BASE + 0x00024) 215 #define ISP3X_CCM_ALP_Y1 (ISP3X_CCM_BASE + 0x00028) 216 #define ISP3X_CCM_ALP_Y2 (ISP3X_CCM_BASE + 0x0002c) 217 #define ISP3X_CCM_ALP_Y3 (ISP3X_CCM_BASE + 0x00030) 218 #define ISP3X_CCM_ALP_Y4 (ISP3X_CCM_BASE + 0x00034) 219 #define ISP3X_CCM_ALP_Y5 (ISP3X_CCM_BASE + 0x00038) 220 #define ISP3X_CCM_ALP_Y6 (ISP3X_CCM_BASE + 0x0003c) 221 #define ISP3X_CCM_ALP_Y7 (ISP3X_CCM_BASE + 0x00040) 222 #define ISP3X_CCM_ALP_Y8 (ISP3X_CCM_BASE + 0x00044) 223 #define ISP3X_CCM_BOUND_BIT (ISP3X_CCM_BASE + 0x00048) 224 #define ISP32_CCM_ENHANCE0 (ISP3X_CCM_BASE + 0x0004c) 225 #define ISP32_CCM_ENHANCE1 (ISP3X_CCM_BASE + 0x00050) 226 227 #define ISP3X_CPROC_BASE 0x00000800 228 #define ISP3X_CPROC_CTRL (ISP3X_CPROC_BASE + 0x00000) 229 #define ISP3X_CPROC_CONTRAST (ISP3X_CPROC_BASE + 0x00004) 230 #define ISP3X_CPROC_BRIGHTNESS (ISP3X_CPROC_BASE + 0x00008) 231 #define ISP3X_CPROC_SATURATION (ISP3X_CPROC_BASE + 0x0000c) 232 #define ISP3X_CPROC_HUE (ISP3X_CPROC_BASE + 0x00010) 233 234 #define ISP3X_DUAL_CROP_BASE 0x00000880 235 #define ISP3X_DUAL_CROP_CTRL (ISP3X_DUAL_CROP_BASE + 0x00000) 236 #define ISP3X_DUAL_CROP_M_H_OFFS (ISP3X_DUAL_CROP_BASE + 0x00004) 237 #define ISP3X_DUAL_CROP_M_V_OFFS (ISP3X_DUAL_CROP_BASE + 0x00008) 238 #define ISP3X_DUAL_CROP_M_H_SIZE (ISP3X_DUAL_CROP_BASE + 0x0000c) 239 #define ISP3X_DUAL_CROP_M_V_SIZE (ISP3X_DUAL_CROP_BASE + 0x00010) 240 #define ISP3X_DUAL_CROP_S_H_OFFS (ISP3X_DUAL_CROP_BASE + 0x00014) 241 #define ISP3X_DUAL_CROP_S_V_OFFS (ISP3X_DUAL_CROP_BASE + 0x00018) 242 #define ISP3X_DUAL_CROP_S_H_SIZE (ISP3X_DUAL_CROP_BASE + 0x0001c) 243 #define ISP3X_DUAL_CROP_S_V_SIZE (ISP3X_DUAL_CROP_BASE + 0x00020) 244 #define ISP3X_DUAL_CROP_M_H_OFFS_SHD (ISP3X_DUAL_CROP_BASE + 0x00024) 245 #define ISP3X_DUAL_CROP_M_V_OFFS_SHD (ISP3X_DUAL_CROP_BASE + 0x00028) 246 #define ISP3X_DUAL_CROP_M_H_SIZE_SHD (ISP3X_DUAL_CROP_BASE + 0x0002c) 247 #define ISP3X_DUAL_CROP_M_V_SIZE_SHD (ISP3X_DUAL_CROP_BASE + 0x00030) 248 #define ISP3X_DUAL_CROP_S_H_OFFS_SHD (ISP3X_DUAL_CROP_BASE + 0x00034) 249 #define ISP3X_DUAL_CROP_S_V_OFFS_SHD (ISP3X_DUAL_CROP_BASE + 0x00038) 250 #define ISP3X_DUAL_CROP_S_H_SIZE_SHD (ISP3X_DUAL_CROP_BASE + 0x0003c) 251 #define ISP3X_DUAL_CROP_S_V_SIZE_SHD (ISP3X_DUAL_CROP_BASE + 0x00040) 252 #define ISP3X_DUAL_CROP_FBC_H_OFFS (ISP3X_DUAL_CROP_BASE + 0x00044) 253 #define ISP3X_DUAL_CROP_FBC_V_OFFS (ISP3X_DUAL_CROP_BASE + 0x00048) 254 #define ISP3X_DUAL_CROP_FBC_H_SIZE (ISP3X_DUAL_CROP_BASE + 0x0004C) 255 #define ISP3X_DUAL_CROP_FBC_V_SIZE (ISP3X_DUAL_CROP_BASE + 0x00050) 256 #define ISP3X_DUAL_CROP_FBC_H_OFFS_SHD (ISP3X_DUAL_CROP_BASE + 0x00054) 257 #define ISP3X_DUAL_CROP_FBC_V_OFFS_SHD (ISP3X_DUAL_CROP_BASE + 0x00058) 258 #define ISP3X_DUAL_CROP_FBC_H_SIZE_SHD (ISP3X_DUAL_CROP_BASE + 0x0005C) 259 #define ISP3X_DUAL_CROP_FBC_V_SIZE_SHD (ISP3X_DUAL_CROP_BASE + 0x00060) 260 261 #define ISP3X_GAMMA_OUT_BASE 0x00000900 262 #define ISP3X_GAMMA_OUT_CTRL (ISP3X_GAMMA_OUT_BASE + 0x00000) 263 #define ISP3X_GAMMA_OUT_OFFSET (ISP3X_GAMMA_OUT_BASE + 0x00004) 264 #define ISP3X_GAMMA_OUT_Y0 (ISP3X_GAMMA_OUT_BASE + 0x00010) 265 #define ISP3X_GAMMA_OUT_Y1 (ISP3X_GAMMA_OUT_BASE + 0x00014) 266 #define ISP3X_GAMMA_OUT_Y2 (ISP3X_GAMMA_OUT_BASE + 0x00018) 267 #define ISP3X_GAMMA_OUT_Y3 (ISP3X_GAMMA_OUT_BASE + 0x0001c) 268 #define ISP3X_GAMMA_OUT_Y4 (ISP3X_GAMMA_OUT_BASE + 0x00020) 269 #define ISP3X_GAMMA_OUT_Y5 (ISP3X_GAMMA_OUT_BASE + 0x00024) 270 #define ISP3X_GAMMA_OUT_Y6 (ISP3X_GAMMA_OUT_BASE + 0x00028) 271 #define ISP3X_GAMMA_OUT_Y7 (ISP3X_GAMMA_OUT_BASE + 0x0002c) 272 #define ISP3X_GAMMA_OUT_Y8 (ISP3X_GAMMA_OUT_BASE + 0x00030) 273 #define ISP3X_GAMMA_OUT_Y9 (ISP3X_GAMMA_OUT_BASE + 0x00034) 274 #define ISP3X_GAMMA_OUT_Y10 (ISP3X_GAMMA_OUT_BASE + 0x00038) 275 #define ISP3X_GAMMA_OUT_Y11 (ISP3X_GAMMA_OUT_BASE + 0x0003c) 276 #define ISP3X_GAMMA_OUT_Y12 (ISP3X_GAMMA_OUT_BASE + 0x00040) 277 #define ISP3X_GAMMA_OUT_Y13 (ISP3X_GAMMA_OUT_BASE + 0x00044) 278 #define ISP3X_GAMMA_OUT_Y14 (ISP3X_GAMMA_OUT_BASE + 0x00048) 279 #define ISP3X_GAMMA_OUT_Y15 (ISP3X_GAMMA_OUT_BASE + 0x0004c) 280 #define ISP3X_GAMMA_OUT_Y16 (ISP3X_GAMMA_OUT_BASE + 0x00050) 281 #define ISP3X_GAMMA_OUT_Y17 (ISP3X_GAMMA_OUT_BASE + 0x00054) 282 #define ISP3X_GAMMA_OUT_Y18 (ISP3X_GAMMA_OUT_BASE + 0x00058) 283 #define ISP3X_GAMMA_OUT_Y19 (ISP3X_GAMMA_OUT_BASE + 0x0005c) 284 #define ISP3X_GAMMA_OUT_Y20 (ISP3X_GAMMA_OUT_BASE + 0x00060) 285 #define ISP3X_GAMMA_OUT_Y21 (ISP3X_GAMMA_OUT_BASE + 0x00064) 286 #define ISP3X_GAMMA_OUT_Y22 (ISP3X_GAMMA_OUT_BASE + 0x00068) 287 #define ISP3X_GAMMA_OUT_Y23 (ISP3X_GAMMA_OUT_BASE + 0x0006c) 288 #define ISP3X_GAMMA_OUT_Y24 (ISP3X_GAMMA_OUT_BASE + 0x00070) 289 290 #define ISP3X_MAIN_RESIZE_BASE 0x00000C00 291 #define ISP3X_MAIN_RESIZE_CTRL (ISP3X_MAIN_RESIZE_BASE + 0x00000) 292 #define ISP3X_MAIN_RESIZE_SCALE_HY (ISP3X_MAIN_RESIZE_BASE + 0x00004) 293 #define ISP3X_MAIN_RESIZE_SCALE_HCB (ISP3X_MAIN_RESIZE_BASE + 0x00008) 294 #define ISP3X_MAIN_RESIZE_SCALE_HCR (ISP3X_MAIN_RESIZE_BASE + 0x0000c) 295 #define ISP3X_MAIN_RESIZE_SCALE_VY (ISP3X_MAIN_RESIZE_BASE + 0x00010) 296 #define ISP3X_MAIN_RESIZE_SCALE_VC (ISP3X_MAIN_RESIZE_BASE + 0x00014) 297 #define ISP3X_MAIN_RESIZE_PHASE_HY (ISP3X_MAIN_RESIZE_BASE + 0x00018) 298 #define ISP3X_MAIN_RESIZE_PHASE_HC (ISP3X_MAIN_RESIZE_BASE + 0x0001c) 299 #define ISP3X_MAIN_RESIZE_PHASE_VY (ISP3X_MAIN_RESIZE_BASE + 0x00020) 300 #define ISP3X_MAIN_RESIZE_PHASE_VC (ISP3X_MAIN_RESIZE_BASE + 0x00024) 301 #define ISP3X_MAIN_RESIZE_SCALE_LUT_ADDR (ISP3X_MAIN_RESIZE_BASE + 0x00028) 302 #define ISP3X_MAIN_RESIZE_SCALE_LUT (ISP3X_MAIN_RESIZE_BASE + 0x0002c) 303 #define ISP3X_MAIN_RESIZE_CTRL_SHD (ISP3X_MAIN_RESIZE_BASE + 0x00030) 304 #define ISP3X_MAIN_RESIZE_SCALE_HY_SHD (ISP3X_MAIN_RESIZE_BASE + 0x00034) 305 #define ISP3X_MAIN_RESIZE_SCALE_HCB_SHD (ISP3X_MAIN_RESIZE_BASE + 0x00038) 306 #define ISP3X_MAIN_RESIZE_SCALE_HCR_SHD (ISP3X_MAIN_RESIZE_BASE + 0x0003c) 307 #define ISP3X_MAIN_RESIZE_SCALE_VY_SHD (ISP3X_MAIN_RESIZE_BASE + 0x00040) 308 #define ISP3X_MAIN_RESIZE_SCALE_VC_SHD (ISP3X_MAIN_RESIZE_BASE + 0x00044) 309 #define ISP3X_MAIN_RESIZE_PHASE_HY_SHD (ISP3X_MAIN_RESIZE_BASE + 0x00048) 310 #define ISP3X_MAIN_RESIZE_PHASE_HC_SHD (ISP3X_MAIN_RESIZE_BASE + 0x0004c) 311 #define ISP3X_MAIN_RESIZE_PHASE_VY_SHD (ISP3X_MAIN_RESIZE_BASE + 0x00050) 312 #define ISP3X_MAIN_RESIZE_PHASE_VC_SHD (ISP3X_MAIN_RESIZE_BASE + 0x00054) 313 #define ISP3X_MAIN_RESIZE_HY_SIZE (ISP3X_MAIN_RESIZE_BASE + 0x00058) 314 #define ISP3X_MAIN_RESIZE_HC_SIZE (ISP3X_MAIN_RESIZE_BASE + 0x0005C) 315 #define ISP3X_MAIN_RESIZE_HY_OFFS_MI (ISP3X_MAIN_RESIZE_BASE + 0x00060) 316 #define ISP3X_MAIN_RESIZE_HC_OFFS_MI (ISP3X_MAIN_RESIZE_BASE + 0x00064) 317 #define ISP3X_MAIN_RESIZE_HY_SIZE_SHD (ISP3X_MAIN_RESIZE_BASE + 0x00068) 318 #define ISP3X_MAIN_RESIZE_HC_SIZE_SHD (ISP3X_MAIN_RESIZE_BASE + 0x0006C) 319 #define ISP3X_MAIN_RESIZE_HY_OFFS_MI_SHD (ISP3X_MAIN_RESIZE_BASE + 0x00070) 320 #define ISP3X_MAIN_RESIZE_HC_OFFS_MI_SHD (ISP3X_MAIN_RESIZE_BASE + 0x00074) 321 #define ISP3X_MAIN_RESIZE_IN_CROP_OFFSET (ISP3X_MAIN_RESIZE_BASE + 0x00078) 322 323 #define ISP32_BP_RESIZE_BASE 0x00000E00 324 #define ISP32_BP_RESIZE_CTRL (ISP32_BP_RESIZE_BASE + 0x00000) 325 #define ISP32_BP_RESIZE_SCALE_HY (ISP32_BP_RESIZE_BASE + 0x00004) 326 #define ISP32_BP_RESIZE_SCALE_HCB (ISP32_BP_RESIZE_BASE + 0x00008) 327 #define ISP32_BP_RESIZE_SCALE_HCR (ISP32_BP_RESIZE_BASE + 0x0000c) 328 #define ISP32_BP_RESIZE_SCALE_VY (ISP32_BP_RESIZE_BASE + 0x00010) 329 #define ISP32_BP_RESIZE_SCALE_VC (ISP32_BP_RESIZE_BASE + 0x00014) 330 #define ISP32_BP_RESIZE_PHASE_HY (ISP32_BP_RESIZE_BASE + 0x00018) 331 #define ISP32_BP_RESIZE_PHASE_HC (ISP32_BP_RESIZE_BASE + 0x0001c) 332 #define ISP32_BP_RESIZE_PHASE_VY (ISP32_BP_RESIZE_BASE + 0x00020) 333 #define ISP32_BP_RESIZE_PHASE_VC (ISP32_BP_RESIZE_BASE + 0x00024) 334 #define ISP32_BP_RESIZE_SCALE_LUT_ADDR (ISP32_BP_RESIZE_BASE + 0x00028) 335 #define ISP32_BP_RESIZE_SCALE_LUT (ISP32_BP_RESIZE_BASE + 0x0002c) 336 #define ISP32_BP_RESIZE_CTRL_SHD (ISP32_BP_RESIZE_BASE + 0x00030) 337 #define ISP32_BP_RESIZE_SCALE_HY_SHD (ISP32_BP_RESIZE_BASE + 0x00034) 338 #define ISP32_BP_RESIZE_SCALE_HCB_SHD (ISP32_BP_RESIZE_BASE + 0x00038) 339 #define ISP32_BP_RESIZE_SCALE_HCR_SHD (ISP32_BP_RESIZE_BASE + 0x0003c) 340 #define ISP32_BP_RESIZE_SCALE_VY_SHD (ISP32_BP_RESIZE_BASE + 0x00040) 341 #define ISP32_BP_RESIZE_SCALE_VC_SHD (ISP32_BP_RESIZE_BASE + 0x00044) 342 #define ISP32_BP_RESIZE_PHASE_HY_SHD (ISP32_BP_RESIZE_BASE + 0x00048) 343 #define ISP32_BP_RESIZE_PHASE_HC_SHD (ISP32_BP_RESIZE_BASE + 0x0004c) 344 #define ISP32_BP_RESIZE_PHASE_VY_SHD (ISP32_BP_RESIZE_BASE + 0x00050) 345 #define ISP32_BP_RESIZE_PHASE_VC_SHD (ISP32_BP_RESIZE_BASE + 0x00054) 346 347 #define ISP3X_SELF_RESIZE_BASE 0x00001000 348 #define ISP3X_SELF_RESIZE_CTRL (ISP3X_SELF_RESIZE_BASE + 0x00000) 349 #define ISP3X_SELF_RESIZE_SCALE_HY (ISP3X_SELF_RESIZE_BASE + 0x00004) 350 #define ISP3X_SELF_RESIZE_SCALE_HCB (ISP3X_SELF_RESIZE_BASE + 0x00008) 351 #define ISP3X_SELF_RESIZE_SCALE_HCR (ISP3X_SELF_RESIZE_BASE + 0x0000c) 352 #define ISP3X_SELF_RESIZE_SCALE_VY (ISP3X_SELF_RESIZE_BASE + 0x00010) 353 #define ISP3X_SELF_RESIZE_SCALE_VC (ISP3X_SELF_RESIZE_BASE + 0x00014) 354 #define ISP3X_SELF_RESIZE_PHASE_HY (ISP3X_SELF_RESIZE_BASE + 0x00018) 355 #define ISP3X_SELF_RESIZE_PHASE_HC (ISP3X_SELF_RESIZE_BASE + 0x0001c) 356 #define ISP3X_SELF_RESIZE_PHASE_VY (ISP3X_SELF_RESIZE_BASE + 0x00020) 357 #define ISP3X_SELF_RESIZE_PHASE_VC (ISP3X_SELF_RESIZE_BASE + 0x00024) 358 #define ISP3X_SELF_RESIZE_SCALE_LUT_ADDR (ISP3X_SELF_RESIZE_BASE + 0x00028) 359 #define ISP3X_SELF_RESIZE_SCALE_LUT (ISP3X_SELF_RESIZE_BASE + 0x0002c) 360 #define ISP3X_SELF_RESIZE_CTRL_SHD (ISP3X_SELF_RESIZE_BASE + 0x00030) 361 #define ISP3X_SELF_RESIZE_SCALE_HY_SHD (ISP3X_SELF_RESIZE_BASE + 0x00034) 362 #define ISP3X_SELF_RESIZE_SCALE_HCB_SHD (ISP3X_SELF_RESIZE_BASE + 0x00038) 363 #define ISP3X_SELF_RESIZE_SCALE_HCR_SHD (ISP3X_SELF_RESIZE_BASE + 0x0003c) 364 #define ISP3X_SELF_RESIZE_SCALE_VY_SHD (ISP3X_SELF_RESIZE_BASE + 0x00040) 365 #define ISP3X_SELF_RESIZE_SCALE_VC_SHD (ISP3X_SELF_RESIZE_BASE + 0x00044) 366 #define ISP3X_SELF_RESIZE_PHASE_HY_SHD (ISP3X_SELF_RESIZE_BASE + 0x00048) 367 #define ISP3X_SELF_RESIZE_PHASE_HC_SHD (ISP3X_SELF_RESIZE_BASE + 0x0004c) 368 #define ISP3X_SELF_RESIZE_PHASE_VY_SHD (ISP3X_SELF_RESIZE_BASE + 0x00050) 369 #define ISP3X_SELF_RESIZE_PHASE_VC_SHD (ISP3X_SELF_RESIZE_BASE + 0x00054) 370 #define ISP3X_SELF_RESIZE_HY_SIZE (ISP3X_SELF_RESIZE_BASE + 0x00058) 371 #define ISP3X_SELF_RESIZE_HC_SIZE (ISP3X_SELF_RESIZE_BASE + 0x0005C) 372 #define ISP3X_SELF_RESIZE_HY_OFFS_MI (ISP3X_SELF_RESIZE_BASE + 0x00060) 373 #define ISP3X_SELF_RESIZE_HC_OFFS_MI (ISP3X_SELF_RESIZE_BASE + 0x00064) 374 #define ISP3X_SELF_RESIZE_HY_SIZE_SHD (ISP3X_SELF_RESIZE_BASE + 0x00068) 375 #define ISP3X_SELF_RESIZE_HC_SIZE_SHD (ISP3X_SELF_RESIZE_BASE + 0x0006C) 376 #define ISP3X_SELF_RESIZE_HY_OFFS_MI_SHD (ISP3X_SELF_RESIZE_BASE + 0x00070) 377 #define ISP3X_SELF_RESIZE_HC_OFFS_MI_SHD (ISP3X_SELF_RESIZE_BASE + 0x00074) 378 #define ISP3X_SELF_RESIZE_IN_CROP_OFFSET (ISP3X_SELF_RESIZE_BASE + 0x00078) 379 380 #define ISP32_SELF_SCALE_BASE 0x00001000 381 #define ISP32_SELF_SCALE_CTRL (ISP32_SELF_SCALE_BASE + 0x0000) 382 #define ISP32_SELF_SCALE_UPDATE (ISP32_SELF_SCALE_BASE + 0x0004) 383 #define ISP32_SELF_SCALE_SRC_SIZE (ISP32_SELF_SCALE_BASE + 0x0008) 384 #define ISP32_SELF_SCALE_DST_SIZE (ISP32_SELF_SCALE_BASE + 0x000c) 385 #define ISP32_SELF_SCALE_HY_FAC (ISP32_SELF_SCALE_BASE + 0x0010) 386 #define ISP32_SELF_SCALE_HC_FAC (ISP32_SELF_SCALE_BASE + 0x0014) 387 #define ISP32_SELF_SCALE_VY_FAC (ISP32_SELF_SCALE_BASE + 0x0018) 388 #define ISP32_SELF_SCALE_VC_FAC (ISP32_SELF_SCALE_BASE + 0x001c) 389 #define ISP32_SELF_SCALE_HY_OFFS (ISP32_SELF_SCALE_BASE + 0x0020) 390 #define ISP32_SELF_SCALE_HC_OFFS (ISP32_SELF_SCALE_BASE + 0x0024) 391 #define ISP32_SELF_SCALE_PHASE_HY (ISP32_SELF_SCALE_BASE + 0x0030) 392 #define ISP32_SELF_SCALE_PHASE_HC (ISP32_SELF_SCALE_BASE + 0x0034) 393 #define ISP32_SELF_SCALE_PHASE_VY (ISP32_SELF_SCALE_BASE + 0x0038) 394 #define ISP32_SELF_SCALE_PHASE_VC (ISP32_SELF_SCALE_BASE + 0x003c) 395 #define ISP32_SELF_SCALE_HY_SIZE (ISP32_SELF_SCALE_BASE + 0x0040) 396 #define ISP32_SELF_SCALE_HC_SIZE (ISP32_SELF_SCALE_BASE + 0x0044) 397 #define ISP32_SELF_SCALE_HY_OFFS_MI (ISP32_SELF_SCALE_BASE + 0x0048) 398 #define ISP32_SELF_SCALE_HC_OFFS_MI (ISP32_SELF_SCALE_BASE + 0x004c) 399 #define ISP32_SELF_SCALE_IN_CROP_OFFSET (ISP32_SELF_SCALE_BASE + 0x0050) 400 #define ISP32_SELF_SCALE_CTRL_SHD (ISP32_SELF_SCALE_BASE + 0x0080) 401 #define ISP32_SELF_SCALE_SRC_SIZE_SHD (ISP32_SELF_SCALE_BASE + 0x0088) 402 #define ISP32_SELF_SCALE_DST_SIZE_SHD (ISP32_SELF_SCALE_BASE + 0x008c) 403 #define ISP32_SELF_SCALE_HY_FAC_SHD (ISP32_SELF_SCALE_BASE + 0x0090) 404 #define ISP32_SELF_SCALE_HC_FAC_SHD (ISP32_SELF_SCALE_BASE + 0x0094) 405 #define ISP32_SELF_SCALE_VY_FAC_SHD (ISP32_SELF_SCALE_BASE + 0x0098) 406 #define ISP32_SELF_SCALE_VC_FAC_SHD (ISP32_SELF_SCALE_BASE + 0x009c) 407 #define ISP32_SELF_SCALE_HY_OFFS_SHD (ISP32_SELF_SCALE_BASE + 0x00a0) 408 #define ISP32_SELF_SCALE_HC_OFFS_SHD (ISP32_SELF_SCALE_BASE + 0x00a4) 409 #define ISP32_SELF_SCALE_PHASE_HY_SHD (ISP32_SELF_SCALE_BASE + 0x00b0) 410 #define ISP32_SELF_SCALE_PHASE_HC_SHD (ISP32_SELF_SCALE_BASE + 0x00b4) 411 #define ISP32_SELF_SCALE_PHASE_VY_SHD (ISP32_SELF_SCALE_BASE + 0x00b8) 412 #define ISP32_SELF_SCALE_PHASE_VC_SHD (ISP32_SELF_SCALE_BASE + 0x00bc) 413 #define ISP32_SELF_SCALE_HY_SIZE_SHD (ISP32_SELF_SCALE_BASE + 0x00c0) 414 #define ISP32_SELF_SCALE_HC_SIZE_SHD (ISP32_SELF_SCALE_BASE + 0x00c4) 415 #define ISP32_SELF_SCALE_HY_OFFS_MI_SHD (ISP32_SELF_SCALE_BASE + 0x00c8) 416 #define ISP32_SELF_SCALE_HC_OFFS_MI_SHD (ISP32_SELF_SCALE_BASE + 0x00cc) 417 #define ISP32_SELF_SCALE_IN_CROP_OFFSET_SHD (ISP32_SELF_SCALE_BASE + 0x00d0) 418 419 #define ISP3X_MI_BASE 0x00001400 420 #define ISP3X_MI_WR_CTRL (ISP3X_MI_BASE + 0x00000) 421 #define ISP3X_MI_WR_INIT (ISP3X_MI_BASE + 0x00004) 422 #define ISP3X_MI_MP_WR_Y_BASE (ISP3X_MI_BASE + 0x00008) 423 #define ISP3X_MI_MP_WR_Y_SIZE (ISP3X_MI_BASE + 0x0000c) 424 #define ISP3X_MI_MP_WR_Y_OFFS_CNT (ISP3X_MI_BASE + 0x00010) 425 #define ISP3X_MI_MP_WR_Y_OFFS_CNT_START (ISP3X_MI_BASE + 0x00014) 426 #define ISP3X_MI_MP_WR_Y_IRQ_OFFS (ISP3X_MI_BASE + 0x00018) 427 #define ISP3X_MI_MP_WR_CB_BASE (ISP3X_MI_BASE + 0x0001c) 428 #define ISP3X_MI_MP_WR_CB_SIZE (ISP3X_MI_BASE + 0x00020) 429 #define ISP3X_MI_MP_WR_CB_OFFS_CNT (ISP3X_MI_BASE + 0x00024) 430 #define ISP3X_MI_MP_WR_CB_OFFS_CNT_START (ISP3X_MI_BASE + 0x00028) 431 #define ISP3X_MI_MP_WR_CR_BASE (ISP3X_MI_BASE + 0x0002c) 432 #define ISP3X_MI_MP_WR_CR_SIZE (ISP3X_MI_BASE + 0x00030) 433 #define ISP3X_MI_MP_WR_CR_OFFS_CNT (ISP3X_MI_BASE + 0x00034) 434 #define ISP3X_MI_MP_WR_CR_OFFS_CNT_START (ISP3X_MI_BASE + 0x00038) 435 #define ISP3X_MI_SP_WR_Y_BASE (ISP3X_MI_BASE + 0x0003c) 436 #define ISP3X_MI_SP_WR_Y_SIZE (ISP3X_MI_BASE + 0x00040) 437 #define ISP3X_MI_SP_WR_Y_OFFS_CNT (ISP3X_MI_BASE + 0x00044) 438 #define ISP3X_MI_SP_WR_Y_OFFS_CNT_START (ISP3X_MI_BASE + 0x00048) 439 #define ISP3X_MI_SP_WR_Y_LLENGTH (ISP3X_MI_BASE + 0x0004c) 440 #define ISP3X_MI_SP_WR_CB_BASE (ISP3X_MI_BASE + 0x00050) 441 #define ISP3X_MI_SP_WR_CB_SIZE (ISP3X_MI_BASE + 0x00054) 442 #define ISP3X_MI_SP_WR_CB_OFFS_CNT (ISP3X_MI_BASE + 0x00058) 443 #define ISP3X_MI_SP_WR_CB_OFFS_CNT_START (ISP3X_MI_BASE + 0x0005c) 444 #define ISP3X_MI_SP_WR_CR_BASE (ISP3X_MI_BASE + 0x00060) 445 #define ISP3X_MI_SP_WR_CR_SIZE (ISP3X_MI_BASE + 0x00064) 446 #define ISP3X_MI_SP_WR_CR_OFFS_CNT (ISP3X_MI_BASE + 0x00068) 447 #define ISP3X_MI_SP_WR_CR_OFFS_CNT_START (ISP3X_MI_BASE + 0x0006c) 448 #define ISP3X_MI_WR_BYTE_CNT (ISP3X_MI_BASE + 0x00070) 449 #define ISP3X_MI_WR_CTRL_SHD (ISP3X_MI_BASE + 0x00074) 450 #define ISP3X_MI_MP_WR_Y_BASE_SHD (ISP3X_MI_BASE + 0x00078) 451 #define ISP3X_MI_MP_WR_Y_SIZE_SHD (ISP3X_MI_BASE + 0x0007c) 452 #define ISP3X_MI_MP_WR_Y_OFFS_CNT_SHD (ISP3X_MI_BASE + 0x00080) 453 #define ISP3X_MI_MP_WR_Y_IRQ_OFFS_SHD (ISP3X_MI_BASE + 0x00084) 454 #define ISP3X_MI_MP_WR_CB_BASE_SHD (ISP3X_MI_BASE + 0x00088) 455 #define ISP3X_MI_MP_WR_CB_SIZE_SHD (ISP3X_MI_BASE + 0x0008c) 456 #define ISP3X_MI_MP_WR_CB_OFFS_CNT_SHD (ISP3X_MI_BASE + 0x00090) 457 #define ISP3X_MI_MP_WR_CR_BASE_SHD (ISP3X_MI_BASE + 0x00094) 458 #define ISP3X_MI_MP_WR_CR_SIZE_SHD (ISP3X_MI_BASE + 0x00098) 459 #define ISP3X_MI_MP_WR_CR_OFFS_CNT_SHD (ISP3X_MI_BASE + 0x0009c) 460 #define ISP3X_MI_SP_WR_Y_BASE_SHD (ISP3X_MI_BASE + 0x000a0) 461 #define ISP3X_MI_SP_WR_Y_SIZE_SHD (ISP3X_MI_BASE + 0x000a4) 462 #define ISP3X_MI_SP_WR_Y_OFFS_CNT_SHD (ISP3X_MI_BASE + 0x000a8) 463 #define ISP3X_MI_SP_WR_CB_BASE_AD_SHD (ISP3X_MI_BASE + 0x000b0) 464 #define ISP3X_MI_SP_WR_CB_SIZE_SHD (ISP3X_MI_BASE + 0x000b4) 465 #define ISP3X_MI_SP_WR_CB_OFFS_CNT_SHD (ISP3X_MI_BASE + 0x000b8) 466 #define ISP3X_MI_SP_WR_CR_BASE_AD_SHD (ISP3X_MI_BASE + 0x000bc) 467 #define ISP3X_MI_SP_WR_CR_SIZE_SHD (ISP3X_MI_BASE + 0x000c0) 468 #define ISP3X_MI_SP_WR_CR_OFFS_CNT_SHD (ISP3X_MI_BASE + 0x000c4) 469 #define ISP3X_MI_IMSC (ISP3X_MI_BASE + 0x000f8) 470 #define ISP3X_MI_RIS (ISP3X_MI_BASE + 0x000fc) 471 #define ISP3X_MI_MIS (ISP3X_MI_BASE + 0x00100) 472 #define ISP3X_MI_ICR (ISP3X_MI_BASE + 0x00104) 473 #define ISP3X_MI_ISR (ISP3X_MI_BASE + 0x00108) 474 #define ISP3X_MI_STATUS (ISP3X_MI_BASE + 0x0010c) 475 #define ISP3X_MI_STATUS_CLR (ISP3X_MI_BASE + 0x00110) 476 #define ISP3X_MI_SP_WR_Y_PIC_WIDTH (ISP3X_MI_BASE + 0x00114) 477 #define ISP3X_MI_SP_WR_Y_PIC_HEIGHT (ISP3X_MI_BASE + 0x00118) 478 #define ISP3X_MI_SP_WR_Y_PIC_SIZE (ISP3X_MI_BASE + 0x0011c) 479 #define ISP3X_MI_WR_PIXEL_CNT (ISP3X_MI_BASE + 0x0012c) 480 #define ISP3X_MI_MP_WR_Y_BASE2 (ISP3X_MI_BASE + 0x00130) 481 #define ISP3X_MI_MP_WR_CB_BASE2 (ISP3X_MI_BASE + 0x00134) 482 #define ISP3X_MI_MP_WR_CR_BASE2 (ISP3X_MI_BASE + 0x00138) 483 #define ISP3X_MI_SP_WR_Y_BASE2 (ISP3X_MI_BASE + 0x0013C) 484 #define ISP3X_MI_SP_WR_CB_BASE2 (ISP3X_MI_BASE + 0x00140) 485 #define ISP3X_MI_SP_WR_CR_BASE2 (ISP3X_MI_BASE + 0x00144) 486 #define ISP3X_MI_WR_XTD_FORMAT_CTRL (ISP3X_MI_BASE + 0x00148) 487 #define ISP3X_MI_WR_ID (ISP3X_MI_BASE + 0x00154) 488 #define ISP3X_MI_MP_WR_Y_IRQ_OFFS2 (ISP3X_MI_BASE + 0x001E0) 489 #define ISP3X_MI_MP_WR_Y_IRQ_OFFS2_SHD (ISP3X_MI_BASE + 0x001E4) 490 #define ISP3X_MI_MP_WR_Y_LLENGTH (ISP3X_MI_BASE + 0x001E8) 491 #define ISP3X_MI_MP_WR_Y_PIC_WIDTH (ISP3X_MI_BASE + 0x001EC) 492 #define ISP3X_MI_MP_WR_Y_PIC_HEIGHT (ISP3X_MI_BASE + 0x001F0) 493 #define ISP3X_MI_MP_WR_Y_PIC_SIZE (ISP3X_MI_BASE + 0x001F4) 494 #define ISP32_MI_MP_WR_CTRL (ISP3X_MI_BASE + 0x001F8) 495 #define ISP3X_MI_BP_WR_CTRL (ISP3X_MI_BASE + 0x00200) 496 #define ISP3X_MI_BP_WR_Y_BASE (ISP3X_MI_BASE + 0x00204) 497 #define ISP3X_MI_BP_WR_Y_SIZE (ISP3X_MI_BASE + 0x00208) 498 #define ISP3X_MI_BP_WR_Y_OFFS_CNT (ISP3X_MI_BASE + 0x0020C) 499 #define ISP3X_MI_BP_WR_Y_OFFS_CNT_START (ISP3X_MI_BASE + 0x00210) 500 #define ISP3X_MI_BP_WR_Y_LLENGTH (ISP3X_MI_BASE + 0x00214) 501 #define ISP3X_MI_BP_WR_Y_PIC_WIDTH (ISP3X_MI_BASE + 0x00218) 502 #define ISP3X_MI_BP_WR_Y_PIC_HEIGHT (ISP3X_MI_BASE + 0x0021C) 503 #define ISP3X_MI_BP_WR_Y_PIC_SIZE (ISP3X_MI_BASE + 0x00220) 504 #define ISP3X_MI_BP_WR_CB_BASE (ISP3X_MI_BASE + 0x00224) 505 #define ISP3X_MI_BP_WR_CB_SIZE (ISP3X_MI_BASE + 0x00228) 506 #define ISP3X_MI_BP_WR_CB_OFFS_CNT (ISP3X_MI_BASE + 0x0022C) 507 #define ISP3X_MI_BP_WR_CB_OFFS_CNT_START (ISP3X_MI_BASE + 0x00230) 508 #define ISP3X_MI_BP_WR_Y_BASE_SHD (ISP3X_MI_BASE + 0x00234) 509 #define ISP3X_MI_BP_WR_Y_SIZE_SHD (ISP3X_MI_BASE + 0x00238) 510 #define ISP3X_MI_BP_WR_Y_OFFS_CNT_SHD (ISP3X_MI_BASE + 0x0023C) 511 #define ISP3X_MI_BP_WR_CB_BASE_SHD (ISP3X_MI_BASE + 0x00240) 512 #define ISP3X_MI_BP_WR_CB_SIZE_SHD (ISP3X_MI_BASE + 0x00244) 513 #define ISP3X_MI_BP_WR_CB_OFFS_CNT_SHD (ISP3X_MI_BASE + 0x00248) 514 #define ISP3X_MI_BP_WR_Y_BASE2 (ISP3X_MI_BASE + 0x0024C) 515 #define ISP3X_MI_BP_WR_CB_BASE2 (ISP3X_MI_BASE + 0x00250) 516 #define ISP32_MI_MP_WR_Y_END_ADDR (ISP3X_MI_BASE + 0x00260) 517 #define ISP32_MI_MP_WR_CB_END_ADDR (ISP3X_MI_BASE + 0x00264) 518 #define ISP32_MI_SP_WR_Y_END_ADDR (ISP3X_MI_BASE + 0x00268) 519 #define ISP32_MI_SP_WR_CB_END_ADDR (ISP3X_MI_BASE + 0x0026c) 520 #define ISP32_MI_BP_WR_Y_END_ADDR (ISP3X_MI_BASE + 0x00270) 521 #define ISP32_MI_BP_WR_CB_END_ADDR (ISP3X_MI_BASE + 0x00274) 522 #define ISP32_MI_MPDS_WR_Y_END_ADDR (ISP3X_MI_BASE + 0x00278) 523 #define ISP32_MI_MPDS_WR_CB_END_ADDR (ISP3X_MI_BASE + 0x0027c) 524 #define ISP32_MI_BPDS_WR_Y_END_ADDR (ISP3X_MI_BASE + 0x00280) 525 #define ISP32_MI_BPDS_WR_CB_END_ADDR (ISP3X_MI_BASE + 0x00284) 526 #define ISP32_MI_MPDS_WR_CTRL (ISP3X_MI_BASE + 0x002a0) 527 #define ISP32_MI_MPDS_WR_Y_BASE (ISP3X_MI_BASE + 0x002a4) 528 #define ISP32_MI_MPDS_WR_Y_SIZE (ISP3X_MI_BASE + 0x002a8) 529 #define ISP32_MI_MPDS_WR_Y_OFFS_CNT (ISP3X_MI_BASE + 0x002ac) 530 #define ISP32_MI_MPDS_WR_Y_OFFS_CNT_START (ISP3X_MI_BASE + 0x002b0) 531 #define ISP32_MI_MPDS_WR_Y_LLENGTH (ISP3X_MI_BASE + 0x002b4) 532 #define ISP32_MI_MPDS_WR_Y_PIC_WIDTH (ISP3X_MI_BASE + 0x002b8) 533 #define ISP32_MI_MPDS_WR_Y_PIC_HEIGHT (ISP3X_MI_BASE + 0x002bc) 534 #define ISP32_MI_MPDS_WR_Y_PIC_SIZE (ISP3X_MI_BASE + 0x002c0) 535 #define ISP32_MI_MPDS_WR_CB_BASE (ISP3X_MI_BASE + 0x002c4) 536 #define ISP32_MI_MPDS_WR_CB_SIZE (ISP3X_MI_BASE + 0x002c8) 537 #define ISP32_MI_MPDS_WR_CB_OFFS_CNT (ISP3X_MI_BASE + 0x002cc) 538 #define ISP32_MI_MPDS_WR_CB_OFFS_CNT_START (ISP3X_MI_BASE + 0x002d0) 539 #define ISP32_MI_MPDS_WR_Y_BASE_SHD (ISP3X_MI_BASE + 0x002d4) 540 #define ISP32_MI_MPDS_WR_Y_SIZE_SHD (ISP3X_MI_BASE + 0x002d8) 541 #define ISP32_MI_MPDS_WR_Y_OFFS_CNT_SHD (ISP3X_MI_BASE + 0x002dc) 542 #define ISP32_MI_MPDS_WR_CB_BASE_SHD (ISP3X_MI_BASE + 0x002e0) 543 #define ISP32_MI_MPDS_WR_CB_SIZE_SHD (ISP3X_MI_BASE + 0x002e4) 544 #define ISP32_MI_MPDS_WR_CB_OFFS_CNT_SHD (ISP3X_MI_BASE + 0x002e8) 545 #define ISP32_MI_BPDS_WR_CTRL (ISP3X_MI_BASE + 0x002f0) 546 #define ISP32_MI_BPDS_WR_Y_BASE (ISP3X_MI_BASE + 0x002f4) 547 #define ISP32_MI_BPDS_WR_Y_SIZE (ISP3X_MI_BASE + 0x002f8) 548 #define ISP32_MI_BPDS_WR_Y_OFFS_CNT (ISP3X_MI_BASE + 0x002fc) 549 #define ISP32_MI_BPDS_WR_Y_OFFS_CNT_START (ISP3X_MI_BASE + 0x00300) 550 #define ISP32_MI_BPDS_WR_Y_LLENGTH (ISP3X_MI_BASE + 0x00304) 551 #define ISP32_MI_BPDS_WR_Y_PIC_WIDTH (ISP3X_MI_BASE + 0x00308) 552 #define ISP32_MI_BPDS_WR_Y_PIC_HEIGHT (ISP3X_MI_BASE + 0x0030c) 553 #define ISP32_MI_BPDS_WR_Y_PIC_SIZE (ISP3X_MI_BASE + 0x00310) 554 #define ISP32_MI_BPDS_WR_CB_BASE (ISP3X_MI_BASE + 0x00314) 555 #define ISP32_MI_BPDS_WR_CB_SIZE (ISP3X_MI_BASE + 0x00318) 556 #define ISP32_MI_BPDS_WR_CB_OFFS_CNT (ISP3X_MI_BASE + 0x0031c) 557 #define ISP32_MI_BPDS_WR_CB_OFFS_CNT_START (ISP3X_MI_BASE + 0x00320) 558 #define ISP32_MI_BPDS_WR_Y_BASE_SHD (ISP3X_MI_BASE + 0x00324) 559 #define ISP32_MI_BPDS_WR_Y_SIZE_SHD (ISP3X_MI_BASE + 0x00328) 560 #define ISP32_MI_BPDS_WR_Y_OFFS_CNT_SHD (ISP3X_MI_BASE + 0x0032c) 561 #define ISP32_MI_BPDS_WR_CB_BASE_SHD (ISP3X_MI_BASE + 0x00330) 562 #define ISP32_MI_BPDS_WR_CB_SIZE_SHD (ISP3X_MI_BASE + 0x00334) 563 #define ISP32_MI_BPDS_WR_CB_OFFS_CNT_SHD (ISP3X_MI_BASE + 0x00338) 564 #define ISP3X_MI_WR_CTRL2 (ISP3X_MI_BASE + 0x00400) 565 #define ISP3X_MI_WR_ID2 (ISP3X_MI_BASE + 0x00404) 566 #define ISP3X_MI_RD_CTRL2 (ISP3X_MI_BASE + 0x00408) 567 #define ISP3X_MI_RD_ID (ISP3X_MI_BASE + 0x0040c) 568 #define ISP32_MI_WR_CTRL2_SHD (ISP3X_MI_BASE + 0x00410) 569 #define ISP32_MI_WR_WRAP_CTRL (ISP3X_MI_BASE + 0x00414) 570 #define ISP32_MI_WR_VFLIP_CTRL (ISP3X_MI_BASE + 0x00418) 571 #define ISP3X_MI_RAW0_RD_BASE (ISP3X_MI_BASE + 0x00470) 572 #define ISP3X_MI_RAW0_RD_LENGTH (ISP3X_MI_BASE + 0x00474) 573 #define ISP3X_MI_RAW0_RD_BASE_SHD (ISP3X_MI_BASE + 0x00478) 574 #define ISP32_MI_RAW0_RD_SIZE (ISP3X_MI_BASE + 0x0047c) 575 #define ISP3X_MI_RAW1_RD_BASE (ISP3X_MI_BASE + 0x00480) 576 #define ISP3X_MI_RAW1_RD_LENGTH (ISP3X_MI_BASE + 0x00484) 577 #define ISP3X_MI_RAW1_RD_BASE_SHD (ISP3X_MI_BASE + 0x00488) 578 #define ISP32_MI_RAW1_RD_SIZE (ISP3X_MI_BASE + 0x0048c) 579 #define ISP3X_MI_RAWS_RD_BASE (ISP3X_MI_BASE + 0x00490) 580 #define ISP3X_MI_RAWS_RD_LENGTH (ISP3X_MI_BASE + 0x00494) 581 #define ISP3X_MI_RAWS_RD_BASE_SHD (ISP3X_MI_BASE + 0x00498) 582 #define ISP32_MI_RAWS_RD_SIZE (ISP3X_MI_BASE + 0x0049c) 583 #define ISP3X_MI_LUT_CAC_RD_BASE (ISP3X_MI_BASE + 0x00530) 584 #define ISP3X_MI_LUT_CAC_RD_H_WSIZE (ISP3X_MI_BASE + 0x00534) 585 #define ISP3X_MI_LUT_CAC_RD_V_SIZE (ISP3X_MI_BASE + 0x00538) 586 #define ISP3X_MI_LUT_3D_RD_BASE (ISP3X_MI_BASE + 0x00540) 587 #define ISP3X_MI_LUT_LSC_RD_BASE (ISP3X_MI_BASE + 0x00544) 588 #define ISP3X_MI_LUT_LDCH_RD_BASE (ISP3X_MI_BASE + 0x00548) 589 #define ISP3X_MI_LUT_3D_RD_WSIZE (ISP3X_MI_BASE + 0x00550) 590 #define ISP3X_MI_LUT_LSC_RD_WSIZE (ISP3X_MI_BASE + 0x00554) 591 #define ISP3X_MI_LUT_LDCH_RD_H_WSIZE (ISP3X_MI_BASE + 0x00558) 592 #define ISP3X_MI_LUT_LDCH_RD_V_SIZE (ISP3X_MI_BASE + 0x0055C) 593 #define ISP3X_MI_DBR_WR_BASE (ISP3X_MI_BASE + 0x00560) 594 #define ISP3X_MI_DBR_WR_SIZE (ISP3X_MI_BASE + 0x00564) 595 #define ISP3X_MI_DBR_WR_LENGTH (ISP3X_MI_BASE + 0x00568) 596 #define ISP3X_MI_DBR_WR_BASE_SHD (ISP3X_MI_BASE + 0x0056C) 597 #define ISP3X_MI_DBR_RD_BASE (ISP3X_MI_BASE + 0x00570) 598 #define ISP3X_MI_DBR_RD_LENGTH (ISP3X_MI_BASE + 0x00574) 599 #define ISP3X_MI_DBR_RD_BASE_SHD (ISP3X_MI_BASE + 0x00578) 600 #define ISP3X_MI_3A_WR_BASE (ISP3X_MI_BASE + 0x0057C) 601 #define ISP3X_MI_GAIN_WR_BASE (ISP3X_MI_BASE + 0x00580) 602 #define ISP3X_MI_GAIN_WR_SIZE (ISP3X_MI_BASE + 0x00584) 603 #define ISP3X_MI_GAIN_WR_LENGTH (ISP3X_MI_BASE + 0x00588) 604 #define ISP3X_MI_GAIN_WR_BASE2 (ISP3X_MI_BASE + 0x0058C) 605 #define ISP3X_MI_GAIN_WR_BASE_SHD (ISP3X_MI_BASE + 0x00590) 606 #define ISP3X_MI_BAY3D_IIR_WR_BASE (ISP3X_MI_BASE + 0x005A0) 607 #define ISP3X_MI_BAY3D_IIR_WR_SIZE (ISP3X_MI_BASE + 0x005A4) 608 #define ISP3X_MI_BAY3D_IIR_WR_LENGTH (ISP3X_MI_BASE + 0x005A8) 609 #define ISP3X_MI_BAY3D_IIR_WR_BASE_SHD (ISP3X_MI_BASE + 0x005AC) 610 #define ISP3X_MI_BAY3D_IIR_RD_BASE (ISP3X_MI_BASE + 0x005B0) 611 #define ISP3X_MI_BAY3D_IIR_RD_LENGTH (ISP3X_MI_BASE + 0x005B4) 612 #define ISP3X_MI_BAY3D_IIR_RD_BASE_SHD (ISP3X_MI_BASE + 0x005B8) 613 #define ISP3X_MI_BAY3D_CUR_WR_BASE (ISP3X_MI_BASE + 0x005C0) 614 #define ISP3X_MI_BAY3D_CUR_WR_SIZE (ISP3X_MI_BASE + 0x005C4) 615 #define ISP3X_MI_BAY3D_CUR_WR_LENGTH (ISP3X_MI_BASE + 0x005C8) 616 #define ISP3X_MI_BAY3D_CUR_WR_BASE_SHD (ISP3X_MI_BASE + 0x005CC) 617 #define ISP3X_MI_BAY3D_CUR_RD_BASE (ISP3X_MI_BASE + 0x005D0) 618 #define ISP3X_MI_BAY3D_CUR_RD_LENGTH (ISP3X_MI_BASE + 0x005D4) 619 #define ISP3X_MI_BAY3D_CUR_RD_BASE_SHD (ISP3X_MI_BASE + 0x005D8) 620 #define ISP32_MI_BAY3D_CUR_RD_SIZE (ISP3X_MI_BASE + 0x005DC) 621 #define ISP3X_MI_BAY3D_DS_WR_BASE (ISP3X_MI_BASE + 0x005E0) 622 #define ISP3X_MI_BAY3D_DS_WR_SIZE (ISP3X_MI_BASE + 0x005E4) 623 #define ISP3X_MI_BAY3D_DS_WR_LENGTH (ISP3X_MI_BASE + 0x005E8) 624 #define ISP3X_MI_BAY3D_DS_WR_BASE_SHD (ISP3X_MI_BASE + 0x005EC) 625 #define ISP3X_MI_BAY3D_DS_RD_BASE (ISP3X_MI_BASE + 0x005F0) 626 #define ISP3X_MI_BAY3D_DS_RD_LENGTH (ISP3X_MI_BASE + 0x005F4) 627 #define ISP3X_MI_BAY3D_DS_RD_BASE_SHD (ISP3X_MI_BASE + 0x005F8) 628 #define ISP32L_IRLDCH_RD_BASE (ISP3X_MI_BASE + 0x00600) 629 #define ISP32L_IRLDCH_RD_LENGTH (ISP3X_MI_BASE + 0x00604) 630 #define ISP32L_IRLDCH_RD_H_WSIZE (ISP3X_MI_BASE + 0x00608) 631 #define ISP32L_IRLDCH_RD_V_SIZE (ISP3X_MI_BASE + 0x0060C) 632 #define ISP32L_IRLDCV_RD_BASE (ISP3X_MI_BASE + 0x00610) 633 #define ISP32L_IRLDCV_RD_LENGTH (ISP3X_MI_BASE + 0x00614) 634 #define ISP32L_IRLDCV_RD_H_WSIZE (ISP3X_MI_BASE + 0x00618) 635 #define ISP32L_IRLDCV_RD_V_SIZE (ISP3X_MI_BASE + 0x0061C) 636 #define ISP32L_IRLDCH_RD_BASE_SHD (ISP3X_MI_BASE + 0x00620) 637 #define ISP32L_IRLDCV_RD_BASE_SHD (ISP3X_MI_BASE + 0x00624) 638 #define ISP32L_AXI_CONF_RD_CTRL (ISP3X_MI_BASE + 0x00640) 639 #define ISP32L_AXI_CONF_RD_BASE (ISP3X_MI_BASE + 0x00644) 640 #define ISP32L_AXI_CONF_RD_H_WSIZE (ISP3X_MI_BASE + 0x00648) 641 #define ISP32L_AXI_CONF_RD_V_SIZE (ISP3X_MI_BASE + 0x0064C) 642 #define ISP32L_FRM_BUF_WR_BASE (ISP3X_MI_BASE + 0x00650) 643 #define ISP32L_FRM_BUF_WR_SIZE (ISP3X_MI_BASE + 0x00654) 644 #define ISP32L_FRM_BUF_RD_BASE (ISP3X_MI_BASE + 0x00658) 645 646 #define ISP3X_MPFBC_BASE 0x000018C0 647 #define ISP3X_MPFBC_CTRL (ISP3X_MPFBC_BASE + 0x00000) 648 #define ISP3X_MPFBC_VIR_WIDTH (ISP3X_MPFBC_BASE + 0x00004) 649 #define ISP3X_MPFBC_VIR_HEIGHT (ISP3X_MPFBC_BASE + 0x00008) 650 #define ISP3X_MPFBC_HEAD_PTR (ISP3X_MPFBC_BASE + 0x0000c) 651 #define ISP3X_MPFBC_PAYL_PTR (ISP3X_MPFBC_BASE + 0x00010) 652 #define ISP3X_MPFBC_HEAD_PTR2 (ISP3X_MPFBC_BASE + 0x00014) 653 #define ISP3X_MPFBC_PAYL_PTR2 (ISP3X_MPFBC_BASE + 0x00018) 654 #define ISP3X_MPFBC_PAYL_WIDTH (ISP3X_MPFBC_BASE + 0x0001c) 655 #define ISP3X_MPFBC_HEAD_OFFSET (ISP3X_MPFBC_BASE + 0x00020) 656 #define ISP3X_MPFBC_ENC_POS (ISP3X_MPFBC_BASE + 0x00030) 657 #define ISP3X_MPFBC_DEBUG (ISP3X_MPFBC_BASE + 0x00034) 658 659 #define ISP3X_CSI2RX_BASE 0x00001C00 660 #define ISP3X_CSI2RX_CTRL0 (ISP3X_CSI2RX_BASE + 0x00000) 661 #define ISP3X_CSI2RX_CTRL1 (ISP3X_CSI2RX_BASE + 0x00004) 662 #define ISP3X_CSI2RX_CTRL2 (ISP3X_CSI2RX_BASE + 0x00008) 663 #define ISP32_CSI2RX_CTRL3 (ISP3X_CSI2RX_BASE + 0x0000c) 664 #define ISP3X_CSI2RX_CSI2_RESETN (ISP3X_CSI2RX_BASE + 0x00010) 665 #define ISP3X_CSI2RX_PHY_STATE_RO (ISP3X_CSI2RX_BASE + 0x00014) 666 #define ISP3X_CSI2RX_DATA_IDS_1 (ISP3X_CSI2RX_BASE + 0x00018) 667 #define ISP3X_CSI2RX_DATA_IDS_2 (ISP3X_CSI2RX_BASE + 0x0001c) 668 #define ISP3X_CSI2RX_ERR_PHY (ISP3X_CSI2RX_BASE + 0x00020) 669 #define ISP3X_CSI2RX_ERR_PACKET (ISP3X_CSI2RX_BASE + 0x00024) 670 #define ISP3X_CSI2RX_ERR_OVERFLOW (ISP3X_CSI2RX_BASE + 0x00028) 671 #define ISP3X_CSI2RX_ERR_STAT (ISP3X_CSI2RX_BASE + 0x0002c) 672 #define ISP3X_CSI2RX_MASK_PHY (ISP3X_CSI2RX_BASE + 0x00030) 673 #define ISP3X_CSI2RX_MASK_PACKET (ISP3X_CSI2RX_BASE + 0x00034) 674 #define ISP3X_CSI2RX_MASK_OVERFLOW (ISP3X_CSI2RX_BASE + 0x00038) 675 #define ISP3X_CSI2RX_MASK_STAT (ISP3X_CSI2RX_BASE + 0x0003c) 676 #define ISP3X_CSI2RX_RAW_RD_CTRL (ISP3X_CSI2RX_BASE + 0x00080) 677 #define ISP3X_CSI2RX_RAW_RD_LINECNT_RO (ISP3X_CSI2RX_BASE + 0x00084) 678 #define ISP3X_CSI2RX_RAW_RD_PIC_SIZE (ISP3X_CSI2RX_BASE + 0x00088) 679 #define ISP3X_CSI2RX_RAW2_RD_LINECNT_RO (ISP3X_CSI2RX_BASE + 0x0008c) 680 #define ISP3X_CSI2RX_ISP_LINECNT_RO (ISP3X_CSI2RX_BASE + 0x000b0) 681 #define ISP3X_CSI2RX_VERSION (ISP3X_CSI2RX_BASE + 0x000fc) 682 683 #define ISP3X_LSC_BASE 0x00002200 684 #define ISP3X_LSC_CTRL (ISP3X_LSC_BASE + 0x00000) 685 #define ISP3X_LSC_R_TABLE_ADDR (ISP3X_LSC_BASE + 0x00004) 686 #define ISP3X_LSC_GR_TABLE_ADDR (ISP3X_LSC_BASE + 0x00008) 687 #define ISP3X_LSC_B_TABLE_ADDR (ISP3X_LSC_BASE + 0x0000c) 688 #define ISP3X_LSC_GB_TABLE_ADDR (ISP3X_LSC_BASE + 0x00010) 689 #define ISP3X_LSC_R_TABLE_DATA (ISP3X_LSC_BASE + 0x00014) 690 #define ISP3X_LSC_GR_TABLE_DATA (ISP3X_LSC_BASE + 0x00018) 691 #define ISP3X_LSC_B_TABLE_DATA (ISP3X_LSC_BASE + 0x0001c) 692 #define ISP3X_LSC_GB_TABLE_DATA (ISP3X_LSC_BASE + 0x00020) 693 #define ISP3X_LSC_XGRAD_01 (ISP3X_LSC_BASE + 0x00024) 694 #define ISP3X_LSC_XGRAD_23 (ISP3X_LSC_BASE + 0x00028) 695 #define ISP3X_LSC_XGRAD_45 (ISP3X_LSC_BASE + 0x0002c) 696 #define ISP3X_LSC_XGRAD_67 (ISP3X_LSC_BASE + 0x00030) 697 #define ISP3X_LSC_YGRAD_01 (ISP3X_LSC_BASE + 0x00034) 698 #define ISP3X_LSC_YGRAD_23 (ISP3X_LSC_BASE + 0x00038) 699 #define ISP3X_LSC_YGRAD_45 (ISP3X_LSC_BASE + 0x0003c) 700 #define ISP3X_LSC_YGRAD_67 (ISP3X_LSC_BASE + 0x00040) 701 #define ISP3X_LSC_XSIZE_01 (ISP3X_LSC_BASE + 0x00044) 702 #define ISP3X_LSC_XSIZE_23 (ISP3X_LSC_BASE + 0x00048) 703 #define ISP3X_LSC_XSIZE_45 (ISP3X_LSC_BASE + 0x0004c) 704 #define ISP3X_LSC_XSIZE_67 (ISP3X_LSC_BASE + 0x00050) 705 #define ISP3X_LSC_YSIZE_01 (ISP3X_LSC_BASE + 0x00054) 706 #define ISP3X_LSC_YSIZE_23 (ISP3X_LSC_BASE + 0x00058) 707 #define ISP3X_LSC_YSIZE_45 (ISP3X_LSC_BASE + 0x0005c) 708 #define ISP3X_LSC_YSIZE_67 (ISP3X_LSC_BASE + 0x00060) 709 #define ISP3X_LSC_TABLE_SEL (ISP3X_LSC_BASE + 0x00064) 710 #define ISP3X_LSC_STATUS (ISP3X_LSC_BASE + 0x00068) 711 #define ISP3X_LSC_XGRAD_89 (ISP3X_LSC_BASE + 0x00070) 712 #define ISP3X_LSC_XGRAD_AB (ISP3X_LSC_BASE + 0x00074) 713 #define ISP3X_LSC_XGRAD_CD (ISP3X_LSC_BASE + 0x00078) 714 #define ISP3X_LSC_XGRAD_EF (ISP3X_LSC_BASE + 0x0007C) 715 #define ISP3X_LSC_YGRAD_89 (ISP3X_LSC_BASE + 0x00080) 716 #define ISP3X_LSC_YGRAD_AB (ISP3X_LSC_BASE + 0x00084) 717 #define ISP3X_LSC_YGRAD_CD (ISP3X_LSC_BASE + 0x00088) 718 #define ISP3X_LSC_YGRAD_EF (ISP3X_LSC_BASE + 0x0008C) 719 #define ISP3X_LSC_XSIZE_89 (ISP3X_LSC_BASE + 0x00090) 720 #define ISP3X_LSC_XSIZE_AB (ISP3X_LSC_BASE + 0x00094) 721 #define ISP3X_LSC_XSIZE_CD (ISP3X_LSC_BASE + 0x00098) 722 #define ISP3X_LSC_XSIZE_EF (ISP3X_LSC_BASE + 0x0009C) 723 #define ISP3X_LSC_YSIZE_89 (ISP3X_LSC_BASE + 0x000A0) 724 #define ISP3X_LSC_YSIZE_AB (ISP3X_LSC_BASE + 0x000A4) 725 #define ISP3X_LSC_YSIZE_CD (ISP3X_LSC_BASE + 0x000A8) 726 #define ISP3X_LSC_YSIZE_EF (ISP3X_LSC_BASE + 0x000AC) 727 728 #define ISP3X_DEBAYER_BASE 0x00002500 729 #define ISP3X_DEBAYER_CONTROL (ISP3X_DEBAYER_BASE + 0x00000) 730 #define ISP3X_DEBAYER_G_INTERP (ISP3X_DEBAYER_BASE + 0x00004) 731 #define ISP3X_DEBAYER_G_INTERP_FILTER1 (ISP3X_DEBAYER_BASE + 0x00008) 732 #define ISP3X_DEBAYER_G_INTERP_FILTER2 (ISP3X_DEBAYER_BASE + 0x0000c) 733 #define ISP3X_DEBAYER_OFFSET (ISP3X_DEBAYER_BASE + 0x00010) 734 #define ISP3X_DEBAYER_C_FILTER (ISP3X_DEBAYER_BASE + 0x00014) 735 #define ISP32_DEBAYER_G_INTERP_OFFSET (ISP3X_DEBAYER_BASE + 0x00010) 736 #define ISP32_DEBAYER_G_FILTER_OFFSET (ISP3X_DEBAYER_BASE + 0x00014) 737 #define ISP32_DEBAYER_C_FILTER_GUIDE_GAUS (ISP3X_DEBAYER_BASE + 0x00018) 738 #define ISP32_DEBAYER_C_FILTER_CE_GAUS (ISP3X_DEBAYER_BASE + 0x0001c) 739 #define ISP32_DEBAYER_C_FILTER_ALPHA_GAUS (ISP3X_DEBAYER_BASE + 0x00020) 740 #define ISP32_DEBAYER_C_FILTER_LOG_OFFSET (ISP3X_DEBAYER_BASE + 0x00024) 741 #define ISP32_DEBAYER_C_FILTER_ALPHA (ISP3X_DEBAYER_BASE + 0x00028) 742 #define ISP32_DEBAYER_C_FILTER_EDGE (ISP3X_DEBAYER_BASE + 0x0002c) 743 #define ISP32_DEBAYER_C_FILTER_IIR_0 (ISP3X_DEBAYER_BASE + 0x00030) 744 #define ISP32_DEBAYER_C_FILTER_IIR_1 (ISP3X_DEBAYER_BASE + 0x00034) 745 #define ISP32_DEBAYER_C_FILTER_BF (ISP3X_DEBAYER_BASE + 0x00038) 746 747 #define ISP3X_CAC_BASE 0x00002600 748 #define ISP3X_CAC_CTRL (ISP3X_CAC_BASE + 0x00000) 749 #define ISP3X_CAC_PSF_PARA (ISP3X_CAC_BASE + 0x00004) 750 #define ISP3X_CAC_STRENGTH_CENTER (ISP3X_CAC_BASE + 0x00008) 751 #define ISP3X_CAC_STRENGTH0 (ISP3X_CAC_BASE + 0x0000C) 752 #define ISP3X_CAC_STRENGTH1 (ISP3X_CAC_BASE + 0x00010) 753 #define ISP3X_CAC_STRENGTH2 (ISP3X_CAC_BASE + 0x00014) 754 #define ISP3X_CAC_STRENGTH3 (ISP3X_CAC_BASE + 0x00018) 755 #define ISP3X_CAC_STRENGTH4 (ISP3X_CAC_BASE + 0x0001C) 756 #define ISP3X_CAC_STRENGTH5 (ISP3X_CAC_BASE + 0x00020) 757 #define ISP3X_CAC_STRENGTH6 (ISP3X_CAC_BASE + 0x00024) 758 #define ISP3X_CAC_STRENGTH7 (ISP3X_CAC_BASE + 0x00028) 759 #define ISP3X_CAC_STRENGTH8 (ISP3X_CAC_BASE + 0x0002C) 760 #define ISP3X_CAC_STRENGTH9 (ISP3X_CAC_BASE + 0x00030) 761 #define ISP3X_CAC_STRENGTH10 (ISP3X_CAC_BASE + 0x00034) 762 #define ISP32_CAC_FLAT_THED (ISP3X_CAC_BASE + 0x00038) 763 #define ISP32_CAC_OFFSET (ISP3X_CAC_BASE + 0x0003c) 764 #define ISP3X_CAC_PSF_CFG0 (ISP3X_CAC_BASE + 0x00040) 765 #define ISP3X_CAC_PSF_CFG1 (ISP3X_CAC_BASE + 0x00044) 766 #define ISP3X_CAC_PSF_CFG2 (ISP3X_CAC_BASE + 0x00048) 767 #define ISP3X_CAC_PSF_CFG3 (ISP3X_CAC_BASE + 0x0004C) 768 #define ISP3X_CAC_PSF_CFG4 (ISP3X_CAC_BASE + 0x00050) 769 #define ISP3X_CAC_PSF_CFG5 (ISP3X_CAC_BASE + 0x00054) 770 #define ISP3X_CAC_PSF_CFG6 (ISP3X_CAC_BASE + 0x00058) 771 #define ISP3X_CAC_PSF_CFG7 (ISP3X_CAC_BASE + 0x0005C) 772 #define ISP3X_CAC_PSF_CFG8 (ISP3X_CAC_BASE + 0x00060) 773 #define ISP3X_CAC_PSF_CFG9 (ISP3X_CAC_BASE + 0x00064) 774 #define ISP3X_CAC_PSF_CFG10 (ISP3X_CAC_BASE + 0x00068) 775 #define ISP3X_CAC_PSF_CFG11 (ISP3X_CAC_BASE + 0x0006C) 776 #define ISP3X_CAC_PSF_CFG12 (ISP3X_CAC_BASE + 0x00070) 777 #define ISP3X_CAC_PSF_CFG13 (ISP3X_CAC_BASE + 0x00074) 778 #define ISP3X_CAC_PSF_CFG14 (ISP3X_CAC_BASE + 0x00078) 779 #define ISP3X_CAC_PSF_CFG15 (ISP3X_CAC_BASE + 0x0007C) 780 #define ISP3X_CAC_RO_CNT (ISP3X_CAC_BASE + 0x00080) 781 #define ISP32_CAC_EXPO_THED_B (ISP3X_CAC_BASE + 0x00080) 782 #define ISP32_CAC_EXPO_THED_R (ISP3X_CAC_BASE + 0x00084) 783 #define ISP32_CAC_EXPO_ADJ_B (ISP3X_CAC_BASE + 0x00088) 784 #define ISP32_CAC_EXPO_ADJ_R (ISP3X_CAC_BASE + 0x0008c) 785 #define ISP32_CAC_RO_CNT (ISP3X_CAC_BASE + 0x000fc) 786 787 #define ISP3X_YNR_BASE 0x00002700 788 #define ISP3X_YNR_GLOBAL_CTRL (ISP3X_YNR_BASE + 0x00000) 789 #define ISP3X_YNR_RNR_MAX_R (ISP3X_YNR_BASE + 0x00004) 790 #define ISP3X_YNR_RNR_CENTER_COOR (ISP3X_YNR_BASE + 0x00008) 791 #define ISP3X_YNR_LOCAL_GAIN_CTRL (ISP3X_YNR_BASE + 0x0000C) 792 #define ISP3X_YNR_LOWNR_CTRL0 (ISP3X_YNR_BASE + 0x00010) 793 #define ISP3X_YNR_LOWNR_CTRL1 (ISP3X_YNR_BASE + 0x00014) 794 #define ISP3X_YNR_LOWNR_CTRL2 (ISP3X_YNR_BASE + 0x00018) 795 #define ISP3X_YNR_LOWNR_CTRL3 (ISP3X_YNR_BASE + 0x0001c) 796 #define ISP3X_YNR_HIGHNR_CTRL0 (ISP3X_YNR_BASE + 0x00020) 797 #define ISP3X_YNR_HIGHNR_CTRL1 (ISP3X_YNR_BASE + 0x00024) 798 #define ISP3X_YNR_HIGHNR_BASE_FILTER_WEIGHT (ISP3X_YNR_BASE + 0x00028) 799 #define ISP3X_YNR_LOWNR_CTRL4 (ISP3X_YNR_BASE + 0x0002c) 800 #define ISP3X_YNR_GAUSS1_COEFF (ISP3X_YNR_BASE + 0x00030) 801 #define ISP3X_YNR_GAUSS2_COEFF (ISP3X_YNR_BASE + 0x00034) 802 #define ISP3X_YNR_DIRECTION_W_0_3 (ISP3X_YNR_BASE + 0x00038) 803 #define ISP3X_YNR_DIRECTION_W_4_7 (ISP3X_YNR_BASE + 0x0003c) 804 #define ISP3X_YNR_SGM_DX_0_1 (ISP3X_YNR_BASE + 0x00040) 805 #define ISP3X_YNR_SGM_DX_2_3 (ISP3X_YNR_BASE + 0x00044) 806 #define ISP3X_YNR_SGM_DX_4_5 (ISP3X_YNR_BASE + 0x00048) 807 #define ISP3X_YNR_SGM_DX_6_7 (ISP3X_YNR_BASE + 0x0004c) 808 #define ISP3X_YNR_SGM_DX_8_9 (ISP3X_YNR_BASE + 0x00050) 809 #define ISP3X_YNR_SGM_DX_10_11 (ISP3X_YNR_BASE + 0x00055) 810 #define ISP3X_YNR_SGM_DX_12_13 (ISP3X_YNR_BASE + 0x00058) 811 #define ISP3X_YNR_SGM_DX_14_15 (ISP3X_YNR_BASE + 0x0005c) 812 #define ISP3X_YNR_SGM_DX_16 (ISP3X_YNR_BASE + 0x00060) 813 #define ISP3X_YNR_LSGM_Y_0_1 (ISP3X_YNR_BASE + 0x00070) 814 #define ISP3X_YNR_LSGM_Y_2_3 (ISP3X_YNR_BASE + 0x00074) 815 #define ISP3X_YNR_LSGM_Y_4_5 (ISP3X_YNR_BASE + 0x00078) 816 #define ISP3X_YNR_LSGM_Y_6_7 (ISP3X_YNR_BASE + 0x0007c) 817 #define ISP3X_YNR_LSGM_Y_8_9 (ISP3X_YNR_BASE + 0x00080) 818 #define ISP3X_YNR_LSGM_Y_10_11 (ISP3X_YNR_BASE + 0x00084) 819 #define ISP3X_YNR_LSGM_Y_12_13 (ISP3X_YNR_BASE + 0x00088) 820 #define ISP3X_YNR_LSGM_Y_14_15 (ISP3X_YNR_BASE + 0x0008c) 821 #define ISP3X_YNR_LSGM_Y_16 (ISP3X_YNR_BASE + 0x00090) 822 #define ISP3X_YNR_HSGM_Y_0_1 (ISP3X_YNR_BASE + 0x000a0) 823 #define ISP3X_YNR_HSGM_Y_2_3 (ISP3X_YNR_BASE + 0x000a4) 824 #define ISP3X_YNR_HSGM_Y_4_5 (ISP3X_YNR_BASE + 0x000a8) 825 #define ISP3X_YNR_HSGM_Y_6_7 (ISP3X_YNR_BASE + 0x000ac) 826 #define ISP3X_YNR_HSGM_Y_8_9 (ISP3X_YNR_BASE + 0x000b0) 827 #define ISP3X_YNR_HSGM_Y_10_11 (ISP3X_YNR_BASE + 0x000b4) 828 #define ISP3X_YNR_HSGM_Y_12_13 (ISP3X_YNR_BASE + 0x000b8) 829 #define ISP3X_YNR_HSGM_Y_14_15 (ISP3X_YNR_BASE + 0x000bc) 830 #define ISP3X_YNR_HSGM_Y_16 (ISP3X_YNR_BASE + 0x000c0) 831 #define ISP3X_YNR_RNR_STRENGTH03 (ISP3X_YNR_BASE + 0x000d0) 832 #define ISP3X_YNR_RNR_STRENGTH47 (ISP3X_YNR_BASE + 0x000d4) 833 #define ISP3X_YNR_RNR_STRENGTH8B (ISP3X_YNR_BASE + 0x000d8) 834 #define ISP3X_YNR_RNR_STRENGTHCF (ISP3X_YNR_BASE + 0x000dc) 835 #define ISP3X_YNR_RNR_STRENGTH16 (ISP3X_YNR_BASE + 0x000e0) 836 #define ISP32_YNR_NLM_SIGMA_GAIN (ISP3X_YNR_BASE + 0x000f0) 837 #define ISP32_YNR_NLM_COE (ISP3X_YNR_BASE + 0x000f4) 838 #define ISP32_YNR_NLM_WEIGHT (ISP3X_YNR_BASE + 0x000f8) 839 #define ISP32_YNR_NLM_NR_WEIGHT (ISP3X_YNR_BASE + 0x000fc) 840 841 #define ISP3X_CNR_BASE 0x00002800 842 #define ISP3X_CNR_CTRL (ISP3X_CNR_BASE + 0x00000) 843 #define ISP3X_CNR_EXGAIN (ISP3X_CNR_BASE + 0x00004) 844 #define ISP3X_CNR_GAIN_PARA (ISP3X_CNR_BASE + 0x00008) 845 #define ISP32_CNR_THUMB1 (ISP3X_CNR_BASE + 0x00008) 846 #define ISP3X_CNR_GAIN_UV_PARA (ISP3X_CNR_BASE + 0x0000c) 847 #define ISP32_CNR_THUMB_BF_RATIO (ISP3X_CNR_BASE + 0x0000c) 848 #define ISP3X_CNR_LMED3 (ISP3X_CNR_BASE + 0x00010) 849 #define ISP32_CNR_LBF_WEITD (ISP3X_CNR_BASE + 0x00010) 850 #define ISP3X_CNR_LBF5_GAIN (ISP3X_CNR_BASE + 0x00014) 851 #define ISP32_CNR_IIR_PARA1 (ISP3X_CNR_BASE + 0x00014) 852 #define ISP3X_CNR_LBF5_WEITD0_3 (ISP3X_CNR_BASE + 0x00018) 853 #define ISP32_CNR_IIR_PARA2 (ISP3X_CNR_BASE + 0x00018) 854 #define ISP3X_CNR_LBF5_WEITD4 (ISP3X_CNR_BASE + 0x0001c) 855 #define ISP32_CNR_GAUS_COE1 (ISP3X_CNR_BASE + 0x0001c) 856 #define ISP3X_CNR_HMED3 (ISP3X_CNR_BASE + 0x00020) 857 #define ISP32_CNR_GAUS_COE2 (ISP3X_CNR_BASE + 0x00020) 858 #define ISP3X_CNR_HBF5 (ISP3X_CNR_BASE + 0x00024) 859 #define ISP32_CNR_GAUS_RATIO (ISP3X_CNR_BASE + 0x00024) 860 #define ISP3X_CNR_LBF3 (ISP3X_CNR_BASE + 0x00028) 861 #define ISP32_CNR_BF_PARA1 (ISP3X_CNR_BASE + 0x00028) 862 #define ISP32_CNR_BF_PARA2 (ISP3X_CNR_BASE + 0x0002C) 863 #define ISP3X_CNR_SIGMA0 (ISP3X_CNR_BASE + 0x0002C) 864 #define ISP3X_CNR_SIGMA1 (ISP3X_CNR_BASE + 0x00030) 865 #define ISP3X_CNR_SIGMA2 (ISP3X_CNR_BASE + 0x00034) 866 #define ISP3X_CNR_SIGMA3 (ISP3X_CNR_BASE + 0x00038) 867 #define ISP32_CNR_SIGMA0 (ISP3X_CNR_BASE + 0x00030) 868 #define ISP32_CNR_SIGMA1 (ISP3X_CNR_BASE + 0x00034) 869 #define ISP32_CNR_SIGMA2 (ISP3X_CNR_BASE + 0x00038) 870 #define ISP32_CNR_SIGMA3 (ISP3X_CNR_BASE + 0x0003c) 871 #define ISP32_CNR_IIR_GLOBAL_GAIN (ISP3X_CNR_BASE + 0x00040) 872 873 #define ISP3X_SHARP_BASE 0x00002900 874 #define ISP3X_SHARP_EN (ISP3X_SHARP_BASE + 0x00000) 875 #define ISP3X_SHARP_RATIO (ISP3X_SHARP_BASE + 0x00004) 876 #define ISP3X_SHARP_LUMA_DX (ISP3X_SHARP_BASE + 0x00008) 877 #define ISP3X_SHARP_PBF_SIGMA_INV_0 (ISP3X_SHARP_BASE + 0x0000c) 878 #define ISP3X_SHARP_PBF_SIGMA_INV_1 (ISP3X_SHARP_BASE + 0x00010) 879 #define ISP3X_SHARP_PBF_SIGMA_INV_2 (ISP3X_SHARP_BASE + 0x00014) 880 #define ISP3X_SHARP_BF_SIGMA_INV_0 (ISP3X_SHARP_BASE + 0x00018) 881 #define ISP3X_SHARP_BF_SIGMA_INV_1 (ISP3X_SHARP_BASE + 0x0001c) 882 #define ISP3X_SHARP_BF_SIGMA_INV_2 (ISP3X_SHARP_BASE + 0x00020) 883 #define ISP3X_SHARP_SIGMA_SHIFT (ISP3X_SHARP_BASE + 0x00024) 884 #define ISP3X_SHARP_EHF_TH_0 (ISP3X_SHARP_BASE + 0x00028) 885 #define ISP3X_SHARP_EHF_TH_1 (ISP3X_SHARP_BASE + 0x0002c) 886 #define ISP3X_SHARP_EHF_TH_2 (ISP3X_SHARP_BASE + 0x00030) 887 #define ISP3X_SHARP_CLIP_HF_0 (ISP3X_SHARP_BASE + 0x00034) 888 #define ISP3X_SHARP_CLIP_HF_1 (ISP3X_SHARP_BASE + 0x00038) 889 #define ISP3X_SHARP_CLIP_HF_2 (ISP3X_SHARP_BASE + 0x0003c) 890 #define ISP3X_SHARP_PBF_COEF (ISP3X_SHARP_BASE + 0x00040) 891 #define ISP3X_SHARP_BF_COEF (ISP3X_SHARP_BASE + 0x00044) 892 #define ISP3X_SHARP_GAUS_COEF0 (ISP3X_SHARP_BASE + 0x00048) 893 #define ISP3X_SHARP_GAUS_COEF1 (ISP3X_SHARP_BASE + 0x0004C) 894 #define ISP32_SHARP_GAIN (ISP3X_SHARP_BASE + 0x00050) 895 #define ISP32_SHARP_GAIN_ADJUST0 (ISP3X_SHARP_BASE + 0x00054) 896 #define ISP32_SHARP_GAIN_ADJUST1 (ISP3X_SHARP_BASE + 0x00058) 897 #define ISP32_SHARP_GAIN_ADJUST2 (ISP3X_SHARP_BASE + 0x0005c) 898 #define ISP32_SHARP_GAIN_ADJUST3 (ISP3X_SHARP_BASE + 0x00060) 899 #define ISP32_SHARP_GAIN_ADJUST4 (ISP3X_SHARP_BASE + 0x00064) 900 #define ISP32_SHARP_GAIN_ADJUST5 (ISP3X_SHARP_BASE + 0x00068) 901 #define ISP32_SHARP_GAIN_ADJUST6 (ISP3X_SHARP_BASE + 0x0006c) 902 #define ISP32_SHARP_CENTER (ISP3X_SHARP_BASE + 0x00070) 903 #define ISP32_SHARP_GAIN_DIS_STRENGTH0 (ISP3X_SHARP_BASE + 0x00074) 904 #define ISP32_SHARP_GAIN_DIS_STRENGTH1 (ISP3X_SHARP_BASE + 0x00078) 905 #define ISP32_SHARP_GAIN_DIS_STRENGTH2 (ISP3X_SHARP_BASE + 0x0007c) 906 #define ISP32_SHARP_GAIN_DIS_STRENGTH3 (ISP3X_SHARP_BASE + 0x00080) 907 #define ISP32_SHARP_GAIN_DIS_STRENGTH4 (ISP3X_SHARP_BASE + 0x00084) 908 #define ISP32_SHARP_GAIN_DIS_STRENGTH5 (ISP3X_SHARP_BASE + 0x00088) 909 #define ISP32_SHARP_TEXTURE (ISP3X_SHARP_BASE + 0x0008c) 910 #define ISP32L_SHARP_CLIP_NEG_0 (ISP3X_SHARP_BASE + 0x00090) 911 #define ISP32L_SHARP_CLIP_NEG_1 (ISP3X_SHARP_BASE + 0x00094) 912 #define ISP32L_SHARP_CLIP_NEG_2 (ISP3X_SHARP_BASE + 0x00098) 913 914 #define ISP3X_BAY3D_BASE 0x00002C00 915 #define ISP3X_BAY3D_CTRL (ISP3X_BAY3D_BASE + 0x00000) 916 #define ISP3X_BAY3D_KALRATIO (ISP3X_BAY3D_BASE + 0x00004) 917 #define ISP3X_BAY3D_GLBPK2 (ISP3X_BAY3D_BASE + 0x00008) 918 #define ISP32_BAY3D_CTRL1 (ISP3X_BAY3D_BASE + 0x0000c) 919 #define ISP3X_BAY3D_WGTLMT (ISP3X_BAY3D_BASE + 0x00010) 920 #define ISP3X_BAY3D_SIG0_X0 (ISP3X_BAY3D_BASE + 0x00014) 921 #define ISP3X_BAY3D_SIG0_X1 (ISP3X_BAY3D_BASE + 0x00018) 922 #define ISP3X_BAY3D_SIG0_X2 (ISP3X_BAY3D_BASE + 0x0001C) 923 #define ISP3X_BAY3D_SIG0_X3 (ISP3X_BAY3D_BASE + 0x00020) 924 #define ISP3X_BAY3D_SIG0_X4 (ISP3X_BAY3D_BASE + 0x00024) 925 #define ISP3X_BAY3D_SIG0_X5 (ISP3X_BAY3D_BASE + 0x00028) 926 #define ISP3X_BAY3D_SIG0_X6 (ISP3X_BAY3D_BASE + 0x0002C) 927 #define ISP3X_BAY3D_SIG0_X7 (ISP3X_BAY3D_BASE + 0x00030) 928 #define ISP3X_BAY3D_SIG0_Y0 (ISP3X_BAY3D_BASE + 0x00034) 929 #define ISP3X_BAY3D_SIG0_Y1 (ISP3X_BAY3D_BASE + 0x00038) 930 #define ISP3X_BAY3D_SIG0_Y2 (ISP3X_BAY3D_BASE + 0x0003C) 931 #define ISP3X_BAY3D_SIG0_Y3 (ISP3X_BAY3D_BASE + 0x00040) 932 #define ISP3X_BAY3D_SIG0_Y4 (ISP3X_BAY3D_BASE + 0x00044) 933 #define ISP3X_BAY3D_SIG0_Y5 (ISP3X_BAY3D_BASE + 0x00048) 934 #define ISP3X_BAY3D_SIG0_Y6 (ISP3X_BAY3D_BASE + 0x0004C) 935 #define ISP3X_BAY3D_SIG0_Y7 (ISP3X_BAY3D_BASE + 0x00050) 936 #define ISP3X_BAY3D_SIG1_X0 (ISP3X_BAY3D_BASE + 0x00054) 937 #define ISP3X_BAY3D_SIG1_X1 (ISP3X_BAY3D_BASE + 0x00058) 938 #define ISP3X_BAY3D_SIG1_X2 (ISP3X_BAY3D_BASE + 0x0005C) 939 #define ISP3X_BAY3D_SIG1_X3 (ISP3X_BAY3D_BASE + 0x00060) 940 #define ISP3X_BAY3D_SIG1_X4 (ISP3X_BAY3D_BASE + 0x00064) 941 #define ISP3X_BAY3D_SIG1_X5 (ISP3X_BAY3D_BASE + 0x00068) 942 #define ISP3X_BAY3D_SIG1_X6 (ISP3X_BAY3D_BASE + 0x0006C) 943 #define ISP3X_BAY3D_SIG1_X7 (ISP3X_BAY3D_BASE + 0x00070) 944 #define ISP3X_BAY3D_SIG1_Y0 (ISP3X_BAY3D_BASE + 0x00074) 945 #define ISP3X_BAY3D_SIG1_Y1 (ISP3X_BAY3D_BASE + 0x00078) 946 #define ISP3X_BAY3D_SIG1_Y2 (ISP3X_BAY3D_BASE + 0x0007C) 947 #define ISP3X_BAY3D_SIG1_Y3 (ISP3X_BAY3D_BASE + 0x00080) 948 #define ISP3X_BAY3D_SIG1_Y4 (ISP3X_BAY3D_BASE + 0x00084) 949 #define ISP3X_BAY3D_SIG1_Y5 (ISP3X_BAY3D_BASE + 0x00088) 950 #define ISP3X_BAY3D_SIG1_Y6 (ISP3X_BAY3D_BASE + 0x0008C) 951 #define ISP3X_BAY3D_SIG1_Y7 (ISP3X_BAY3D_BASE + 0x00090) 952 #define ISP3X_BAY3D_SIG2_Y0 (ISP3X_BAY3D_BASE + 0x00094) 953 #define ISP3X_BAY3D_SIG2_Y1 (ISP3X_BAY3D_BASE + 0x00098) 954 #define ISP3X_BAY3D_SIG2_Y2 (ISP3X_BAY3D_BASE + 0x0009C) 955 #define ISP3X_BAY3D_SIG2_Y3 (ISP3X_BAY3D_BASE + 0x000A0) 956 #define ISP3X_BAY3D_SIG2_Y4 (ISP3X_BAY3D_BASE + 0x000A4) 957 #define ISP3X_BAY3D_SIG2_Y5 (ISP3X_BAY3D_BASE + 0x000A8) 958 #define ISP3X_BAY3D_SIG2_Y6 (ISP3X_BAY3D_BASE + 0x000AC) 959 #define ISP3X_BAY3D_SIG2_Y7 (ISP3X_BAY3D_BASE + 0x000B0) 960 #define ISP3X_BAY3D_LODIF_STAT0 (ISP3X_BAY3D_BASE + 0x000B4) 961 #define ISP3X_BAY3D_LODIF_STAT1 (ISP3X_BAY3D_BASE + 0x000B8) 962 #define ISP3X_BAY3D_HIDIF_STAT0 (ISP3X_BAY3D_BASE + 0x000BC) 963 #define ISP3X_BAY3D_HIDIF_STAT1 (ISP3X_BAY3D_BASE + 0x000C0) 964 #define ISP3X_BAY3D_MI_ST (ISP3X_BAY3D_BASE + 0x000C8) 965 #define ISP3X_BAY3D_RO_CNT (ISP3X_BAY3D_BASE + 0x000CC) 966 #define ISP3X_BAY3D_RO_FIFO_CUR (ISP3X_BAY3D_BASE + 0x000D0) 967 #define ISP3X_BAY3D_RO_FIFO_IIR (ISP3X_BAY3D_BASE + 0x000D4) 968 #define ISP3X_BAY3D_RO_FIFO_DS (ISP3X_BAY3D_BASE + 0x000D8) 969 #define ISP3X_BAY3D_RO_FIFO_STATE (ISP3X_BAY3D_BASE + 0x000DC) 970 #define ISP3X_BAY3D_IN_IRQ_LINECNT (ISP3X_BAY3D_BASE + 0x000E0) 971 #define ISP32_BAY3D_HISIGRAT (ISP3X_BAY3D_BASE + 0x000E4) 972 #define ISP32_BAY3D_HISIGOFF (ISP3X_BAY3D_BASE + 0x000E8) 973 #define ISP32_BAY3D_LOSIG (ISP3X_BAY3D_BASE + 0x000EC) 974 #define ISP32_BAY3D_SIGPK (ISP3X_BAY3D_BASE + 0x000F0) 975 #define ISP32_BAY3D_SIGGAUS (ISP3X_BAY3D_BASE + 0x000F4) 976 #define ISP32_BAY3D_WRMI (ISP3X_BAY3D_BASE + 0x000F8) 977 #define ISP32_BAY3D_RDMI (ISP3X_BAY3D_BASE + 0x000FC) 978 979 #define ISP3X_GIC_BASE 0x00002F00 980 #define ISP3X_GIC_CONTROL (ISP3X_GIC_BASE + 0x00000) 981 #define ISP3X_GIC_DIFF_PARA1 (ISP3X_GIC_BASE + 0x00004) 982 #define ISP3X_GIC_DIFF_PARA2 (ISP3X_GIC_BASE + 0x00008) 983 #define ISP3X_GIC_DIFF_PARA3 (ISP3X_GIC_BASE + 0x0000c) 984 #define ISP3X_GIC_DIFF_PARA4 (ISP3X_GIC_BASE + 0x00010) 985 #define ISP3X_GIC_NOISE_PARA1 (ISP3X_GIC_BASE + 0x00014) 986 #define ISP3X_GIC_NOISE_PARA2 (ISP3X_GIC_BASE + 0x00018) 987 #define ISP3X_GIC_NOISE_PARA3 (ISP3X_GIC_BASE + 0x0001c) 988 #define ISP3X_GIC_SIGMA_VALUE0 (ISP3X_GIC_BASE + 0x00020) 989 #define ISP3X_GIC_SIGMA_VALUE1 (ISP3X_GIC_BASE + 0x00024) 990 #define ISP3X_GIC_SIGMA_VALUE2 (ISP3X_GIC_BASE + 0x00028) 991 #define ISP3X_GIC_SIGMA_VALUE3 (ISP3X_GIC_BASE + 0x0002c) 992 #define ISP3X_GIC_SIGMA_VALUE4 (ISP3X_GIC_BASE + 0x00030) 993 #define ISP3X_GIC_SIGMA_VALUE5 (ISP3X_GIC_BASE + 0x00034) 994 #define ISP3X_GIC_SIGMA_VALUE6 (ISP3X_GIC_BASE + 0x00038) 995 #define ISP3X_GIC_SIGMA_VALUE7 (ISP3X_GIC_BASE + 0x0003c) 996 997 #define ISP3X_BLS_BASE 0x00003000 998 #define ISP3X_BLS_CTRL (ISP3X_BLS_BASE + 0x00000) 999 #define ISP3X_BLS_SAMPLES (ISP3X_BLS_BASE + 0x00004) 1000 #define ISP3X_BLS_H1_START (ISP3X_BLS_BASE + 0x00008) 1001 #define ISP3X_BLS_H1_STOP (ISP3X_BLS_BASE + 0x0000c) 1002 #define ISP3X_BLS_V1_START (ISP3X_BLS_BASE + 0x00010) 1003 #define ISP3X_BLS_V1_STOP (ISP3X_BLS_BASE + 0x00014) 1004 #define ISP3X_BLS_H2_START (ISP3X_BLS_BASE + 0x00018) 1005 #define ISP3X_BLS_H2_STOP (ISP3X_BLS_BASE + 0x0001c) 1006 #define ISP3X_BLS_V2_START (ISP3X_BLS_BASE + 0x00020) 1007 #define ISP3X_BLS_V2_STOP (ISP3X_BLS_BASE + 0x00024) 1008 #define ISP3X_BLS_A_FIXED (ISP3X_BLS_BASE + 0x00028) 1009 #define ISP3X_BLS_B_FIXED (ISP3X_BLS_BASE + 0x0002c) 1010 #define ISP3X_BLS_C_FIXED (ISP3X_BLS_BASE + 0x00030) 1011 #define ISP3X_BLS_D_FIXED (ISP3X_BLS_BASE + 0x00034) 1012 #define ISP3X_BLS_A_MEASURED (ISP3X_BLS_BASE + 0x00038) 1013 #define ISP3X_BLS_B_MEASURED (ISP3X_BLS_BASE + 0x0003c) 1014 #define ISP3X_BLS_C_MEASURED (ISP3X_BLS_BASE + 0x00040) 1015 #define ISP3X_BLS_D_MEASURED (ISP3X_BLS_BASE + 0x00044) 1016 #define ISP3X_BLS1_A_FIXED (ISP3X_BLS_BASE + 0x00048) 1017 #define ISP3X_BLS1_B_FIXED (ISP3X_BLS_BASE + 0x0004c) 1018 #define ISP3X_BLS1_C_FIXED (ISP3X_BLS_BASE + 0x00050) 1019 #define ISP3X_BLS1_D_FIXED (ISP3X_BLS_BASE + 0x00054) 1020 #define ISP32_BLS2_A_FIXED (ISP3X_BLS_BASE + 0x00058) 1021 #define ISP32_BLS2_B_FIXED (ISP3X_BLS_BASE + 0x0005c) 1022 #define ISP32_BLS2_C_FIXED (ISP3X_BLS_BASE + 0x00060) 1023 #define ISP32_BLS2_D_FIXED (ISP3X_BLS_BASE + 0x00064) 1024 #define ISP32_BLS_ISP_OB_OFFSET (ISP3X_BLS_BASE + 0x00068) 1025 #define ISP32_BLS_ISP_OB_PREDGAIN (ISP3X_BLS_BASE + 0x0006c) 1026 #define ISP32_BLS_ISP_OB_MAX (ISP3X_BLS_BASE + 0x00070) 1027 1028 #define ISP32_EXPD_BASE 0x00003200 1029 #define ISP32_EXPD_CTRL (ISP32_EXPD_BASE + 0x00000) 1030 #define ISP32_EXPD_X00_01 (ISP32_EXPD_BASE + 0x00004) 1031 #define ISP32_EXPD_X02_03 (ISP32_EXPD_BASE + 0x00008) 1032 #define ISP32_EXPD_X04_05 (ISP32_EXPD_BASE + 0x0000C) 1033 #define ISP32_EXPD_X06_07 (ISP32_EXPD_BASE + 0x00010) 1034 #define ISP32_EXPD_X08_09 (ISP32_EXPD_BASE + 0x00014) 1035 #define ISP32_EXPD_X10_11 (ISP32_EXPD_BASE + 0x00018) 1036 #define ISP32_EXPD_X12_13 (ISP32_EXPD_BASE + 0x0001C) 1037 #define ISP32_EXPD_X14_15 (ISP32_EXPD_BASE + 0x00020) 1038 #define ISP32_EXPD_Y00_01 (ISP32_EXPD_BASE + 0x00024) 1039 #define ISP32_EXPD_Y02_03 (ISP32_EXPD_BASE + 0x00028) 1040 #define ISP32_EXPD_Y04_05 (ISP32_EXPD_BASE + 0x0002C) 1041 #define ISP32_EXPD_Y06_07 (ISP32_EXPD_BASE + 0x00030) 1042 #define ISP32_EXPD_Y08_09 (ISP32_EXPD_BASE + 0x00034) 1043 #define ISP32_EXPD_Y10_11 (ISP32_EXPD_BASE + 0x00038) 1044 #define ISP32_EXPD_Y12_13 (ISP32_EXPD_BASE + 0x0003C) 1045 #define ISP32_EXPD_Y14_15 (ISP32_EXPD_BASE + 0x00040) 1046 #define ISP32_EXPD_Y16 (ISP32_EXPD_BASE + 0x00044) 1047 #define ISP32_EXPD_K0 (ISP32_EXPD_BASE + 0x00048) 1048 #define ISP32_EXPD_K1 (ISP32_EXPD_BASE + 0x0004c) 1049 #define ISP32_EXPD_K2 (ISP32_EXPD_BASE + 0x00050) 1050 #define ISP32_EXPD_K3 (ISP32_EXPD_BASE + 0x00054) 1051 #define ISP32_EXPD_K4 (ISP32_EXPD_BASE + 0x00058) 1052 #define ISP32_EXPD_K5 (ISP32_EXPD_BASE + 0x0005C) 1053 #define ISP32_EXPD_K6 (ISP32_EXPD_BASE + 0x00060) 1054 #define ISP32_EXPD_K7 (ISP32_EXPD_BASE + 0x00064) 1055 #define ISP32_EXPD_K8 (ISP32_EXPD_BASE + 0x00068) 1056 #define ISP32_EXPD_K9 (ISP32_EXPD_BASE + 0x0006C) 1057 #define ISP32_EXPD_K10 (ISP32_EXPD_BASE + 0x00070) 1058 #define ISP32_EXPD_K11 (ISP32_EXPD_BASE + 0x00074) 1059 #define ISP32_EXPD_K12 (ISP32_EXPD_BASE + 0x00078) 1060 #define ISP32_EXPD_K13 (ISP32_EXPD_BASE + 0x0007C) 1061 #define ISP32_EXPD_K14 (ISP32_EXPD_BASE + 0x00080) 1062 #define ISP32_EXPD_K15 (ISP32_EXPD_BASE + 0x00084) 1063 1064 #define ISP32_VSM_BASE 0x00003380 1065 #define ISP32_VSM_MODE (ISP32_VSM_BASE + 0x00000) 1066 #define ISP32_VSM_H_OFFS (ISP32_VSM_BASE + 0x00004) 1067 #define ISP32_VSM_V_OFFS (ISP32_VSM_BASE + 0x00008) 1068 #define ISP32_VSM_H_SIZE (ISP32_VSM_BASE + 0x0000C) 1069 #define ISP32_VSM_V_SIZE (ISP32_VSM_BASE + 0x00010) 1070 #define ISP32_VSM_H_SEGMENTS (ISP32_VSM_BASE + 0x00014) 1071 #define ISP32_VSM_V_SEGMENTS (ISP32_VSM_BASE + 0x00018) 1072 #define ISP32_VSM_DELTA_H (ISP32_VSM_BASE + 0x0001C) 1073 #define ISP32_VSM_DELTA_V (ISP32_VSM_BASE + 0x00020) 1074 1075 #define ISP3X_DPCC0_BASE 0x00003400 1076 #define ISP3X_DPCC1_BASE 0x00003500 1077 #define ISP3X_DPCC2_BASE 0x00003600 1078 #define ISP3X_DPCC0_MODE (ISP3X_DPCC0_BASE + 0x00000) 1079 #define ISP3X_DPCC0_OUTPUT_MODE (ISP3X_DPCC0_BASE + 0x00004) 1080 #define ISP3X_DPCC0_SET_USE (ISP3X_DPCC0_BASE + 0x00008) 1081 #define ISP3X_DPCC0_METHODS_SET_1 (ISP3X_DPCC0_BASE + 0x0000c) 1082 #define ISP3X_DPCC0_METHODS_SET_2 (ISP3X_DPCC0_BASE + 0x00010) 1083 #define ISP3X_DPCC0_METHODS_SET_3 (ISP3X_DPCC0_BASE + 0x00014) 1084 #define ISP3X_DPCC0_LINE_THRESH_1 (ISP3X_DPCC0_BASE + 0x00018) 1085 #define ISP3X_DPCC0_LINE_MAD_FAC_1 (ISP3X_DPCC0_BASE + 0x0001c) 1086 #define ISP3X_DPCC0_PG_FAC_1 (ISP3X_DPCC0_BASE + 0x00020) 1087 #define ISP3X_DPCC0_RND_THRESH_1 (ISP3X_DPCC0_BASE + 0x00024) 1088 #define ISP3X_DPCC0_RG_FAC_1 (ISP3X_DPCC0_BASE + 0x00028) 1089 #define ISP3X_DPCC0_LINE_THRESH_2 (ISP3X_DPCC0_BASE + 0x0002c) 1090 #define ISP3X_DPCC0_LINE_MAD_FAC_2 (ISP3X_DPCC0_BASE + 0x00030) 1091 #define ISP3X_DPCC0_PG_FAC_2 (ISP3X_DPCC0_BASE + 0x00034) 1092 #define ISP3X_DPCC0_RND_THRESH_2 (ISP3X_DPCC0_BASE + 0x00038) 1093 #define ISP3X_DPCC0_RG_FAC_2 (ISP3X_DPCC0_BASE + 0x0003c) 1094 #define ISP3X_DPCC0_LINE_THRESH_3 (ISP3X_DPCC0_BASE + 0x00040) 1095 #define ISP3X_DPCC0_LINE_MAD_FAC_3 (ISP3X_DPCC0_BASE + 0x00044) 1096 #define ISP3X_DPCC0_PG_FAC_3 (ISP3X_DPCC0_BASE + 0x00048) 1097 #define ISP3X_DPCC0_RND_THRESH_3 (ISP3X_DPCC0_BASE + 0x0004c) 1098 #define ISP3X_DPCC0_RG_FAC_3 (ISP3X_DPCC0_BASE + 0x00050) 1099 #define ISP3X_DPCC0_RO_LIMITS (ISP3X_DPCC0_BASE + 0x00054) 1100 #define ISP3X_DPCC0_RND_OFFS (ISP3X_DPCC0_BASE + 0x00058) 1101 #define ISP3X_DPCC0_BPT_CTRL (ISP3X_DPCC0_BASE + 0x0005c) 1102 #define ISP3X_DPCC0_BPT_NUMBER (ISP3X_DPCC0_BASE + 0x00060) 1103 #define ISP3X_DPCC0_BPT_ADDR (ISP3X_DPCC0_BASE + 0x00064) 1104 #define ISP3X_DPCC0_BPT_DATA (ISP3X_DPCC0_BASE + 0x00068) 1105 #define ISP3X_DPCC0_BP_CNT (ISP3X_DPCC0_BASE + 0x0006c) 1106 #define ISP3X_DPCC0_PDAF_EN (ISP3X_DPCC0_BASE + 0x00070) 1107 #define ISP3X_DPCC0_PDAF_POINT_EN (ISP3X_DPCC0_BASE + 0x00074) 1108 #define ISP3X_DPCC0_PDAF_OFFSET (ISP3X_DPCC0_BASE + 0x00078) 1109 #define ISP3X_DPCC0_PDAF_WRAP (ISP3X_DPCC0_BASE + 0x0007c) 1110 #define ISP3X_DPCC0_PDAF_SCOPE (ISP3X_DPCC0_BASE + 0x00080) 1111 #define ISP3X_DPCC0_PDAF_POINT_0 (ISP3X_DPCC0_BASE + 0x00084) 1112 #define ISP3X_DPCC0_PDAF_POINT_1 (ISP3X_DPCC0_BASE + 0x00088) 1113 #define ISP3X_DPCC0_PDAF_POINT_2 (ISP3X_DPCC0_BASE + 0x0008c) 1114 #define ISP3X_DPCC0_PDAF_POINT_3 (ISP3X_DPCC0_BASE + 0x00090) 1115 #define ISP3X_DPCC0_PDAF_POINT_4 (ISP3X_DPCC0_BASE + 0x00094) 1116 #define ISP3X_DPCC0_PDAF_POINT_5 (ISP3X_DPCC0_BASE + 0x00098) 1117 #define ISP3X_DPCC0_PDAF_POINT_6 (ISP3X_DPCC0_BASE + 0x0009c) 1118 #define ISP3X_DPCC0_PDAF_POINT_7 (ISP3X_DPCC0_BASE + 0x000a0) 1119 #define ISP3X_DPCC0_PDAF_FORWARD_MED (ISP3X_DPCC0_BASE + 0x000a4) 1120 1121 #define ISP3X_DPCC1_MODE (ISP3X_DPCC1_BASE + 0x00000) 1122 #define ISP3X_DPCC1_OUTPUT_MODE (ISP3X_DPCC1_BASE + 0x00004) 1123 #define ISP3X_DPCC1_SET_USE (ISP3X_DPCC1_BASE + 0x00008) 1124 #define ISP3X_DPCC1_METHODS_SET_1 (ISP3X_DPCC1_BASE + 0x0000c) 1125 #define ISP3X_DPCC1_METHODS_SET_2 (ISP3X_DPCC1_BASE + 0x00010) 1126 #define ISP3X_DPCC1_METHODS_SET_3 (ISP3X_DPCC1_BASE + 0x00014) 1127 #define ISP3X_DPCC1_LINE_THRESH_1 (ISP3X_DPCC1_BASE + 0x00018) 1128 #define ISP3X_DPCC1_LINE_MAD_FAC_1 (ISP3X_DPCC1_BASE + 0x0001c) 1129 #define ISP3X_DPCC1_PG_FAC_1 (ISP3X_DPCC1_BASE + 0x00020) 1130 #define ISP3X_DPCC1_RND_THRESH_1 (ISP3X_DPCC1_BASE + 0x00024) 1131 #define ISP3X_DPCC1_RG_FAC_1 (ISP3X_DPCC1_BASE + 0x00028) 1132 #define ISP3X_DPCC1_LINE_THRESH_2 (ISP3X_DPCC1_BASE + 0x0002c) 1133 #define ISP3X_DPCC1_LINE_MAD_FAC_2 (ISP3X_DPCC1_BASE + 0x00030) 1134 #define ISP3X_DPCC1_PG_FAC_2 (ISP3X_DPCC1_BASE + 0x00034) 1135 #define ISP3X_DPCC1_RND_THRESH_2 (ISP3X_DPCC1_BASE + 0x00038) 1136 #define ISP3X_DPCC1_RG_FAC_2 (ISP3X_DPCC1_BASE + 0x0003c) 1137 #define ISP3X_DPCC1_LINE_THRESH_3 (ISP3X_DPCC1_BASE + 0x00040) 1138 #define ISP3X_DPCC1_LINE_MAD_FAC_3 (ISP3X_DPCC1_BASE + 0x00044) 1139 #define ISP3X_DPCC1_PG_FAC_3 (ISP3X_DPCC1_BASE + 0x00048) 1140 #define ISP3X_DPCC1_RND_THRESH_3 (ISP3X_DPCC1_BASE + 0x0004c) 1141 #define ISP3X_DPCC1_RG_FAC_3 (ISP3X_DPCC1_BASE + 0x00050) 1142 #define ISP3X_DPCC1_RO_LIMITS (ISP3X_DPCC1_BASE + 0x00054) 1143 #define ISP3X_DPCC1_RND_OFFS (ISP3X_DPCC1_BASE + 0x00058) 1144 #define ISP3X_DPCC1_BPT_CTRL (ISP3X_DPCC1_BASE + 0x0005c) 1145 #define ISP3X_DPCC1_BPT_NUMBER (ISP3X_DPCC1_BASE + 0x00060) 1146 #define ISP3X_DPCC1_BPT_ADDR (ISP3X_DPCC1_BASE + 0x00064) 1147 #define ISP3X_DPCC1_BPT_DATA (ISP3X_DPCC1_BASE + 0x00068) 1148 #define ISP3X_DPCC1_BP_CNT (ISP3X_DPCC1_BASE + 0x0006c) 1149 #define ISP3X_DPCC1_PDAF_EN (ISP3X_DPCC1_BASE + 0x00070) 1150 #define ISP3X_DPCC1_PDAF_POINT_EN (ISP3X_DPCC1_BASE + 0x00074) 1151 #define ISP3X_DPCC1_PDAF_OFFSET (ISP3X_DPCC1_BASE + 0x00078) 1152 #define ISP3X_DPCC1_PDAF_WRAP (ISP3X_DPCC1_BASE + 0x0007c) 1153 #define ISP3X_DPCC1_PDAF_SCOPE (ISP3X_DPCC1_BASE + 0x00080) 1154 #define ISP3X_DPCC1_PDAF_POINT_0 (ISP3X_DPCC1_BASE + 0x00084) 1155 #define ISP3X_DPCC1_PDAF_POINT_1 (ISP3X_DPCC1_BASE + 0x00088) 1156 #define ISP3X_DPCC1_PDAF_POINT_2 (ISP3X_DPCC1_BASE + 0x0008c) 1157 #define ISP3X_DPCC1_PDAF_POINT_3 (ISP3X_DPCC1_BASE + 0x00090) 1158 #define ISP3X_DPCC1_PDAF_POINT_4 (ISP3X_DPCC1_BASE + 0x00094) 1159 #define ISP3X_DPCC1_PDAF_POINT_5 (ISP3X_DPCC1_BASE + 0x00098) 1160 #define ISP3X_DPCC1_PDAF_POINT_6 (ISP3X_DPCC1_BASE + 0x0009c) 1161 #define ISP3X_DPCC1_PDAF_POINT_7 (ISP3X_DPCC1_BASE + 0x000a0) 1162 #define ISP3X_DPCC1_PDAF_FORWARD_MED (ISP3X_DPCC1_BASE + 0x000a4) 1163 1164 #define ISP3X_DPCC2_MODE (ISP3X_DPCC2_BASE + 0x00000) 1165 #define ISP3X_DPCC2_OUTPUT_MODE (ISP3X_DPCC2_BASE + 0x00004) 1166 #define ISP3X_DPCC2_SET_USE (ISP3X_DPCC2_BASE + 0x00008) 1167 #define ISP3X_DPCC2_METHODS_SET_1 (ISP3X_DPCC2_BASE + 0x0000c) 1168 #define ISP3X_DPCC2_METHODS_SET_2 (ISP3X_DPCC2_BASE + 0x00010) 1169 #define ISP3X_DPCC2_METHODS_SET_3 (ISP3X_DPCC2_BASE + 0x00014) 1170 #define ISP3X_DPCC2_LINE_THRESH_1 (ISP3X_DPCC2_BASE + 0x00018) 1171 #define ISP3X_DPCC2_LINE_MAD_FAC_1 (ISP3X_DPCC2_BASE + 0x0001c) 1172 #define ISP3X_DPCC2_PG_FAC_1 (ISP3X_DPCC2_BASE + 0x00020) 1173 #define ISP3X_DPCC2_RND_THRESH_1 (ISP3X_DPCC2_BASE + 0x00024) 1174 #define ISP3X_DPCC2_RG_FAC_1 (ISP3X_DPCC2_BASE + 0x00028) 1175 #define ISP3X_DPCC2_LINE_THRESH_2 (ISP3X_DPCC2_BASE + 0x0002c) 1176 #define ISP3X_DPCC2_LINE_MAD_FAC_2 (ISP3X_DPCC2_BASE + 0x00030) 1177 #define ISP3X_DPCC2_PG_FAC_2 (ISP3X_DPCC2_BASE + 0x00034) 1178 #define ISP3X_DPCC2_RND_THRESH_2 (ISP3X_DPCC2_BASE + 0x00038) 1179 #define ISP3X_DPCC2_RG_FAC_2 (ISP3X_DPCC2_BASE + 0x0003c) 1180 #define ISP3X_DPCC2_LINE_THRESH_3 (ISP3X_DPCC2_BASE + 0x00040) 1181 #define ISP3X_DPCC2_LINE_MAD_FAC_3 (ISP3X_DPCC2_BASE + 0x00044) 1182 #define ISP3X_DPCC2_PG_FAC_3 (ISP3X_DPCC2_BASE + 0x00048) 1183 #define ISP3X_DPCC2_RND_THRESH_3 (ISP3X_DPCC2_BASE + 0x0004c) 1184 #define ISP3X_DPCC2_RG_FAC_3 (ISP3X_DPCC2_BASE + 0x00050) 1185 #define ISP3X_DPCC2_RO_LIMITS (ISP3X_DPCC2_BASE + 0x00054) 1186 #define ISP3X_DPCC2_RND_OFFS (ISP3X_DPCC2_BASE + 0x00058) 1187 #define ISP3X_DPCC2_BPT_CTRL (ISP3X_DPCC2_BASE + 0x0005c) 1188 #define ISP3X_DPCC2_BPT_NUMBER (ISP3X_DPCC2_BASE + 0x00060) 1189 #define ISP3X_DPCC2_BPT_ADDR (ISP3X_DPCC2_BASE + 0x00064) 1190 #define ISP3X_DPCC2_BPT_DATA (ISP3X_DPCC2_BASE + 0x00068) 1191 #define ISP3X_DPCC2_BP_CNT (ISP3X_DPCC2_BASE + 0x0006c) 1192 #define ISP3X_DPCC2_PDAF_EN (ISP3X_DPCC2_BASE + 0x00070) 1193 #define ISP3X_DPCC2_PDAF_POINT_EN (ISP3X_DPCC2_BASE + 0x00074) 1194 #define ISP3X_DPCC2_PDAF_OFFSET (ISP3X_DPCC2_BASE + 0x00078) 1195 #define ISP3X_DPCC2_PDAF_WRAP (ISP3X_DPCC2_BASE + 0x0007c) 1196 #define ISP3X_DPCC2_PDAF_SCOPE (ISP3X_DPCC2_BASE + 0x00080) 1197 #define ISP3X_DPCC2_PDAF_POINT_0 (ISP3X_DPCC2_BASE + 0x00084) 1198 #define ISP3X_DPCC2_PDAF_POINT_1 (ISP3X_DPCC2_BASE + 0x00088) 1199 #define ISP3X_DPCC2_PDAF_POINT_2 (ISP3X_DPCC2_BASE + 0x0008c) 1200 #define ISP3X_DPCC2_PDAF_POINT_3 (ISP3X_DPCC2_BASE + 0x00090) 1201 #define ISP3X_DPCC2_PDAF_POINT_4 (ISP3X_DPCC2_BASE + 0x00094) 1202 #define ISP3X_DPCC2_PDAF_POINT_5 (ISP3X_DPCC2_BASE + 0x00098) 1203 #define ISP3X_DPCC2_PDAF_POINT_6 (ISP3X_DPCC2_BASE + 0x0009c) 1204 #define ISP3X_DPCC2_PDAF_POINT_7 (ISP3X_DPCC2_BASE + 0x000a0) 1205 #define ISP3X_DPCC2_PDAF_FORWARD_MED (ISP3X_DPCC2_BASE + 0x000a4) 1206 1207 #define ISP3X_HDRMGE_BASE 0x00003800 1208 #define ISP3X_HDRMGE_CTRL (ISP3X_HDRMGE_BASE + 0x00000) 1209 #define ISP3X_HDRMGE_GAIN0 (ISP3X_HDRMGE_BASE + 0x00008) 1210 #define ISP3X_HDRMGE_GAIN1 (ISP3X_HDRMGE_BASE + 0x0000c) 1211 #define ISP3X_HDRMGE_GAIN2 (ISP3X_HDRMGE_BASE + 0x00010) 1212 #define ISP3X_HDRMGE_LIGHTZ (ISP3X_HDRMGE_BASE + 0x00014) 1213 #define ISP3X_HDRMGE_MS_DIFF (ISP3X_HDRMGE_BASE + 0x00018) 1214 #define ISP3X_HDRMGE_LM_DIFF (ISP3X_HDRMGE_BASE + 0x0001C) 1215 #define ISP3X_HDRMGE_DIFF_Y0 (ISP3X_HDRMGE_BASE + 0x00020) 1216 #define ISP3X_HDRMGE_DIFF_Y1 (ISP3X_HDRMGE_BASE + 0x00024) 1217 #define ISP3X_HDRMGE_DIFF_Y2 (ISP3X_HDRMGE_BASE + 0x00028) 1218 #define ISP3X_HDRMGE_DIFF_Y3 (ISP3X_HDRMGE_BASE + 0x0002c) 1219 #define ISP3X_HDRMGE_DIFF_Y4 (ISP3X_HDRMGE_BASE + 0x00030) 1220 #define ISP3X_HDRMGE_DIFF_Y5 (ISP3X_HDRMGE_BASE + 0x00034) 1221 #define ISP3X_HDRMGE_DIFF_Y6 (ISP3X_HDRMGE_BASE + 0x00038) 1222 #define ISP3X_HDRMGE_DIFF_Y7 (ISP3X_HDRMGE_BASE + 0x0003c) 1223 #define ISP3X_HDRMGE_DIFF_Y8 (ISP3X_HDRMGE_BASE + 0x00040) 1224 #define ISP3X_HDRMGE_DIFF_Y9 (ISP3X_HDRMGE_BASE + 0x00044) 1225 #define ISP3X_HDRMGE_DIFF_Y10 (ISP3X_HDRMGE_BASE + 0x00048) 1226 #define ISP3X_HDRMGE_DIFF_Y11 (ISP3X_HDRMGE_BASE + 0x0004c) 1227 #define ISP3X_HDRMGE_DIFF_Y12 (ISP3X_HDRMGE_BASE + 0x00050) 1228 #define ISP3X_HDRMGE_DIFF_Y13 (ISP3X_HDRMGE_BASE + 0x00054) 1229 #define ISP3X_HDRMGE_DIFF_Y14 (ISP3X_HDRMGE_BASE + 0x00058) 1230 #define ISP3X_HDRMGE_DIFF_Y15 (ISP3X_HDRMGE_BASE + 0x0005c) 1231 #define ISP3X_HDRMGE_DIFF_Y16 (ISP3X_HDRMGE_BASE + 0x00060) 1232 #define ISP3X_HDRMGE_OVER_Y0 (ISP3X_HDRMGE_BASE + 0x00070) 1233 #define ISP3X_HDRMGE_OVER_Y1 (ISP3X_HDRMGE_BASE + 0x00074) 1234 #define ISP3X_HDRMGE_OVER_Y2 (ISP3X_HDRMGE_BASE + 0x00078) 1235 #define ISP3X_HDRMGE_OVER_Y3 (ISP3X_HDRMGE_BASE + 0x0007c) 1236 #define ISP3X_HDRMGE_OVER_Y4 (ISP3X_HDRMGE_BASE + 0x00080) 1237 #define ISP3X_HDRMGE_OVER_Y5 (ISP3X_HDRMGE_BASE + 0x00084) 1238 #define ISP3X_HDRMGE_OVER_Y6 (ISP3X_HDRMGE_BASE + 0x00088) 1239 #define ISP3X_HDRMGE_OVER_Y7 (ISP3X_HDRMGE_BASE + 0x0008c) 1240 #define ISP3X_HDRMGE_OVER_Y8 (ISP3X_HDRMGE_BASE + 0x00090) 1241 #define ISP3X_HDRMGE_OVER_Y9 (ISP3X_HDRMGE_BASE + 0x00094) 1242 #define ISP3X_HDRMGE_OVER_Y10 (ISP3X_HDRMGE_BASE + 0x00098) 1243 #define ISP3X_HDRMGE_OVER_Y11 (ISP3X_HDRMGE_BASE + 0x0009c) 1244 #define ISP3X_HDRMGE_OVER_Y12 (ISP3X_HDRMGE_BASE + 0x000a0) 1245 #define ISP3X_HDRMGE_OVER_Y13 (ISP3X_HDRMGE_BASE + 0x000a4) 1246 #define ISP3X_HDRMGE_OVER_Y14 (ISP3X_HDRMGE_BASE + 0x000a8) 1247 #define ISP3X_HDRMGE_OVER_Y15 (ISP3X_HDRMGE_BASE + 0x000ac) 1248 #define ISP3X_HDRMGE_OVER_Y16 (ISP3X_HDRMGE_BASE + 0x000b0) 1249 #define ISP32_HDRMGE_EACH_GAIN (ISP3X_HDRMGE_BASE + 0x000b4) 1250 1251 #define ISP3X_DRC_BASE 0x00003900 1252 #define ISP3X_DRC_CTRL0 (ISP3X_DRC_BASE + 0x00000) 1253 #define ISP3X_DRC_CTRL1 (ISP3X_DRC_BASE + 0x00004) 1254 #define ISP3X_DRC_LPRATIO (ISP3X_DRC_BASE + 0x00008) 1255 #define ISP3X_DRC_EXPLRATIO (ISP3X_DRC_BASE + 0x0000c) 1256 #define ISP3X_DRC_SIGMA (ISP3X_DRC_BASE + 0x00010) 1257 #define ISP3X_DRC_SPACESGM (ISP3X_DRC_BASE + 0x00014) 1258 #define ISP3X_DRC_RANESGM (ISP3X_DRC_BASE + 0x00018) 1259 #define ISP3X_DRC_BILAT (ISP3X_DRC_BASE + 0x0001c) 1260 #define ISP3X_DRC_GAIN_Y0 (ISP3X_DRC_BASE + 0x00020) 1261 #define ISP3X_DRC_GAIN_Y1 (ISP3X_DRC_BASE + 0x00024) 1262 #define ISP3X_DRC_GAIN_Y2 (ISP3X_DRC_BASE + 0x00028) 1263 #define ISP3X_DRC_GAIN_Y3 (ISP3X_DRC_BASE + 0x0002c) 1264 #define ISP3X_DRC_GAIN_Y4 (ISP3X_DRC_BASE + 0x00030) 1265 #define ISP3X_DRC_GAIN_Y5 (ISP3X_DRC_BASE + 0x00034) 1266 #define ISP3X_DRC_GAIN_Y6 (ISP3X_DRC_BASE + 0x00038) 1267 #define ISP3X_DRC_GAIN_Y7 (ISP3X_DRC_BASE + 0x0003c) 1268 #define ISP3X_DRC_GAIN_Y8 (ISP3X_DRC_BASE + 0x00040) 1269 #define ISP3X_DRC_COMPRES_Y0 (ISP3X_DRC_BASE + 0x00044) 1270 #define ISP3X_DRC_COMPRES_Y1 (ISP3X_DRC_BASE + 0x00048) 1271 #define ISP3X_DRC_COMPRES_Y2 (ISP3X_DRC_BASE + 0x0004c) 1272 #define ISP3X_DRC_COMPRES_Y3 (ISP3X_DRC_BASE + 0x00050) 1273 #define ISP3X_DRC_COMPRES_Y4 (ISP3X_DRC_BASE + 0x00054) 1274 #define ISP3X_DRC_COMPRES_Y5 (ISP3X_DRC_BASE + 0x00058) 1275 #define ISP3X_DRC_COMPRES_Y6 (ISP3X_DRC_BASE + 0x0005c) 1276 #define ISP3X_DRC_COMPRES_Y7 (ISP3X_DRC_BASE + 0x00060) 1277 #define ISP3X_DRC_COMPRES_Y8 (ISP3X_DRC_BASE + 0x00064) 1278 #define ISP3X_DRC_SCALE_Y0 (ISP3X_DRC_BASE + 0x00068) 1279 #define ISP3X_DRC_SCALE_Y1 (ISP3X_DRC_BASE + 0x0006c) 1280 #define ISP3X_DRC_SCALE_Y2 (ISP3X_DRC_BASE + 0x00070) 1281 #define ISP3X_DRC_SCALE_Y3 (ISP3X_DRC_BASE + 0x00074) 1282 #define ISP3X_DRC_SCALE_Y4 (ISP3X_DRC_BASE + 0x00078) 1283 #define ISP3X_DRC_SCALE_Y5 (ISP3X_DRC_BASE + 0x0007c) 1284 #define ISP3X_DRC_SCALE_Y6 (ISP3X_DRC_BASE + 0x00080) 1285 #define ISP3X_DRC_SCALE_Y7 (ISP3X_DRC_BASE + 0x00084) 1286 #define ISP3X_DRC_SCALE_Y8 (ISP3X_DRC_BASE + 0x00088) 1287 #define ISP3X_DRC_IIRWG_GAIN (ISP3X_DRC_BASE + 0x0008c) 1288 #define ISP32_DRC_LUM3X2_CTRL (ISP3X_DRC_BASE + 0x00090) 1289 #define ISP32_DRC_LUM3X2_GAS (ISP3X_DRC_BASE + 0x00094) 1290 1291 #define ISP3X_BAYNR_BASE 0x00003A00 1292 #define ISP3X_BAYNR_CTRL (ISP3X_BAYNR_BASE + 0x00000) 1293 #define ISP3X_BAYNR_DGAIN0 (ISP3X_BAYNR_BASE + 0x00004) 1294 #define ISP3X_BAYNR_DGAIN1 (ISP3X_BAYNR_BASE + 0x00008) 1295 #define ISP3X_BAYNR_PIXDIFF (ISP3X_BAYNR_BASE + 0x0000c) 1296 #define ISP3X_BAYNR_THLD (ISP3X_BAYNR_BASE + 0x00010) 1297 #define ISP3X_BAYNR_W1_STRENG (ISP3X_BAYNR_BASE + 0x00014) 1298 #define ISP3X_BAYNR_SIGMAX01 (ISP3X_BAYNR_BASE + 0x00018) 1299 #define ISP3X_BAYNR_SIGMAX23 (ISP3X_BAYNR_BASE + 0x0001c) 1300 #define ISP3X_BAYNR_SIGMAX45 (ISP3X_BAYNR_BASE + 0x00020) 1301 #define ISP3X_BAYNR_SIGMAX67 (ISP3X_BAYNR_BASE + 0x00024) 1302 #define ISP3X_BAYNR_SIGMAX89 (ISP3X_BAYNR_BASE + 0x00028) 1303 #define ISP3X_BAYNR_SIGMAX1011 (ISP3X_BAYNR_BASE + 0x0002c) 1304 #define ISP3X_BAYNR_SIGMAX1213 (ISP3X_BAYNR_BASE + 0x00030) 1305 #define ISP3X_BAYNR_SIGMAX1415 (ISP3X_BAYNR_BASE + 0x00034) 1306 #define ISP3X_BAYNR_SIGMAY01 (ISP3X_BAYNR_BASE + 0x00038) 1307 #define ISP3X_BAYNR_SIGMAY23 (ISP3X_BAYNR_BASE + 0x0003c) 1308 #define ISP3X_BAYNR_SIGMAY45 (ISP3X_BAYNR_BASE + 0x00040) 1309 #define ISP3X_BAYNR_SIGMAY67 (ISP3X_BAYNR_BASE + 0x00044) 1310 #define ISP3X_BAYNR_SIGMAY89 (ISP3X_BAYNR_BASE + 0x00048) 1311 #define ISP3X_BAYNR_SIGMAY1011 (ISP3X_BAYNR_BASE + 0x0004c) 1312 #define ISP3X_BAYNR_SIGMAY1213 (ISP3X_BAYNR_BASE + 0x00050) 1313 #define ISP3X_BAYNR_SIGMAY1415 (ISP3X_BAYNR_BASE + 0x00054) 1314 #define ISP3X_BAYNR_WRIT_D (ISP3X_BAYNR_BASE + 0x00058) 1315 #define ISP3X_BAYNR_LG_OFF (ISP3X_BAYNR_BASE + 0x0005c) 1316 #define ISP3X_BAYNR_DAT_MAX (ISP3X_BAYNR_BASE + 0x00060) 1317 #define ISP32_BAYNR_SIGOFF (ISP3X_BAYNR_BASE + 0x00064) 1318 #define ISP32_BAYNR_GAINX03 (ISP3X_BAYNR_BASE + 0x00068) 1319 #define ISP32_BAYNR_GAINX47 (ISP3X_BAYNR_BASE + 0x0006c) 1320 #define ISP32_BAYNR_GAINX811 (ISP3X_BAYNR_BASE + 0x00070) 1321 #define ISP32_BAYNR_GAINX1215 (ISP3X_BAYNR_BASE + 0x00074) 1322 #define ISP32_BAYNR_GAINY01 (ISP3X_BAYNR_BASE + 0x00078) 1323 #define ISP32_BAYNR_GAINX23 (ISP3X_BAYNR_BASE + 0x0007c) 1324 #define ISP32_BAYNR_GAINX45 (ISP3X_BAYNR_BASE + 0x00080) 1325 #define ISP32_BAYNR_GAINX67 (ISP3X_BAYNR_BASE + 0x00084) 1326 #define ISP32_BAYNR_GAINX89 (ISP3X_BAYNR_BASE + 0x00088) 1327 #define ISP32_BAYNR_GAINX1011 (ISP3X_BAYNR_BASE + 0x0008c) 1328 #define ISP32_BAYNR_GAINX1213 (ISP3X_BAYNR_BASE + 0x00090) 1329 #define ISP32_BAYNR_GAINX1415 (ISP3X_BAYNR_BASE + 0x00094) 1330 1331 #define ISP3X_LDCH_BASE 0x00003B00 1332 #define ISP3X_LDCH_STS (ISP3X_LDCH_BASE + 0x00000) 1333 #define ISP32_LDCH_BIC_TABLE0 (ISP3X_LDCH_BASE + 0x00004) 1334 #define ISP32_LDCH_BIC_TABLE1 (ISP3X_LDCH_BASE + 0x00008) 1335 #define ISP32_LDCH_BIC_TABLE2 (ISP3X_LDCH_BASE + 0x0000c) 1336 #define ISP32_LDCH_BIC_TABLE3 (ISP3X_LDCH_BASE + 0x00010) 1337 #define ISP32_LDCH_BIC_TABLE4 (ISP3X_LDCH_BASE + 0x00014) 1338 #define ISP32_LDCH_BIC_TABLE5 (ISP3X_LDCH_BASE + 0x00018) 1339 #define ISP32_LDCH_BIC_TABLE6 (ISP3X_LDCH_BASE + 0x0001c) 1340 #define ISP32_LDCH_BIC_TABLE7 (ISP3X_LDCH_BASE + 0x00020) 1341 #define ISP32_LDCH_BIC_TABLE8 (ISP3X_LDCH_BASE + 0x00024) 1342 1343 #define ISP3X_DHAZ_BASE 0x00003C00 1344 #define ISP3X_DHAZ_CTRL (ISP3X_DHAZ_BASE + 0x00000) 1345 #define ISP3X_DHAZ_ADP0 (ISP3X_DHAZ_BASE + 0x00004) 1346 #define ISP3X_DHAZ_ADP1 (ISP3X_DHAZ_BASE + 0x00008) 1347 #define ISP3X_DHAZ_ADP2 (ISP3X_DHAZ_BASE + 0x0000c) 1348 #define ISP3X_DHAZ_ADP_TMAX (ISP3X_DHAZ_BASE + 0x00010) 1349 #define ISP3X_DHAZ_ADP_HIST0 (ISP3X_DHAZ_BASE + 0x00014) 1350 #define ISP3X_DHAZ_ADP_HIST1 (ISP3X_DHAZ_BASE + 0x00018) 1351 #define ISP3X_DHAZ_ENHANCE (ISP3X_DHAZ_BASE + 0x0001c) 1352 #define ISP3X_DHAZ_IIR0 (ISP3X_DHAZ_BASE + 0x00020) 1353 #define ISP3X_DHAZ_IIR1 (ISP3X_DHAZ_BASE + 0x00024) 1354 #define ISP3X_DHAZ_SOFT_CFG0 (ISP3X_DHAZ_BASE + 0x00028) 1355 #define ISP3X_DHAZ_SOFT_CFG1 (ISP3X_DHAZ_BASE + 0x0002c) 1356 #define ISP3X_DHAZ_BF_SIGMA (ISP3X_DHAZ_BASE + 0x00030) 1357 #define ISP3X_DHAZ_BF_WET (ISP3X_DHAZ_BASE + 0x00034) 1358 #define ISP3X_DHAZ_ENH_CURVE0 (ISP3X_DHAZ_BASE + 0x00038) 1359 #define ISP3X_DHAZ_ENH_CURVE1 (ISP3X_DHAZ_BASE + 0x0003c) 1360 #define ISP3X_DHAZ_ENH_CURVE2 (ISP3X_DHAZ_BASE + 0x00040) 1361 #define ISP3X_DHAZ_ENH_CURVE3 (ISP3X_DHAZ_BASE + 0x00044) 1362 #define ISP3X_DHAZ_ENH_CURVE4 (ISP3X_DHAZ_BASE + 0x00048) 1363 #define ISP3X_DHAZ_ENH_CURVE5 (ISP3X_DHAZ_BASE + 0x0004c) 1364 #define ISP3X_DHAZ_ENH_CURVE6 (ISP3X_DHAZ_BASE + 0x00050) 1365 #define ISP3X_DHAZ_ENH_CURVE7 (ISP3X_DHAZ_BASE + 0x00054) 1366 #define ISP3X_DHAZ_ENH_CURVE8 (ISP3X_DHAZ_BASE + 0x00058) 1367 #define ISP3X_DHAZ_GAUS (ISP3X_DHAZ_BASE + 0x0005c) 1368 #define ISP3X_DHAZ_GAIN_IDX0 (ISP3X_DHAZ_BASE + 0x00060) 1369 #define ISP3X_DHAZ_GAIN_IDX1 (ISP3X_DHAZ_BASE + 0x00064) 1370 #define ISP3X_DHAZ_GAIN_IDX2 (ISP3X_DHAZ_BASE + 0x00068) 1371 #define ISP3X_DHAZ_GAIN_IDX3 (ISP3X_DHAZ_BASE + 0x0006C) 1372 #define ISP3X_DHAZ_GAIN_LUT0 (ISP3X_DHAZ_BASE + 0x00070) 1373 #define ISP3X_DHAZ_GAIN_LUT1 (ISP3X_DHAZ_BASE + 0x00074) 1374 #define ISP3X_DHAZ_GAIN_LUT2 (ISP3X_DHAZ_BASE + 0x00078) 1375 #define ISP3X_DHAZ_GAIN_LUT3 (ISP3X_DHAZ_BASE + 0x0007C) 1376 #define ISP3X_DHAZ_GAIN_LUT4 (ISP3X_DHAZ_BASE + 0x00080) 1377 #define ISP3X_DHAZ_GAIN_LUT5 (ISP3X_DHAZ_BASE + 0x00084) 1378 #define ISP3X_DHAZ_GAIN_LUT6 (ISP3X_DHAZ_BASE + 0x00088) 1379 #define ISP3X_DHAZ_GAIN_LUT7 (ISP3X_DHAZ_BASE + 0x0008C) 1380 #define ISP3X_DHAZ_GAIN_LUT8 (ISP3X_DHAZ_BASE + 0x00090) 1381 #define ISP3X_DHAZ_SUMH_RD (ISP3X_DHAZ_BASE + 0x0009C) 1382 #define ISP3X_DHAZ_ADT_WR0 (ISP3X_DHAZ_BASE + 0x000A0) 1383 #define ISP3X_DHAZ_ADT_WR1 (ISP3X_DHAZ_BASE + 0x000A4) 1384 #define ISP3X_DHAZ_HIST_WR0 (ISP3X_DHAZ_BASE + 0x000A8) 1385 #define ISP3X_DHAZ_HIST_WR1 (ISP3X_DHAZ_BASE + 0x000AC) 1386 #define ISP3X_DHAZ_HIST_WR2 (ISP3X_DHAZ_BASE + 0x000B0) 1387 #define ISP3X_DHAZ_HIST_WR3 (ISP3X_DHAZ_BASE + 0x000B4) 1388 #define ISP3X_DHAZ_HIST_WR4 (ISP3X_DHAZ_BASE + 0x000B8) 1389 #define ISP3X_DHAZ_HIST_WR5 (ISP3X_DHAZ_BASE + 0x000BC) 1390 #define ISP3X_DHAZ_HIST_WR6 (ISP3X_DHAZ_BASE + 0x000C0) 1391 #define ISP3X_DHAZ_HIST_WR7 (ISP3X_DHAZ_BASE + 0x000C4) 1392 #define ISP3X_DHAZ_HIST_WR8 (ISP3X_DHAZ_BASE + 0x000C8) 1393 #define ISP3X_DHAZ_HIST_WR9 (ISP3X_DHAZ_BASE + 0x000CC) 1394 #define ISP3X_DHAZ_HIST_WR10 (ISP3X_DHAZ_BASE + 0x000D0) 1395 #define ISP3X_DHAZ_HIST_WR11 (ISP3X_DHAZ_BASE + 0x000D4) 1396 #define ISP3X_DHAZ_HIST_WR12 (ISP3X_DHAZ_BASE + 0x000D8) 1397 #define ISP3X_DHAZ_HIST_WR13 (ISP3X_DHAZ_BASE + 0x000DC) 1398 #define ISP3X_DHAZ_HIST_WR14 (ISP3X_DHAZ_BASE + 0x000E0) 1399 #define ISP3X_DHAZ_HIST_WR15 (ISP3X_DHAZ_BASE + 0x000E4) 1400 #define ISP3X_DHAZ_HIST_WR16 (ISP3X_DHAZ_BASE + 0x000E8) 1401 #define ISP3X_DHAZ_HIST_WR17 (ISP3X_DHAZ_BASE + 0x000EC) 1402 #define ISP3X_DHAZ_HIST_WR18 (ISP3X_DHAZ_BASE + 0x000F0) 1403 #define ISP3X_DHAZ_HIST_WR19 (ISP3X_DHAZ_BASE + 0x000F4) 1404 #define ISP3X_DHAZ_HIST_WR20 (ISP3X_DHAZ_BASE + 0x000F8) 1405 #define ISP3X_DHAZ_HIST_WR21 (ISP3X_DHAZ_BASE + 0x000FC) 1406 #define ISP3X_DHAZ_CTRL_SHD (ISP3X_DHAZ_BASE + 0x00100) 1407 #define ISP3X_DHAZ_ADP_RD0 (ISP3X_DHAZ_BASE + 0x00104) 1408 #define ISP3X_DHAZ_ADP_RD1 (ISP3X_DHAZ_BASE + 0x00108) 1409 #define ISP3X_DHAZ_HIST_REG0 (ISP3X_DHAZ_BASE + 0x00110) 1410 #define ISP3X_DHAZ_HIST_REG1 (ISP3X_DHAZ_BASE + 0x00114) 1411 #define ISP3X_DHAZ_HIST_REG2 (ISP3X_DHAZ_BASE + 0x00118) 1412 #define ISP3X_DHAZ_HIST_REG3 (ISP3X_DHAZ_BASE + 0x0011C) 1413 #define ISP3X_DHAZ_HIST_REG4 (ISP3X_DHAZ_BASE + 0x00120) 1414 #define ISP3X_DHAZ_HIST_REG5 (ISP3X_DHAZ_BASE + 0x00124) 1415 #define ISP3X_DHAZ_HIST_REG6 (ISP3X_DHAZ_BASE + 0x00128) 1416 #define ISP3X_DHAZ_HIST_REG7 (ISP3X_DHAZ_BASE + 0x0012C) 1417 #define ISP3X_DHAZ_HIST_REG8 (ISP3X_DHAZ_BASE + 0x00130) 1418 #define ISP3X_DHAZ_HIST_REG9 (ISP3X_DHAZ_BASE + 0x00134) 1419 #define ISP3X_DHAZ_HIST_REG10 (ISP3X_DHAZ_BASE + 0x00138) 1420 #define ISP3X_DHAZ_HIST_REG11 (ISP3X_DHAZ_BASE + 0x0013C) 1421 #define ISP3X_DHAZ_HIST_REG12 (ISP3X_DHAZ_BASE + 0x00140) 1422 #define ISP3X_DHAZ_HIST_REG13 (ISP3X_DHAZ_BASE + 0x00144) 1423 #define ISP3X_DHAZ_HIST_REG14 (ISP3X_DHAZ_BASE + 0x00148) 1424 #define ISP3X_DHAZ_HIST_REG15 (ISP3X_DHAZ_BASE + 0x0014C) 1425 #define ISP3X_DHAZ_HIST_REG16 (ISP3X_DHAZ_BASE + 0x00150) 1426 #define ISP3X_DHAZ_HIST_REG17 (ISP3X_DHAZ_BASE + 0x00154) 1427 #define ISP3X_DHAZ_HIST_REG18 (ISP3X_DHAZ_BASE + 0x00158) 1428 #define ISP3X_DHAZ_HIST_REG19 (ISP3X_DHAZ_BASE + 0x0015C) 1429 #define ISP3X_DHAZ_HIST_REG20 (ISP3X_DHAZ_BASE + 0x00160) 1430 #define ISP3X_DHAZ_HIST_REG21 (ISP3X_DHAZ_BASE + 0x00164) 1431 #define ISP3X_DHAZ_HIST_REG22 (ISP3X_DHAZ_BASE + 0x00168) 1432 #define ISP3X_DHAZ_HIST_REG23 (ISP3X_DHAZ_BASE + 0x0016C) 1433 #define ISP3X_DHAZ_HIST_REG24 (ISP3X_DHAZ_BASE + 0x00170) 1434 #define ISP3X_DHAZ_HIST_REG25 (ISP3X_DHAZ_BASE + 0x00174) 1435 #define ISP3X_DHAZ_HIST_REG26 (ISP3X_DHAZ_BASE + 0x00178) 1436 #define ISP3X_DHAZ_HIST_REG27 (ISP3X_DHAZ_BASE + 0x0017C) 1437 #define ISP3X_DHAZ_HIST_REG28 (ISP3X_DHAZ_BASE + 0x00180) 1438 #define ISP3X_DHAZ_HIST_REG29 (ISP3X_DHAZ_BASE + 0x00184) 1439 #define ISP3X_DHAZ_HIST_REG30 (ISP3X_DHAZ_BASE + 0x00188) 1440 #define ISP3X_DHAZ_HIST_REG31 (ISP3X_DHAZ_BASE + 0x0018C) 1441 #define ISP32_DHAZ_ENH_LUMA0 (ISP3X_DHAZ_BASE + 0x00190) 1442 #define ISP32_DHAZ_ENH_LUMA1 (ISP3X_DHAZ_BASE + 0x00194) 1443 #define ISP32_DHAZ_ENH_LUMA2 (ISP3X_DHAZ_BASE + 0x00198) 1444 #define ISP32_DHAZ_ENH_LUMA3 (ISP3X_DHAZ_BASE + 0x0019c) 1445 #define ISP32_DHAZ_ENH_LUMA4 (ISP3X_DHAZ_BASE + 0x001a0) 1446 #define ISP32_DHAZ_ENH_LUMA5 (ISP3X_DHAZ_BASE + 0x001a4) 1447 #define ISP32L_DHAZ_STAB_FRAME (ISP3X_DHAZ_BASE + 0x001f8) 1448 #define ISP32L_DHAZ_PRE_FRAME (ISP3X_DHAZ_BASE + 0x001fc) 1449 1450 #define ISP3X_3DLUT_BASE 0x00003E00 1451 #define ISP3X_3DLUT_CTRL (ISP3X_3DLUT_BASE + 0x00000) 1452 #define ISP3X_3DLUT_UPDATE (ISP3X_3DLUT_BASE + 0x00004) 1453 1454 #define ISP3X_GAIN_BASE 0x00003F00 1455 #define ISP3X_GAIN_CTRL (ISP3X_GAIN_BASE + 0x00000) 1456 #define ISP3X_GAIN_G0 (ISP3X_GAIN_BASE + 0x00004) 1457 #define ISP3X_GAIN_G1_G2 (ISP3X_GAIN_BASE + 0x00008) 1458 #define ISP3X_GAIN_FIFO_STATUS (ISP3X_GAIN_BASE + 0x0000C) 1459 1460 #define ISP3X_RAWAE_LITE_BASE 0x00004500 1461 #define ISP3X_RAWAE_LITE_CTRL (ISP3X_RAWAE_LITE_BASE + 0x00000) 1462 #define ISP3X_RAWAE_LITE_BLK_SIZ (ISP3X_RAWAE_LITE_BASE + 0x00004) 1463 #define ISP3X_RAWAE_LITE_OFFSET (ISP3X_RAWAE_LITE_BASE + 0x00008) 1464 #define ISP3X_RAWAE_LITE_RO_MEAN (ISP3X_RAWAE_LITE_BASE + 0x00010) 1465 #define ISP3X_RAWAE_LITE_RO_DBG1 (ISP3X_RAWAE_LITE_BASE + 0x00074) 1466 #define ISP3X_RAWAE_LITE_RO_DBG2 (ISP3X_RAWAE_LITE_BASE + 0x00078) 1467 1468 #define ISP3X_RAWAE_BIG1_BASE 0x00004400 1469 #define ISP3X_RAWAE_BIG2_BASE 0x00004600 1470 #define ISP3X_RAWAE_BIG3_BASE 0x00004700 1471 #define ISP3X_RAWAE_BIG_CTRL 0x00000 1472 #define ISP3X_RAWAE_BIG_BLK_SIZE 0x00004 1473 #define ISP3X_RAWAE_BIG_OFFSET 0x00008 1474 #define ISP3X_RAWAE_BIG_RAM_CTRL 0x0000c 1475 #define ISP3X_RAWAE_BIG_WND1_SIZE 0x00010 1476 #define ISP3X_RAWAE_BIG_WND1_OFFSET 0x00014 1477 #define ISP3X_RAWAE_BIG_WND2_SIZE 0x00018 1478 #define ISP3X_RAWAE_BIG_WND2_OFFSET 0x0001c 1479 #define ISP3X_RAWAE_BIG_WND3_SIZE 0x00020 1480 #define ISP3X_RAWAE_BIG_WND3_OFFSET 0x00024 1481 #define ISP3X_RAWAE_BIG_WND4_SIZE 0x00028 1482 #define ISP3X_RAWAE_BIG_WND4_OFFSET 0x0002c 1483 #define ISP3X_RAWAE_BIG_WND1_SUMR 0x00030 1484 #define ISP3X_RAWAE_BIG_WND2_SUMR 0x00034 1485 #define ISP3X_RAWAE_BIG_WND3_SUMR 0x00038 1486 #define ISP3X_RAWAE_BIG_WND4_SUMR 0x0003c 1487 #define ISP3X_RAWAE_BIG_WND1_SUMG 0x00040 1488 #define ISP3X_RAWAE_BIG_WND2_SUMG 0x00044 1489 #define ISP3X_RAWAE_BIG_WND3_SUMG 0x00048 1490 #define ISP3X_RAWAE_BIG_WND4_SUMG 0x0004c 1491 #define ISP3X_RAWAE_BIG_WND1_SUMB 0x00050 1492 #define ISP3X_RAWAE_BIG_WND2_SUMB 0x00054 1493 #define ISP3X_RAWAE_BIG_WND3_SUMB 0x00058 1494 #define ISP3X_RAWAE_BIG_WND4_SUMB 0x0005c 1495 #define ISP3X_RAWAE_BIG_RO_DBG1 0x00060 1496 #define ISP3X_RAWAE_BIG_RO_DBG2 0x00064 1497 #define ISP3X_RAWAE_BIG_RO_DBG3 0x00068 1498 #define ISP3X_RAWAE_BIG_RO_MEAN_BASE_ADDR 0x00080 1499 1500 #define ISP3X_RAWHIST_LITE_BASE 0x00004900 1501 #define ISP3X_RAWHIST_LITE_CTRL (ISP3X_RAWHIST_LITE_BASE + 0x00000) 1502 #define ISP3X_RAWHIST_LITE_SIZE (ISP3X_RAWHIST_LITE_BASE + 0x00004) 1503 #define ISP3X_RAWHIST_LITE_OFFS (ISP3X_RAWHIST_LITE_BASE + 0x00008) 1504 #define ISP3X_RAWHIST_LITE_RAM_CTRL (ISP3X_RAWHIST_LITE_BASE + 0x0000c) 1505 #define ISP3X_RAWHIST_LITE_RAW2Y_CC (ISP3X_RAWHIST_LITE_BASE + 0x00010) 1506 #define ISP3X_RAWHIST_LITE_DBG1 (ISP3X_RAWHIST_LITE_BASE + 0x00020) 1507 #define ISP3X_RAWHIST_LITE_DBG2 (ISP3X_RAWHIST_LITE_BASE + 0x00024) 1508 #define ISP3X_RAWHIST_LITE_DBG3 (ISP3X_RAWHIST_LITE_BASE + 0x00028) 1509 #define ISP3X_RAWHIST_LITE_WEIGHT (ISP3X_RAWHIST_LITE_BASE + 0x00040) 1510 #define ISP3X_RAWHIST_LITE_RO_BASE_BIN (ISP3X_RAWHIST_LITE_BASE + 0x00080) 1511 1512 #define ISP3X_RAWHIST_BIG1_BASE 0x00004800 1513 #define ISP3X_RAWHIST_BIG2_BASE 0x00004A00 1514 #define ISP3X_RAWHIST_BIG3_BASE 0x00004B00 1515 #define ISP3X_RAWHIST_BIG_CTRL 0x00000 1516 #define ISP3X_RAWHIST_BIG_SIZE 0x00004 1517 #define ISP3X_RAWHIST_BIG_OFFS 0x00008 1518 #define ISP3X_RAWHIST_BIG_HRAM_CTRL 0x0000C 1519 #define ISP3X_RAWHIST_BIG_RAW2Y_CC 0x00010 1520 #define ISP3X_RAWHIST_BIG_WRAM_CTRL 0x00014 1521 #define ISP3X_RAWHIST_BIG_DBG1 0x00020 1522 #define ISP3X_RAWHIST_BIG_DBG2 0x00024 1523 #define ISP3X_RAWHIST_BIG_DBG3 0x00028 1524 #define ISP3X_RAWHIST_BIG_WEIGHT_BASE 0x00040 1525 #define ISP3X_RAWHIST_BIG_RO_BASE_BIN 0x00080 1526 1527 #define ISP3X_RAWAF_BASE 0x00004D00 1528 #define ISP3X_RAWAF_CTRL (ISP3X_RAWAF_BASE + 0x00000) 1529 #define ISP3X_RAWAF_OFFSET_WINA (ISP3X_RAWAF_BASE + 0x00004) 1530 #define ISP3X_RAWAF_SIZE_WINA (ISP3X_RAWAF_BASE + 0x00008) 1531 #define ISP3X_RAWAF_OFFSET_WINB (ISP3X_RAWAF_BASE + 0x0000c) 1532 #define ISP3X_RAWAF_SIZE_WINB (ISP3X_RAWAF_BASE + 0x00010) 1533 #define ISP3X_RAWAF_INT_LINE (ISP3X_RAWAF_BASE + 0x00014) 1534 #define ISP32L_RAWAF_CTRL1 (ISP3X_RAWAF_BASE + 0x00018) 1535 #define ISP3X_RAWAF_THRES (ISP3X_RAWAF_BASE + 0x0001c) 1536 #define ISP3X_RAWAF_VAR_SHIFT (ISP3X_RAWAF_BASE + 0x00020) 1537 #define ISP3X_RAWAF_HVIIR_VAR_SHIFT (ISP3X_RAWAF_BASE + 0x00024) 1538 #define ISP3X_RAWAF_SUM_B (ISP3X_RAWAF_BASE + 0x00028) 1539 #define ISP3X_RAWAF_LUM_B (ISP3X_RAWAF_BASE + 0x00030) 1540 #define ISP3X_RAWAF_GAMMA_Y0 (ISP3X_RAWAF_BASE + 0x00034) 1541 #define ISP3X_RAWAF_GAMMA_Y1 (ISP3X_RAWAF_BASE + 0x00038) 1542 #define ISP3X_RAWAF_GAMMA_Y2 (ISP3X_RAWAF_BASE + 0x0003c) 1543 #define ISP3X_RAWAF_GAMMA_Y3 (ISP3X_RAWAF_BASE + 0x00040) 1544 #define ISP3X_RAWAF_GAMMA_Y4 (ISP3X_RAWAF_BASE + 0x00044) 1545 #define ISP3X_RAWAF_GAMMA_Y5 (ISP3X_RAWAF_BASE + 0x00048) 1546 #define ISP3X_RAWAF_GAMMA_Y6 (ISP3X_RAWAF_BASE + 0x0004c) 1547 #define ISP3X_RAWAF_GAMMA_Y7 (ISP3X_RAWAF_BASE + 0x00050) 1548 #define ISP3X_RAWAF_GAMMA_Y8 (ISP3X_RAWAF_BASE + 0x00054) 1549 #define ISP3X_RAWAF_INT_STATE (ISP3X_RAWAF_BASE + 0x00058) 1550 #define ISP3X_RAWAF_HIIR_THRESH (ISP3X_RAWAF_BASE + 0x0005c) 1551 #define ISP3X_RAWAF_H1_IIR1_COE01 (ISP3X_RAWAF_BASE + 0x00060) 1552 #define ISP3X_RAWAF_H1_IIR1_COE23 (ISP3X_RAWAF_BASE + 0x00064) 1553 #define ISP3X_RAWAF_H1_IIR1_COE45 (ISP3X_RAWAF_BASE + 0x00068) 1554 #define ISP3X_RAWAF_H_CURVEL (ISP3X_RAWAF_BASE + 0x0006C) 1555 #define ISP3X_RAWAF_H1_IIR2_COE01 (ISP3X_RAWAF_BASE + 0x00070) 1556 #define ISP3X_RAWAF_H1_IIR2_COE23 (ISP3X_RAWAF_BASE + 0x00074) 1557 #define ISP3X_RAWAF_H1_IIR2_COE45 (ISP3X_RAWAF_BASE + 0x00078) 1558 #define ISP3X_RAWAF_H_CURVEH (ISP3X_RAWAF_BASE + 0x0007C) 1559 #define ISP3X_RAWAF_H2_IIR1_COE01 (ISP3X_RAWAF_BASE + 0x00080) 1560 #define ISP3X_RAWAF_H2_IIR1_COE23 (ISP3X_RAWAF_BASE + 0x00084) 1561 #define ISP3X_RAWAF_H2_IIR1_COE45 (ISP3X_RAWAF_BASE + 0x00088) 1562 #define ISP3X_RAWAF_V_CURVEL (ISP3X_RAWAF_BASE + 0x0008C) 1563 #define ISP3X_RAWAF_H2_IIR2_COE01 (ISP3X_RAWAF_BASE + 0x00090) 1564 #define ISP3X_RAWAF_H2_IIR2_COE23 (ISP3X_RAWAF_BASE + 0x00094) 1565 #define ISP3X_RAWAF_H2_IIR2_COE45 (ISP3X_RAWAF_BASE + 0x00098) 1566 #define ISP3X_RAWAF_V_CURVEH (ISP3X_RAWAF_BASE + 0x0009C) 1567 #define ISP3X_RAWAF_V_IIR_COE0 (ISP3X_RAWAF_BASE + 0x000A0) 1568 #define ISP3X_RAWAF_V_IIR_COE1 (ISP3X_RAWAF_BASE + 0x000A4) 1569 #define ISP3X_RAWAF_V_IIR_COE2 (ISP3X_RAWAF_BASE + 0x000A8) 1570 #define ISP3X_RAWAF_V_IIR_COE3 (ISP3X_RAWAF_BASE + 0x000AC) 1571 #define ISP3X_RAWAF_V_IIR_COE4 (ISP3X_RAWAF_BASE + 0x000B0) 1572 #define ISP3X_RAWAF_V_IIR_COE5 (ISP3X_RAWAF_BASE + 0x000B4) 1573 #define ISP3X_RAWAF_V_IIR_COE6 (ISP3X_RAWAF_BASE + 0x000B8) 1574 #define ISP3X_RAWAF_V_IIR_COE7 (ISP3X_RAWAF_BASE + 0x000BC) 1575 #define ISP3X_RAWAF_V_IIR_COE8 (ISP3X_RAWAF_BASE + 0x000C0) 1576 #define ISP3X_RAWAF_V_FIR_COE0 (ISP3X_RAWAF_BASE + 0x000C4) 1577 #define ISP3X_RAWAF_V_FIR_COE1 (ISP3X_RAWAF_BASE + 0x000C8) 1578 #define ISP3X_RAWAF_V_FIR_COE2 (ISP3X_RAWAF_BASE + 0x000CC) 1579 #define ISP32_RAWAF_V_FIR_COE0 (ISP3X_RAWAF_BASE + 0x000b0) 1580 #define ISP32_RAWAF_V_FIR_COE1 (ISP3X_RAWAF_BASE + 0x000b4) 1581 #define ISP32_RAWAF_V_FIR_COE2 (ISP3X_RAWAF_BASE + 0x000b8) 1582 #define ISP32_RAWAF_GAUS_COE03 (ISP3X_RAWAF_BASE + 0x000c0) 1583 #define ISP32_RAWAF_GAUS_COE47 (ISP3X_RAWAF_BASE + 0x000c4) 1584 #define ISP32_RAWAF_GAUS_COE8 (ISP3X_RAWAF_BASE + 0x000c8) 1585 #define ISP3X_RAWAF_HIGHLIT_THRESH (ISP3X_RAWAF_BASE + 0x000D0) 1586 #define ISP3X_RAWAF_HIGHLIT_CNT_WINB (ISP3X_RAWAF_BASE + 0x000D8) 1587 #define ISP3X_RAWAF_RAM_DATA (ISP3X_RAWAF_BASE + 0x000E0) 1588 #define ISP32L_RAWAF_CORING_H (ISP3X_RAWAF_BASE + 0x000AC) 1589 #define ISP32L_RAWAF_CORING_V (ISP3X_RAWAF_BASE + 0x000BC) 1590 1591 #define ISP3X_RAWAWB_BASE 0x00005000 1592 #define ISP3X_RAWAWB_CTRL (ISP3X_RAWAWB_BASE + 0x0000) 1593 #define ISP3X_RAWAWB_BLK_CTRL (ISP3X_RAWAWB_BASE + 0x0004) 1594 #define ISP3X_RAWAWB_WIN_OFFS (ISP3X_RAWAWB_BASE + 0x0008) 1595 #define ISP3X_RAWAWB_WIN_SIZE (ISP3X_RAWAWB_BASE + 0x000c) 1596 #define ISP3X_RAWAWB_LIMIT_RG_MAX (ISP3X_RAWAWB_BASE + 0x0010) 1597 #define ISP3X_RAWAWB_LIMIT_BY_MAX (ISP3X_RAWAWB_BASE + 0x0014) 1598 #define ISP3X_RAWAWB_LIMIT_RG_MIN (ISP3X_RAWAWB_BASE + 0x0018) 1599 #define ISP3X_RAWAWB_LIMIT_BY_MIN (ISP3X_RAWAWB_BASE + 0x001c) 1600 #define ISP3X_RAWAWB_WEIGHT_CURVE_CTRL (ISP3X_RAWAWB_BASE + 0x0020) 1601 #define ISP3X_RAWAWB_YWEIGHT_CURVE_XCOOR03 (ISP3X_RAWAWB_BASE + 0x0024) 1602 #define ISP3X_RAWAWB_YWEIGHT_CURVE_XCOOR47 (ISP3X_RAWAWB_BASE + 0x0028) 1603 #define ISP3X_RAWAWB_YWEIGHT_CURVE_XCOOR8 (ISP3X_RAWAWB_BASE + 0x002c) 1604 #define ISP3X_RAWAWB_YWEIGHT_CURVE_YCOOR03 (ISP3X_RAWAWB_BASE + 0x0030) 1605 #define ISP3X_RAWAWB_YWEIGHT_CURVE_YCOOR47 (ISP3X_RAWAWB_BASE + 0x0034) 1606 #define ISP3X_RAWAWB_YWEIGHT_CURVE_YCOOR8 (ISP3X_RAWAWB_BASE + 0x0038) 1607 #define ISP3X_RAWAWB_PRE_WBGAIN_INV (ISP3X_RAWAWB_BASE + 0x003c) 1608 #define ISP3X_RAWAWB_UV_DETC_VERTEX0_0 (ISP3X_RAWAWB_BASE + 0x0040) 1609 #define ISP3X_RAWAWB_UV_DETC_VERTEX1_0 (ISP3X_RAWAWB_BASE + 0x0044) 1610 #define ISP3X_RAWAWB_UV_DETC_VERTEX2_0 (ISP3X_RAWAWB_BASE + 0x0048) 1611 #define ISP3X_RAWAWB_UV_DETC_VERTEX3_0 (ISP3X_RAWAWB_BASE + 0x004c) 1612 #define ISP3X_RAWAWB_UV_DETC_ISLOPE01_0 (ISP3X_RAWAWB_BASE + 0x0050) 1613 #define ISP3X_RAWAWB_UV_DETC_ISLOPE12_0 (ISP3X_RAWAWB_BASE + 0x0054) 1614 #define ISP3X_RAWAWB_UV_DETC_ISLOPE23_0 (ISP3X_RAWAWB_BASE + 0x0058) 1615 #define ISP3X_RAWAWB_UV_DETC_ISLOPE30_0 (ISP3X_RAWAWB_BASE + 0x005c) 1616 #define ISP3X_RAWAWB_UV_DETC_VERTEX0_1 (ISP3X_RAWAWB_BASE + 0x0060) 1617 #define ISP3X_RAWAWB_UV_DETC_VERTEX1_1 (ISP3X_RAWAWB_BASE + 0x0064) 1618 #define ISP3X_RAWAWB_UV_DETC_VERTEX2_1 (ISP3X_RAWAWB_BASE + 0x0068) 1619 #define ISP3X_RAWAWB_UV_DETC_VERTEX3_1 (ISP3X_RAWAWB_BASE + 0x006c) 1620 #define ISP3X_RAWAWB_UV_DETC_ISLOPE01_1 (ISP3X_RAWAWB_BASE + 0x0070) 1621 #define ISP3X_RAWAWB_UV_DETC_ISLOPE12_1 (ISP3X_RAWAWB_BASE + 0x0074) 1622 #define ISP3X_RAWAWB_UV_DETC_ISLOPE23_1 (ISP3X_RAWAWB_BASE + 0x0078) 1623 #define ISP3X_RAWAWB_UV_DETC_ISLOPE30_1 (ISP3X_RAWAWB_BASE + 0x007c) 1624 #define ISP3X_RAWAWB_UV_DETC_VERTEX0_2 (ISP3X_RAWAWB_BASE + 0x0080) 1625 #define ISP3X_RAWAWB_UV_DETC_VERTEX1_2 (ISP3X_RAWAWB_BASE + 0x0084) 1626 #define ISP3X_RAWAWB_UV_DETC_VERTEX2_2 (ISP3X_RAWAWB_BASE + 0x0088) 1627 #define ISP3X_RAWAWB_UV_DETC_VERTEX3_2 (ISP3X_RAWAWB_BASE + 0x008c) 1628 #define ISP3X_RAWAWB_UV_DETC_ISLOPE01_2 (ISP3X_RAWAWB_BASE + 0x0090) 1629 #define ISP3X_RAWAWB_UV_DETC_ISLOPE12_2 (ISP3X_RAWAWB_BASE + 0x0094) 1630 #define ISP3X_RAWAWB_UV_DETC_ISLOPE23_2 (ISP3X_RAWAWB_BASE + 0x0098) 1631 #define ISP3X_RAWAWB_UV_DETC_ISLOPE30_2 (ISP3X_RAWAWB_BASE + 0x009c) 1632 #define ISP3X_RAWAWB_UV_DETC_VERTEX0_3 (ISP3X_RAWAWB_BASE + 0x00a0) 1633 #define ISP3X_RAWAWB_UV_DETC_VERTEX1_3 (ISP3X_RAWAWB_BASE + 0x00a4) 1634 #define ISP3X_RAWAWB_UV_DETC_VERTEX2_3 (ISP3X_RAWAWB_BASE + 0x00a8) 1635 #define ISP3X_RAWAWB_UV_DETC_VERTEX3_3 (ISP3X_RAWAWB_BASE + 0x00ac) 1636 #define ISP3X_RAWAWB_UV_DETC_ISLOPE01_3 (ISP3X_RAWAWB_BASE + 0x00b0) 1637 #define ISP3X_RAWAWB_UV_DETC_ISLOPE12_3 (ISP3X_RAWAWB_BASE + 0x00b4) 1638 #define ISP3X_RAWAWB_UV_DETC_ISLOPE23_3 (ISP3X_RAWAWB_BASE + 0x00b8) 1639 #define ISP3X_RAWAWB_UV_DETC_ISLOPE30_3 (ISP3X_RAWAWB_BASE + 0x00bc) 1640 #define ISP3X_RAWAWB_UV_DETC_VERTEX0_4 (ISP3X_RAWAWB_BASE + 0x00c0) 1641 #define ISP3X_RAWAWB_UV_DETC_VERTEX1_4 (ISP3X_RAWAWB_BASE + 0x00c4) 1642 #define ISP3X_RAWAWB_UV_DETC_VERTEX2_4 (ISP3X_RAWAWB_BASE + 0x00c8) 1643 #define ISP3X_RAWAWB_UV_DETC_VERTEX3_4 (ISP3X_RAWAWB_BASE + 0x00cc) 1644 #define ISP3X_RAWAWB_UV_DETC_ISLOPE01_4 (ISP3X_RAWAWB_BASE + 0x00d0) 1645 #define ISP3X_RAWAWB_UV_DETC_ISLOPE12_4 (ISP3X_RAWAWB_BASE + 0x00d4) 1646 #define ISP3X_RAWAWB_UV_DETC_ISLOPE23_4 (ISP3X_RAWAWB_BASE + 0x00d8) 1647 #define ISP3X_RAWAWB_UV_DETC_ISLOPE30_4 (ISP3X_RAWAWB_BASE + 0x00dc) 1648 #define ISP3X_RAWAWB_UV_DETC_VERTEX0_5 (ISP3X_RAWAWB_BASE + 0x00e0) 1649 #define ISP3X_RAWAWB_UV_DETC_VERTEX1_5 (ISP3X_RAWAWB_BASE + 0x00e4) 1650 #define ISP3X_RAWAWB_UV_DETC_VERTEX2_5 (ISP3X_RAWAWB_BASE + 0x00e8) 1651 #define ISP3X_RAWAWB_UV_DETC_VERTEX3_5 (ISP3X_RAWAWB_BASE + 0x00ec) 1652 #define ISP3X_RAWAWB_UV_DETC_ISLOPE01_5 (ISP3X_RAWAWB_BASE + 0x00f0) 1653 #define ISP3X_RAWAWB_UV_DETC_ISLOPE10_5 (ISP3X_RAWAWB_BASE + 0x00f4) 1654 #define ISP3X_RAWAWB_UV_DETC_ISLOPE23_5 (ISP3X_RAWAWB_BASE + 0x00f8) 1655 #define ISP3X_RAWAWB_UV_DETC_ISLOPE30_5 (ISP3X_RAWAWB_BASE + 0x00fc) 1656 #define ISP3X_RAWAWB_UV_DETC_VERTEX0_6 (ISP3X_RAWAWB_BASE + 0x0100) 1657 #define ISP3X_RAWAWB_UV_DETC_VERTEX1_6 (ISP3X_RAWAWB_BASE + 0x0104) 1658 #define ISP3X_RAWAWB_UV_DETC_VERTEX2_6 (ISP3X_RAWAWB_BASE + 0x0108) 1659 #define ISP3X_RAWAWB_UV_DETC_VERTEX3_6 (ISP3X_RAWAWB_BASE + 0x010c) 1660 #define ISP3X_RAWAWB_UV_DETC_ISLOPE01_6 (ISP3X_RAWAWB_BASE + 0x0110) 1661 #define ISP3X_RAWAWB_UV_DETC_ISLOPE10_6 (ISP3X_RAWAWB_BASE + 0x0114) 1662 #define ISP3X_RAWAWB_UV_DETC_ISLOPE23_6 (ISP3X_RAWAWB_BASE + 0x0118) 1663 #define ISP3X_RAWAWB_UV_DETC_ISLOPE30_6 (ISP3X_RAWAWB_BASE + 0x011c) 1664 #define ISP3X_RAWAWB_YUV_RGB2ROTY_0 (ISP3X_RAWAWB_BASE + 0x0120) 1665 #define ISP3X_RAWAWB_YUV_RGB2ROTY_1 (ISP3X_RAWAWB_BASE + 0x0124) 1666 #define ISP3X_RAWAWB_YUV_RGB2ROTU_0 (ISP3X_RAWAWB_BASE + 0x0128) 1667 #define ISP3X_RAWAWB_YUV_RGB2ROTU_1 (ISP3X_RAWAWB_BASE + 0x012c) 1668 #define ISP3X_RAWAWB_YUV_RGB2ROTV_0 (ISP3X_RAWAWB_BASE + 0x0130) 1669 #define ISP3X_RAWAWB_YUV_RGB2ROTV_1 (ISP3X_RAWAWB_BASE + 0x0134) 1670 #define ISP3X_RAWAWB_YUV_X_COOR_Y_0 (ISP3X_RAWAWB_BASE + 0x0140) 1671 #define ISP3X_RAWAWB_YUV_X_COOR_U_0 (ISP3X_RAWAWB_BASE + 0x0144) 1672 #define ISP3X_RAWAWB_YUV_X_COOR_V_0 (ISP3X_RAWAWB_BASE + 0x0148) 1673 #define ISP3X_RAWAWB_YUV_X1X2_DIS_0 (ISP3X_RAWAWB_BASE + 0x014c) 1674 #define ISP3X_RAWAWB_YUV_INTERP_CURVE_UCOOR_0 (ISP3X_RAWAWB_BASE + 0x0150) 1675 #define ISP3X_RAWAWB_YUV_INTERP_CURVE_TH0_0 (ISP3X_RAWAWB_BASE + 0x0154) 1676 #define ISP3X_RAWAWB_YUV_INTERP_CURVE_TH1_0 (ISP3X_RAWAWB_BASE + 0x0158) 1677 #define ISP3X_RAWAWB_YUV_INTERP_CURVE_TH2_0 (ISP3X_RAWAWB_BASE + 0x015c) 1678 #define ISP3X_RAWAWB_YUV_X_COOR_Y_1 (ISP3X_RAWAWB_BASE + 0x0160) 1679 #define ISP3X_RAWAWB_YUV_X_COOR_U_1 (ISP3X_RAWAWB_BASE + 0x0164) 1680 #define ISP3X_RAWAWB_YUV_X_COOR_V_1 (ISP3X_RAWAWB_BASE + 0x0168) 1681 #define ISP3X_RAWAWB_YUV_X1X2_DIS_1 (ISP3X_RAWAWB_BASE + 0x016c) 1682 #define ISP3X_RAWAWB_YUV_INTERP_CURVE_UCOOR_1 (ISP3X_RAWAWB_BASE + 0x0170) 1683 #define ISP3X_RAWAWB_YUV_INTERP_CURVE_TH0_1 (ISP3X_RAWAWB_BASE + 0x0174) 1684 #define ISP3X_RAWAWB_YUV_INTERP_CURVE_TH1_1 (ISP3X_RAWAWB_BASE + 0x0178) 1685 #define ISP3X_RAWAWB_YUV_INTERP_CURVE_TH2_1 (ISP3X_RAWAWB_BASE + 0x017c) 1686 #define ISP3X_RAWAWB_YUV_X_COOR_Y_2 (ISP3X_RAWAWB_BASE + 0x0180) 1687 #define ISP3X_RAWAWB_YUV_X_COOR_U_2 (ISP3X_RAWAWB_BASE + 0x0184) 1688 #define ISP3X_RAWAWB_YUV_X_COOR_V_2 (ISP3X_RAWAWB_BASE + 0x0188) 1689 #define ISP3X_RAWAWB_YUV_X1X2_DIS_2 (ISP3X_RAWAWB_BASE + 0x018c) 1690 #define ISP3X_RAWAWB_YUV_INTERP_CURVE_UCOOR_2 (ISP3X_RAWAWB_BASE + 0x0190) 1691 #define ISP3X_RAWAWB_YUV_INTERP_CURVE_TH0_2 (ISP3X_RAWAWB_BASE + 0x0194) 1692 #define ISP3X_RAWAWB_YUV_INTERP_CURVE_TH1_2 (ISP3X_RAWAWB_BASE + 0x0198) 1693 #define ISP3X_RAWAWB_YUV_INTERP_CURVE_TH2_2 (ISP3X_RAWAWB_BASE + 0x019c) 1694 #define ISP3X_RAWAWB_YUV_X_COOR_Y_3 (ISP3X_RAWAWB_BASE + 0x01a0) 1695 #define ISP3X_RAWAWB_YUV_X_COOR_U_3 (ISP3X_RAWAWB_BASE + 0x01a4) 1696 #define ISP3X_RAWAWB_YUV_X_COOR_V_3 (ISP3X_RAWAWB_BASE + 0x01a8) 1697 #define ISP3X_RAWAWB_YUV_X1X2_DIS_3 (ISP3X_RAWAWB_BASE + 0x01ac) 1698 #define ISP3X_RAWAWB_YUV_INTERP_CURVE_UCOOR_3 (ISP3X_RAWAWB_BASE + 0x01b0) 1699 #define ISP3X_RAWAWB_YUV_INTERP_CURVE_TH0_3 (ISP3X_RAWAWB_BASE + 0x01b4) 1700 #define ISP3X_RAWAWB_YUV_INTERP_CURVE_TH1_3 (ISP3X_RAWAWB_BASE + 0x01b8) 1701 #define ISP3X_RAWAWB_YUV_INTERP_CURVE_TH2_3 (ISP3X_RAWAWB_BASE + 0x01bc) 1702 #define ISP3X_RAWAWB_RGB2XY_WT01 (ISP3X_RAWAWB_BASE + 0x01fc) 1703 #define ISP3X_RAWAWB_RGB2XY_WT2 (ISP3X_RAWAWB_BASE + 0x0200) 1704 #define ISP3X_RAWAWB_RGB2XY_MAT0_XY (ISP3X_RAWAWB_BASE + 0x0204) 1705 #define ISP3X_RAWAWB_RGB2XY_MAT1_XY (ISP3X_RAWAWB_BASE + 0x0208) 1706 #define ISP3X_RAWAWB_RGB2XY_MAT2_XY (ISP3X_RAWAWB_BASE + 0x020c) 1707 #define ISP3X_RAWAWB_XY_DETC_NOR_X_0 (ISP3X_RAWAWB_BASE + 0x0210) 1708 #define ISP3X_RAWAWB_XY_DETC_NOR_Y_0 (ISP3X_RAWAWB_BASE + 0x0214) 1709 #define ISP3X_RAWAWB_XY_DETC_BIG_X_0 (ISP3X_RAWAWB_BASE + 0x0218) 1710 #define ISP3X_RAWAWB_XY_DETC_BIG_Y_0 (ISP3X_RAWAWB_BASE + 0x021c) 1711 #define ISP3X_RAWAWB_XY_DETC_NOR_X_1 (ISP3X_RAWAWB_BASE + 0x0228) 1712 #define ISP3X_RAWAWB_XY_DETC_NOR_Y_1 (ISP3X_RAWAWB_BASE + 0x022c) 1713 #define ISP3X_RAWAWB_XY_DETC_BIG_X_1 (ISP3X_RAWAWB_BASE + 0x0230) 1714 #define ISP3X_RAWAWB_XY_DETC_BIG_Y_1 (ISP3X_RAWAWB_BASE + 0x0234) 1715 #define ISP3X_RAWAWB_XY_DETC_NOR_X_2 (ISP3X_RAWAWB_BASE + 0x0240) 1716 #define ISP3X_RAWAWB_XY_DETC_NOR_Y_2 (ISP3X_RAWAWB_BASE + 0x0244) 1717 #define ISP3X_RAWAWB_XY_DETC_BIG_X_2 (ISP3X_RAWAWB_BASE + 0x0248) 1718 #define ISP3X_RAWAWB_XY_DETC_BIG_Y_2 (ISP3X_RAWAWB_BASE + 0x024c) 1719 #define ISP3X_RAWAWB_XY_DETC_NOR_X_3 (ISP3X_RAWAWB_BASE + 0x0258) 1720 #define ISP3X_RAWAWB_XY_DETC_NOR_Y_3 (ISP3X_RAWAWB_BASE + 0x025c) 1721 #define ISP3X_RAWAWB_XY_DETC_BIG_X_3 (ISP3X_RAWAWB_BASE + 0x0260) 1722 #define ISP3X_RAWAWB_XY_DETC_BIG_Y_3 (ISP3X_RAWAWB_BASE + 0x0264) 1723 #define ISP3X_RAWAWB_XY_DETC_NOR_X_4 (ISP3X_RAWAWB_BASE + 0x0270) 1724 #define ISP3X_RAWAWB_XY_DETC_NOR_Y_4 (ISP3X_RAWAWB_BASE + 0x0274) 1725 #define ISP3X_RAWAWB_XY_DETC_BIG_X_4 (ISP3X_RAWAWB_BASE + 0x0278) 1726 #define ISP3X_RAWAWB_XY_DETC_BIG_Y_4 (ISP3X_RAWAWB_BASE + 0x027c) 1727 #define ISP3X_RAWAWB_XY_DETC_NOR_X_5 (ISP3X_RAWAWB_BASE + 0x0288) 1728 #define ISP3X_RAWAWB_XY_DETC_NOR_Y_5 (ISP3X_RAWAWB_BASE + 0x028c) 1729 #define ISP3X_RAWAWB_XY_DETC_BIG_X_5 (ISP3X_RAWAWB_BASE + 0x0290) 1730 #define ISP3X_RAWAWB_XY_DETC_BIG_Y_5 (ISP3X_RAWAWB_BASE + 0x0294) 1731 #define ISP3X_RAWAWB_XY_DETC_NOR_X_6 (ISP3X_RAWAWB_BASE + 0x02a0) 1732 #define ISP3X_RAWAWB_XY_DETC_NOR_Y_6 (ISP3X_RAWAWB_BASE + 0x02a4) 1733 #define ISP3X_RAWAWB_XY_DETC_BIG_X_6 (ISP3X_RAWAWB_BASE + 0x02a8) 1734 #define ISP3X_RAWAWB_XY_DETC_BIG_Y_6 (ISP3X_RAWAWB_BASE + 0x02ac) 1735 #define ISP3X_RAWAWB_MULTIWINDOW_EXC_CTRL (ISP3X_RAWAWB_BASE + 0x02b8) 1736 #define ISP3X_RAWAWB_MULTIWINDOW0_OFFS (ISP3X_RAWAWB_BASE + 0x02bc) 1737 #define ISP3X_RAWAWB_MULTIWINDOW0_SIZE (ISP3X_RAWAWB_BASE + 0x02c0) 1738 #define ISP3X_RAWAWB_MULTIWINDOW1_OFFS (ISP3X_RAWAWB_BASE + 0x02c4) 1739 #define ISP3X_RAWAWB_MULTIWINDOW1_SIZE (ISP3X_RAWAWB_BASE + 0x02c8) 1740 #define ISP3X_RAWAWB_MULTIWINDOW2_OFFS (ISP3X_RAWAWB_BASE + 0x02cc) 1741 #define ISP3X_RAWAWB_MULTIWINDOW2_SIZE (ISP3X_RAWAWB_BASE + 0x02d0) 1742 #define ISP3X_RAWAWB_MULTIWINDOW3_OFFS (ISP3X_RAWAWB_BASE + 0x02d4) 1743 #define ISP3X_RAWAWB_MULTIWINDOW3_SIZE (ISP3X_RAWAWB_BASE + 0x02d8) 1744 #define ISP3X_RAWAWB_EXC_WP_REGION0_XU (ISP3X_RAWAWB_BASE + 0x02fc) 1745 #define ISP3X_RAWAWB_EXC_WP_REGION0_YV (ISP3X_RAWAWB_BASE + 0x0300) 1746 #define ISP3X_RAWAWB_EXC_WP_REGION1_XU (ISP3X_RAWAWB_BASE + 0x0304) 1747 #define ISP3X_RAWAWB_EXC_WP_REGION1_YV (ISP3X_RAWAWB_BASE + 0x0308) 1748 #define ISP3X_RAWAWB_EXC_WP_REGION2_XU (ISP3X_RAWAWB_BASE + 0x030c) 1749 #define ISP3X_RAWAWB_EXC_WP_REGION2_YV (ISP3X_RAWAWB_BASE + 0x0310) 1750 #define ISP3X_RAWAWB_EXC_WP_REGION3_XU (ISP3X_RAWAWB_BASE + 0x0314) 1751 #define ISP3X_RAWAWB_EXC_WP_REGION3_YV (ISP3X_RAWAWB_BASE + 0x0318) 1752 #define ISP3X_RAWAWB_EXC_WP_REGION4_XU (ISP3X_RAWAWB_BASE + 0x031c) 1753 #define ISP3X_RAWAWB_EXC_WP_REGION4_YV (ISP3X_RAWAWB_BASE + 0x0320) 1754 #define ISP3X_RAWAWB_EXC_WP_REGION5_XU (ISP3X_RAWAWB_BASE + 0x0324) 1755 #define ISP3X_RAWAWB_EXC_WP_REGION5_YV (ISP3X_RAWAWB_BASE + 0x0328) 1756 #define ISP3X_RAWAWB_EXC_WP_REGION6_XU (ISP3X_RAWAWB_BASE + 0x032c) 1757 #define ISP3X_RAWAWB_EXC_WP_REGION6_YV (ISP3X_RAWAWB_BASE + 0x0330) 1758 #define ISP32_RAWAWB_EXC_WP_WEIGHT0_3 (ISP3X_RAWAWB_BASE + 0x0334) 1759 #define ISP32_RAWAWB_EXC_WP_WEIGHT4_6 (ISP3X_RAWAWB_BASE + 0x0338) 1760 #define ISP3X_RAWAWB_SUM_RGAIN_NOR_0 (ISP3X_RAWAWB_BASE + 0x0340) 1761 #define ISP3X_RAWAWB_SUM_BGAIN_NOR_0 (ISP3X_RAWAWB_BASE + 0x0348) 1762 #define ISP3X_RAWAWB_WP_NUM_NOR_0 (ISP3X_RAWAWB_BASE + 0x034c) 1763 #define ISP3X_RAWAWB_SUM_RGAIN_BIG_0 (ISP3X_RAWAWB_BASE + 0x0350) 1764 #define ISP3X_RAWAWB_SUM_BGAIN_BIG_0 (ISP3X_RAWAWB_BASE + 0x0358) 1765 #define ISP3X_RAWAWB_WP_NUM_BIG_0 (ISP3X_RAWAWB_BASE + 0x035c) 1766 #define ISP3X_RAWAWB_SUM_RGAIN_NOR_1 (ISP3X_RAWAWB_BASE + 0x0370) 1767 #define ISP3X_RAWAWB_SUM_BGAIN_NOR_1 (ISP3X_RAWAWB_BASE + 0x0378) 1768 #define ISP3X_RAWAWB_WP_NUM_NOR_1 (ISP3X_RAWAWB_BASE + 0x037c) 1769 #define ISP3X_RAWAWB_SUM_RGAIN_BIG_1 (ISP3X_RAWAWB_BASE + 0x0380) 1770 #define ISP3X_RAWAWB_SUM_BGAIN_BIG_1 (ISP3X_RAWAWB_BASE + 0x0388) 1771 #define ISP3X_RAWAWB_WP_NUM_BIG_1 (ISP3X_RAWAWB_BASE + 0x038c) 1772 #define ISP3X_RAWAWB_SUM_RGAIN_NOR_2 (ISP3X_RAWAWB_BASE + 0x03a0) 1773 #define ISP3X_RAWAWB_SUM_BGAIN_NOR_2 (ISP3X_RAWAWB_BASE + 0x03a8) 1774 #define ISP3X_RAWAWB_WP_NUM_NOR_2 (ISP3X_RAWAWB_BASE + 0x03ac) 1775 #define ISP3X_RAWAWB_SUM_RGAIN_BIG_2 (ISP3X_RAWAWB_BASE + 0x03b0) 1776 #define ISP3X_RAWAWB_SUM_BGAIN_BIG_2 (ISP3X_RAWAWB_BASE + 0x03b8) 1777 #define ISP3X_RAWAWB_WP_NUM_BIG_2 (ISP3X_RAWAWB_BASE + 0x03bc) 1778 #define ISP3X_RAWAWB_SUM_RGAIN_NOR_3 (ISP3X_RAWAWB_BASE + 0x03d0) 1779 #define ISP3X_RAWAWB_SUM_BGAIN_NOR_3 (ISP3X_RAWAWB_BASE + 0x03d8) 1780 #define ISP3X_RAWAWB_WP_NUM_NOR_3 (ISP3X_RAWAWB_BASE + 0x03dc) 1781 #define ISP3X_RAWAWB_SUM_RGAIN_BIG_3 (ISP3X_RAWAWB_BASE + 0x03e0) 1782 #define ISP3X_RAWAWB_SUM_BGAIN_BIG_3 (ISP3X_RAWAWB_BASE + 0x03e8) 1783 #define ISP3X_RAWAWB_WP_NUM_BIG_3 (ISP3X_RAWAWB_BASE + 0x03ec) 1784 #define ISP3X_RAWAWB_SUM_RGAIN_NOR_4 (ISP3X_RAWAWB_BASE + 0x0400) 1785 #define ISP3X_RAWAWB_SUM_BGAIN_NOR_4 (ISP3X_RAWAWB_BASE + 0x0408) 1786 #define ISP3X_RAWAWB_WP_NUM_NOR_4 (ISP3X_RAWAWB_BASE + 0x040c) 1787 #define ISP3X_RAWAWB_SUM_RGAIN_BIG_4 (ISP3X_RAWAWB_BASE + 0x0410) 1788 #define ISP3X_RAWAWB_SUM_BGAIN_BIG_4 (ISP3X_RAWAWB_BASE + 0x0418) 1789 #define ISP3X_RAWAWB_WP_NUM_BIG_4 (ISP3X_RAWAWB_BASE + 0x041c) 1790 #define ISP3X_RAWAWB_SUM_RGAIN_NOR_5 (ISP3X_RAWAWB_BASE + 0x0430) 1791 #define ISP3X_RAWAWB_SUM_BGAIN_NOR_5 (ISP3X_RAWAWB_BASE + 0x0438) 1792 #define ISP3X_RAWAWB_WP_NUM_NOR_5 (ISP3X_RAWAWB_BASE + 0x043c) 1793 #define ISP3X_RAWAWB_SUM_RGAIN_BIG_5 (ISP3X_RAWAWB_BASE + 0x0440) 1794 #define ISP3X_RAWAWB_SUM_BGAIN_BIG_5 (ISP3X_RAWAWB_BASE + 0x0448) 1795 #define ISP3X_RAWAWB_WP_NUM_BIG_5 (ISP3X_RAWAWB_BASE + 0x044c) 1796 #define ISP3X_RAWAWB_SUM_RGAIN_NOR_6 (ISP3X_RAWAWB_BASE + 0x0460) 1797 #define ISP3X_RAWAWB_SUM_BGAIN_NOR_6 (ISP3X_RAWAWB_BASE + 0x0468) 1798 #define ISP3X_RAWAWB_WP_NUM_NOR_6 (ISP3X_RAWAWB_BASE + 0x046c) 1799 #define ISP3X_RAWAWB_SUM_RGAIN_BIG_6 (ISP3X_RAWAWB_BASE + 0x0470) 1800 #define ISP3X_RAWAWB_SUM_BGAIN_BIG_6 (ISP3X_RAWAWB_BASE + 0x0478) 1801 #define ISP3X_RAWAWB_WP_NUM_BIG_6 (ISP3X_RAWAWB_BASE + 0x047c) 1802 #define ISP3X_RAWAWB_SUM_R_NOR_MULTIWINDOW0 (ISP3X_RAWAWB_BASE + 0x0490) 1803 #define ISP3X_RAWAWB_SUM_B_NOR_MULTIWINDOW0 (ISP3X_RAWAWB_BASE + 0x0498) 1804 #define ISP3X_RAWAWB_WP_NM_NOR_MULTIWINDOW0 (ISP3X_RAWAWB_BASE + 0x049c) 1805 #define ISP3X_RAWAWB_SUM_R_BIG_MULTIWINDOW0 (ISP3X_RAWAWB_BASE + 0x04a0) 1806 #define ISP3X_RAWAWB_SUM_B_BIG_MULTIWINDOW0 (ISP3X_RAWAWB_BASE + 0x04a8) 1807 #define ISP3X_RAWAWB_WP_NM_BIG_MULTIWINDOW0 (ISP3X_RAWAWB_BASE + 0x04ac) 1808 #define ISP3X_RAWAWB_SUM_R_NOR_MULTIWINDOW1 (ISP3X_RAWAWB_BASE + 0x04c0) 1809 #define ISP3X_RAWAWB_SUM_B_NOR_MULTIWINDOW1 (ISP3X_RAWAWB_BASE + 0x04c8) 1810 #define ISP3X_RAWAWB_WP_NM_NOR_MULTIWINDOW1 (ISP3X_RAWAWB_BASE + 0x04cc) 1811 #define ISP3X_RAWAWB_SUM_R_BIG_MULTIWINDOW1 (ISP3X_RAWAWB_BASE + 0x04d0) 1812 #define ISP3X_RAWAWB_SUM_B_BIG_MULTIWINDOW1 (ISP3X_RAWAWB_BASE + 0x04d8) 1813 #define ISP3X_RAWAWB_WP_NM_BIG_MULTIWINDOW1 (ISP3X_RAWAWB_BASE + 0x04dc) 1814 #define ISP3X_RAWAWB_SUM_R_NOR_MULTIWINDOW2 (ISP3X_RAWAWB_BASE + 0x04f0) 1815 #define ISP3X_RAWAWB_SUM_B_NOR_MULTIWINDOW2 (ISP3X_RAWAWB_BASE + 0x04f8) 1816 #define ISP3X_RAWAWB_WP_NM_NOR_MULTIWINDOW2 (ISP3X_RAWAWB_BASE + 0x04fc) 1817 #define ISP3X_RAWAWB_SUM_R_BIG_MULTIWINDOW2 (ISP3X_RAWAWB_BASE + 0x0500) 1818 #define ISP3X_RAWAWB_SUM_B_BIG_MULTIWINDOW2 (ISP3X_RAWAWB_BASE + 0x0508) 1819 #define ISP3X_RAWAWB_WP_NM_BIG_MULTIWINDOW2 (ISP3X_RAWAWB_BASE + 0x050c) 1820 #define ISP3X_RAWAWB_SUM_R_NOR_MULTIWINDOW3 (ISP3X_RAWAWB_BASE + 0x0520) 1821 #define ISP3X_RAWAWB_SUM_B_NOR_MULTIWINDOW3 (ISP3X_RAWAWB_BASE + 0x0528) 1822 #define ISP3X_RAWAWB_WP_NM_NOR_MULTIWINDOW3 (ISP3X_RAWAWB_BASE + 0x052c) 1823 #define ISP3X_RAWAWB_SUM_R_BIG_MULTIWINDOW3 (ISP3X_RAWAWB_BASE + 0x0530) 1824 #define ISP3X_RAWAWB_SUM_B_BIG_MULTIWINDOW3 (ISP3X_RAWAWB_BASE + 0x0538) 1825 #define ISP3X_RAWAWB_WP_NM_BIG_MULTIWINDOW3 (ISP3X_RAWAWB_BASE + 0x053c) 1826 #define ISP3X_RAWAWB_SUM_R_EXC0 (ISP3X_RAWAWB_BASE + 0x05e0) 1827 #define ISP3X_RAWAWB_SUM_B_EXC0 (ISP3X_RAWAWB_BASE + 0x05e8) 1828 #define ISP3X_RAWAWB_WP_NM_EXC0 (ISP3X_RAWAWB_BASE + 0x05ec) 1829 #define ISP3X_RAWAWB_SUM_R_EXC1 (ISP3X_RAWAWB_BASE + 0x05f0) 1830 #define ISP3X_RAWAWB_SUM_B_EXC1 (ISP3X_RAWAWB_BASE + 0x05f8) 1831 #define ISP3X_RAWAWB_WP_NM_EXC1 (ISP3X_RAWAWB_BASE + 0x05fc) 1832 #define ISP3X_RAWAWB_SUM_R_EXC2 (ISP3X_RAWAWB_BASE + 0x0600) 1833 #define ISP3X_RAWAWB_SUM_B_EXC2 (ISP3X_RAWAWB_BASE + 0x0608) 1834 #define ISP3X_RAWAWB_WP_NM_EXC2 (ISP3X_RAWAWB_BASE + 0x060c) 1835 #define ISP3X_RAWAWB_SUM_R_EXC3 (ISP3X_RAWAWB_BASE + 0x0610) 1836 #define ISP3X_RAWAWB_SUM_B_EXC3 (ISP3X_RAWAWB_BASE + 0x0618) 1837 #define ISP3X_RAWAWB_WP_NM_EXC3 (ISP3X_RAWAWB_BASE + 0x061c) 1838 #define ISP3X_RAWAWB_Y_HIST01 (ISP3X_RAWAWB_BASE + 0x0620) 1839 #define ISP3X_RAWAWB_Y_HIST23 (ISP3X_RAWAWB_BASE + 0x0624) 1840 #define ISP3X_RAWAWB_Y_HIST45 (ISP3X_RAWAWB_BASE + 0x0628) 1841 #define ISP3X_RAWAWB_Y_HIST67 (ISP3X_RAWAWB_BASE + 0x062c) 1842 #define ISP3X_RAWAWB_WPNUM2_0 (ISP3X_RAWAWB_BASE + 0x0630) 1843 #define ISP3X_RAWAWB_WPNUM2_1 (ISP3X_RAWAWB_BASE + 0x0634) 1844 #define ISP3X_RAWAWB_WPNUM2_2 (ISP3X_RAWAWB_BASE + 0x0638) 1845 #define ISP3X_RAWAWB_WPNUM2_3 (ISP3X_RAWAWB_BASE + 0x063c) 1846 #define ISP3X_RAWAWB_WPNUM2_4 (ISP3X_RAWAWB_BASE + 0x0640) 1847 #define ISP3X_RAWAWB_WPNUM2_5 (ISP3X_RAWAWB_BASE + 0x0644) 1848 #define ISP3X_RAWAWB_WPNUM2_6 (ISP3X_RAWAWB_BASE + 0x0648) 1849 #define ISP3X_RAWAWB_RAM_CTRL (ISP3X_RAWAWB_BASE + 0x0650) 1850 #define ISP3X_RAWAWB_WRAM_CTRL (ISP3X_RAWAWB_BASE + 0x0654) 1851 #define ISP3X_RAWAWB_WRAM_DATA_BASE (ISP3X_RAWAWB_BASE + 0x0660) 1852 #define ISP3X_RAWAWB_RAM_DATA_BASE (ISP3X_RAWAWB_BASE + 0x0700) 1853 #define ISP32L_RAWAWB_WIN_WEIGHT_0 (ISP3X_RAWAWB_BASE + 0x0660) 1854 #define ISP32L_RAWAWB_WIN_WEIGHT_1 (ISP3X_RAWAWB_BASE + 0x0664) 1855 #define ISP32L_RAWAWB_WIN_WEIGHT_2 (ISP3X_RAWAWB_BASE + 0x0668) 1856 #define ISP32L_RAWAWB_WIN_WEIGHT_3 (ISP3X_RAWAWB_BASE + 0x066c) 1857 #define ISP32L_RAWAWB_WIN_WEIGHT_4 (ISP3X_RAWAWB_BASE + 0x0670) 1858 1859 /* VI_ISP_PATH */ 1860 #define ISP3X_RAWAE3_SEL(x) (((x) & 3) << 16) 1861 #define ISP3X_RAWAF_SEL(x) (((x) & 3) << 18) 1862 #define ISP3X_RAWAWB_SEL(x) (((x) & 3) << 20) 1863 #define ISP3X_RAWAE012_SEL(x) (((x) & 3) << 22) 1864 #define ISP3X_LSC_CFG_SEL(x) (((x) & 3) << 24) 1865 #define ISP32_BNR2AWB_SEL BIT(26) 1866 #define ISP32_DRC2AWB_SEL BIT(27) 1867 #define ISP32L_BNR2AF_SEL BIT(28) 1868 1869 /* VI_ICCL */ 1870 #define ISP32_BRSZ_CLK_ENABLE BIT(13) 1871 1872 /* SWS_CFG */ 1873 #define ISP32L_ISP2ENC_CNT_MUX BIT(0) 1874 #define ISP3X_SW_ACK_FRM_PRO_DIS BIT(3) 1875 #define ISP3X_3A_DDR_WRITE_EN BIT(24) 1876 #define ISP3X_SW_MIPI2ISP_FIFO_DIS BIT(25) 1877 #define ISP3X_SW_3D_DBR_START_MODE BIT(26) 1878 1879 /* CMSK */ 1880 #define ISP3X_SW_CMSK_EN BIT(0) 1881 #define ISP3X_SW_CMSK_EN_MP BIT(1) 1882 #define ISP3X_SW_CMSK_EN_SP BIT(2) 1883 #define ISP3X_SW_CMSK_EN_BP BIT(3) 1884 #define ISP3X_SW_CMSK_BLKSIZE(x) (((x) & 3) << 4) 1885 1886 #define ISP32_SW_CMSK_EN_PATH GENMASK(3, 0) 1887 #define ISP32_SW_CMSK_EN_PATH_SHD GENMASK(11, 8) 1888 1889 #define ISP3X_SW_CMSK_FORCE_UPD BIT(31) 1890 1891 #define ISP3X_SW_CMSK_ORDER_MODE BIT(1) 1892 1893 #define ISP3X_SW_CMSK_YUV(x, y, z) (((x) & 0xff) | ((y) & 0xff) << 8 | ((z) & 0xff) << 16) 1894 1895 /* ISP CTRL0 */ 1896 #define ISP32_MIR_ENABLE BIT(5) 1897 #define ISP3X_SW_CGC_YUV_LIMIT BIT(28) 1898 #define ISP3X_SW_CGC_RATIO_EN BIT(29) 1899 1900 /* ISP CTRL1 */ 1901 #define ISP3X_YNR_FST_FRAME BIT(23) 1902 #define ISP3X_ADRC_FST_FRAME BIT(24) 1903 #define ISP3X_DHAZ_FST_FRAME BIT(25) 1904 #define ISP3X_CNR_FST_FRAME BIT(26) 1905 #define ISP3X_RAW3D_FST_FRAME BIT(27) 1906 #define ISP3X_BIGMODE_FORCE_EN BIT(28) 1907 #define ISP3X_BIGMODE_MANUAL BIT(29) 1908 1909 /* ISP ACQ_H_OFFS */ 1910 #define ISP3X_SENSOR_MODE(x) (((x) & 3) << 30) 1911 #define ISP3X_SENSOR_INDEX(x) (((x) & 3) << 28) 1912 #define ISP3X_ACQ_H_OFFS(x) ((x) & 0x7fff) 1913 1914 #define ISP32L_SENSOR_MODE(x) (((x) & 7) << 20) 1915 #define ISP32L_SENSOR_FORCE_INDEX(x) (((x) & 0xf) << 24) 1916 1917 /* isp interrupt */ 1918 #define ISP3X_OFF BIT(0) 1919 #define ISP3X_FRAME BIT(1) 1920 #define ISP3X_DATA_LOSS BIT(2) 1921 #define ISP3X_PIC_SIZE_ERROR BIT(3) 1922 #define ISP3X_SIAWB_DONE BIT(4) 1923 #define ISP3X_FRAME_IN BIT(5) 1924 #define ISP3X_V_START BIT(6) 1925 #define ISP3X_H_START BIT(7) 1926 #define ISP3X_FLASH_ON BIT(8) 1927 #define ISP3X_FLASH_OFF BIT(9) 1928 #define ISP3X_SHUTTER_ON BIT(10) 1929 #define ISP3X_SHUTTER_OFF BIT(11) 1930 #define ISP3X_AFM_SUM_OF BIT(12) 1931 #define ISP3X_AFM_LUM_OF BIT(13) 1932 #define ISP3X_SIAF_FIN BIT(14) 1933 #define ISP3X_SIHST_RDY BIT(15) 1934 #define ISP3X_LSC_LUT_ERR BIT(16) 1935 #define ISP3X_FLASH_CAP BIT(17) 1936 #define ISP3X_EXP_END BIT(18) 1937 #define ISP3X_HDR_DONE BIT(20) 1938 #define ISP3X_DHAZ_DONE BIT(21) 1939 #define ISP3X_GIAN_ERR BIT(22) 1940 #define ISP3X_OUT_FRM_END BIT(23) 1941 #define ISP3X_OUT_FRM_HALF BIT(24) 1942 #define ISP3X_OUT_FRM_QUARTER BIT(25) 1943 #define ISP3X_BAY3D_IN_DONE BIT(26) 1944 #define ISP3X_BAY3D_IN_LINECNT_DONE BIT(27) 1945 #define ISP3X_BAY3D_POST_ST BIT(28) 1946 #define ISP3X_BAY3D_FRM_END BIT(29) 1947 #define ISP3X_FETCH_LUT_END BIT(30) 1948 1949 /* isp3a interrupt */ 1950 #define ISP3X_3A_RAWAE_BIG BIT(0) 1951 #define ISP3X_3A_RAWAE_CH0 BIT(1) 1952 #define ISP3X_3A_RAWAE_CH1 BIT(2) 1953 #define ISP3X_3A_RAWAE_CH2 BIT(3) 1954 #define ISP3X_3A_RAWHIST_BIG BIT(4) 1955 #define ISP3X_3A_RAWHIST_CH0 BIT(5) 1956 #define ISP3X_3A_RAWHIST_CH1 BIT(6) 1957 #define ISP3X_3A_RAWHIST_CH2 BIT(7) 1958 #define ISP3X_3A_RAWAF_SUM BIT(8) 1959 #define ISP3X_3A_RAWAF_LUM BIT(9) 1960 #define ISP3X_3A_RAWAF BIT(10) 1961 #define ISP3X_3A_RAWAWB BIT(11) 1962 #define ISP3X_3A_DDR_DONE BIT(12) 1963 1964 #define ISP3X_ISP_OUT_LINE(a) ((a) & 0x3fff) 1965 1966 #define ISP32_YNR_LUMA_RDBK_ST BIT(0) 1967 #define ISP32_YNR_LUMA_RDBK_OFFS(a) (((a) & 0x3fff) << 16) 1968 #define ISP32_YNR_LUMA_RDBK_RDY BIT(31) 1969 1970 /* DUAL CROP */ 1971 #define ISP3X_DUAL_CROP_FBC_MODE BIT(8) 1972 1973 /* GAMMA OUT */ 1974 #define ISP3X_GAMMA_OUT_EN BIT(0) 1975 #define ISP3X_GAMMA_OUT_EQU_SEGM BIT(1) 1976 #define ISP3X_GAMMA_OUT_FINALX4_DENSE BIT(2) 1977 1978 /* RESIZE */ 1979 #define ISP3X_SCL_HPHASE_EN BIT(10) 1980 #define ISP3X_SCL_CLIP_EN BIT(11) 1981 #define ISP3X_SCL_IN_CLIP_EN BIT(12) 1982 1983 #define ISP32_SCALE_AVG_H_EN BIT(8) 1984 #define ISP32_SCALE_AVG_V_EN BIT(9) 1985 1986 #define ISP32_SCALE_FORCE_UPD BIT(4) 1987 #define ISP32_SCALE_GEN_UPD BIT(5) 1988 1989 #define ISP32_SCALE_BIL_FACTOR BIT(12) 1990 #define ISP32_SCALE_AVE_FACTOR BIT(16) 1991 1992 /* mi interrupt */ 1993 #define ISP3X_MI_MP_FRAME BIT(0) 1994 #define ISP3X_MI_SP_FRAME BIT(1) 1995 #define ISP3X_MI_MBLK_LINE BIT(2) 1996 #define ISP3X_MI_FILL_MP_Y BIT(3) 1997 #define ISP3X_MI_WRAP_MP_Y BIT(4) 1998 #define ISP3X_MI_WRAP_MP_CB BIT(5) 1999 #define ISP3X_MI_WRAP_MP_CR BIT(6) 2000 #define ISP3X_MI_WRAP_SP_Y BIT(7) 2001 #define ISP3X_MI_WRAP_SP_CB BIT(8) 2002 #define ISP3X_MI_WARP_SP_CR BIT(9) 2003 #define ISP3X_MI_FILL_MP_Y2 BIT(10) 2004 #define ISP3X_MI_DMA_READY BIT(11) 2005 #define ISP3X_MI_Y12Y_FRAME BIT(12) 2006 #define ISP3X_MI_Y12C_FRAME BIT(13) 2007 #define ISP3X_MI_ALL_FRAME BIT(14) 2008 #define ISP3X_MI_DBR_WR_FRAME BIT(20) 2009 #define ISP3X_MI_GAIN_WR_FRAME BIT(21) 2010 #define ISP3X_MI_BAY3D_IIR_FRAME BIT(22) 2011 #define ISP3X_MI_BAY3D_CUR_FRAME BIT(23) 2012 #define ISP3X_MI_BAY3D_DS_FRAME BIT(24) 2013 #define ISP3X_MI_BP_FRAME BIT(25) 2014 #define ISP3X_MI_WRAP_BP_Y BIT(26) 2015 #define ISP3X_MI_WRAP_BP_CB BIT(27) 2016 #define ISP32_MI_MPDS_FRAME BIT(28) 2017 #define ISP32_MI_BPDS_FRAME BIT(29) 2018 #define ISP3X_MI_BUS_ERR BIT(30) 2019 #define ISP3X_MI_MPFBC_FRAME BIT(31) 2020 2021 /* MI_WR_XTD_FORMAT_CTRL */ 2022 #define ISP3X_MI_XTD_FORMAT_MP_UV_SWAP BIT(0) 2023 #define ISP3X_MI_XTD_FORMAT_SP_UV_SWAP BIT(1) 2024 2025 /* MI_WR_CTRL2 */ 2026 #define ISP3X_MPSELF_UPD BIT(4) 2027 #define ISP3X_SPSELF_UPD BIT(5) 2028 #define ISP3X_BPSELF_UPD BIT(6) 2029 #define ISP3X_BAY3D_RDSELF_UPD BIT(7) 2030 #define ISP3X_DBR_ENABLE BIT(8) 2031 #define ISP3X_MIMUX_RAW_ALIGN BIT(9) 2032 #define ISP3X_DBR_WR_AUTO_UPD BIT(10) 2033 #define ISP3X_DBR_RDSELF_UPD BIT(11) 2034 #define ISP3X_GAIN_WR_PINGPONG BIT(12) 2035 #define ISP3X_GAIN_WR_AUTO_UPD BIT(13) 2036 #define ISP3X_BAY3D_IIR_WR_AUTO_UPD BIT(16) 2037 #define ISP3X_BAY3D_CUR_WR_AUTO_UPD BIT(17) 2038 #define ISP3X_BAY3D_DS_WR_AUTO_UPD BIT(18) 2039 #define ISP3X_DBR_WRSELF_UPD BIT(20) 2040 #define ISP3X_GAINSELF_UPD BIT(21) 2041 #define ISP3X_BAY3D_IIRSELF_UPD BIT(22) 2042 #define ISP3X_BAY3D_CURSELF_UPD BIT(23) 2043 #define ISP3X_BAY3D_DSSELF_UPD BIT(24) 2044 #define ISP32_MPDSSELF_FORCE_UPD BIT(25) 2045 #define ISP32_BPDSSELF_FORCE_UPD BIT(26) 2046 #define ISP3X_DBR_ST_MODE BIT(30) 2047 #define ISP3X_DBR_ST BIT(31) 2048 2049 /* WR_OUTPUT_FORMAT */ 2050 #define ISP32_MI_OUTPUT_MASK GENMASK(10, 8) 2051 #define ISP32_MI_OUTPUT_YUV400 0 2052 #define ISP32_MI_OUTPUT_YUV420 BIT(8) 2053 #define ISP32_MI_OUTPUT_YUV422 BIT(9) 2054 2055 /* MI_WR_CTRL2_SHD */ 2056 #define ISP32_BP_EN_IN_SHD BIT(4) 2057 #define ISP32_DBR_WR_EN_IN_SHD BIT(5) 2058 #define ISP32_GAIN_WR_EN_IN_SHD BIT(6) 2059 #define ISP32_BAY3D_CUR_WR_EN_IN_SHD BIT(8) 2060 #define ISP32_BAY3D_IIR_WR_EN_IN_SHD BIT(9) 2061 #define ISP32_BAY3D_DS_WR_EN_IN_SHD BIT(10) 2062 #define ISP32_MPDS_EN_IN_SHD BIT(12) 2063 #define ISP32_BPDS_EN_IN_SHD BIT(13) 2064 #define ISP32_BP_EN_OUT_SHD BIT(20) 2065 #define ISP32_DBR_WR_EN_OUT_SHD BIT(21) 2066 #define ISP32_GAIN_WR_EN_OUT_SHD BIT(22) 2067 #define ISP32_BAY3D_CUR_WR_EN_OUT_SHD BIT(24) 2068 #define ISP32_BAY3D_IIR_WR_EN_OUT_SHD BIT(25) 2069 #define ISP32_BAY3D_DS_WR_EN_OUT_SHD BIT(26) 2070 #define ISP32_MPDS_EN_OUT_SHD BIT(28) 2071 #define ISP32_BPDS_EN_OUT_SHD BIT(29) 2072 2073 /* BP_WR_CTRL */ 2074 #define ISP3X_BP_ENABLE BIT(0) 2075 #define ISP3X_BP_AUTO_UPD BIT(1) 2076 #define ISP3X_BP_PINGPONG BIT(2) 2077 #define ISP3X_BP_FORMAT_PLA 0 2078 #define ISP3X_BP_FORMAT_SPLA BIT(4) 2079 #define ISP3X_BP_FORMAT_INT BIT(5) 2080 #define ISP3X_BP_FORMAT_MASK GENMASK(5, 4) 2081 #define ISP3X_BP_OUTPUT_YUV400 0 2082 #define ISP3X_BP_OUTPUT_YUV420 BIT(8) 2083 #define ISP3X_BP_OUTPUT_YUV422 BIT(9) 2084 #define ISP3X_BP_OUTPUT_MASK GENMASK(10, 8) 2085 2086 /* MPDS/BPDS WR_CTRL */ 2087 #define ISP32_DS_ENABLE BIT(0) 2088 #define ISP32_DS_AUTO_UPD BIT(1) 2089 #define ISP32_DS_FORMAT_PLA 0 2090 #define ISP32_DS_FORMAT_SPLA BIT(4) 2091 #define ISP32_DS_FORMAT_INT BIT(5) 2092 #define ISP32_DS_FORMAT_MASK GENMASK(5, 4) 2093 #define ISP32_DS_OUTPUT_YUV400 0 2094 #define ISP32_DS_OUTPUT_YUV420 BIT(8) 2095 #define ISP32_DS_OUTPUT_YUV422 BIT(9) 2096 #define ISP32_DS_OUTPUT_MASK GENMASK(10, 8) 2097 #define ISP32_DS_RAM_CLK_DIS BIT(30) 2098 #define ISP32_DS_DS_DIS BIT(31) 2099 2100 /* WRAP_CTRL */ 2101 #define ISP32_MP_WR_INIT_OFFSET_EN BIT(0) 2102 #define ISP32_SP_WR_INIT_OFFSET_EN BIT(1) 2103 #define ISP32_BP_WR_INIT_OFFSET_EN BIT(2) 2104 #define ISP32_MPDS_WR_INIT_OFFSET_EN BIT(4) 2105 #define ISP32_BPDS_WR_INIT_OFFSET_EN BIT(5) 2106 #define ISP32_MP_DYNAMIC_UPD_ADDR BIT(8) 2107 #define ISP32_SP_DYNAMIC_UPD_ADDR BIT(9) 2108 #define ISP32_BP_DYNAMIC_UPD_ADDR BIT(10) 2109 #define ISP32_MPDS_DYNAMIC_UPD_ADDR BIT(11) 2110 #define ISP32_BPDS_DYNAMIC_UPD_ADDR BIT(12) 2111 #define ISP32_MP_WR_FRMEND_UPD_DIS BIT(24) 2112 #define ISP32_SP_WR_FRMEND_UPD_DIS BIT(25) 2113 #define ISP32_BP_WR_FRMEND_UPD_DIS BIT(26) 2114 #define ISP32_MPDS_WR_FRMEND_UPD_DIS BIT(27) 2115 #define ISP32_BPDS_WR_FRMEND_UPD_DIS BIT(28) 2116 2117 /* VFLIP_CTRL */ 2118 #define ISP32_MP_WR_V_FLIP BIT(0) 2119 #define ISP32_SP_WR_V_FLIP BIT(1) 2120 #define ISP32_BP_WR_V_FLIP BIT(2) 2121 #define ISP32_MPDS_WR_V_FLIP BIT(4) 2122 #define ISP32_BPDS_WR_V_FIIP BIT(5) 2123 2124 /* MPFBC */ 2125 #define ISP3X_MPFBC_YUV_MASK GENMASK(2, 1) 2126 #define ISP3X_MPFBC_EN BIT(0) 2127 #define ISP3X_MPFBC_YUV420 0 2128 #define ISP3X_MPFBC_YUV422 BIT(1) 2129 #define ISP3X_MPFBC_PINGPONG_EN BIT(4) 2130 #define ISP3X_MPFBC_UNCOMPRESSED BIT(5) 2131 #define ISP3X_MPFBC_SPARSE_MODE BIT(6) 2132 #define ISP3X_MPFBC_FROM_SCL BIT(7) 2133 #define ISP3X_SEPERATE_YUV_CFG BIT(8) 2134 #define ISP3X_MP_YUV_MODE BIT(9) 2135 #define ISP3X_SP_YUV_MODE BIT(10) 2136 #define ISP3X_BP_YUV_MODE BIT(11) 2137 #define ISP3X_HEAD_OFFSET_EN BIT(12) 2138 #define ISP3X_HEAD_OUT_OPT_DIS BIT(29) 2139 #define ISP3X_MPFBC_WORKING BIT(30) 2140 #define ISP3X_MPFBC_FORCE_UPD BIT(31) 2141 #define ISP3X_MPFBC_EN_SHD BIT(31) 2142 2143 /* AXI_CONFIG_RD_CTRL */ 2144 #define ISP32L_AXI_CONF_RD_ST BIT(0) 2145 #define ISP32L_AXI_CONF_RD_ST_MODE BIT(1) 2146 #define ISP32L_AXI_CONF_RD_CLEAR BIT(4) 2147 #define ISP32L_AXI_CONF_RD_DIS BIT(7) 2148 #define ISP32L_WR_FRM_BUF_EN BIT(8) 2149 #define ISP32L_RD_FRM_BUF_EN BIT(9) 2150 #define ISP32L_WR_FRM_BUF_EN_SHD BIT(10) 2151 #define ISP32L_RD_FRM_BUF_EN_SHD BIT(11) 2152 #define ISP32L_FRM_BUF_FORCE_UPD BIT(16) 2153 #define ISP32L_WR_FRM_BUF_ERROR BIT(28) 2154 #define ISP32L_FRM_BUF_RW_CONFLICT BIT(29) 2155 #define ISP32L_AXI_CONF_FAIL BIT(30) 2156 #define ISP32L_AXI_CONF_RD_DONE BIT(31) 2157 2158 /* CSI2RX */ 2159 2160 /* DEBAYER */ 2161 2162 /* CAC */ 2163 #define ISP3X_CAC_EN BIT(0) 2164 #define ISP3X_CAC_BYPASS BIT(1) 2165 #define ISP3X_CAC_CLEAR BIT(2) 2166 #define ISP3X_CAC_CENTER_EN BIT(3) 2167 #define ISP3X_CAC_LUT_EN BIT(4) 2168 #define ISP3X_CAC_LUT_MODE(x) (((x) & 0x3) << 24) 2169 2170 /* CNR */ 2171 #define ISP3X_CNR_GLOBAL_GAIN_ALPHA_MAX GENMASK(15, 12) 2172 2173 /* YNR */ 2174 #define ISP3X_YNR_EN_SHD BIT(31) 2175 2176 /* BLS */ 2177 #define ISP32_BLS_BLS2_EN BIT(5) 2178 2179 /* BAY3D */ 2180 #define ISP32_BAY3D_BWSAVING(a) (((a) & 0x1) << 13) 2181 2182 /* GIC */ 2183 2184 /* LDCH */ 2185 #define ISP3X_LDCH_EN BIT(0) 2186 #define ISP3X_LDCH_LUT_MODE(x) (((x) & 0x3) << 24) 2187 #define ISP3X_LDCH_MAP_ERR BIT(29) 2188 2189 /* DHAZ */ 2190 #define ISP3X_DHAZ_ENMUX BIT(0) 2191 #define ISP3X_DHAZ_DC_EN BIT(4) 2192 #define ISP3X_DHAZ_HIST_EN BIT(8) 2193 #define ISP3X_DHAZ_HPARA_EN BIT(12) 2194 #define ISP3X_DHAZ_AIR_LC_EN BIT(16) 2195 #define ISP3X_DHAZ_ENHANCE_EN BIT(20) 2196 #define ISP3X_DHAZ_CKG_DIS BIT(24) 2197 #define ISP3X_DHAZ_SOFT_WR_EN BIT(25) 2198 #define ISP3X_DHAZ_ROUND_EN BIT(26) 2199 2200 /* HDRTMO */ 2201 2202 /* HDRDRC */ 2203 2204 /* HDRMGE */ 2205 2206 /* RAWNR */ 2207 2208 /* EXPD */ 2209 #define ISP32_EXPD_EN BIT(0) 2210 #define ISP32_EXPD_K_SHIFT(a) (((a) & 0xf) << 4) 2211 #define ISP32_EXPD_MODE(a) (((a) & 0x3) << 8) 2212 2213 #define ISP32_EXPD_DATA(a, b) ((a) | (b) << 16) 2214 2215 /* GAIN */ 2216 #define ISP3X_GAIN_2DDR_EN BIT(24) 2217 #define ISP3X_GAIN_2DDR_mode(a) (((a) & 0x3) << 25) 2218 2219 /* DPCC */ 2220 #define ISP3X_DPCC_WORKING BIT(30) 2221 2222 /* CCM */ 2223 #define ISP3X_CCM_HIGHY_ADJ_DIS BIT(1) 2224 #define ISP32_CCM_ENH_ADJ_EN BIT(2) 2225 #define ISP32_CCM_ASYM_ADJ_EN BIT(3) 2226 2227 /* 3DLUT */ 2228 #define ISP3X_3DLUT_EN BIT(0) 2229 #define ISP3X_3DLUT_LUT_MODE(x) (((x) & 0x3) << 24) 2230 #define ISP3X_3DLUT_LUT_ERR BIT(29) 2231 2232 /* DEBAYER */ 2233 2234 /* LSC */ 2235 #define ISP3X_LSC_ACTIVE_TABLE BIT(1) 2236 #define ISP3X_LSC_TABLE_ADDRESS_0 0 2237 #define ISP3X_LSC_TABLE_ADDRESS_153 153 2238 2239 #define ISP3X_LSC_LUT_EN BIT(1) 2240 #define ISP3X_LSC_SECTOR_16X16 BIT(2) 2241 #define ISP3X_LSC_PRE_RD_ST_MODE BIT(4) 2242 2243 /* RAWAE */ 2244 #define ISP3X_RAWAE_LITE_EN BIT(0) 2245 #define ISP3X_RAWAE_LITE_WNDNUM BIT(1) 2246 2247 #define ISP3X_RAWAE_BIG_EN BIT(0) 2248 #define ISP3X_RAWAE_BIG_WND0_NUM(x) (((x) & 0x3) << 1) 2249 #define ISP3X_RAWAE_BIG_WND1_EN BIT(4) 2250 #define ISP3X_RAWAE_BIG_WND2_EN BIT(5) 2251 #define ISP3X_RAWAE_BIG_WND3_EN BIT(6) 2252 #define ISP3X_RAWAE_BIG_WND4_EN BIT(7) 2253 2254 /* RAWHIST */ 2255 #define ISP3X_RAWHIST_EN BIT(0) 2256 #define ISP3X_RAWHIST_STEPSIZE(x) (((x) & 0x7) << 1) 2257 #define ISP3X_RAWHIST_MODE(x) (((x) & 0x7) << 8) 2258 #define ISP3X_RAWHIST_WATERLINE(x) (((x) & 0xfff) << 12) 2259 #define ISP3X_RAWHIST_DATASEL(x) (((x) & 0x7) << 24) 2260 #define ISP3X_RAWHIST_WND_NUM(x) (((x) & 0x3) << 28) 2261 2262 #define ISP3X_RAWHIST_RAM_EN BIT(31) 2263 2264 /* RAWAF */ 2265 #define ISP3X_RAWAF_EN BIT(0) 2266 #define ISP3X_RAWAF_GAMMA_EN BIT(1) 2267 #define ISP3X_RAWAF_GAUS_EN BIT(2) 2268 #define ISP3X_RAWAF_V1_FIR BIT(3) 2269 #define ISP3X_RAWAF_HIIR_EN BIT(4) 2270 #define ISP3X_RAWAF_VIIR_EN BIT(5) 2271 #define ISP3X_RAWAF_ACCU_8BIT BIT(6) 2272 #define ISP3X_RAWAF_LDG_EN BIT(7) 2273 #define ISP3X_RAWAF_H1_FV BIT(8) 2274 #define ISP3X_RAWAF_H2_FV BIT(9) 2275 #define ISP3X_RAWAF_V1_FV BIT(10) 2276 #define ISP3X_RAWAF_V2_FV BIT(11) 2277 #define ISP3X_RAWAF_AE_MODE BIT(12) 2278 #define ISP3X_RAWAF_Y_MODE BIT(13) 2279 2280 #define ISP3X_RAWAF_INELINE0(x) ((x) & 0xf) 2281 #define ISP3X_RAWAF_INTLINE0_EN BIT(27) 2282 2283 /* RAWAWB */ 2284 #define ISP32_RAWAWB_2DDR_PATH_EN BIT(23) 2285 #define ISP32_RAWAWB_2DDR_PATH_DS BIT(27) 2286 #define ISP32_RAWAWB_2DDR_PATH_ERR BIT(29) 2287 2288 #endif /* _RKISP_REGS_V3X_H */ 2289