xref: /rockchip-linux_mpp/mpp/hal/vpu/vp8e/hal_vp8e_base.h (revision 437bfbeb9567cca9cd9080e3f6954aa9d6a94f18)
1 /*
2  * Copyright 2015 Rockchip Electronics Co. LTD
3  *
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at
7  *
8  *      http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  */
16 
17 #ifndef __HAL_VP8E_BASE_H__
18 #define __HAL_VP8E_BASE_H__
19 
20 #include "mpp_device.h"
21 
22 #include "vp8e_syntax.h"
23 #include "vepu_common.h"
24 #include "hal_enc_task.h"
25 #include "hal_vp8e_entropy.h"
26 
27 #define VP8_PROB_COUNT_MV_OFFSET     (222)
28 #define VP8_PROB_COUNT_BUF_SIZE      (244*2)
29 
30 #define mask_7b         (RK_U32)0x0000007F
31 
32 #define INPUT_YUV420PLANAR         0x00
33 #define INPUT_YUV420SEMIPLANAR     0x01
34 #define INPUT_YUYV422INTERLEAVED   0x02
35 #define INPUT_UYVY422INTERLEAVED   0x03
36 #define INPUT_RGB565               0x04
37 #define INPUT_RGB555               0x05
38 #define INPUT_RGB444               0x06
39 #define INPUT_RGB888               0x07
40 #define INPUT_RGB101010            0x08
41 #define INPUT_YUYV422TILED         0x09
42 
43 #define IVF_HDR_BYTES       32
44 #define IVF_FRM_BYTES       12
45 
46 typedef enum vp8_frm_type_e {
47     VP8E_FRM_KEY = 0,
48     VP8E_FRM_P,
49 } Vp8FrmType;
50 
51 typedef struct vp8e_hal_vpu_buffers_t {
52     MppBufferGroup  hw_buf_grp;
53 
54     MppBuffer   hw_rec_buf[2];
55     MppBuffer   hw_luma_buf;
56     MppBuffer   hw_cbcr_buf[2];
57     MppBuffer   hw_cabac_table_buf;
58     MppBuffer   hw_size_table_buf;
59     MppBuffer   hw_segment_map_buf;
60     MppBuffer   hw_prob_count_buf;
61     MppBuffer   hw_mv_output_buf;
62     MppBuffer   hw_out_buf;
63 } Vp8eVpuBuf;
64 
65 #define PENALTY_TABLE_SIZE 128
66 
67 /**
68  * pps definition
69  */
70 
71 #define SGM_CNT 4
72 
73 typedef struct sgm_t {
74     RK_U8   map_modified;
75     RK_S32  id_cnt[SGM_CNT];
76 } Sgm;
77 
78 typedef struct {
79     Sgm     sgm;
80     RK_S32  qp;
81     RK_U8   segment_enabled;
82     RK_S32  qp_sgm[SGM_CNT];
83     RK_S32  level_sgm[SGM_CNT];
84 } Pps;
85 
86 typedef struct {
87     Pps    *store;
88     RK_S32 size;
89     Pps    *pps;
90     Pps    *prev_pps;
91     RK_S32 qp_sgm[SGM_CNT];
92     RK_S32 level_sgm[SGM_CNT];
93 } Vp8ePps;
94 
95 
96 /**
97  * QP definition
98  */
99 
100 #define QINDEX_RANGE    128
101 
102 typedef struct {
103     RK_S32 quant[2];
104     RK_S32 zbin[2];
105     RK_S32 round[2];
106     RK_S32 dequant[2];
107 } Vp8eQp;
108 
109 /**
110  * sps definition
111  */
112 
113 typedef struct vp8e_sps_t {
114     RK_S32 pic_width_in_mbs;
115     RK_S32 pic_height_in_mbs;
116     RK_S32 pic_width_in_pixel;
117     RK_S32 pic_height_in_pixel;
118     RK_S32 horizontal_scaling;
119     RK_S32 vertical_scaling;
120     RK_S32 color_type;
121     RK_S32 clamp_type;
122     RK_S32 dct_partitions;
123     RK_S32 partition_cnt;
124     RK_S32 profile;
125     RK_S32 filter_type;
126     RK_S32 filter_level;
127     RK_S32 filter_sharpness;
128     RK_S32 quarter_pixel_mv;
129     RK_S32 split_mv;
130     RK_S32 sing_bias[3];
131 
132     RK_S32 auto_filter_level;
133     RK_S32 auto_filter_sharpness;
134     RK_U8  filter_delta_enable;
135     RK_S32 mode_delta[4];
136     RK_S32 old_mode_delta[4];
137     RK_S32 ref_delta[4];
138     RK_S32 old_ref_delta[4];
139     RK_S32 refresh_entropy;
140 } Vp8eSps;
141 
142 /**
143  * entropy definition
144  */
145 
146 typedef struct vp8e_hal_entropy_t {
147     RK_S32 skip_false_prob;
148     RK_S32 intra_prob;
149     RK_S32 last_prob;
150     RK_S32 gf_prob;
151     RK_S32 kf_y_mode_prob[4];
152     RK_S32 y_mode_prob[4];
153     RK_S32 kf_uv_mode_prob[3];
154     RK_S32 uv_mode_prob[3];
155     RK_S32 kf_b_mode_prob[10][10][9];
156     RK_S32 b_mode_prob[9];
157     RK_S32 coeff_prob[4][8][3][11];
158     RK_S32 old_coeff_prob[4][8][3][11];
159     RK_S32 mv_ref_prob[4];
160     RK_S32 mv_prob[2][19];
161     RK_S32 old_mv_prob[2][19];
162     RK_S32 sub_mv_partprob[3];
163     RK_S32 sub_mv_ref_prob[5][3];
164     RK_S32 default_coeff_prob_flag;
165     RK_S32 update_coeff_prob_flag;
166     RK_S32 segment_prob[3];
167 } Vp8eHalEntropy;
168 
169 /**
170  * picture definition
171  */
172 
173 #define REF_FRAME_COUNT 3
174 
175 typedef struct {
176     RK_S32 lum_width;
177     RK_S32 lum_height;
178     RK_S32 ch_width;
179     RK_S32 ch_height;
180     RK_U32 lum;
181     RK_U32 cb;
182 } HalVp8ePic;
183 
184 typedef struct hal_vp8e_refpic_t {
185     HalVp8ePic picture;
186     Vp8eHalEntropy *entropy;
187     RK_S32 poc;
188 
189     RK_U8 i_frame;
190     RK_U8 p_frame;
191     RK_U8 show;
192     RK_U8 ipf;
193     RK_U8 arf;
194     RK_U8 grf;
195     RK_U8 search;
196     struct hal_vp8e_refpic_t *refPic;
197 } HalVp8eRefPic;
198 
199 typedef struct {
200     RK_S32 size;       /* Amount of allocated reference pictures */
201     HalVp8ePic    input;      /* Input picture */
202     HalVp8eRefPic ref_pic[REF_FRAME_COUNT + 1]; /* Reference picture store */
203     HalVp8eRefPic ref_pic_list[REF_FRAME_COUNT]; /* Reference picture list */
204     HalVp8eRefPic *cur_pic;    /* Pointer to picture under reconstruction */
205     HalVp8eRefPic *last_pic;   /* Last picture */
206 } HalVp8ePicBuf;
207 
208 typedef struct {
209     RK_U32 irq_disable;
210     RK_U32 mbs_in_col;
211     RK_U32 mbs_in_row;
212     RK_U32 rounding_ctrl;
213     RK_U32 frame_coding_type;
214     RK_U32 coding_type;
215     RK_U32 pixels_on_row;
216     RK_U32 x_fill;
217     RK_U32 y_fill;
218     RK_U32 filter_disable;
219     RK_U32 enable_cabac;
220     RK_U32 input_format;
221     RK_U32 input_rotation;
222     RK_U32 output_strm_base;
223     RK_U32 output_strm_offset;
224     RK_U32 output_strm_size;
225     RK_U32 first_free_bit;
226     RK_U32 strm_start_msb;
227     RK_U32 strm_start_lsb;
228     RK_U32 size_tbl_base;
229     RK_U32 int_slice_ready;
230     RK_U32 rec_write_disable;
231     RK_U32 recon_img_id;
232     RK_U32 internal_img_lum_base_w;
233     RK_U32 internal_img_chr_base_w;
234     RK_U32 internal_img_lum_base_r[2];
235     RK_U32 internal_img_chr_base_r[2];
236     RK_U32 input_lum_base;
237     RK_U32 input_lum_offset;
238     RK_U32 input_cb_base;
239     RK_U32 input_cb_offset;
240     RK_U32 input_cr_base;
241     RK_U32 input_cr_offset;
242     RK_U32 cp_distance_mbs; //TODO maybe useless
243     RK_U32 rlc_count;    //TODO read from reg
244     RK_U32 qp_sum;   //TODO read from reg
245     RK_U8  dmv_penalty[PENALTY_TABLE_SIZE];
246     RK_U8  dmv_qpel_penalty[PENALTY_TABLE_SIZE];
247     RK_U32 input_luma_base_offset;
248     RK_U32 input_chroma_base_offset;
249     RK_U32 disable_qp_mv;
250     RK_U32 vs_next_luma_base;
251     RK_U32 vs_mode;
252     RK_U32 asic_cfg_reg;
253     RK_S32 intra_16_favor;
254     RK_S32 prev_mode_favor;
255     RK_S32 inter_favor;
256     RK_S32 skip_penalty;
257     RK_S32 golden_penalty;
258     RK_S32 diff_mv_penalty[3];
259     RK_U32 mad_count;
260     RK_U32 cir_start;
261     RK_U32 cir_interval;
262     RK_U32 intra_area_top;
263     RK_U32 intra_area_left;
264     RK_U32 intra_area_bottom;
265     RK_U32 intra_area_right;
266     RK_U32 roi1_top;
267     RK_U32 roi1_left;
268     RK_U32 roi1_bottom;
269     RK_U32 roi1_right;
270     RK_U32 roi2_top;
271     RK_U32 roi2_left;
272     RK_U32 roi2_bottom;
273     RK_U32 roi2_right;
274     RK_S32 roi1_delta_qp;
275     RK_S32 roi2_delta_qp;
276     RK_U32 mv_output_base;
277     RK_U32 cabac_tbl_base;
278     RK_U32 prob_count_base;
279     RK_U32 segment_map_base;
280     RK_U16 rgb_coeff_a;
281     RK_U16 rgb_coeff_b;
282     RK_U16 rgb_coeff_c;
283     RK_U16 rgb_coeff_e;
284     RK_U16 rgb_coeff_f;
285     RK_U8  r_mask_msb;
286     RK_U8  g_mask_msb;
287     RK_U8  b_mask_msb;
288     RK_U32 partition_Base[8];
289     RK_U32 partition_offset[8];
290     RK_U16 y1_quant_dc[4];
291     RK_U16 y1_quant_ac[4];
292     RK_U16 y2_quant_dc[4];
293     RK_U16 y2_quant_ac[4];
294     RK_U16 ch_quant_dc[4];
295     RK_U16 ch_quant_ac[4];
296     RK_U16 y1_zbin_dc[4];
297     RK_U16 y1_zbin_ac[4];
298     RK_U16 y2_zbin_dc[4];
299     RK_U16 y2_zbin_ac[4];
300     RK_U16 ch_zbin_dc[4];
301     RK_U16 ch_zbin_ac[4];
302     RK_U8  y1_round_dc[4];
303     RK_U8  y1_round_ac[4];
304     RK_U8  y2_round_dc[4];
305     RK_U8  y2_round_ac[4];
306     RK_U8  ch_round_dc[4];
307     RK_U8  ch_round_ac[4];
308     RK_U16 y1_dequant_dc[4];
309     RK_U16 y1_dequant_ac[4];
310     RK_U16 y2_dequant_dc[4];
311     RK_U16 y2_dequant_ac[4];
312     RK_U16 ch_dequant_dc[4];
313     RK_U16 ch_dequant_ac[4];
314     RK_U32 segment_enable;
315     RK_U32 segment_map_update;
316     RK_U32 mv_ref_idx[2];
317     RK_U32 ref2_enable;
318     RK_U32 bool_enc_value;
319     RK_U32 bool_enc_value_bits;
320     RK_U32 bool_enc_range;
321     RK_U32 dct_partitions;
322     RK_U32 filter_level[4];
323     RK_U32 filter_sharpness;
324     RK_U32 intra_mode_penalty[4];
325     RK_U32 intra_b_mode_penalty[10];
326     RK_U32 zero_mv_favor;
327     RK_U32 split_mv_mode;
328     RK_U32 split_penalty[4];
329     RK_S32 lf_ref_delta[4];
330     RK_S32 lf_mode_delta[4];
331 } Vp8eHwCfg;
332 
333 typedef struct hal_vp8e_ctx_s {
334     Vp8eFeedback     feedback;
335     MppDev           dev;
336 
337     void             *regs;
338     void             *buffers;
339     RK_U32           reg_size;
340 
341     MppEncCfgSet     *cfg;
342 
343     Vp8eSps          sps;
344     Vp8ePps          ppss;
345     //TODO remove vp8_rc
346     Vp8eRc           *rc;
347     Vp8eHwCfg        hw_cfg;
348     Vp8eHalEntropy   entropy;
349     HalVp8ePicBuf    picbuf;
350     Vp8ePutBitBuf    bitbuf[4];
351     Vp8eQp           qp_y1[QINDEX_RANGE];
352     Vp8eQp           qp_y2[QINDEX_RANGE];
353     Vp8eQp           qp_ch[QINDEX_RANGE];
354     RK_U32           prev_frame_lost;
355     RK_U32           *p_out_buf[9];
356     RK_U32           stream_size[9];
357     RK_U32           frame_size;
358 
359     RK_U32           buffer_ready;
360     RK_U32           ivf_hdr_rdy;
361     RK_U64           frame_cnt;
362     RK_U32           last_frm_intra;
363     Vp8FrmType       frame_type;
364 
365     RK_U32           mb_per_frame;
366     RK_U32           mb_per_row;
367     RK_U32           mb_per_col;
368     VepuStrideCfg    stride_cfg;
369 } HalVp8eCtx;
370 
371 #ifdef  __cplusplus
372 extern "C" {
373 #endif
374 
375 MPP_RET hal_vp8e_update_buffers(void *hal, HalEncTask *task);
376 MPP_RET hal_vp8e_enc_strm_code(void *hal, HalEncTask *info);
377 MPP_RET hal_vp8e_init_qp_table(void *hal);
378 MPP_RET hal_vp8e_setup(void *hal);
379 MPP_RET hal_vp8e_buf_free(void *hal);
380 void write_ivf_header(void *hal, RK_U8 *dst);
381 #ifdef  __cplusplus
382 }
383 #endif
384 
385 #endif /*__HAL_VP*E_BASE_H__*/
386