xref: /utopia/UTPA2-700.0.x/modules/mvop/hal/k6/mvop/halMVOP.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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94 
95 #ifndef _HAL_MVOP_H_
96 #define _HAL_MVOP_H_
97 
98 
99 //-------------------------------------------------------------------------------------------------
100 //  Macro and Define
101 //-------------------------------------------------------------------------------------------------
102 #define STB_DC                  0   //0 for TV series MVOP; 1 for STB DC.
103 #define STB_DC_MODE
104 
105 //Information from miu owner: miu group5 should be 256bits, less than group5 are 128bits.
106 #define MVOP_MIU_CLIENT_MAIN    MIU_CLIENT_MVOP_256BIT_R
107 #define MVOP_MIU_CLIENT_SUB     MIU_CLIENT_MVOP1_256BIT_R
108 
109 
110 #define _MVOP_128BIT_BUS        0//128-bit MIU bus
111 #define _MVOP_64BIT_BUS         1// 64-bit MIU bus
112 #define MVOP_BUS_WIDTH          _MVOP_128BIT_BUS
113 
114 #define HAL_MVOP_MODULE_CNT     2
115 #if (HAL_MVOP_MODULE_CNT >= 2)
116 #define MVOP_SUPPORT_SUB        1
117 #else
118 #define MVOP_SUPPORT_SUB        0
119 #endif
120 #if (HAL_MVOP_MODULE_CNT >= 3)
121 #define MVOP_SUPPORT_3RD        1
122 #else
123 #define MVOP_SUPPORT_3RD        0
124 #endif
125 
126 #define HAL_MFDEC_MODULE_CNT     1
127 #if (HAL_MFDEC_MODULE_CNT >= 2)
128 #define MVOP_SUPPORT_MFDEC1      1
129 #else
130 #define MVOP_SUPPORT_MFDEC1      0
131 #endif
132 #define NO_MVOP_PATCH           1
133 #define ENABLE_3D_LR_MODE           1 //Enable 3D L/R feature
134 #define SUPPORT_3DLR_INST_VBLANK    0
135 #define SUPPORT_3DLR_ALT_SBS        1
136 
137 #define SUPPORT_EVD_MODE        1
138 #define SUPPORT_VP9_MODE        1
139 
140 #if (STB_DC == 0)
141 #define MVOP_BASE_ADD_BITS          31  //29 - 1 (MSB is signed bit) + 3 (unit in 8-byte)
142 #endif
143 
144 #define SUPPORT_KERNAL_STR            1
145 
146 #define MVOP_BANK_REGNUM 0x80UL
147 #define MVOP_CLK_REGNUM 0x10UL
148 
149 //-------------------------------------------------------------------------------------------------
150 //  Type and Structure
151 //-------------------------------------------------------------------------------------------------
152 typedef enum
153 {
154     HALMVOP_SYNCMODE,
155     HALMVOP_FREERUNMODE,
156     HALMVOP_27MHZ = 27000000ul,
157     HALMVOP_54MHZ = 54000000ul,
158     HALMVOP_320MHZ = 320000000ul,
159     HALMVOP_108MHZ = 108000000ul,
160     HALMVOP_123MHZ = 123000000ul,
161     HALMVOP_144MHZ = 144000000ul,
162     HALMVOP_160MHZ = 160000000ul,
163     HALMVOP_172MHZ = 172000000ul,
164     HALMVOP_192MHZ = 192000000ul,
165     HALMVOP_CLK_MIU,
166     HALMVOP_NOT_SUPPORT
167 }HALMVOPFREQUENCY;
168 
169 typedef enum
170 {
171     E_MVOP_MASK_DB_REG,
172     E_MVOP_EN_DB_REG,
173     E_MVOP_DEBUG_SEL,
174     E_MVOP_UPDATE_SEL,
175     E_MVOP_RST_START_SEL,
176     E_MVOP_SC_VSYNC_SEL,
177     E_MVOP_READ_IP_BASE_SEL,
178     E_MVOP_CHKSUM_422_SWAP,
179     E_MVOP_CHKSUM_FULL_C,
180     E_MVOP_OFF_LATCH_CRC,
181     E_MVOP_SEL_OP_FIELD ,
182     E_MVOP_INV_OP_FIELD,
183     E_MVOP_INV_OP_VS
184 }MVOPMSAKDBREGCTRL;
185 
186 //for Kappa patch
187 typedef enum
188 {
189     E_MVOP_DEB2MVD_FRAME_MODE,
190     E_MVOP_DEB2MVD_FIELD_INV,
191     E_MVOP_SEQ_FROM_MVD,
192     E_MVOP_SIZE_FROM_MVD
193 }MVOPDEB2MVDFRAMECTRL;
194 
195 typedef enum
196 {
197     E_MVOP_BASE_FROM_IP,
198     E_MVOP_SRC_FROM_MVD,
199     E_MVOP_FIELD_FROM_MVD,
200     E_MVOP_FIELD_FROM_MVD_INV,
201     E_MVOP_PITCH_FROM_IP,
202     E_MVOP_FMT_FROM_MVD,
203     E_MVOP_FD_MASK_CLR,
204     E_MVOP_FD_MASK_INV
205 #if (NO_MVOP_PATCH == 0)
206   , E_MVOP_SEQ_FROM_MVD_PATCH,
207     E_MVOP_SIZE_FROM_MVD_PATCH
208 #endif
209 }MVOPBASEFROMIPCTRL;
210 
211 typedef struct
212 {
213     MS_U8 u8Gp:4;
214     MS_U8 u8BitPos:4;
215 }HALMVOPMIUCLIENTINFO;
216 
217 typedef enum
218 {
219     E_MVOP_SEL_MIU0         = 0,
220     E_MVOP_SEL_MIU1         = 0x01,
221     E_MVOP_SEL_MIU2         = 0x02,
222     E_MVOP_SEL_MIU3         = 0x03,
223     E_MVOP_SEL_NONE         = 0xFF,
224 
225 } HALMVOPMIUSEL;
226 
227 typedef struct
228 {
229     MS_U16 MVOP_BANK[3][0x80];
230     MS_U16 CLK_BANK[0x10];
231 
232 }MVOP_STR_SAVE_AREA;
233 
234 typedef enum
235 {
236     E_MVOP_POWER_SUSPEND     = 1,    // State is backup in DRAM, components power off.
237     E_MVOP_POWER_RESUME      = 2,    // Resume from Suspend or Hibernate mode
238     E_MVOP_POWER_MECHANICAL  = 3,    // Full power off mode. System return to working state only after full reboot
239     E_MVOP_POWER_SOFT_OFF    = 4,    // The system appears to be off, but some components remain powered for trigging boot-up.
240 } EN_MVOP_POWER_MODE;
241 
242 typedef struct
243 {
244     MVOP_DrvMirror enMirror;
245     EN_MVOP_Output_3D_TYPE en3D;
246     MS_BOOL bHSK;
247     MS_BOOL bXCGenTiming;
248     MVOP_SetCropPos stCropSt;
249     MVOP_SetImageWH stCropSize;
250     MS_BOOL bOneField;
251     MS_BOOL b2P;
252     MS_BOOL bForceP;
253     MS_U32 u32Framerate;
254 }MVOP_FeatureMdb;
255 
256 typedef struct
257 {
258     MS_U32 u32RegYoffset;
259     MS_U32 u32RegUVoffset;
260     MS_U16 u16RegHsize;
261     MS_U16 u16RegVsize;
262     MS_U16 u16RegStrip;
263     MS_BOOL bReg422;
264     MS_BOOL bRegPMode;
265     MS_BOOL bRegDramContd;
266     MS_BOOL bRegField;
267     MS_BOOL bReg422Pack;
268     MS_BOOL bRegRGB;
269     MS_BOOL bRegRGBType;
270     MS_U8 u8RegDSIndex;
271     MS_BOOL u8RegFDMask;
272     MS_BOOL bRegMfdecEn;
273     MS_U32 u32RegBitenAdd;
274 }MVOP_RegInputMdb;
275 
276 typedef struct
277 {
278     MS_U32 u32RegVtt;
279     MS_U32 u32RegHtt;
280     MS_U16 u16RegVImgst;
281     MS_U16 u16RegHImgst;
282     MS_BOOL bRegInterlace;
283     MS_U8 u8RegFPS;
284     MS_U16 u16RegExpFPS;
285     MS_U16 u16RegHFreq;
286     MS_U16 u16RegWidth;
287     MS_U16 u16RegHeight;
288     MS_BOOL bRegHDup;
289     MS_BOOL bReg2P;
290     HALMVOPFREQUENCY enRegCLOCK;
291     MS_U16 u16RegVsForward;
292 }MVOP_RegOutputMdb;
293 typedef struct
294 {
295     MS_BOOL bMFDEC_EN;
296     MS_U8   u8MFDEC_ID;
297     MS_U32  u32UNCOMPRESS_MODE;
298     MS_PHY  u32BITLEN_FB_ADDR;         ///<0:8 bit EL y address, 1:8 bit EL uv address
299     MS_U8   u8BITLEN_FB_MIU;           ///<0:8 bit EL y address, 1:8 bit EL uv address
300     MS_U32  u32BITLEN_FB_PITCH;
301     MS_BOOL bBITLEN_SHT_8;
302 }HALMVOPMFDECINFO;
303 
304 //-------------------------------------------------------------------------------------------------
305 //  Function and Variable
306 //-------------------------------------------------------------------------------------------------
307 void HAL_MVOP_RegSetBase(MS_VIRT u32Base);
308 void HAL_MVOP_Init(void);
309 void HAL_MVOP_SetFieldInverse(MS_BOOL b2MVD, MS_BOOL b2IP);
310 void HAL_MVOP_SetChromaWeighting(MS_BOOL bEnable);
311 void HAL_MVOP_LoadReg(void);
312 void HAL_MVOP_SetMIUReqMask(MS_BOOL bEnable);
313 void HAL_MVOP_Enable(MS_BOOL bEnable, MS_U8 u8Framerate);
314 MS_BOOL HAL_MVOP_GetEnableState(void);
315 HALMVOPFREQUENCY HAL_MVOP_GetMaxFreerunClk(void);
316 HALMVOPFREQUENCY HAL_MVOP_Get4k2kClk(void);
317 void HAL_MVOP_SetFrequency(HALMVOPFREQUENCY enFrequency);
318 HALMVOPFREQUENCY HAL_MVOP_GetMaximumClk(void);
319 HALMVOPFREQUENCY HAL_MVOP_GetCurrentClk(void);
320 void HAL_MVOP_Rst(void);
321 void HAL_MVOP_SetBlackBG(void);
322 void HAL_MVOP_SetOutputInterlace(MS_BOOL bEnable, MS_U16 u16ECOVersion);
323 void HAL_MVOP_SetCropWindow(MVOP_InputCfg *pparam);
324 void HAL_MVOP_SetInputMode( VOPINPUTMODE mode, MVOP_InputCfg *pparam, MS_U16 u16ECOVersion );
325 void HAL_MVOP_EnableUVShift(MS_BOOL bEnable);
326 void HAL_MVOP_SetEnable60P(MS_BOOL bEnable);
327 void HAL_MVOP_SetEnable4k2kClk(MS_BOOL bEnable);
328 void HAL_MVOP_SetEnableFixClk(MS_BOOL bEnable);
329 void HAL_MVOP_SetVSyncMode(MS_U8 u8Mode);
330 void HAL_MVOP_SetOutputTiming( MVOP_Timing *ptiming );
331 void HAL_MVOP_SetDCClk(MS_U8 clkNum, MS_BOOL bEnable);
332 void HAL_MVOP_SetSynClk(MVOP_Timing *ptiming);
333 void HAL_MVOP_SetMonoMode(MS_BOOL bEnable);
334 void HAL_MVOP_SetH264HardwireMode(MS_U16 u16ECOVersion);
335 void HAL_MVOP_SetRMHardwireMode(MS_U16 u16ECOVersion);
336 void HAL_MVOP_SetJpegHardwireMode(void);
337 void HAL_MVOP_SetEVDHardwireMode(MS_U16 u16ECOVersion);
338 void HAL_MVOP_SetVP9HardwireMode(MS_U16 u16ECOVersion);
339 void HAL_MVOP_SetEVDFeature(MVOP_DevID eID, MVOP_EVDFeature* stEVDInput);
340 void HAL_MVOP_SetPattern(MVOP_Pattern enMVOPPattern);
341 MS_BOOL HAL_MVOP_SetTileFormat(MVOP_TileFormat eTileFmt);
342 MS_BOOL HAL_MVOP_SetRgbFormat(MVOP_RgbFormat eRgbFmt);
343 MS_BOOL HAL_MVOP_GetSupportRgbFormat(MVOP_RgbFormat eRgbFmt);
344 MS_BOOL HAL_MVOP_Enable3DLR(MS_BOOL bEnable);
345 MS_BOOL HAL_MVOP_Get3DLRMode(void);
346 MS_BOOL HAL_MVOP_GetTimingInfoFromRegisters(MVOP_TimingInfo_FromRegisters *mvopTimingInfo);
347 void HAL_MVOP_SetHorizontallMirrorMode(MS_BOOL bEnable);
348 void HAL_MVOP_SetVerticalMirrorMode(MS_BOOL bEnable);
349 void HAL_MVOP_SetYUVBaseAdd(MS_PHY u32YOffset, MS_PHY u32UVOffset, MS_BOOL bProgressive, MS_BOOL b422pack);
350 void HAL_MVOP_SetRepeatField(MVOP_RptFldMode eMode);
351 void HAL_MVOP_SubSetFDMaskFromMVD(MS_BOOL bEnable);
352 void HAL_MVOP_EnableFreerunMode(MS_BOOL bEnable);
353 MS_PHY HAL_MVOP_GetYBaseAdd(void);
354 MS_PHY HAL_MVOP_GetUVBaseAdd(void);
355 MS_BOOL HAL_MVOP_Set3DLRAltOutput(MS_BOOL bEnable);
356 MS_BOOL HAL_MVOP_Set3DLRAltOutput_VHalfScaling(MS_BOOL bEnable);
357 MS_BOOL HAL_MVOP_Set3DLRAltSBSOutput(MS_BOOL bEnable);
358 MS_BOOL HAL_MVOP_Get3DLRAltOutput(void);
359 MS_BOOL HAL_MVOP_Get3DLRAltSBSOutput(void);
360 EN_MVOP_Output_3D_TYPE HAL_MVOP_GetOutput3DType(void);
361 MS_BOOL HAL_MVOP_Set3DLR2ndCfg(MS_BOOL bEnable);
362 MS_BOOL HAL_MVOP_Get3DLR2ndCfg(void);
363 MVOP_DrvMirror HAL_MVOP_GetMirrorMode(MVOP_DevID eID);
364 MS_BOOL HAL_MVOP_SetVerDup(MS_BOOL bEnable);
365 MS_BOOL HAL_MVOP_GetVerDup(void);
366 MS_BOOL HAL_MVOP_SetVerx4Dup(MS_BOOL bEnable);
367 MS_BOOL HAL_MVOP_GetVerx4Dup(void);
368 MS_BOOL HAL_MVOP_SetHorx4Dup(MS_BOOL bEnable);
369 MS_BOOL HAL_MVOP_GetHorx4Dup(void);
370 MS_BOOL HAL_MVOP_SetYUVBaseAddMultiView(MVOP_BaseAddInput *stBaseAddInfo);
371 MS_BOOL HAL_MVOP_SetEVDYUVBaseAdd(MVOP_EVDBaseAddInput *stEVDBaseAddInfo);
372 MS_PHY HAL_MVOP_GetYBaseAddMultiView(MVOP_3DView eView);
373 MS_PHY HAL_MVOP_GetUVBaseAddMultiView(MVOP_3DView eView);
374 MS_U16 HAL_MVOP_GetTopVStart(MVOP_DevID eID);
375 MS_U16 HAL_MVOP_GetBottomVStart(MVOP_DevID eID);
376 MS_U16 HAL_MVOP_GetVCount(MVOP_DevID eID);
377 MS_BOOL HAL_MVOP_SetVC1RangeMap(MVOP_DevID eID, MVOP_VC1RangeMapInfo *stVC1RangeMapInfo);
378 MS_BOOL HAL_MVOP_Set420BWSaveMode(MS_BOOL bEnable);
379 void HAL_MVOP_SetRptPreVsyncFrame(MVOP_DevID eID, MS_BOOL bEnable);
380 void HAL_MVOP_PowerStateSuspend(void);
381 MVOP_HSMode HAL_MVOP_GetHandShakeMode(MVOP_DevID eID);
382 MS_BOOL HAL_MVOP_CheckSTCCW(void);
383 MS_BOOL HAL_MVOP_GetIsMiuIPControl(HALMVOPMIUCLIENTINFO stInfo);
384 void HAL_MVOP_SelMIU(MVOP_DevID eDevID, HALMVOPMIUSEL eMiuMSB0, HALMVOPMIUSEL eMiuMSB1, HALMVOPMIUSEL eMiuLSB0, HALMVOPMIUSEL eMiuLSB1);
385 MS_BOOL HAL_MVOP_GetIsOnlyMiuIPControl(void);
386 void HAL_MVOP_SetDCSRAMClk(MS_U8 clkNum, MS_BOOL bEnable);
387 void HAL_MVOP_SetEnable4k2k2P(MS_BOOL bEnable);
388 MS_BOOL HAL_MVOP_Get4k2k2PMode(MVOP_DevID eID);
389 HALMVOPFREQUENCY HAL_MVOP_SetDefaultClk(MVOP_DevID eDevID);
390 void HAL_MVOP_GetMaxFramerate(MVOP_DevID eDevID, MVOP_GetMaxFps* stStreamInfo);
391 MS_BOOL HAL_MVOP_GetIsSendingData(MVOP_DevID eDevID);
392 void HAL_MVOP_SetTimingFromXC(MVOP_DevID eID, MS_BOOL bEnable);
393 void HAL_MVOP_ResetReg(MVOP_DevID eDevID, MS_U16 u16ECONumber);
394 MS_BOOL HAL_MVOP_GetIsCurrentHSK(MVOP_DevID eID);
395 MS_BOOL HAL_MVOP_GetIsCurrentXCGenTiming(MVOP_DevID eID);
396 HALMVOPFREQUENCY HAL_MVOP_SetFixClk(MVOP_DevID eID, MS_U32 u32MVOPClk);
397 void HAL_MVOP_SetHandShakeMode(MVOP_DevID eID, MS_BOOL bEnable, MS_U8 u8Framerate);
398 void HAL_MVOP_SetCropforXC(MVOP_DevID eID, MVOP_XCGetCrop* stXCCrop, MS_U16 u16Width, MS_U16 u16Height);
399 MS_U16 HAL_MVOP_ReadBank(MVOP_DevID eID ,MS_U16 u16Length);
400 void HAL_MVOP_WriteBank(MVOP_DevID eID ,MS_U16 u16Length,MS_U16 u16Data);
401 MS_U16 HAL_MVOP_ReadClkBank(MS_U16 u16Length);
402 void HAL_MVOP_WriteClkBank(MS_U16 u16Length,MS_U16 u16Data);
403 void HAL_MVOP_SetInterlaceType(MVOP_DevID eDevID, MS_U16 u16ECONumber, MS_U8 u8Interlace);
404 MS_BOOL HAL_MVOP_GetIsMVOPSupportBLKBackground(MVOP_DevID eID);
405 void HAL_MVOP_SetSramPower(MVOP_DevID eID ,MS_BOOL bEnable);
406 void HAL_MVOP_Exit(MVOP_DevID eID);
407 void HAL_MVOP_UVSwapEnable(MVOP_DevID eID, MS_BOOL bEnable);
408 void HAL_MVOP_SetECONumber(MS_U16 u16ECOVersion);
409 void HAL_MVOP_SetMFDECInfo(MVOP_DevID eID, HALMVOPMFDECINFO *pMFDECInfo);
410 void HAL_MVOP_LOAD_MFDEC_TABLE(MS_U8 mfdec_id);
411 
412 //for sub mvop
413 void HAL_MVOP_SubRegSetBase(MS_VIRT u32Base);
414 void HAL_MVOP_SubInit(void);
415 void HAL_MVOP_SubSetFieldInverse(MS_BOOL b2MVD, MS_BOOL b2IP);
416 void HAL_MVOP_SubSetChromaWeighting(MS_BOOL bEnable);
417 void HAL_MVOP_SubLoadReg(void);
418 void HAL_MVOP_SubSetMIUReqMask(MS_BOOL bEnable);
419 void HAL_MVOP_SubRst(void);
420 void HAL_MVOP_SubEnable(MS_BOOL bEnable, MS_U8 u8Framerate);
421 MS_BOOL HAL_MVOP_SubGetEnableState(void);
422 HALMVOPFREQUENCY HAL_MVOP_SubGetMaxFreerunClk(void);
423 HALMVOPFREQUENCY HAL_MVOP_SubGet4k2kClk(void);
424 void HAL_MVOP_SubSetFrequency(HALMVOPFREQUENCY enFrequency);
425 void HAL_MVOP_SubSetOutputInterlace(MS_BOOL bEnable, MS_U16 u16ECOVersion);
426 void HAL_MVOP_SubSetPattern(MVOP_Pattern enMVOPPattern);
427 MS_BOOL HAL_MVOP_SubSetTileFormat(MVOP_TileFormat eTileFmt);
428 MS_BOOL HAL_MVOP_SubSetRgbFormat(MVOP_RgbFormat eRgbFmt);
429 MS_BOOL HAL_MVOP_SubEnable3DLR(MS_BOOL bEnable);
430 MS_BOOL HAL_MVOP_SubGet3DLRMode(void);
431 void HAL_MVOP_SubSetBlackBG(void);
432 void HAL_MVOP_SubSetCropWindow(MVOP_InputCfg *pparam);
433 void HAL_MVOP_SubSetInputMode( VOPINPUTMODE mode, MVOP_InputCfg *pparam, MS_U16 u16ECOVersion );
434 void HAL_MVOP_SubEnableUVShift(MS_BOOL bEnable);
435 void HAL_MVOP_SubSetEnable60P(MS_BOOL bEnable);
436 void HAL_MVOP_SubSetEnable4k2kClk(MS_BOOL bEnable);
437 void HAL_MVOP_SubSetOutputTiming( MVOP_Timing *ptiming );
438 void HAL_MVOP_SubSetDCClk(MS_U8 clkNum, MS_BOOL bEnable);
439 void HAL_MVOP_SubSetDCSRAMClk(MS_U8 clkNum, MS_BOOL bEnable);
440 void HAL_MVOP_SubSetSynClk(MVOP_Timing *ptiming);
441 void HAL_MVOP_SubSetMonoMode(MS_BOOL bEnable);
442 void HAL_MVOP_SubSetH264HardwireMode(MS_U16 u16ECOVersion);
443 void HAL_MVOP_SubSetRMHardwireMode(MS_U16 u16ECOVersion);
444 void HAL_MVOP_SubSetJpegHardwireMode(MS_U16 u16ECOVersion);
445 void HAL_MVOP_SubSetEVDHardwireMode(MS_U16 u16ECOVersion);
446 void HAL_MVOP_SubSetVP9HardwireMode(MS_U16 u16ECOVersion);
447 void HAL_MVOP_SubEnableMVDInterface(MS_BOOL bEnable);
448 MS_BOOL HAL_MVOP_SubGetTimingInfoFromRegisters(MVOP_TimingInfo_FromRegisters *pMvopTimingInfo);
449 void HAL_MVOP_SubSetHorizontallMirrorMode(MS_BOOL bEnable);
450 void HAL_MVOP_SubSetVerticalMirrorMode(MS_BOOL bEnable);
451 void HAL_MVOP_SubEnableFreerunMode(MS_BOOL bEnable);
452 void HAL_MVOP_SubSetYUVBaseAdd(MS_PHY u32YOffset, MS_PHY u32UVOffset, MS_BOOL bProgressive, MS_BOOL b422pack);
453 void HAL_MVOP_SubSetRepeatField(MVOP_RptFldMode eMode);
454 MS_PHY HAL_MVOP_SubGetYBaseAdd(void);
455 MS_PHY HAL_MVOP_SubGetUVBaseAdd(void);
456 MS_BOOL HAL_MVOP_SubSet420BWSaveMode(MS_BOOL bEnable, MS_U16 u16ECOVersion);
457 MS_BOOL HAL_MVOP_SubSetEVDYUVBaseAdd(MVOP_EVDBaseAddInput *stEVDBaseAddInfo);
458 MS_BOOL HAL_MVOP_SubCheckSTCCW(void);
459 void HAL_MVOP_SubSetEnable4k2k2P(MS_BOOL bEnable);
460 void HAL_MVOP_SubSetVSyncMode(MS_U8 u8Mode);
461 MS_BOOL HAL_MVOP_SubSet3DLRAltOutput_VHalfScaling(MS_BOOL bEnable);
462 MS_BOOL HAL_MVOP_SubSet3DLRAltOutput(MS_BOOL bEnable);
463 MS_BOOL HAL_MVOP_SubSet3DLRAltSBSOutput(MS_BOOL bEnable);
464 MS_BOOL HAL_MVOP_SubGet3DLRAltOutput(void);
465 MS_BOOL HAL_MVOP_SubGet3DLRAltSBSOutput(void);
466 EN_MVOP_Output_3D_TYPE HAL_MVOP_SubGetOutput3DType(void);
467 
468 //for STB_DC
469 void HAL_MVOP_SetStartX(MVOP_DevID eID, MS_U16 u16Length);
470 void HAL_MVOP_SetStartY(MVOP_DevID eID, MS_U16 u16Length, MS_BOOL bIsInterlace);
471 void HAL_MVOP_SetPicWidthMinus(MVOP_DevID eID, MS_U16 u16Sizes, MS_U16 u16Width);
472 void HAL_MVOP_SetPicHeightMinus(MVOP_DevID eID, MS_U16 u16Sizes, MS_U16 u16Height);
473 void HAL_MVOP_MaskDBRegCtrl(MVOP_DevID eID, MS_BOOL bEnable ,MVOPMSAKDBREGCTRL eModeCtrl);
474 void HAL_MVOP_SetDeb2MVDFrameModeCtrl(MVOP_DevID eID, MS_BOOL bEnable, MVOPDEB2MVDFRAMECTRL eModeCtrl);
475 void HAL_MVOP_BaseFromIPCtrl(MVOP_DevID eID, MS_BOOL bEnable ,MVOPBASEFROMIPCTRL eModeCtrl );
476 
477 #endif // _HAL_MVOP_H_
478