1 /* SPDX-License-Identifier: Apache-2.0 OR MIT */ 2 /* 3 * Copyright (c) 2015 Rockchip Electronics Co., Ltd. 4 */ 5 6 #ifndef __HAL_H264D_GLOBAL_H__ 7 #define __HAL_H264D_GLOBAL_H__ 8 9 #include "mpp_hal.h" 10 #include "mpp_debug.h" 11 #include "mpp_device.h" 12 #include "hal_bufs.h" 13 14 #include "dxva_syntax.h" 15 #include "h264d_syntax.h" 16 17 #define H264D_DBG_ERROR (0x00000001) 18 #define H264D_DBG_ASSERT (0x00000002) 19 #define H264D_DBG_WARNNING (0x00000004) 20 #define H264D_DBG_LOG (0x00000008) 21 22 #define H264D_DBG_HARD_MODE (0x00000010) 23 24 extern RK_U32 hal_h264d_debug; 25 26 27 #define H264D_DBG(level, fmt, ...)\ 28 do {\ 29 if (level & hal_h264d_debug)\ 30 { mpp_log(fmt, ## __VA_ARGS__); }\ 31 } while (0) 32 33 34 #define H264D_ERR(fmt, ...)\ 35 do {\ 36 if (H264D_DBG_ERROR & hal_h264d_debug)\ 37 { mpp_log(fmt, ## __VA_ARGS__); }\ 38 } while (0) 39 40 #define ASSERT(val)\ 41 do {\ 42 if (H264D_DBG_ASSERT & hal_h264d_debug)\ 43 { mpp_assert(val); }\ 44 } while (0) 45 46 #define H264D_WARNNING(fmt, ...)\ 47 do {\ 48 if (H264D_DBG_WARNNING & hal_h264d_debug)\ 49 { mpp_log(fmt, ## __VA_ARGS__); }\ 50 } while (0) 51 52 #define H264D_LOG(fmt, ...)\ 53 do {\ 54 if (H264D_DBG_LOG & hal_h264d_debug)\ 55 { mpp_log(fmt, ## __VA_ARGS__); }\ 56 } while (0) 57 58 59 //!< vaule check 60 #define VAL_CHECK(ret, val, ...)\ 61 do{\ 62 if (!(val)){\ 63 ret = MPP_ERR_VALUE; \ 64 H264D_WARNNING("value error(%d).\n", __LINE__); \ 65 goto __FAILED; \ 66 }} while (0) 67 //!< memory malloc check 68 #define MEM_CHECK(ret, val, ...)\ 69 do{\ 70 if (!(val)) {\ 71 ret = MPP_ERR_MALLOC; \ 72 H264D_ERR("malloc buffer error(%d).\n", __LINE__); \ 73 ASSERT(0); goto __FAILED; \ 74 }} while (0) 75 76 77 //!< input check 78 #define INP_CHECK(ret, val, ...)\ 79 do{\ 80 if ((val)) {\ 81 ret = MPP_ERR_INIT; \ 82 H264D_WARNNING("input empty(%d).\n", __LINE__); \ 83 goto __RETURN; \ 84 }} while (0) 85 //!< function return check 86 #define FUN_CHECK(val)\ 87 do{\ 88 if ((val) < 0) {\ 89 H264D_WARNNING("Function error(%d).\n", __LINE__); \ 90 goto __FAILED; \ 91 }} while (0) 92 93 94 typedef struct h264d_hal_ctx_t { 95 const MppHalApi *hal_api; 96 97 DXVA_PicParams_H264_MVC *pp; 98 DXVA_Qmatrix_H264 *qm; 99 RK_U32 slice_num; 100 DXVA_Slice_H264_Short *slice_short; //!< MAX_SLICES 101 DXVA_Slice_H264_Long *slice_long; //!< MAX_SLICES 102 RK_U8 *bitstream; 103 RK_U32 strm_len; 104 105 void *priv; //!< resert data for extent 106 //!< add 107 HalDecTask *in_task; 108 MppBufSlots frame_slots; 109 MppBufSlots packet_slots; 110 MppDecCfgSet *cfg; 111 MppBufferGroup buf_group; 112 HalBufs cmv_bufs; 113 RK_S32 mv_size; 114 RK_S32 mv_count; 115 116 MppCbCtx *dec_cb; 117 MppDev dev; 118 void *reg_ctx; 119 RK_U32 fast_mode; 120 121 const MppDecHwCap *hw_info; 122 } H264dHalCtx_t; 123 124 extern const RK_U32 h264_cabac_table[928]; 125 126 #endif /*__HAL_H264D_GLOBAL_H__*/ 127