1 //<MStar Software> 2 //****************************************************************************** 3 // MStar Software 4 // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. 5 // All software, firmware and related documentation herein ("MStar Software") are 6 // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by 7 // law, including, but not limited to, copyright law and international treaties. 8 // Any use, modification, reproduction, retransmission, or republication of all 9 // or part of MStar Software is expressly prohibited, unless prior written 10 // permission has been granted by MStar. 11 // 12 // By accessing, browsing and/or using MStar Software, you acknowledge that you 13 // have read, understood, and agree, to be bound by below terms ("Terms") and to 14 // comply with all applicable laws and regulations: 15 // 16 // 1. MStar shall retain any and all right, ownership and interest to MStar 17 // Software and any modification/derivatives thereof. 18 // No right, ownership, or interest to MStar Software and any 19 // modification/derivatives thereof is transferred to you under Terms. 20 // 21 // 2. You understand that MStar Software might include, incorporate or be 22 // supplied together with third party`s software and the use of MStar 23 // Software may require additional licenses from third parties. 24 // Therefore, you hereby agree it is your sole responsibility to separately 25 // obtain any and all third party right and license necessary for your use of 26 // such third party`s software. 27 // 28 // 3. MStar Software and any modification/derivatives thereof shall be deemed as 29 // MStar`s confidential information and you agree to keep MStar`s 30 // confidential information in strictest confidence and not disclose to any 31 // third party. 32 // 33 // 4. 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If requested, MStar may from time to time provide technical supports or 49 // services in relation with MStar Software to you for your use of 50 // MStar Software in conjunction with your or your customer`s product 51 // ("Services"). 52 // You understand and agree that, except otherwise agreed by both parties in 53 // writing, Services are provided on an "AS IS" basis and the warranty 54 // disclaimer set forth in Section 4 above shall apply. 55 // 56 // 6. Nothing contained herein shall be construed as by implication, estoppels 57 // or otherwise: 58 // (a) conferring any license or right to use MStar name, trademark, service 59 // mark, symbol or any other identification; 60 // (b) obligating MStar or any of its affiliates to furnish any person, 61 // including without limitation, you and your customers, any assistance 62 // of any kind whatsoever, or any information; or 63 // (c) conferring any license or right under any intellectual property right. 64 // 65 // 7. These terms shall be governed by and construed in accordance with the laws 66 // of Taiwan, R.O.C., excluding its conflict of law rules. 67 // Any and all dispute arising out hereof or related hereto shall be finally 68 // settled by arbitration referred to the Chinese Arbitration Association, 69 // Taipei in accordance with the ROC Arbitration Law and the Arbitration 70 // Rules of the Association by three (3) arbitrators appointed in accordance 71 // with the said Rules. 72 // The place of arbitration shall be in Taipei, Taiwan and the language shall 73 // be English. 74 // The arbitration award shall be final and binding to both parties. 75 // 76 //****************************************************************************** 77 //<MStar Software> 78 79 #ifndef MDRV_SC_DISPLAY_H 80 #define MDRV_SC_DISPLAY_H 81 82 typedef struct 83 { 84 MS_U16 u16Htt_out; 85 MS_U16 u16Vtt_out; 86 }XC_DISPLAYOUT_INFO; 87 88 //----------------------------------------------------------------------------- 89 // below definitions are for FSM FPLL 90 //----------------------------------------------------------------------------- 91 typedef enum 92 { 93 FPLL_IDLE_STATE, 94 FPLL_INIT_STATE, 95 FPLL_ATV_INIT_STATE, 96 FPLL_WAIT_PRD_LOCK_STATE, 97 FPLL_WAIT_PHASE_STABLE_STATE, 98 FPLL_CHECK_FRAME_LOCK_STATE, 99 FPLL_LOCKED_STATE, 100 FPLL_VD_LOCKED_STATE, 101 FPLL_WAIT_LPLL_OFS_STATE, 102 FPLL_WAIT_IP_STABLE_STATE, 103 FPLL_DEATTACH_ISR_STATE, 104 FPLL_FREQ_ONLY_LOCK_STATE, 105 FPLL_LOCK_ATV_ADJUST_IVS_STATE, 106 FPLL_LOCK_ATV_IVS_OVS_STATE, 107 FPLL_FREQ_ONLY_LOCK_WAIT_PHASE_STABLE_STATE, 108 } EN_FPLL_FSM; 109 110 typedef enum 111 { 112 FPLL_THRESH_MODE_IDLE_STATE, 113 FPLL_THRESH_MODE_LOCKED_STATE, 114 FPLL_THRESH_MODE_DEATTACH_ISR_STATE, 115 } EN_FPLL_THRESH_MODE; 116 117 #ifdef UFO_XC_AUTO_DOWNLOAD 118 typedef struct 119 { 120 MS_PHY phyBaseAddr; /// baseaddr 121 MS_U32 u32Size; /// size 122 MS_BOOL bEnable; /// enable/disable the client 123 EN_XC_AUTODOWNLOAD_MODE enMode; /// work mode 124 MS_PHY u32StartAddr; /// sram start addr 125 MS_U32 u32Depth; /// data length 126 } XC_AUTODOWNLOAD_CLIENT_INFO; 127 #endif 128 129 #ifdef UFO_XC_HDR 130 #if (UFO_XC_HDR_VERSION == 2) 131 typedef enum 132 { 133 E_XC_INPUT_SOURCE_TYPE_NONE, 134 E_XC_INPUT_SOURCE_TYPE_HDMI, 135 E_XC_INPUT_SOURCE_TYPE_OTT, 136 E_XC_INPUT_SOURCE_TYPE_MAX, 137 } EN_XC_INPUT_SOURCE_TYPE; 138 #endif 139 #endif 140 141 #ifdef ENABLE_SPREADMODE 142 typedef enum 143 { 144 FPLL_SPREAD_MODE_NONE, 145 FPLL_SPREAD_MODE_1_2, 146 FPLL_SPREAD_MODE_2_5, 147 FPLL_SPREAD_MODE_3_5, 148 FPLL_SPREAD_MODE_4_5, 149 FPLL_SPREAD_MODE_5_6, 150 FPLL_SPREAD_MODE_5_12, 151 FPLL_SPREAD_MODE_12_25, 152 FPLL_SPREAD_MODE_24_25, 153 154 } EN_FPLL_SPREAD_MODE; 155 #endif 156 157 MS_U16 MDrv_SC_set_frc(MS_U16 u16InputVFreqX10); //NO_USE 158 void MDrv_SC_init_lpll(XC_PANEL_INFO* pstPanel_Info /* in */); //NO_USE 159 void MDrv_SC_set_fpll(void *pInstance, MS_BOOL bEnable, MS_BOOL bEnablePhaseLock, MS_U8 u8Lpll_bank); 160 void MDrv_SC_clear_lpll(void *pInstance); 161 void MDrv_SC_monitor_lpll(void *pInstance); 162 void MDrv_SC_set_fastlpll(void *pInstance, MS_BOOL bEn); 163 MS_BOOL MDrv_SC_get_fastlpll(void *pInstance); 164 MS_BOOL MDrv_Scaler_GetFPLLDoneStatus(void *pInstance); 165 166 void MDrv_SC_set_freerun_window(void *pInstance); 167 void MDrv_XC_SetFreeRunTiming (void *pInstance); 168 void MDrv_SC_GenerateBlackVideo(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 169 void MDrv_SC_GenerateBlackVideoForBothWin(void *pInstance, MS_BOOL bEnable); 170 void MDrv_SC_Set_BLSK(void *pInstance, MS_BOOL bEnable); 171 172 void MDrv_SC_set_output_dclk(void *pInstance, MS_U16 u16Htt, MS_U16 u16Vtt, MS_U16 u16VFreq, MS_U32 u32HighAccurateVFreq, SCALER_WIN eWindow); 173 void MDrv_SC_set_video_dark(MS_BOOL bEnable, MS_U16 u16VideoDarkLevel); //NO_USE 174 void MDrv_Scaler_set_de_window(XC_PANEL_INFO *pPanel_Info); //NO_USE 175 void MDrv_SC_set_csc(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow ); 176 void MDrv_SC_rep_window(void *pInstance, MS_BOOL bEnable,MS_WINDOW_TYPE Win,MS_U8 u8Color); 177 void MDrv_XC_set_dispwin_to_reg(void *pInstance, SCALER_WIN eWindow, MS_WINDOW_TYPE *pdspwin); 178 void MDrv_XC_get_dispwin_from_reg(void *pInstance, SCALER_WIN eWindow, MS_WINDOW_TYPE *pdspwin); 179 void MDrv_XC_UpdateWindow(void *pInstance, MS_WINDOW_TYPE *pDEWin, MS_WINDOW_TYPE *pMainWin, MS_WINDOW_TYPE *pSubWin, MS_WINDOW_TYPE *pReportWin, MS_WINDOW_TYPE *pNewOSDWin); 180 MS_U16 MDrv_SC_GetOutputVFreqX100(void *pInstance); 181 MS_U16 MDrv_SC_GetOP1OutputVFreqX100(void *pInstance); 182 183 void MDrv_SC_SetDisplay_LineBuffer_Mode(void *pInstance, MS_BOOL bEnable); 184 void MDrv_SC_SetDisplay_Start_Mode(void *pInstance, MS_BOOL bEnable); 185 void MDrv_XC_SetOSD2VEmode(void *pInstance, EN_VOP_SEL_OSD_XC2VE_MUX eVOPSelOSD_MUX); 186 187 void MDrv_XC_FPLLCusReset(void *pInstance); 188 189 void MDrv_XC_GetDefaultHVSyncInfo(void *pInstance); 190 void MDrv_SC_GetCurrentFRCTable(SC_FRC_SETTING* pstFRCTable); 191 MS_BOOL MDrv_XC_FPLL_IsSupportLockFreqOnly(void *pInstance); 192 193 MS_BOOL MDrv_XC_Get_OPWriteOffEnable(void *pInstance, SCALER_WIN eWindow); 194 void MDrv_XC_SetMWEStatus(void *pInstance, MS_BOOL bMWEStatus); 195 MS_BOOL MDrv_XC_GetMWEStatus(void *pInstance); 196 void MDrv_XC_DisableSubWindow(void); //NO_USE 197 void MDrv_XC_EnableCLK_for_SUB(void *pInstance, MS_BOOL bEnable); 198 void MDrv_XC_EnableWindow(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow); 199 200 E_APIXC_ReturnValue MDrv_XC_SetOSDLayer(void *pInstance, E_VOP_OSD_LAYER_SEL eVOPOSDLayer, SCALER_WIN eWindow); 201 E_VOP_OSD_LAYER_SEL MDrv_XC_GetOSDLayer(void *pInstance, SCALER_WIN eWindow); 202 E_APIXC_ReturnValue MDrv_XC_SetVideoAlpha(void *pInstance, MS_U8 u8Val, SCALER_WIN eWindow); 203 E_APIXC_ReturnValue MDrv_XC_GetVideoAlpha(void *pInstance, MS_U8 *pu8Val, SCALER_WIN eWindow); 204 205 E_APIXC_ReturnValue MDrv_SC_ShiftDisplayWindowDirectly(void *pInstance, MS_S8 s8H, MS_S8 s8V, MS_S8 s8preH, MS_S8 s8preV); 206 E_APIXC_ReturnValue MDrv_XC_Combine_MLoadEn(void *pInstance, MS_BOOL bEn); 207 #ifdef UFO_XC_ZORDER 208 E_APIXC_ReturnValue MDrv_SC_GetVideoOnOSD(void *pInstance, E_VIDEO_ON_OSD_LAYER *penLayer, SCALER_WIN eWindow); 209 #endif 210 E_APIXC_ReturnValue MDrv_SC_SetVideoOnOSD(void *pInstance, E_VIDEO_ON_OSD_LAYER enlayer, SCALER_WIN eWindow); 211 E_APIXC_ReturnValue MDrv_SC_SetOSDLayerBlending(void *pInstance, MS_U8 u8Layer, MS_BOOL bEnable, SCALER_WIN eWindow); 212 E_APIXC_ReturnValue MDrv_SC_SetOSDLayerAlpha(void *pInstance, MS_U8 u8Layer, MS_U8 u8Alpha); 213 E_APIXC_ReturnValue MDrv_SC_SetOSDBlendingFormula(void *pInstance, E_XC_OSD_INDEX enOsdIndex, E_XC_OSD_BlENDING_TYPE enType, SCALER_WIN eWindow); 214 215 void MDrv_SC_SetMCDIBufferAddress(void *pInstance, MS_PHY u32FBAddress, MS_PHY u32FBSize, E_XC_MCDI_TYPE eType); 216 void MDrv_SC_EnableMCDI(void *pInstance, MS_BOOL bEnable, E_XC_MCDI_TYPE eType); 217 void MDrv_XC_3D_AdjustOSDVDE(void *pInstance, MS_BOOL bEnable, MS_U16 VStart, MS_U16 VEnd, MS_U16 HStart, MS_U16 HEnd); 218 219 E_APIXC_ReturnValue MDrv_SC_ForceReadFrame(void *pInstance, MS_BOOL bEnable, MS_U16 u16FrameIndex); 220 MS_BOOL MDrv_SC_IsForceFreerun(void *pInstance); 221 MS_BOOL MDrv_XC_SetExPanelInfo(void *pInstance, MS_BOOL bEnable, XC_PANEL_INFO_EX *pPanelInfoEx); 222 223 #define MDrv_XC_Is_SubWindowEanble Hal_SC_Is_subwindow_enable 224 MS_BOOL MDrv_XC_Is_SubWindowEanble(void *pInstance); 225 void MDrv_XC_SetFrameColor(void *pInstance, MS_U32 u32aRGB ); 226 void MDrv_XC_SetDispWindowColor(void *pInstance, MS_U8 u8Color, SCALER_WIN eWindow); 227 void MDrv_XC_Enable_Extra_Request(void *pInstance, MS_BOOL bEnable); 228 void MDrv_SC_EnableReadBankSwitchControl(void *pInstance, MS_BOOL bEnable, MS_U16 u16SwitchCnt, SCALER_WIN eWindow); 229 void MDrv_SC_Set_LB_MergeAddress(void *pInstance); 230 E_APIXC_ReturnValue MDrv_XC_SetPixelShift(void* pInstance, MS_S8 s8H, MS_S8 s8V); 231 232 void MDrv_SC_Get_GOPOffset(MS_U16 *u16OffsetH, MS_U16 *u16OffsetV); 233 234 #ifdef UFO_XC_AUTO_DOWNLOAD 235 E_APIXC_ReturnValue MDrv_XC_AutoDownload_Config(void* pInstance, XC_AUTODOWNLOAD_CONFIG_INFO *pstConfigInfo); 236 E_APIXC_ReturnValue MDrv_XC_AutoDownload_Write(void* pInstance, XC_AUTODOWNLOAD_DATA_INFO *pstDataInfo); 237 E_APIXC_ReturnValue MDrv_XC_AutoDownload_Fire(void* pInstance, EN_XC_AUTODOWNLOAD_CLIENT enClient); 238 E_APIXC_ReturnValue MDrv_XC_GetAutoDownloadCaps(EN_XC_AUTODOWNLOAD_CLIENT enClient, MS_BOOL *pbSupported); 239 #endif 240 241 #ifdef UFO_XC_HDR 242 #if (UFO_XC_HDR_VERSION == 2) 243 E_APIXC_ReturnValue MDrv_XC_HDR_Control(void* pInstance, EN_XC_HDR_CTRL_TYPE enCtrlType, void *pParam); 244 E_APIXC_ReturnValue MDrv_XC_HDR_SetInputSource(void* pInstance, INPUT_SOURCE_TYPE_t enInputSourceType); 245 E_APIXC_ReturnValue MDrv_XC_HDR_SetWindow(void* pInstance, MS_WINDOW_TYPE stCapWin); 246 E_APIXC_ReturnValue MDrv_XC_HDR_GetCaps(void *pInstance, XC_HDR_SUPPORTED_CAPS *pstHDRCaps); 247 #endif 248 #endif 249 250 #ifdef UFO_XC_SETBLACKVIDEOBYMODE 251 E_APIXC_ReturnValue MDrv_SC_GenerateBlackVideoByMode(void *pInstance, MS_BOOL bEnable, SCALER_WIN eWindow, EN_XC_BLACK_VIDEO_MODE eMode); 252 #endif 253 254 MS_BOOL MDrv_XC_SetSWDRInfo(void* pInstance, XC_SWDR_INFO *pSWDR_INFO); 255 MS_BOOL MDrv_XC_GetSWDRInfo(void* pInstance, XC_SWDR_INFO *pSWDR_INFO); 256 #ifdef UFO_XC_SUPPORT_HDMI_DOWNSCALE_OUTPUT_POLICY 257 MS_U32 MDrv_SC_GetHDMIPolicy(void *pInstance); 258 #endif 259 #undef INTERFACE 260 #endif /* MDRV_SC_DISPLAY_H */ 261