1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* 3 * Copyright (C) 2022 Foundries.io Ltd 4 */ 5 6 #ifndef __DRIVERS_VERSAL_NVM_H__ 7 #define __DRIVERS_VERSAL_NVM_H__ 8 9 #include <drivers/versal_pmc.h> 10 #include <platform_config.h> 11 #include <tee_api_types.h> 12 #include <types_ext.h> 13 #include <util.h> 14 15 #define PUF_EFUSES_WORDS (128) 16 #define PUF_SYN_DATA_WORDS (127) 17 18 #if defined(PLATFORM_FLAVOR_net) 19 #define EFUSE_MAX_USER_FUSES (48) 20 #else 21 #define EFUSE_MAX_USER_FUSES (64) 22 #endif 23 24 #define EFUSE_OFFCHIP_REVOCATION_ID_LEN (4) 25 #define EFUSE_REVOCATION_ID_LEN (4) 26 #define EFUSE_DEC_ONLY_LEN (4) 27 #define EFUSE_DNA_LEN (16) 28 #define EFUSE_PPK_LEN (32) 29 #define EFUSE_IV_LEN (12) 30 #define EFUSE_AES_KEY_LEN (32) 31 32 enum versal_nvm_iv_type { 33 EFUSE_META_HEADER_IV_RANGE = 0, 34 EFUSE_BLACK_IV, 35 EFUSE_PLM_IV_RANGE, 36 EFUSE_DATA_PARTITION_IV_RANGE, 37 }; 38 39 enum versal_nvm_ppk_type { 40 EFUSE_PPK0 = 0, 41 EFUSE_PPK1, 42 EFUSE_PPK2 43 }; 44 45 enum versal_nvm_revocation_id { 46 EFUSE_REVOCATION_ID_0 = 0, 47 EFUSE_REVOCATION_ID_1, 48 EFUSE_REVOCATION_ID_2, 49 EFUSE_REVOCATION_ID_3, 50 EFUSE_REVOCATION_ID_4, 51 EFUSE_REVOCATION_ID_5, 52 EFUSE_REVOCATION_ID_6, 53 EFUSE_REVOCATION_ID_7 54 }; 55 56 enum versal_nvm_offchip_id { 57 EFUSE_INVLD = -1, 58 EFUSE_OFFCHIP_REVOKE_ID_0 = 0, 59 EFUSE_OFFCHIP_REVOKE_ID_1, 60 EFUSE_OFFCHIP_REVOKE_ID_2, 61 EFUSE_OFFCHIP_REVOKE_ID_3, 62 EFUSE_OFFCHIP_REVOKE_ID_4, 63 EFUSE_OFFCHIP_REVOKE_ID_5, 64 EFUSE_OFFCHIP_REVOKE_ID_6, 65 EFUSE_OFFCHIP_REVOKE_ID_7 66 }; 67 68 #if defined(PLATFORM_FLAVOR_net) 69 #define VERSAL_NET_REVOKE_EFUSE_MIN 1 70 #define VERSAL_NET_REVOKE_EFUSE_MAX 256 71 #endif 72 73 /* 74 * All structures mapped to the PLM processor must be address_and_size aligned 75 * to the cacheline_len. 76 */ 77 78 struct versal_efuse_glitch_cfg_bits { 79 uint8_t prgm_glitch; 80 uint8_t glitch_det_wr_lk; 81 uint32_t glitch_det_trim; 82 uint8_t gd_rom_monitor_en; 83 uint8_t gd_halt_boot_en; 84 uint8_t pad[53]; 85 }; 86 87 struct versal_efuse_aes_keys { 88 uint8_t prgm_aes_key; 89 uint8_t prgm_user_key0; 90 uint8_t prgm_user_key1; 91 uint32_t aes_key[8]; 92 uint32_t user_key0[8]; 93 uint32_t user_key1[8]; 94 uint8_t pad[25]; 95 }; 96 97 struct versal_efuse_ppk_hash { 98 uint8_t prgm_ppk0_hash; 99 uint8_t prgm_ppk1_hash; 100 uint8_t prgm_ppk2_hash; 101 uint32_t ppk0_hash[8]; 102 uint32_t ppk1_hash[8]; 103 uint32_t ppk2_hash[8]; 104 uint8_t pad[89]; 105 }; 106 107 struct versal_efuse_dec_only { 108 uint8_t prgm_dec_only; 109 uint8_t pad[63]; 110 }; 111 112 struct versal_efuse_revoke_ids { 113 uint8_t prgm_revoke_id; 114 uint32_t revoke_id[8]; 115 uint8_t pad[89]; 116 }; 117 118 struct versal_efuse_offchip_ids { 119 uint8_t prgm_offchip_id; 120 uint32_t offchip_id[8]; 121 uint8_t pad[89]; 122 }; 123 124 struct versal_efuse_user_data { 125 uint32_t start; 126 uint32_t num; 127 uint64_t addr; 128 uint8_t pad[48]; 129 }; 130 131 struct versal_efuse_puf_fuse { 132 uint8_t env_monitor_dis; 133 uint8_t prgm_puf_fuse; 134 uint32_t start; 135 uint32_t num; 136 uint64_t addr; 137 uint8_t pad[104]; 138 }; 139 140 struct versal_efuse_ivs { 141 uint8_t prgm_meta_header_iv; 142 uint8_t prgm_blk_obfus_iv; 143 uint8_t prgm_plm_iv; 144 uint8_t prgm_data_partition_iv; 145 uint32_t meta_header_iv[3]; 146 uint32_t blk_obfus_iv[3]; 147 uint32_t plm_iv[3]; 148 uint32_t data_partition_iv[3]; 149 uint8_t pad[12]; 150 }; 151 152 struct versal_efuse_misc_ctrl_bits { 153 uint8_t glitch_det_halt_boot_en; 154 uint8_t glitch_det_rom_monitor_en; 155 uint8_t halt_boot_error; 156 uint8_t halt_boot_env; 157 uint8_t crypto_kat_en; 158 uint8_t lbist_en; 159 uint8_t safety_mission_en; 160 uint8_t ppk0_invalid; 161 uint8_t ppk1_invalid; 162 uint8_t ppk2_invalid; 163 uint8_t pad[54]; 164 }; 165 166 struct versal_efuse_puf_sec_ctrl_bits { 167 uint8_t puf_regen_dis; 168 uint8_t puf_hd_invalid; 169 uint8_t puf_test2_dis; 170 uint8_t puf_dis; 171 uint8_t puf_syn_lk; 172 uint8_t pad[59]; 173 }; 174 175 struct versal_efuse_sec_misc1_bits { 176 uint8_t lpd_mbist_en; 177 uint8_t pmc_mbist_en; 178 uint8_t lpd_noc_sc_en; 179 uint8_t sysmon_volt_mon_en; 180 uint8_t sysmon_temp_mon_en; 181 uint8_t pad[59]; 182 }; 183 184 struct versal_efuse_boot_env_ctrl_bits { 185 uint8_t prgm_sysmon_temp_hot; 186 uint8_t prgm_sysmon_volt_pmc; 187 uint8_t prgm_sysmon_volt_pslp; 188 uint8_t prgm_sysmon_temp_cold; 189 uint8_t sysmon_temp_en; 190 uint8_t sysmon_volt_en; 191 uint8_t sysmon_volt_soc; 192 uint8_t sysmon_temp_hot; 193 uint8_t sysmon_volt_pmc; 194 uint8_t sysmon_volt_pslp; 195 uint8_t sysmon_temp_cold; 196 uint8_t pad[53]; 197 }; 198 199 struct versal_efuse_sec_ctrl_bits { 200 uint8_t aes_dis; 201 uint8_t jtag_err_out_dis; 202 uint8_t jtag_dis; 203 uint8_t ppk0_wr_lk; 204 uint8_t ppk1_wr_lk; 205 uint8_t ppk2_wr_lk; 206 uint8_t aes_crc_lk; 207 uint8_t aes_wr_lk; 208 uint8_t user_key0_crc_lk; 209 uint8_t user_key0_wr_lk; 210 uint8_t user_key1_crc_lk; 211 uint8_t user_key1_wr_lk; 212 uint8_t sec_dbg_dis; 213 uint8_t sec_lock_dbg_dis; 214 uint8_t boot_env_wr_lk; 215 uint8_t reg_init_dis; 216 uint8_t pad[48]; 217 }; 218 219 struct versal_efuse_puf_header { 220 struct versal_efuse_puf_sec_ctrl_bits sec_ctrl; 221 uint8_t prmg_puf_helper_data; 222 uint8_t env_monitor_dis; 223 uint32_t efuse_syn_data[PUF_SYN_DATA_WORDS]; 224 uint32_t chash; 225 uint32_t aux; 226 uint8_t pad[56]; 227 }; 228 229 struct versal_efuse_puf_user_fuse { 230 uint32_t data_addr[PUF_EFUSES_WORDS]; 231 uint8_t env_monitor_dis; 232 uint8_t prgm_puf_fuse; 233 uint32_t start_row; 234 uint32_t num_rows; 235 }; 236 237 TEE_Result versal_efuse_read_dna(uint32_t *buf, size_t len); 238 TEE_Result versal_efuse_read_user_data(uint32_t *buf, size_t len, 239 uint32_t first, size_t num); 240 TEE_Result versal_efuse_read_iv(uint32_t *buf, size_t len, 241 enum versal_nvm_iv_type type); 242 TEE_Result versal_efuse_read_ppk(uint32_t *buf, size_t len, 243 enum versal_nvm_ppk_type type); 244 TEE_Result versal_efuse_write_user_data(uint32_t *buf, size_t len, 245 uint32_t first, size_t num); 246 TEE_Result versal_efuse_write_aes_keys(struct versal_efuse_aes_keys *keys); 247 TEE_Result versal_efuse_write_ppk_hash(struct versal_efuse_ppk_hash *hash); 248 TEE_Result versal_efuse_write_iv(struct versal_efuse_ivs *p); 249 TEE_Result versal_efuse_write_dec_only(struct versal_efuse_dec_only *p); 250 TEE_Result versal_efuse_write_sec(struct versal_efuse_sec_ctrl_bits *p); 251 TEE_Result versal_efuse_write_misc(struct versal_efuse_misc_ctrl_bits *p); 252 TEE_Result versal_efuse_write_glitch_cfg(struct versal_efuse_glitch_cfg_bits 253 *p); 254 TEE_Result versal_efuse_write_boot_env(struct versal_efuse_boot_env_ctrl_bits 255 *p); 256 TEE_Result versal_efuse_write_sec_misc1(struct versal_efuse_sec_misc1_bits *p); 257 TEE_Result versal_efuse_write_offchip_ids(struct versal_efuse_offchip_ids *p); 258 TEE_Result versal_efuse_write_revoke_ppk(enum versal_nvm_ppk_type type); 259 TEE_Result versal_efuse_write_revoke_id(uint32_t id); 260 TEE_Result versal_efuse_read_revoke_id(uint32_t *buf, size_t len, 261 enum versal_nvm_revocation_id id); 262 TEE_Result versal_efuse_read_misc_ctrl(struct versal_efuse_misc_ctrl_bits *buf); 263 TEE_Result versal_efuse_read_sec_ctrl(struct versal_efuse_sec_ctrl_bits *buf); 264 TEE_Result versal_efuse_read_sec_misc1(struct versal_efuse_sec_misc1_bits *buf); 265 TEE_Result 266 versal_efuse_read_boot_env_ctrl(struct versal_efuse_boot_env_ctrl_bits *buf); 267 TEE_Result versal_efuse_read_offchip_revoke_id(uint32_t *buf, size_t len, 268 enum versal_nvm_offchip_id id); 269 TEE_Result versal_efuse_read_dec_only(uint32_t *buf, size_t len); 270 TEE_Result versal_efuse_read_puf_sec_ctrl(struct versal_efuse_puf_sec_ctrl_bits 271 *buf); 272 TEE_Result versal_efuse_read_puf(struct versal_efuse_puf_header *buf); 273 TEE_Result versal_efuse_read_puf_as_user_fuse(struct versal_efuse_puf_user_fuse 274 *p); 275 TEE_Result versal_efuse_write_puf_as_user_fuse(struct versal_efuse_puf_user_fuse 276 *p); 277 TEE_Result versal_efuse_write_puf(struct versal_efuse_puf_header *buf); 278 TEE_Result versal_bbram_write_aes_key(uint8_t *key, size_t len); 279 TEE_Result versal_bbram_zeroize(void); 280 TEE_Result versal_bbram_write_user_data(uint32_t data); 281 TEE_Result versal_bbram_read_user_data(uint32_t *data); 282 TEE_Result versal_bbram_lock_write_user_data(void); 283 284 #endif /*__DRIVERS_VERSAL_NVM_H__*/ 285