1 //<MStar Software>
2 //******************************************************************************
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76 //******************************************************************************
77 //<MStar Software>
78 ////////////////////////////////////////////////////////////////////////////////
79 //
80 // Copyright (c) 2008-2009 MStar Semiconductor, Inc.
81 // All rights reserved.
82 //
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92 //
93 ////////////////////////////////////////////////////////////////////////////////
94
95 ///////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// @file AVD.c
98 /// @brief AVD Driver
99 /// @author MStar Semiconductor Inc.
100 ///////////////////////////////////////////////////////////////////////////////////////////////////
101
102 //-------------------------------------------------------------------------------------------------
103 // Include Files
104 //-------------------------------------------------------------------------------------------------
105 // Common Definition
106 //#include <string.h>
107 #ifdef MSOS_TYPE_LINUX_KERNEL
108 #include <linux/string.h>
109 #else
110 #include <string.h>
111 #endif
112 #include "MsCommon.h"
113 #include "MsVersion.h"
114 #include "MsIRQ.h"
115 #include "drvXC_IOPort.h"
116 #include "apiXC.h"
117 //#if !defined (MSOS_TYPE_NOS)
118 #include "MsOS.h"
119 //#endif
120
121 #include "MsTypes.h"
122 #ifndef MSOS_TYPE_LINUX_KERNEL
123 #include <stdio.h>
124 #endif
125 #include "drvAVD_priv.h"
126 #include "drvAVD_v2.h"
127 #include "../../utopia_core/utopia_dapi.h"
128 #include "../../utopia_core/utopia.h"
129 #include "../../utopia_core/utopia_driver_id.h"
130
131 // Internal Definition
132 #include "regCHIP.h"
133 #include "regAVD.h"
134 #include "halAVD.h"
135 #include "drvBDMA.h"
136 //#include "drvSERFLASH.h"
137 #include "ULog.h"
138
139 //-------------------------------------------------------------------------------------------------
140 // Driver Compiler Options
141 //-------------------------------------------------------------------------------------------------
142 #define TEST_VD_DSP 0 // 1: for TEST VD DSP, 0: for MSTAR VD DSP
143 #define ADJUST_CHANNEL_CHANGE_HSYNC 1
144 #define ADJUST_NTSC_BURST_WINDOW 1
145 #define AVD_2K_STR 1
146 //-------------------------------------------------------------------------------------------------
147 // Local Defines
148 //-------------------------------------------------------------------------------------------------
149
150 //avd mutex wait time
151 #define AVD_MUTEX_WAIT_TIME 1000
152
153 #if (TEST_VD_DSP)
154 #undef VD_STATUS_RDY
155 #define VD_STATUS_RDY (BIT(8))
156 #define VD_STANDARD_VALID BIT(0)
157 #endif
158
159 //#define MODULE_AVD 10 //weicheng 201303 multi process safe
160
161 #define AVD_debug(x) //x
162 #define AVD_debug_Monitor(x) //x
163
164 //-------------------------------------------------------------------------------------------------
165 // Debug Functions
166 //-------------------------------------------------------------------------------------------------
167 #ifdef MS_DEBUG
168 #define VDDBG(x) (x)
169 //#define AVD_DRV_DEBUG 1
170 #define AVD_LOCK(_s32AVD_Mutex,_u8AVDDbgLevel) \
171 do{ \
172 MS_ASSERT(MsOS_In_Interrupt() == FALSE); \
173 if (_u8AVDDbgLevel == AVD_DBGLV_DEBUG) ULOGE("AVD","%s lock\n", __FUNCTION__);\
174 MsOS_ObtainMutex(_s32AVD_Mutex, MSOS_WAIT_FOREVER);\
175 }while(0)
176 #define AVD_UNLOCK(_s32AVD_Mutex,_u8AVDDbgLevel) \
177 do{ \
178 MsOS_ReleaseMutex(_s32AVD_Mutex);\
179 if (_u8AVDDbgLevel == AVD_DBGLV_DEBUG) ULOGE("AVD","%s unlock\n", __FUNCTION__); \
180 }while(0)
181 #else
182 #define VDDBG(x) //(x)
183 //#define AVD_DRV_DEBUG 0
184 #define AVD_LOCK(_s32AVD_Mutex,_u8AVDDbgLevel) \
185 do{ \
186 MS_ASSERT(MsOS_In_Interrupt() == FALSE); \
187 MsOS_ObtainMutex(_s32AVD_Mutex, MSOS_WAIT_FOREVER);\
188 }while(0)
189 #define AVD_UNLOCK(_s32AVD_Mutex,_u8AVDDbgLevel) \
190 do{ \
191 MsOS_ReleaseMutex(_s32AVD_Mutex);\
192 }while(0)
193 #endif
194
195 //-------------------------------------------------------------------------------------------------
196 // Global Constant
197 //-------------------------------------------------------------------------------------------------
198 static MSIF_Version _drv_avd_version = {
199 .MW = { AVD_VER, },
200 };
201 static MS_PHY u32COMB_3D_Addr_Str = 0;
202 static MS_U32 u32COMB_3D_Len_Str = 0;
203 static AVD_InputSourceType eSource_Str = E_INPUT_SOURCE_INVALID;
204 static MS_U8 u8ScartFB_Str = 1;
205 static MS_U32 u32XTAL_Clock_Str = 12000000UL;
206 static AVD_DemodType eDemodType_Str = DEMODE_MSTAR_VIF;
207 static MS_U8 *pu8VD_DSP_Code_Address_Str;
208 static MS_U32 u32VD_DSP_Code_Len_Str;
209 static MS_BOOL bInitSTR=0;
210
211 #if defined(MSOS_TYPE_LINUX_KERNEL)
212 static AVD_VideoStandardType eVideoStandard_Str=E_VIDEOSTANDARD_NOTSTANDARD;
213 #endif
214
215 MS_U16 _u16HtotalNTSC[]={(1135L*3/2), (1135L), (910L), (1135L)};
216 MS_U16 _u16HtotalPAL[]={(1135L*3/2), (1135L), (1135L), (1135L)};
217 MS_U16 _u16HtotalSECAM[]={(1135L*3/2), (1135L), (1097L), (1135L)};
218 MS_U16 _u16HtotalNTSC_443[]={(1135L*3/2), (1135L), (1127L), (1135L)};
219 MS_U16 _u16HtotalPAL_M[]={(1135L*3/2), (1135L), (909L), (1135L)};
220 MS_U16 _u16HtotalPAL_NC[]={(1135L*3/2), (1135L), (917L), (1135L)};
221 MS_U16 _u16HtotalPAL_60[]={(1135L*3/2), (1135L), (1127L), (1135L)};
222
223 //-------------------------------------------------------------------------------------------------
224 // Enum
225 //-------------------------------------------------------------------------------------------------
226
227 enum
228 {
229 AVD_POOL_ID_AVD = 0,
230 } eAVDPoolID;
231
232 //-------------------------------------------------------------------------------------------------
233 // Interface function
234 //-------------------------------------------------------------------------------------------------
235 static void vd_str_store_reg(void);
236 static void vd_str_store_comb_sub_reg(void);
237 static void vd_str_init(void);
238 static void vdmcu_str_init(void);
239 static void vd_str_setinput(void);
240 static void vd_str_load_reg(void);
241 static void vd_str_load_comb_sub_reg(void);
242
243 #if defined(MSOS_TYPE_LINUX_KERNEL)
244 static AVD_VideoStandardType vd_str_timingchangedetection(void);
245 #endif
246
AVDRegisterToUtopia(void)247 void AVDRegisterToUtopia(void)
248 {
249 // 1. deal with module
250 void* pUtopiaModule = NULL;
251 UtopiaModuleCreate(MODULE_AVD, 8, &pUtopiaModule);
252 UtopiaModuleRegister(pUtopiaModule);
253 UtopiaModuleSetupFunctionPtr(pUtopiaModule, (FUtopiaOpen)AVDOpen, (FUtopiaClose)AVDClose, (FUtopiaIOctl)AVDIoctl);
254
255 // Utopia2K STR
256 #if defined(MSOS_TYPE_LINUX_KERNEL)
257 UtopiaModuleSetupSTRFunctionPtr(pUtopiaModule,(FUtopiaSTR)AVDStr);
258 //UtopiaModuleSetSTRPrivate(pUtopiaModule, STRPrivateDataSize);
259 #endif
260
261 // 2. deal with resource
262 void* psResource = NULL;
263 UtopiaModuleAddResourceStart(pUtopiaModule, AVD_POOL_ID_AVD);
264 UtopiaResourceCreate("AVD", sizeof(AVD_RESOURCE_PRIVATE), &psResource);
265 UtopiaResourceRegister(pUtopiaModule, psResource, AVD_POOL_ID_AVD);
266 UtopiaModuleAddResourceEnd(pUtopiaModule, AVD_POOL_ID_AVD);
267
268 }
269
AVDOpen(void ** ppInstance,MS_U32 u32ModuleVersion,void * pAttribute)270 MS_U32 AVDOpen(void** ppInstance, MS_U32 u32ModuleVersion, void* pAttribute)
271 {
272 ULOGE("AVD","\n[AVD INFO]AVD open \n");
273
274 AVD_INSTANT_PRIVATE *pAvdPri = NULL;
275 UtopiaInstanceCreate(sizeof(AVD_INSTANT_PRIVATE), ppInstance);
276 UtopiaInstanceGetPrivate(*ppInstance, (void*)&pAvdPri);
277
278 pAvdPri->fpAVDInit = Drv_AVD_Init;
279 pAvdPri->fpAVDExit = Drv_AVD_Exit;
280 pAvdPri->fpAVDResetMCU = Drv_AVD_ResetMCU;
281 pAvdPri->fpAVDFreezeMCU = Drv_AVD_FreezeMCU;
282 pAvdPri->fpAVDScanHsyncCheck = Drv_AVD_Scan_HsyncCheck;
283 pAvdPri->fpAVDStartAutoStandardDetection = Drv_AVD_StartAutoStandardDetection;
284 pAvdPri->fpAVDForceVideoStandard = Drv_AVD_ForceVideoStandard;
285 pAvdPri->fpAVD3DCombSpeedup = Drv_AVD_3DCombSpeedup;
286 pAvdPri->fpAVDLoadDSP = Drv_AVD_LoadDSP;
287 pAvdPri->fpAVDBackPorchWindowPositon = Drv_AVD_BackPorchWindowPositon;
288 pAvdPri->fpAVDMBX_ReadByteByVDMbox = Drv_AVD_MBX_ReadByteByVDMbox;
289
290 pAvdPri->fpAVDSetFlag = Drv_AVD_SetFlag;
291 pAvdPri->fpAVDSetRegValue = Drv_AVD_SetRegValue;
292 pAvdPri->fpAVDSetRegFromDSP = Drv_AVD_SetRegFromDSP;
293 pAvdPri->fpAVDSetInput = Drv_AVD_SetInput;
294 pAvdPri->fpAVDSetVideoStandard = Drv_AVD_SetVideoStandard;
295 pAvdPri->fpAVDSetChannelChange = Drv_AVD_SetChannelChange;
296 pAvdPri->fpAVDSetHsyncDetectionForTuning = Drv_AVD_SetHsyncDetectionForTuning;
297 pAvdPri->fpAVDSet3dComb = Drv_AVD_Set3dComb;
298 pAvdPri->fpAVDSetShiftClk = Drv_AVD_SetShiftClk;
299 pAvdPri->fpAVDSetFreerunPLL = Drv_AVD_SetFreerunPLL;
300 pAvdPri->fpAVDSetFreerunFreq = Drv_AVD_SetFreerunFreq;
301 pAvdPri->fpAVDSetFactoryPara = Drv_AVD_SetFactoryPara;
302 pAvdPri->fpAVDSetDbgLevel = Drv_AVD_SetDbgLevel;
303 pAvdPri->fpAVDSetPQFineTune = Drv_AVD_SetPQFineTune;
304 pAvdPri->fpAVDSet3dCombSpeed = Drv_AVD_Set3dCombSpeed;
305 pAvdPri->fpAVDSetStillImageParam = Drv_AVD_SetStillImageParam;
306 pAvdPri->fpAVDSet2D3DPatchOnOff = Drv_AVD_Set2D3DPatchOnOff;
307 pAvdPri->fpAVDSetAutoFineGainToFixed = Drv_AVD_SetAutoFineGainToFixed;
308
309 pAvdPri->fpAVDGetRegValue = Drv_AVD_GetRegValue;
310 pAvdPri->fpAVDGetStatus = Drv_AVD_GetStatus;
311 pAvdPri->fpAVDGetNoiseMag = Drv_AVD_GetNoiseMag;
312 pAvdPri->fpAVDGetVTotal = Drv_AVD_GetVTotal;
313 pAvdPri->fpAVDGetStandardDetection = Drv_AVD_GetStandardDetection;
314 pAvdPri->fpAVDGetCaptureWindow = Drv_AVD_GetCaptureWindow;
315 pAvdPri->fpAVDGetVerticalFreq = Drv_AVD_GetVerticalFreq;
316 pAvdPri->fpAVDGetHsyncEdge = Drv_AVD_GetHsyncEdge;
317 pAvdPri->fpAVDGetDSPFineGain = Drv_AVD_GetDSPFineGain;
318 pAvdPri->fpAVDGetDSPVersion = Drv_AVD_GetDSPVersion;
319 pAvdPri->fpAVDGetLibVer = Drv_AVD_GetLibVer;
320 pAvdPri->fpAVDGetInfo = Drv_AVD_GetInfo;
321 pAvdPri->fpAVDIsSyncLocked = Drv_AVD_IsSyncLocked;
322 pAvdPri->fpAVDIsSignalInterlaced = Drv_AVD_IsSignalInterlaced;
323 pAvdPri->fpAVDIsColorOn = Drv_AVD_IsColorOn;
324 pAvdPri->fpAVDSetPowerState = Drv_AVD_SetPowerState;
325 pAvdPri->fpAVDGetMacroVisionDetect = Drv_AVD_GetMacroVisionDetect;
326 pAvdPri->fpAVDGetCGMSDetect = Drv_AVD_GetCGMSDetect;
327 pAvdPri->fpAVDSetBurstWinStart =Drv_AVD_SetBurstWinStart;
328 pAvdPri->fpAVDIsAVDAlive = Drv_AVD_IsAVDAlive;
329 pAvdPri->fpAVDIsLockAudioCarrier =Drv_AVD_IsLockAudioCarrier;
330 //return TRUE;
331 return UTOPIA_STATUS_SUCCESS;
332 }
333
AVDIoctl(void * pInstance,MS_U32 u32Cmd,void * pArgs)334 MS_U32 AVDIoctl(void* pInstance, MS_U32 u32Cmd, void* pArgs)
335 {
336 MS_BOOL bEnable = 0;
337 //MS_U8 u8Value;
338 //MS_U16 u16Value;
339 MS_U32 u32Value;
340 MS_U32 u32Ret = 0;
341 //MS_U16 u16PowerState=0;
342
343 PAVD_INIT pINITParam = NULL;
344 PAVD_LOADDSP pLoadDSPParam = NULL;
345 PAVD_BACKPORCHWINPOS pBackPorchWinPos = NULL;
346 PAVD_SETREGVALUE pSetRegValue = NULL;
347 PAVD_SETINPUT pSetInput = NULL;
348 PAVD_SETVIDEOSTANDARD pSetVideoStandard = NULL;
349 PAVD_SETSHIFTCLK pSetShiftCLK = NULL;
350 PAVD_SETFACTORYPARA pSetFactorypara = NULL;
351 PAVD_SET3DCOMBSPEED pSet3DCOMBSpeed = NULL;
352 PAVD_GETCAPTUREWINDOW pGetCaptureWindow = NULL;
353 PAVD_GETSTANDARDDETECTION pStandardDetection = NULL;
354 PAVD_SCANHSYNCCHECK pScanHsyncCheck = NULL;
355 PAVD_FORCEVIDEOSTANDARD pForceVideoStandard = NULL;
356 PAVD_MBXREADBYTEBYVDMBOX pMbxReadByteByVDMbox = NULL;
357 PAVD_SETDBGLEVEL pSetDbgLevel = NULL;
358 PAVD_COPYTOUSER pCopyToUser = NULL;
359 PAVD_GETREGVALUE pGetRegValue = NULL;
360 PAVD_SETPOWERSTATE pSetPowerState = NULL;
361 PAVD_GETLIBVER pGetLibVer = NULL;
362
363 void* pModule = NULL;
364 AVD_INSTANT_PRIVATE* psAvdInstPri = NULL;
365 UtopiaInstanceGetPrivate(pInstance, (void*)&psAvdInstPri);
366 UtopiaInstanceGetModule(pInstance, &pModule);
367
368 void* pResource = NULL;
369 AVD_RESOURCE_PRIVATE* psAvdResPri = NULL;
370 if(UtopiaResourceObtain(pModule, AVD_POOL_ID_AVD , &pResource) != 0)
371 {
372 ULOGE("AVD","UtopiaResourceObtainToInstant fail\n");
373 return 0xFFFFFFFF;
374 }
375
376 if(UtopiaResourceGetPrivate(pResource,(void*)&psAvdResPri) != 0)
377 {
378 ULOGE("AVD","UtopiaResourceGetPrivate fail\n");
379 return UTOPIA_STATUS_FAIL;
380 }
381
382 switch(u32Cmd)
383 {
384 case MDrv_CMD_AVD_Init:
385 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_Init\n"));
386 //---------------------------- init global variables-----------------------------------------
387 psAvdResPri->_bShiftClkFlag = 0;
388 psAvdResPri->_b2d3dautoflag = 1;
389 psAvdResPri->_bSTRFlag = 0;
390
391 psAvdResPri->_u8HtotalDebounce = 0;
392 psAvdResPri->_u8AutoDetMode = FSC_AUTO_DET_ENABLE;
393 psAvdResPri->_u8AfecD4Factory = 0;
394 psAvdResPri->_u8Comb10Bit3Flag = 1;
395 psAvdResPri->_u8Comb57 = 0x04;
396 psAvdResPri->_u8Comb58 = 0x01;
397 psAvdResPri->_u8Comb5F = 0x08;
398 psAvdResPri->_u8SCARTSwitch = 0; // 0: CVBS, 1:Svideo;
399 psAvdResPri->_u8SCARTPrestandard = 0;
400 psAvdResPri->_u8AutoTuningIsProgress = 0;
401
402 psAvdResPri->_u16CurVDStatus = 0;
403 psAvdResPri->_u16DataH[0]=0;
404 psAvdResPri->_u16DataH[1]=0;
405 psAvdResPri->_u16DataH[2]=0;
406 psAvdResPri->_u16LatchH = 1135L;
407 psAvdResPri->_u16Htt_UserMD = 1135;
408 psAvdResPri->_u16DPL_LSB = 0;
409 psAvdResPri->_u16DPL_MSB = 0;
410
411 psAvdResPri->u32VDPatchFlagStatus = 0;
412 psAvdResPri->_u32VideoSystemTimer = 0;
413 psAvdResPri->_u32SCARTWaitTime = 0;
414
415 psAvdResPri->_eVideoSystem = E_VIDEOSTANDARD_PAL_BGHI;
416 psAvdResPri->_eForceVideoStandard = E_VIDEOSTANDARD_AUTO;
417 psAvdResPri->_eLastStandard = E_VIDEOSTANDARD_NOTSTANDARD;
418 psAvdResPri->_eVDInputSource = E_INPUT_SOURCE_ATV;
419 psAvdResPri->gShiftMode = E_ATV_CLK_ORIGIN_43P2MHZ;
420 //------------------------------------ VD init function------------------------------------------
421 pINITParam = (PAVD_INIT)pArgs;
422 u32Ret = (psAvdInstPri->fpAVDInit)(&(pINITParam->pVD_InitData), pINITParam->u32InitDataLen, psAvdResPri);
423 pINITParam->pVD_Result = (AVD_Result)u32Ret;
424 break;
425 case MDrv_CMD_AVD_Exit:
426 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_Init\n"));
427 (psAvdInstPri->fpAVDExit)(psAvdResPri);
428 break;
429 case MDrv_CMD_AVD_ResetMCU:
430 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_ResetMCU\n"));
431 pCopyToUser = (PAVD_COPYTOUSER)pArgs;
432 u32Ret = (psAvdInstPri->fpAVDResetMCU)(psAvdResPri);
433 pCopyToUser->bEnable = (MS_BOOL)u32Ret;
434 break;
435 case MDrv_CMD_AVD_FreezeMCU:
436 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_FreezeMCU: %d\n", *(MS_BOOL *)pArgs));
437 bEnable = *(MS_BOOL *)pArgs;
438 (psAvdInstPri->fpAVDFreezeMCU)(bEnable, psAvdResPri);
439 break;
440 case MDrv_CMD_AVD_Scan_HsyncCheck:
441 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_Scan_HsyncCheck\n"));
442 pScanHsyncCheck = (PAVD_SCANHSYNCCHECK)pArgs;
443 u32Ret = (psAvdInstPri->fpAVDScanHsyncCheck)(pScanHsyncCheck->u8HtotalTolerance, psAvdResPri);
444 pScanHsyncCheck->u16ScanHsyncCheck = (MS_U16)u32Ret;
445 break;
446 case MDrv_CMD_AVD_StartAutoStandardDetection:
447 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_StartAutoStandardDetection\n"));
448 (psAvdInstPri->fpAVDStartAutoStandardDetection)(psAvdResPri);
449 break;
450 case MDrv_CMD_AVD_ForceVideoStandard:
451 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_ForceVideoStandard: Force standard=%d\n",*(AVD_VideoStandardType *)pArgs));
452 pForceVideoStandard = (PAVD_FORCEVIDEOSTANDARD)pArgs;
453 u32Ret =(psAvdInstPri->fpAVDForceVideoStandard)(pForceVideoStandard->eVideoStandardType, psAvdResPri);
454 pForceVideoStandard->bEnable = (MS_BOOL)u32Ret;
455 break;
456 case MDrv_CMD_AVD_3DCombSpeedup:
457 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_3DCombSpeedup\n"));
458 (psAvdInstPri->fpAVD3DCombSpeedup)(psAvdResPri);
459 break;
460 case MDrv_CMD_AVD_LoadDSP:
461 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_LoadDSP \n"));
462 pLoadDSPParam = (PAVD_LOADDSP)pArgs;
463 (psAvdInstPri->fpAVDLoadDSP)(pLoadDSPParam->pu8VD_DSP, pLoadDSPParam->len, psAvdResPri);
464 break;
465 case MDrv_CMD_AVD_BackPorchWindowPositon:
466 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_BackPorchWindowPositon\n"));
467 pBackPorchWinPos= (PAVD_BACKPORCHWINPOS)pArgs;
468 (psAvdInstPri->fpAVDBackPorchWindowPositon)(pBackPorchWinPos->bEnable,pBackPorchWinPos->u8Value);
469 break;
470 case MDrv_CMD_AVD_MBX_ReadByteByVDMbox:
471 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_MBX_ReadByteByVDMbox\n"));
472 pMbxReadByteByVDMbox = (PAVD_MBXREADBYTEBYVDMBOX)pArgs;
473 u32Ret = (psAvdInstPri->fpAVDMBX_ReadByteByVDMbox)(pMbxReadByteByVDMbox->u8Addr, psAvdResPri);
474 pMbxReadByteByVDMbox->u8Value = (MS_U8)u32Ret;
475 break;
476 case MDrv_CMD_AVD_SetFlag:
477 u32Value = *(MS_U32*)pArgs;
478 (psAvdInstPri->fpAVDSetFlag)(u32Value, psAvdResPri);
479 break;
480 case MDrv_CMD_AVD_SetRegValue:
481 pSetRegValue = (PAVD_SETREGVALUE)pArgs;
482 (psAvdInstPri->fpAVDSetRegValue)(pSetRegValue->u16Addr, pSetRegValue->u8Value);
483 break;
484 case MDrv_CMD_AVD_SetRegFromDSP:
485 AVD_debug_Monitor(ULOGE("AVD","MDrv_CMD_AVD_SetRegFromDSP\n"));
486 (psAvdInstPri->fpAVDSetRegFromDSP)(psAvdResPri);
487 break;
488 case MDrv_CMD_AVD_SetInput:
489 pSetInput = (PAVD_SETINPUT)pArgs;
490 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_SetInput: Source= %d, ScartFB= %d\n",pSetInput->eSource, pSetInput->u8ScartFB));
491 u32Ret = (psAvdInstPri->fpAVDSetInput)(pSetInput->eSource, pSetInput->u8ScartFB, psAvdResPri);
492 pSetInput->bEnable = (MS_BOOL)u32Ret;
493 break;
494 case MDrv_CMD_AVD_SetVideoStandard:
495 pSetVideoStandard = (PAVD_SETVIDEOSTANDARD)pArgs;
496 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_SetVideoStandard: Standard=%d, IsInAutoTuning= %d\n",pSetVideoStandard->eStandard,pSetVideoStandard->bIsInAutoTuning));
497 u32Ret = (psAvdInstPri->fpAVDSetVideoStandard)(pSetVideoStandard->eStandard, pSetVideoStandard->bIsInAutoTuning, psAvdResPri);
498 pSetVideoStandard->bEnable = (MS_BOOL)u32Ret;
499 break;
500 case MDrv_CMD_AVD_SetChannelChange:
501 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_SetChannelChange\n"));
502 (psAvdInstPri->fpAVDSetChannelChange)(psAvdResPri);
503 break;
504 case MDrv_CMD_AVD_SetHsyncDetectionForTuning:
505 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_SetHsyncDetectionForTuning: Enanle=%d\n", *(MS_BOOL *)pArgs));
506 (psAvdInstPri->fpAVDSetHsyncDetectionForTuning)(*(MS_BOOL *)pArgs, psAvdResPri);
507 break;
508 case MDrv_CMD_AVD_Set3dComb:
509 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_Set3dComb: Enable=%d\n", *(MS_BOOL *)pArgs));
510 (psAvdInstPri->fpAVDSet3dComb)(*(MS_BOOL *)pArgs, psAvdResPri);
511 break;
512 case MDrv_CMD_AVD_SetShiftClk:
513 pSetShiftCLK = (PAVD_SETSHIFTCLK)pArgs;
514 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_SetShiftClk: Enable=%d, ShiftMode= %d\n",pSetShiftCLK->bEnable,pSetShiftCLK->eShiftMode));
515 (psAvdInstPri->fpAVDSetShiftClk)(pSetShiftCLK->bEnable, pSetShiftCLK->eShiftMode, psAvdResPri);
516 break;
517 case MDrv_CMD_AVD_SetFreerunPLL:
518 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_SetFreerunPLL:%d\n", *(AVD_VideoFreq *)pArgs));
519 (psAvdInstPri->fpAVDSetFreerunPLL)(*(AVD_VideoFreq *)pArgs, psAvdResPri);
520 break;
521 case MDrv_CMD_AVD_SetFreerunFreq:
522 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_SetFreerunFreq: %d\n",*(AVD_FreeRunFreq *)pArgs));
523 (psAvdInstPri->fpAVDSetFreerunFreq)(*(AVD_FreeRunFreq *)pArgs, psAvdResPri);
524 break;
525 case MDrv_CMD_AVD_SetFactoryPara:
526 pSetFactorypara = (PAVD_SETFACTORYPARA)pArgs;
527 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_SetFactoryPara: FactoryPara= %d , value= 0x%x\n", pSetFactorypara->FactoryPara,pSetFactorypara->u8Value));
528 (psAvdInstPri->fpAVDSetFactoryPara)(pSetFactorypara->FactoryPara, pSetFactorypara->u8Value,psAvdResPri);
529 break;
530 case MDrv_CMD_AVD_Set_Htt_UserMD:
531 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_Set_Htt_UserMD: 0x%x\n", *(MS_U16*)pArgs));
532 psAvdResPri->_u16Htt_UserMD = *(MS_U16*)pArgs;
533 break;
534 case MDrv_CMD_AVD_SetDbgLevel:
535 pSetDbgLevel = (PAVD_SETDBGLEVEL)pArgs;
536 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_SetDbgLevel: %d\n",*(AVD_DbgLv*)pArgs));
537 u32Ret = (psAvdInstPri->fpAVDSetDbgLevel)(pSetDbgLevel->u8DbgLevel, psAvdResPri);
538 pSetDbgLevel->bEnable = (MS_BOOL)u32Ret;
539 break;
540 case MDrv_CMD_AVD_SetPQFineTune:
541 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_SetPQFineTune\n"));
542 (psAvdInstPri->fpAVDSetPQFineTune)(psAvdResPri);
543 break;
544 case MDrv_CMD_AVD_Set3dCombSpeed:
545 pSet3DCOMBSpeed = (PAVD_SET3DCOMBSPEED)pArgs;
546 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_Set3dCombSpeed : COMB_57=0x%x , COMB_58=0x%x \n",pSet3DCOMBSpeed->u8COMB57,pSet3DCOMBSpeed->u8COMB58));
547 (psAvdInstPri->fpAVDSet3dCombSpeed)(pSet3DCOMBSpeed->u8COMB57, pSet3DCOMBSpeed->u8COMB58, psAvdResPri);
548 break;
549 case MDrv_CMD_AVD_SetStillImageParam:
550 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_SetStillImageParam\n"));
551 (psAvdInstPri->fpAVDSetStillImageParam)(*(AVD_Still_Image_Param*)pArgs, psAvdResPri);
552 break;
553 case MDrv_CMD_AVD_SetAFECD4Factory:
554 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_SetAFECD4Factory: 0x%x\n",*(MS_U8*)pArgs));
555 psAvdResPri->_u8AfecD4Factory = *(MS_U8*)pArgs;
556 break;
557 case MDrv_CMD_AVD_Set2D3DPatchOnOff:
558 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_Set2D3DPatchOnOff: %d\n",*(MS_BOOL*)pArgs));
559 (psAvdInstPri->fpAVDSet2D3DPatchOnOff)(*(MS_BOOL*)pArgs);
560 break;
561 case MDrv_CMD_AVD_SetAutoFineGainToFixed:
562 AVD_debug(ULOGE("AVD","MDrv_CMD_AVD_SetAutoFineGainToFixed\n"));
563 u32Ret = (psAvdInstPri->fpAVDSetAutoFineGainToFixed)();
564 break;
565 case MDrv_CMD_AVD_GetFlag:
566 pCopyToUser = (PAVD_COPYTOUSER)pArgs;
567 u32Ret= psAvdResPri->g_VD_InitData.u32VDPatchFlag;
568 pCopyToUser->u32Value = u32Ret;
569 break;
570 case MDrv_CMD_AVD_GetRegValue:
571 pGetRegValue = (PAVD_GETREGVALUE)pArgs;
572 u32Ret = (psAvdInstPri->fpAVDGetRegValue)(pGetRegValue->u16Addr);
573 pGetRegValue->u8Value = (MS_U8)u32Ret;
574 break;
575 case MDrv_CMD_AVD_GetStatus:
576 pCopyToUser = (PAVD_COPYTOUSER)pArgs;
577 u32Ret = (psAvdInstPri->fpAVDGetStatus)();
578 pCopyToUser->u16Value = (MS_U16)u32Ret;
579 break;
580 case MDrv_CMD_AVD_GetNoiseMag:
581 pCopyToUser = (PAVD_COPYTOUSER)pArgs;
582 u32Ret = (psAvdInstPri->fpAVDGetNoiseMag)();
583 pCopyToUser->u8Value = (MS_U8)u32Ret;
584 break;
585 case MDrv_CMD_AVD_GetVTotal:
586 pCopyToUser = (PAVD_COPYTOUSER)pArgs;
587 u32Ret = (psAvdInstPri->fpAVDGetVTotal)();
588 pCopyToUser->u16Value = (MS_U16)u32Ret;
589 break;
590 case MDrv_CMD_AVD_GetStandardDetection:
591 pStandardDetection = (PAVD_GETSTANDARDDETECTION)pArgs;
592 u32Ret = (psAvdInstPri->fpAVDGetStandardDetection)(&(pStandardDetection->vdLatchStatus),psAvdResPri);
593 pStandardDetection->VideoStandardType = (AVD_VideoStandardType)u32Ret;
594 break;
595 case MDrv_CMD_AVD_GetLastDetectedStandard:
596 pCopyToUser = (PAVD_COPYTOUSER)pArgs;
597 u32Ret = (MS_U32)psAvdResPri->_eLastStandard;
598 pCopyToUser->eVideoStandardType = (AVD_VideoStandardType)u32Ret;
599 break;
600 case MDrv_CMD_AVD_GetCaptureWindow:
601 pGetCaptureWindow = (PAVD_GETCAPTUREWINDOW)pArgs;
602 (psAvdInstPri->fpAVDGetCaptureWindow)(pGetCaptureWindow->stCapWin, pGetCaptureWindow->eVideoStandardType, psAvdResPri);
603 break;
604 case MDrv_CMD_AVD_GetVerticalFreq:
605 pCopyToUser = (PAVD_COPYTOUSER)pArgs;
606 u32Ret = (psAvdInstPri->fpAVDGetVerticalFreq)();
607 pCopyToUser->eVideoFreq = (AVD_VideoFreq)u32Ret;
608 break;
609 case MDrv_CMD_AVD_GetHsyncEdge:
610 pCopyToUser = (PAVD_COPYTOUSER)pArgs;
611 u32Ret = (psAvdInstPri->fpAVDGetHsyncEdge)();
612 pCopyToUser->u8Value = (MS_U8)u32Ret;
613 break;
614 case MDrv_CMD_AVD_GetDSPFineGain:
615 pCopyToUser = (PAVD_COPYTOUSER)pArgs;
616 u32Ret = (psAvdInstPri->fpAVDGetDSPFineGain)(psAvdResPri);
617 pCopyToUser->u8Value = (MS_U8)u32Ret;
618 break;
619 case MDrv_CMD_AVD_GetDSPVersion:
620 pCopyToUser = (PAVD_COPYTOUSER)pArgs;
621 u32Ret = (psAvdInstPri->fpAVDGetDSPVersion)();
622 pCopyToUser->u16Value = (MS_U16)u32Ret;
623 break;
624 case MDrv_CMD_AVD_GetLibVer:
625 pGetLibVer = (PAVD_GETLIBVER)pArgs;
626 //u32Ret = (psAvdInstPri->fpAVDGetLibVer)((const MSIF_Version**)pArgs);
627 u32Ret = (psAvdInstPri->fpAVDGetLibVer)(pGetLibVer->ppVersion);
628 pGetLibVer->eAVDResult = (AVD_Result)u32Ret;
629 break;
630 case MDrv_CMD_AVD_GetInfo:
631 pCopyToUser = (PAVD_COPYTOUSER)pArgs;
632 //(psAvdInstPri->fpAVDGetInfo)((AVD_Info*)pArgs, psAvdResPri);
633 pCopyToUser->eAVDInfo.eVDInputSource = psAvdResPri->_eVDInputSource;
634 pCopyToUser->eAVDInfo.eVideoSystem = psAvdResPri->_eVideoSystem;
635 pCopyToUser->eAVDInfo.eLastStandard = psAvdResPri->_eLastStandard;
636 pCopyToUser->eAVDInfo.u8AutoDetMode=psAvdResPri->_u8AutoDetMode;
637 pCopyToUser->eAVDInfo.u16CurVDStatus=psAvdResPri->_u16CurVDStatus;
638 pCopyToUser->eAVDInfo.u8AutoTuningIsProgress=psAvdResPri->_u8AutoTuningIsProgress;
639 break;
640 case MDrv_CMD_AVD_IsSyncLocked:
641 pCopyToUser = (PAVD_COPYTOUSER)pArgs;
642 u32Ret = (psAvdInstPri->fpAVDIsSyncLocked)();
643 pCopyToUser->bEnable= (MS_BOOL)u32Ret;
644 break;
645 case MDrv_CMD_AVD_IsSignalInterlaced:
646 pCopyToUser = (PAVD_COPYTOUSER)pArgs;
647 u32Ret = (psAvdInstPri->fpAVDIsSignalInterlaced)();
648 pCopyToUser->bEnable= (MS_BOOL)u32Ret;
649 break;
650 case MDrv_CMD_AVD_IsColorOn:
651 pCopyToUser = (PAVD_COPYTOUSER)pArgs;
652 u32Ret = (psAvdInstPri->fpAVDIsColorOn)();
653 pCopyToUser->bEnable= (MS_BOOL)u32Ret;
654 break;
655 case MDrv_CMD_AVD_SetPowerState:
656 pSetPowerState = (PAVD_SETPOWERSTATE)pArgs;
657 u32Ret = (psAvdInstPri->fpAVDSetPowerState)(pSetPowerState->u16PowerState, psAvdResPri);
658 pSetPowerState->u32Value = (MS_U32)u32Ret;
659 break;
660 case MDrv_CMD_AVD_GetMacroVisionDetect:
661 pCopyToUser = (PAVD_COPYTOUSER)pArgs;
662 u32Ret = (psAvdInstPri->fpAVDGetMacroVisionDetect)();
663 pCopyToUser->bEnable= (MS_BOOL)u32Ret;
664 break;
665 case MDrv_CMD_AVD_GetCGMSDetect:
666 pCopyToUser = (PAVD_COPYTOUSER)pArgs;
667 u32Ret = (psAvdInstPri->fpAVDGetCGMSDetect)();
668 pCopyToUser->bEnable= (MS_BOOL)u32Ret;
669 break;
670 case MDrv_CMD_AVD_SetBurstWinStart:
671 (psAvdInstPri->fpAVDSetBurstWinStart)(*(MS_U8*)pArgs);
672 break;
673 case MDrv_CMD_AVD_AliveCheck:
674 pCopyToUser = (PAVD_COPYTOUSER)pArgs;
675 u32Ret = (psAvdInstPri->fpAVDIsAVDAlive)();
676 pCopyToUser->bEnable= (MS_BOOL)u32Ret;
677 break;
678 case MDrv_CMD_AVD_IsLockAudioCarrier:
679 pCopyToUser = (PAVD_COPYTOUSER)pArgs;
680 u32Ret = (psAvdInstPri->fpAVDIsLockAudioCarrier)();
681 pCopyToUser->bEnable= (MS_BOOL)u32Ret;
682 break;
683 default:
684 break;
685 }
686 UtopiaResourceRelease(pResource);
687
688 return u32Ret;
689 }
690
AVDClose(void * pInstance)691 MS_U32 AVDClose(void* pInstance)
692 {
693 UtopiaInstanceDelete(pInstance);
694
695 return TRUE;
696 }
697
698 extern void SerPrintf(char *fmt,...);
699
AVDStr(MS_U32 u32PowerState,void * pModule)700 MS_U32 AVDStr(MS_U32 u32PowerState, void* pModule)
701 {
702 MS_U32 u32Return = UTOPIA_STATUS_FAIL;
703
704 //UtopiaModuleGetSTRPrivate(pModule, (void**));
705
706 if (u32PowerState == E_POWER_SUSPEND)
707 {
708 if(bInitSTR==1)
709 {
710 #if defined(MSOS_TYPE_LINUX_KERNEL)
711 eVideoStandard_Str = vd_str_timingchangedetection();
712 #endif
713 vd_str_store_reg();
714 vd_str_store_comb_sub_reg();
715 HAL_AVD_COMB_SetMemoryRequest(DISABLE);
716 }
717 u32Return = UTOPIA_STATUS_SUCCESS;//SUSPEND_OK;
718 }
719 else if (u32PowerState == E_POWER_RESUME)
720 {
721 #if defined(MSOS_TYPE_LINUX_KERNEL)
722 UtopiaStrWaitCondition("avd", u32PowerState, 0);
723 #endif
724
725 if(bInitSTR==1)
726 {
727 vd_str_init();
728 #if ((T3_LOAD_CODE==0)&&(TWO_VD_DSP_CODE==0))
729 vdmcu_str_init();
730 #endif
731
732 vd_str_setinput();
733 vd_str_load_reg();
734 vd_str_load_comb_sub_reg();
735 if((eSource_Str!=E_INPUT_SOURCE_INVALID))
736 {
737 vd_str_stablestatus();
738 }
739 #if defined(MSOS_TYPE_LINUX_KERNEL)
740 if((eSource_Str==E_INPUT_SOURCE_CVBS1) ||
741 (eSource_Str==E_INPUT_SOURCE_CVBS2) ||
742 (eSource_Str==E_INPUT_SOURCE_CVBS3) ||
743 (eSource_Str==E_INPUT_SOURCE_SCART1) ||
744 (eSource_Str==E_INPUT_SOURCE_SCART2) ||
745 (eSource_Str==E_INPUT_SOURCE_SVIDEO1) ||
746 (eSource_Str==E_INPUT_SOURCE_SVIDEO2))
747 {
748 AVD_VideoStandardType etemp_VideoStandard = vd_str_timingchangedetection();
749
750 if(eVideoStandard_Str!=etemp_VideoStandard)
751 {
752 UtopiaStrSetData("timing change","yes");
753 }
754 else
755 {
756 UtopiaStrSetData("timing change","no");
757 }
758 }
759 #endif
760 }
761 #if defined(MSOS_TYPE_LINUX_KERNEL)
762 UtopiaStrSendCondition("avd",u32PowerState ,0);
763 #endif
764
765 u32Return = UTOPIA_STATUS_SUCCESS;//RESUME_OK;
766 }
767 else
768 {
769 //SerPrintf("[AVD] STR unknown State!!!\n");
770 u32Return = UTOPIA_STATUS_FAIL;
771 }
772
773 return u32Return;// for success
774 }
775
776
777 #define BANK_SIZE 0x100
778 //======Bank============
779 static MS_U8 s_au16Bank_AFEC[BANK_SIZE] = {0} ;
780 static MS_U8 s_au16Bank_COMB[BANK_SIZE] = {0} ;
781 static MS_U8 s_au16Bank_SECAM[BANK_SIZE] = {0} ;
782 //static MS_U16 bank_clkgen0[BANK_SIZE] = {0} ;
783
784 //======Sub-bank==========
785 static MS_U8 s_au16SubBank_COMB01[0x70] = {0};
786 static MS_U8 s_au16SubBank_COMB02[0x10] = {0};
787 static MS_U8 s_au16SubBank_COMB03[0x10] = {0};
788 static MS_U8 s_au16SubBank_COMB04[0x10] = {0};
789 static MS_U8 s_au16SubBank_COMB05[0x10] = {0};
790
vd_str_store_reg(void)791 static void vd_str_store_reg(void)
792 {
793 MS_U32 i;
794
795 /*store afec bank*/
796 for(i = 0; i < BANK_SIZE ; i++)
797 {
798 s_au16Bank_AFEC[i] = HAL_AVD_GetReg(AFEC_REG_BASE+i);
799 }
800
801 /*store comb bank*/
802 for(i = 0; i < BANK_SIZE ; i++)
803 {
804 s_au16Bank_COMB[i] = HAL_AVD_GetReg(COMB_REG_BASE+i);
805 }
806
807 /*store secam bank*/
808 for(i = 0; i < BANK_SIZE ; i++)
809 {
810 s_au16Bank_SECAM[i] = HAL_AVD_GetReg(SCM_REG_BASE+i);
811 }
812 }
813
vd_str_store_comb_sub_reg(void)814 static void vd_str_store_comb_sub_reg(void)
815 {
816 MS_U32 i;
817 // store comb sub-bank 01
818 HAL_AVD_SetReg(COMB_REG_BASE,0x01);
819 for(i = 0; i < 0x70 ; i++)
820 {
821 s_au16SubBank_COMB01[i] = HAL_AVD_GetReg(COMB_REG_BASE+i);
822 }
823
824 // store comb sub-bank 02
825 HAL_AVD_SetReg(COMB_REG_BASE,0x02);
826 for(i = 0; i < 0x10 ; i++)
827 {
828 s_au16SubBank_COMB02[i] = HAL_AVD_GetReg(COMB_REG_BASE+i);
829 }
830
831 // store comb sub-bank 03
832 HAL_AVD_SetReg(COMB_REG_BASE,0x03);
833 for(i = 0; i < 0x10 ; i++)
834 {
835 s_au16SubBank_COMB03[i] = HAL_AVD_GetReg(COMB_REG_BASE+i);
836 }
837
838 // store comb sub-bank 04
839 HAL_AVD_SetReg(COMB_REG_BASE,0x04);
840 for(i = 0; i < 0x10 ; i++)
841 {
842 s_au16SubBank_COMB04[i] = HAL_AVD_GetReg(COMB_REG_BASE+i);
843 }
844
845 // store comb sub-bank 05
846 HAL_AVD_SetReg(COMB_REG_BASE,0x05);
847 for(i = 0; i < 0x10 ; i++)
848 {
849 s_au16SubBank_COMB05[i] = HAL_AVD_GetReg(COMB_REG_BASE+i);
850 }
851
852 // return to comb bank
853 HAL_AVD_SetReg(COMB_REG_BASE,0x00);
854
855 }
856
vd_str_init(void)857 static void vd_str_init(void)
858 {
859 HAL_AVD_RegInit();
860
861 HAL_AVD_COMB_SetMemoryProtect(u32COMB_3D_Addr_Str,u32COMB_3D_Len_Str);
862 }
863
vdmcu_str_init(void)864 static void vdmcu_str_init(void)
865 {
866 #if T3_LOAD_CODE
867 HAL_AVD_AFEC_SetClockSource(TRUE);
868 #endif
869
870 HAL_AVD_VDMCU_LoadDSP(pu8VD_DSP_Code_Address_Str,u32VD_DSP_Code_Len_Str);
871
872 #if T3_LOAD_CODE
873 HAL_AVD_VDMCU_SetFreeze(ENABLE);
874 HAL_AVD_AFEC_SetClockSource(FALSE);
875 HAL_AVD_VDMCU_SetFreeze(DISABLE);
876 #endif
877 HAL_AVD_VDMCU_SetClock(AVD_VDMCU_CLOCK_108Mhz, AVD_VDMCU_CLOCK_NORMAL);
878 }
879
vd_str_setinput(void)880 static void vd_str_setinput(void)
881 {
882 HAL_AVD_AFEC_SetInput(eSource_Str,u8ScartFB_Str,eDemodType_Str,u32XTAL_Clock_Str);
883
884 #if(TWO_VD_DSP_CODE)
885 vdmcu_str_init();
886 #endif
887
888 #if T3_LOAD_CODE
889 _Drv_AVD_VDMCU_Init();
890 #else
891 HAL_AVD_AFEC_McuReset();
892 #endif
893
894 HAL_AVD_COMB_SetMemoryRequest(ENABLE);
895 }
896
vd_str_load_reg(void)897 static void vd_str_load_reg(void)
898 {
899 MS_U32 i;
900
901 /*load afec bank*/
902 for(i = 0; i < BANK_SIZE ; i++)
903 {
904 HAL_AVD_SetReg(AFEC_REG_BASE+i, s_au16Bank_AFEC[i]);
905 }
906
907 /*load comb bank*/
908 for(i = 0; i < BANK_SIZE ; i++)
909 {
910 HAL_AVD_SetReg(COMB_REG_BASE+i, s_au16Bank_COMB[i]);
911 }
912
913 /*load secam bank*/
914 for(i = 0; i < BANK_SIZE ; i++)
915 {
916 HAL_AVD_SetReg(SCM_REG_BASE+i, s_au16Bank_SECAM[i]);
917 }
918
919 }
920
vd_str_load_comb_sub_reg(void)921 static void vd_str_load_comb_sub_reg(void)
922 {
923 MS_U32 i;
924 // load comb sub-bank 01
925 HAL_AVD_SetReg(COMB_REG_BASE,0x01); //set to comb sub bank01
926 for(i = 1; i < 0x70 ; i++)
927 {
928 HAL_AVD_SetReg(COMB_REG_BASE+i, s_au16SubBank_COMB01[i]);
929 }
930
931 // store comb sub-bank 02
932 HAL_AVD_SetReg(COMB_REG_BASE,0x02);
933 for(i = 1; i < 0x10 ; i++)
934 {
935 HAL_AVD_SetReg(COMB_REG_BASE+i, s_au16SubBank_COMB02[i]);
936 }
937
938 // store comb sub-bank 03
939 HAL_AVD_SetReg(COMB_REG_BASE,0x03);
940 for(i = 1; i < 0x10 ; i++)
941 {
942 HAL_AVD_SetReg(COMB_REG_BASE+i, s_au16SubBank_COMB03[i]);
943 }
944
945 // store comb sub-bank 04
946 HAL_AVD_SetReg(COMB_REG_BASE,0x04);
947 for(i = 1; i < 0x10 ; i++)
948 {
949 HAL_AVD_SetReg(COMB_REG_BASE+i, s_au16SubBank_COMB04[i]);
950 }
951
952 // store comb sub-bank 05
953 HAL_AVD_SetReg(COMB_REG_BASE,0x05);
954 for(i = 1; i < 0x10 ; i++)
955 {
956 HAL_AVD_SetReg(COMB_REG_BASE+i, s_au16SubBank_COMB05[i]);
957 }
958
959 // return to comb bank
960 HAL_AVD_SetReg(COMB_REG_BASE,0x00);
961
962 }
963
964
965 //-------------------------------------------------------------------------------------------------
966 // Local VD functions
967 //-------------------------------------------------------------------------------------------------
968
_Drv_AVD_VDMCU_Init(AVD_RESOURCE_PRIVATE * pResource)969 static void _Drv_AVD_VDMCU_Init(AVD_RESOURCE_PRIVATE *pResource)
970 {
971 #if NEW_VD_MCU
972 MS_U8 u8Temp;
973 #endif
974
975 #if AVD_DRV_DEBUG
976 if (pResource->_u8AVDDbgLevel == AVD_DBGLV_DEBUG)
977 {
978 ULOGE("AVD","_MDrv_AVD_VDMCU_Init\n");
979 }
980 #endif
981
982 #if T3_LOAD_CODE // weicheng 20121003
983 HAL_AVD_AFEC_SetClockSource(TRUE);
984 #endif
985
986 #if 0
987 if(!(g_VD_InitData.u32VDPatchFlag & AVD_PATCH_DISABLE_PWS))
988 {
989 HAL_PWS_Stop_VDMCU();
990 }
991 #endif
992
993 // store DSP code information for STR function
994 pu8VD_DSP_Code_Address_Str = pResource->g_VD_InitData.pu8VD_DSP_Code_Address;
995 u32VD_DSP_Code_Len_Str = pResource->g_VD_InitData.u32VD_DSP_Code_Len;
996
997 //--------------------------------------------------------
998 // Load code
999 //--------------------------------------------------------
1000 #if (LOAD_CODE_BYTE_WRITE_ONLY)//weicheng 20121003
1001 if (1)
1002 #else
1003 if (pResource->g_VD_InitData.eLoadCodeType == AVD_LOAD_CODE_BYTE_WRITE) //BY 20090402 (_bVD_FWStatus)
1004 #endif
1005 {
1006 // TODO add different loading function for T3
1007 #if AVD_DRV_DEBUG
1008 if (pResource->_u8AVDDbgLevel == AVD_DBGLV_DEBUG)
1009 {
1010 ULOGE("AVD","[AVD_LOAD_CODE_BYTE_WRITE]F/W ADDR = 0x%X\n", (unsigned int)(pResource->g_VD_InitData.pu8VD_DSP_Code_Address));
1011 }
1012 #endif
1013 HAL_AVD_VDMCU_LoadDSP(pResource->g_VD_InitData.pu8VD_DSP_Code_Address, pResource->g_VD_InitData.u32VD_DSP_Code_Len);
1014 #if T3_LOAD_CODE //weicheng 20121003
1015 HAL_AVD_VDMCU_SetFreeze(ENABLE);
1016 HAL_AVD_AFEC_SetClockSource(FALSE);
1017 HAL_AVD_VDMCU_SetFreeze(DISABLE);
1018 #endif
1019 }
1020 else if (pResource->g_VD_InitData.eLoadCodeType == AVD_LOAD_CODE_BDMA_FROM_SPI)
1021 {
1022 // TODO implement DMA function
1023 // copy code from flash to SDRAM
1024 // BY 20090402 MDrv_DMA_XCopy(MCPY_LOADVDMCUFW, BinInfo.B_FAddr, 0x00000l, BinInfo.B_Len); // TODO add DMA load function
1025 //MDrv_BDMA_CopyHnd(g_VD_InitData.pu8VD_DSP_Code_Address, 0 , g_VD_InitData.u32VD_DSP_Code_Len, BDMA_CPYTYPE_COL, BDMA_OPCFG_DEF);
1026 #if AVD_DRV_DEBUG
1027 if (pResource->_u8AVDDbgLevel == AVD_DBGLV_DEBUG)
1028 {
1029 ULOGE("AVD","[AVD_LOAD_CODE_BDMA_FROM_SPI]F/W ADDR = 0x%X 0x%X\n", (unsigned int)pResource->g_VD_InitData.u32VD_DSP_Code_Address, (unsigned int)pResource->g_VD_InitData.u32VD_DSP_Code_Len);
1030 }
1031 #endif
1032 //MDrv_BDMA_SetDbgLevel(E_BDMA_DBGLV_ALL);
1033 HAL_AVD_VDMCU_SetFreeze(ENABLE);
1034 #if NEW_VD_MCU
1035 u8Temp = Drv_AVD_GetRegValue(VD_MCU_SRAM_EN);
1036 Drv_AVD_SetRegValue(VD_MCU_SRAM_EN,u8Temp&(~ BIT(0)));
1037 #endif
1038 //MDrv_SERFLASH_CopyHnd(pResource->g_VD_InitData.u32VD_DSP_Code_Address, 0 , pResource->g_VD_InitData.u32VD_DSP_Code_Len, E_SPIDMA_DEV_VDMCU, SPIDMA_OPCFG_DEF);
1039 #if NEW_VD_MCU
1040 Drv_AVD_SetRegValue(VD_MCU_SRAM_EN,u8Temp|BIT(0));
1041 #endif
1042 HAL_AVD_VDMCU_SetFreeze(DISABLE);
1043 #if T3_LOAD_CODE // weicheng 20121003
1044 HAL_AVD_VDMCU_SetFreeze(ENABLE);
1045 HAL_AVD_AFEC_SetClockSource(FALSE);
1046 HAL_AVD_VDMCU_SetFreeze(DISABLE);
1047 #endif
1048 }
1049 #if T3_LOAD_CODE // weicheng 20121003
1050 else if (pResource->g_VD_InitData.eLoadCodeType == AVD_LOAD_CODE_BDMA_FROM_DRAM) // TODO add MIU0/1 check
1051 {
1052 // TODO implement DMA function
1053 // copy code from flash to SDRAM
1054 // BY 20090402 MDrv_DMA_XCopy(MCPY_LOADVDMCUFW, BinInfo.B_FAddr, 0x00000l, BinInfo.B_Len); // TODO add DMA load function
1055 //MDrv_BDMA_CopyHnd(g_VD_InitData.pu8VD_DSP_Code_Address, 0 , g_VD_InitData.u32VD_DSP_Code_Len, BDMA_CPYTYPE_COL, BDMA_OPCFG_DEF);
1056 #if AVD_DRV_DEBUG
1057 if (pResource->_u8AVDDbgLevel == AVD_DBGLV_DEBUG)
1058 {
1059 ULOGE("AVD","[AVD_LOAD_CODE_BDMA_FROM_DRAM]F/W ADDR = 0x%X\n", (unsigned int)(pResource->g_VD_InitData.pu8VD_DSP_Code_Address));
1060 }
1061 #endif
1062 HAL_AVD_VDMCU_SetFreeze(ENABLE);
1063 MDrv_BDMA_CopyHnd(pResource->g_VD_InitData.u32VD_DSP_Code_Address, 0 , pResource->g_VD_InitData.u32VD_DSP_Code_Len, E_BDMA_SDRAM2VDMCU, BDMA_OPCFG_DEF);
1064 HAL_AVD_VDMCU_SetFreeze(DISABLE);
1065
1066 HAL_AVD_VDMCU_SetFreeze(ENABLE);
1067 HAL_AVD_AFEC_SetClockSource(FALSE);
1068 HAL_AVD_VDMCU_SetFreeze(DISABLE);
1069 }
1070 #endif
1071 else
1072 {
1073 #if AVD_DRV_DEBUG
1074 if (pResource->_u8AVDDbgLevel >= AVD_DBGLV_ERR)
1075 {
1076 ULOGE("AVD","_MDrv_AVD_VDMCU_Init eLoadCodeType Invalid\r\n");
1077 }
1078 #endif
1079 }
1080
1081 HAL_AVD_VDMCU_SetClock(AVD_VDMCU_CLOCK_108Mhz, AVD_VDMCU_CLOCK_NORMAL);
1082
1083 HAL_AVD_AFEC_SetPatchFlag(pResource->g_VD_InitData.u32VDPatchFlag);
1084
1085 //HAL_AVD_RegInitExt(pResource->g_VD_InitData.u8VdDecInitializeExt); // TODO use system variable type
1086
1087 pResource->_u8AfecD4Factory=HAL_AVD_GetReg(BK_AFEC_D4);
1088 }
1089
_Drv_AVD_3DCombSpeedup(AVD_RESOURCE_PRIVATE * pResource)1090 static void _Drv_AVD_3DCombSpeedup(AVD_RESOURCE_PRIVATE *pResource)
1091 {
1092 HAL_AVD_COMB_Set3dCombSpeed(pResource->_u8Comb57, pResource->_u8Comb58, pResource->_u8Comb5F); //need to review, sonic 20091218
1093 #if ADJUST_CHANNEL_CHANGE_HSYNC
1094 HAL_AVD_AFEC_SetSwingLimit(0);
1095 HAL_AVD_AFEC_EnableBottomAverage(DISABLE); // more sensitivity
1096 #endif
1097 if (!(pResource->_u8AfecD4Factory & BIT(4)))
1098 {
1099 HAL_AVD_AFEC_EnableVBIDPLSpeedup(ENABLE);
1100 }
1101 HAL_AVD_SetReg(BK_AFEC_A1, 0x6A);
1102 HAL_AVD_SetReg(BK_AFEC_A0, 0xBC);
1103 pResource->_u8Comb10Bit3Flag=BIT(2)|BIT(1)|BIT(0);
1104 pResource->_u32VideoSystemTimer=MsOS_GetSystemTime();
1105 #if AVD_DRV_DEBUG
1106 if (pResource->_u8AVDDbgLevel == AVD_DBGLV_DEBUG)
1107 {
1108 ULOGE("AVD","_MDrv_AVD_3DCombSpeedup Enable %d\n",(int)pResource->_u32VideoSystemTimer);
1109 }
1110 #endif
1111 }
1112
1113 //20120719 Brian Monitor the Dsp frequency and change the CLK setting for the shift CLK
_Drv_AVD_ShifClk_Monitor(AVD_RESOURCE_PRIVATE * pResource)1114 static void _Drv_AVD_ShifClk_Monitor(AVD_RESOURCE_PRIVATE *pResource)
1115 {
1116 MS_U16 u16Status;
1117 AVD_VideoStandardType eVideoStandard = E_VIDEOSTANDARD_PAL_BGHI;
1118 u16Status = HAL_AVD_AFEC_GetStatus();
1119 switch (u16Status & VD_FSC_TYPE)
1120 {
1121 case VD_FSC_4433:
1122 eVideoStandard = E_VIDEOSTANDARD_PAL_BGHI;
1123 break;
1124
1125 case VD_FSC_3579:
1126 eVideoStandard = E_VIDEOSTANDARD_NTSC_M;
1127 break;
1128
1129 case VD_FSC_3575:
1130 eVideoStandard = E_VIDEOSTANDARD_PAL_M;
1131 break;
1132
1133 case VD_FSC_3582:
1134 eVideoStandard = E_VIDEOSTANDARD_PAL_N;
1135 break;
1136 case VD_FSC_4285:
1137 eVideoStandard = E_VIDEOSTANDARD_SECAM;
1138 break;
1139
1140 default :
1141 break;
1142
1143 }
1144 HAL_AVD_ShiftClk(pResource->gShiftMode, eVideoStandard, pResource->g_VD_InitData.u32XTAL_Clock);
1145 }
1146
_Drv_AVD_SCART_Monitor(AVD_RESOURCE_PRIVATE * pResource)1147 static void _Drv_AVD_SCART_Monitor(AVD_RESOURCE_PRIVATE *pResource)
1148 {
1149 pResource->_u32SCARTWaitTime=MsOS_GetSystemTime();
1150 if(pResource->_u8SCARTSwitch==1) //Svideo
1151 {
1152 HAL_AVD_SetReg(BK_AFEC_1A,(HAL_AVD_GetReg(BK_AFEC_1A)|0xC0));
1153 HAL_AVD_SetReg(BK_COMB_10,(HAL_AVD_GetReg(BK_COMB_10)|0x80));
1154 HAL_AVD_SetReg(BK_AFEC_1F,(HAL_AVD_GetReg(BK_AFEC_1F)|0x80));
1155 HAL_AVD_SetReg(BK_AFEC_A2,(HAL_AVD_GetReg(BK_AFEC_A2)&0xCF)|0x20);
1156
1157 if (E_VIDEOSTANDARD_NTSC_M == pResource->_eVideoSystem)
1158 {
1159 HAL_AVD_COMB_SetYCPipe(0x20);
1160 }
1161 else // SIG_NTSC_443, SIG_PAL, SIG_PAL_M, SIG_PAL_NC, SIG_SECAM
1162 {
1163 HAL_AVD_COMB_SetYCPipe(0x30);
1164 }
1165
1166 switch (pResource->_eVideoSystem)
1167 {
1168 case E_VIDEOSTANDARD_PAL_M:
1169 case E_VIDEOSTANDARD_PAL_N:
1170 HAL_AVD_COMB_SetCbCrInverse(0x04);
1171 break;
1172
1173 case E_VIDEOSTANDARD_NTSC_44:
1174 HAL_AVD_COMB_SetCbCrInverse(0x0C);
1175 break;
1176
1177 case E_VIDEOSTANDARD_PAL_60:
1178 HAL_AVD_COMB_SetCbCrInverse(0x08);
1179 break;
1180
1181 case E_VIDEOSTANDARD_NTSC_M:
1182 case E_VIDEOSTANDARD_SECAM:
1183 HAL_AVD_COMB_SetCbCrInverse(0x00);
1184 break;
1185
1186 case E_VIDEOSTANDARD_PAL_BGHI:
1187 default:
1188 HAL_AVD_COMB_SetCbCrInverse(0x08);
1189 break;
1190 }
1191
1192 }
1193 else //CVBS
1194 {
1195 HAL_AVD_SetReg(BK_AFEC_1A,(HAL_AVD_GetReg(BK_AFEC_1A)&0x3F));
1196 HAL_AVD_SetReg(BK_COMB_10,(HAL_AVD_GetReg(BK_COMB_10)&0x7F));
1197 HAL_AVD_SetReg(BK_AFEC_1F,(HAL_AVD_GetReg(BK_AFEC_1F)&0x7F));
1198 HAL_AVD_SetReg(BK_AFEC_A2,(HAL_AVD_GetReg(BK_AFEC_A2)&0xCF));
1199
1200 HAL_AVD_COMB_SetYCPipe(0x20);
1201 HAL_AVD_COMB_SetCbCrInverse(0x00);
1202 }
1203 pResource->_u8SCARTPrestandard=pResource->_eVideoSystem;
1204
1205 }
1206
_Drv_AVD_MBX_WaitReady(void)1207 static void _Drv_AVD_MBX_WaitReady(void)
1208 {
1209 MS_U32 u32StartTime=OS_SYSTEM_TIME();
1210 while (OS_SYSTEM_TIME()-u32StartTime < 10)
1211 {
1212 if (!HAL_AVD_GetReg(BK_AFEC_C0)) break;
1213 }
1214 }
1215
1216 #if 0
1217 static void _Drv_AVD_SyncRangeHandler(AVD_RESOURCE_PRIVATE *pResource)
1218 {
1219 #ifndef MSOS_TYPE_LINUX
1220 XC_ApiStatus sXC_Status;
1221 XC_SETWIN_INFO sXC_SetWinInfo;
1222 MS_WINDOW_TYPE SrcWin;
1223 static MS_BOOL bXC_BlackScreen_Enabled = TRUE;
1224 static MS_U16 u16XC_VCap;
1225
1226 MS_U16 wVtotal = HAL_AVD_AFEC_GetVTotal();
1227 MS_U16 wVsize_bk, g_cVSizeShift;
1228 static MS_U8 u8SyncStableCounter = 6;
1229
1230 if( (!Drv_AVD_IsSyncLocked()) ||
1231 MApi_XC_IsFreezeImg(MAIN_WINDOW) ||
1232 (pResource->u16PreVtotal == 0))
1233 {
1234 bXC_BlackScreen_Enabled = TRUE;
1235 return;
1236 }
1237
1238 /*
1239 if ((wHPeriod > (u16PreHPeriod + 3)) || (wHPeriod < (u16PreHPeriod - 3)))
1240 {
1241 printf("P3 \r\n");
1242 return;
1243 }
1244 */
1245
1246 // Get XC capture height from the begining
1247 if(MApi_XC_IsBlackVideoEnable(MAIN_WINDOW))
1248 {
1249 // XC still blocked the video
1250 bXC_BlackScreen_Enabled = TRUE;
1251 return;
1252 }
1253 else
1254 {
1255 if(bXC_BlackScreen_Enabled)
1256 {
1257 // update new capture height
1258 bXC_BlackScreen_Enabled = FALSE;
1259 MApi_XC_GetCaptureWindow( &SrcWin, MAIN_WINDOW );
1260 u16XC_VCap = SrcWin.height;
1261
1262 #if 0
1263 if ((wVtotal < 675 ) && (wVtotal > 570))
1264 u16PreVtotal = 625;
1265 else
1266 u16PreVtotal = 525;
1267 #endif
1268 printf("******** VCap = %d, PreVtt = %d\n", u16XC_VCap, pResource->u16PreVtotal);
1269 }
1270 }
1271
1272 //if (((wVtotal < 620) && (wVtotal > 570)) || ((wVtotal > 630) && (wVtotal < 670)))
1273 if ((wVtotal < 620) && (wVtotal > 570))
1274 {
1275 if (pResource->u16PreVtotal != wVtotal)
1276 {
1277 pResource->u16PreVtotal = wVtotal;
1278 u8SyncStableCounter = 0;
1279 }
1280 else if (u8SyncStableCounter < 5)
1281 u8SyncStableCounter ++;
1282 }
1283 //else if (((wVtotal < 520) && (wVtotal > 470)) || ((wVtotal > 530) && (wVtotal < 570)))
1284 else if ((wVtotal < 520) && (wVtotal > 470))
1285 {
1286
1287 if (pResource->u16PreVtotal != wVtotal)
1288 {
1289 pResource->u16PreVtotal = wVtotal;
1290 u8SyncStableCounter = 0;
1291 }
1292 else if (u8SyncStableCounter < 5)
1293 u8SyncStableCounter ++;
1294 }
1295 else if(((wVtotal <= 630) && (wVtotal >= 620)) || ((wVtotal <= 530) && (wVtotal >= 520)))
1296 {
1297 if((pResource->u16PreVtotal > (wVtotal + 5)) || (pResource->u16PreVtotal < (wVtotal - 5)))
1298 {
1299 pResource->u16PreVtotal = wVtotal;
1300 u8SyncStableCounter = 0;
1301 }
1302 else if (u8SyncStableCounter < 5)
1303 u8SyncStableCounter ++;
1304 }
1305
1306 if(u8SyncStableCounter == 5)
1307 {
1308 u8SyncStableCounter = 6;
1309 wVsize_bk = u16XC_VCap;
1310 if (((wVtotal < 620) && (wVtotal > 570)) || ((wVtotal > 630) && (wVtotal < 670)))
1311 {
1312 if (wVtotal > 625)
1313 {
1314 g_cVSizeShift = wVtotal - 625;
1315 u16XC_VCap = u16XC_VCap + g_cVSizeShift;
1316 }
1317 else
1318 {
1319 g_cVSizeShift = 625 - wVtotal;
1320 u16XC_VCap = u16XC_VCap - g_cVSizeShift;
1321 }
1322 }
1323 else if (((wVtotal < 520) && (wVtotal > 470)) || ((wVtotal > 530) && (wVtotal < 570)))
1324 {
1325 if (wVtotal > 525)
1326 {
1327 g_cVSizeShift = wVtotal - 525;
1328 u16XC_VCap = u16XC_VCap + g_cVSizeShift;
1329 }
1330 else
1331 {
1332 g_cVSizeShift = 525 - wVtotal;
1333 u16XC_VCap = u16XC_VCap - g_cVSizeShift;
1334 }
1335 }
1336
1337 memset(&sXC_Status, 0, sizeof(XC_ApiStatus));
1338 memset(&sXC_SetWinInfo, 0, sizeof(XC_SETWIN_INFO));
1339 MApi_XC_GetStatus(&sXC_Status, MAIN_WINDOW);
1340 memcpy(&sXC_SetWinInfo, &sXC_Status, sizeof(XC_SETWIN_INFO));
1341
1342 // reset changed part
1343 sXC_SetWinInfo.bPreHCusScaling = FALSE;
1344 sXC_SetWinInfo.bPreVCusScaling = FALSE;
1345 sXC_SetWinInfo.stCapWin.height = u16XC_VCap;
1346
1347 MApi_XC_SetWindow(&sXC_SetWinInfo, sizeof(XC_SETWIN_INFO), MAIN_WINDOW);
1348
1349 u16XC_VCap = wVsize_bk;
1350 }
1351 #endif
1352 }
1353 #endif
_Drv_AVD_COMB_StillImage(AVD_RESOURCE_PRIVATE * pResource)1354 void _Drv_AVD_COMB_StillImage(AVD_RESOURCE_PRIVATE *pResource)
1355 {
1356 MS_U8 u8Ctl;
1357 MS_U16 u16Value;
1358 static MS_U8 check_counter = 0;
1359 static MS_U16 Total_Nosiemag = 0;
1360 static MS_U8 status = 2;
1361 static MS_U16 _u16PreNoiseMag = 0;
1362
1363 if(pResource->_eVDInputSource == E_INPUT_SOURCE_ATV)
1364 {
1365 u8Ctl = HAL_AVD_AFEC_GetNoiseMag();// get VD noise magnitude
1366 if(pResource->g_stillImageParam.bMessageOn)
1367 {
1368 //printf(" ====================> Noise mag =%d \n",(int)u8Ctl);
1369 }
1370
1371 if (check_counter<10)
1372 {
1373 Total_Nosiemag+= u8Ctl;
1374 check_counter++;
1375 }
1376 else
1377 {
1378 u16Value =Total_Nosiemag;
1379 if(pResource->g_stillImageParam.bMessageOn)
1380 {
1381 //printf(" ========================> AVG noise mag =%d \n",(int) u16Value);
1382 }
1383 u16Value = ( 8*_u16PreNoiseMag + 8*u16Value )/16;
1384 /////////////////////////////////////////////////////////////////////////////////////
1385
1386 if(u16Value <= pResource->g_stillImageParam.u8Threshold1)
1387 {
1388 _u16PreNoiseMag = u16Value;
1389 check_counter = 0;
1390 Total_Nosiemag = 0;
1391 u8Ctl = HAL_AVD_GetReg(BK_COMB_38);
1392 if(pResource->g_stillImageParam.bMessageOn)
1393 {
1394 //printf("=====>Thread =%d \n\n",u16Value);
1395 ULOGE("AVD","=====>1Thread1: u16Value =0x%x \n\n",u16Value);
1396 }
1397 HAL_AVD_SetReg(BK_COMB_37, pResource->g_stillImageParam.u8Str1_COMB37);
1398 HAL_AVD_SetReg(BK_COMB_38, (u8Ctl & pResource->g_stillImageParam.u8Str1_COMB38));
1399 HAL_AVD_SetReg(BK_COMB_7C, pResource->g_stillImageParam.u8Str1_COMB7C);
1400 HAL_AVD_SetReg(BK_COMB_ED, pResource->g_stillImageParam.u8Str1_COMBED);
1401 //MDrv_AVD_SetRegValue(BK_COMB_C0, 0x6C);
1402 status = 1;
1403 }
1404
1405 else if((u16Value<pResource->g_stillImageParam.u8Threshold2) && (u16Value>pResource->g_stillImageParam.u8Threshold1))
1406 {
1407 _u16PreNoiseMag = u16Value;
1408 check_counter = 0;
1409 Total_Nosiemag = 0;
1410 u8Ctl = HAL_AVD_GetReg(BK_COMB_38);
1411 if(pResource->g_stillImageParam.bMessageOn)
1412 {
1413 //printf("=====>Thread =%d \n\n",u16Value);
1414 }
1415 if(status==1)
1416 {
1417 if(pResource->g_stillImageParam.bMessageOn)
1418 {
1419 ULOGE("AVD","=====>4Thread1: u16Value =0x%x \n\n",u16Value);
1420 }
1421 HAL_AVD_SetReg(BK_COMB_37, pResource->g_stillImageParam.u8Str1_COMB37);
1422 HAL_AVD_SetReg(BK_COMB_38, (u8Ctl & pResource->g_stillImageParam.u8Str1_COMB38));
1423 HAL_AVD_SetReg(BK_COMB_7C, pResource->g_stillImageParam.u8Str1_COMB7C);
1424 HAL_AVD_SetReg(BK_COMB_ED, pResource->g_stillImageParam.u8Str1_COMBED);
1425 //MDrv_AVD_SetRegValue(BK_COMB_C0, 0x6C);
1426 status = 1;
1427 }
1428 else if(status==2)
1429 {
1430 if(pResource->g_stillImageParam.bMessageOn)
1431 {
1432 ULOGE("AVD","=====>5Thread2: u16Value =0x%x \n\n",u16Value);
1433 }
1434 HAL_AVD_SetReg(BK_COMB_37, pResource->g_stillImageParam.u8Str2_COMB37);
1435 HAL_AVD_SetReg(BK_COMB_38, (u8Ctl & pResource->g_stillImageParam.u8Str2_COMB38));
1436 HAL_AVD_SetReg(BK_COMB_7C, pResource->g_stillImageParam.u8Str2_COMB7C);
1437 HAL_AVD_SetReg(BK_COMB_ED, pResource->g_stillImageParam.u8Str2_COMBED);
1438 //MDrv_AVD_SetRegValue(BK_COMB_C0, 0x6C);
1439 status = 2;
1440 }
1441 else if(status==3)
1442 {
1443 if(pResource->g_stillImageParam.bMessageOn)
1444 {
1445 ULOGE("AVD","=====>6Thread3: u16Value =0x%x \n\n",u16Value);
1446 }
1447 status = 2;
1448 }
1449 }
1450
1451 else if((u16Value<=pResource->g_stillImageParam.u8Threshold3) && (u16Value>=pResource->g_stillImageParam.u8Threshold2))
1452 {
1453 _u16PreNoiseMag = u16Value;
1454 check_counter = 0;
1455 Total_Nosiemag = 0;
1456 u8Ctl = HAL_AVD_GetReg(BK_COMB_38);
1457 if(pResource->g_stillImageParam.bMessageOn)
1458 {
1459 //printf("=====>Thread =%d \n\n",u16Value);
1460 ULOGE("AVD","=====>2Thread2: u16Value =0x%x \n\n",u16Value);
1461 }
1462 HAL_AVD_SetReg(BK_COMB_37, pResource->g_stillImageParam.u8Str2_COMB37);
1463 HAL_AVD_SetReg(BK_COMB_38, (u8Ctl & pResource->g_stillImageParam.u8Str2_COMB38));
1464 HAL_AVD_SetReg(BK_COMB_7C, pResource->g_stillImageParam.u8Str2_COMB7C);
1465 HAL_AVD_SetReg(BK_COMB_ED, pResource->g_stillImageParam.u8Str2_COMBED);
1466 //MDrv_AVD_SetRegValue(BK_COMB_C0, 0x6C);
1467 status = 2;
1468 }
1469
1470 else if((u16Value < pResource->g_stillImageParam.u8Threshold4) &&( u16Value > pResource->g_stillImageParam.u8Threshold3))
1471 {
1472 _u16PreNoiseMag = u16Value;
1473 check_counter = 0;
1474 Total_Nosiemag = 0;
1475 u8Ctl = HAL_AVD_GetReg(BK_COMB_38);
1476 if(pResource->g_stillImageParam.bMessageOn)
1477 {
1478 //printf("=====>Thread =%d \n\n",u16Value);
1479 }
1480 if(status==1)
1481 {
1482 if(pResource->g_stillImageParam.bMessageOn)
1483 {
1484 ULOGE("AVD","=====>7Thread1: u16Value =0x%x \n\n",u16Value);
1485 }
1486 status = 2;
1487 }
1488 else if(status==2)
1489 {
1490 if(pResource->g_stillImageParam.bMessageOn)
1491 {
1492 ULOGE("AVD","=====>8Thread2: u16Value =0x%x \n\n",u16Value);
1493 }
1494 HAL_AVD_SetReg(BK_COMB_37, pResource->g_stillImageParam.u8Str2_COMB37);
1495 HAL_AVD_SetReg(BK_COMB_38, (u8Ctl & pResource->g_stillImageParam.u8Str2_COMB38));
1496 HAL_AVD_SetReg(BK_COMB_7C, pResource->g_stillImageParam.u8Str2_COMB7C);
1497 HAL_AVD_SetReg(BK_COMB_ED, pResource->g_stillImageParam.u8Str2_COMBED);
1498 //MDrv_AVD_SetRegValue(BK_COMB_C0, 0x6C);
1499 status = 2;
1500 }
1501 else if(status==3)
1502 {
1503 if(pResource->g_stillImageParam.bMessageOn)
1504 {
1505 ULOGE("AVD","=====>9Thread3: u16Value =0x%x \n\n",u16Value);
1506 }
1507 HAL_AVD_SetReg(BK_COMB_37, pResource->g_stillImageParam.u8Str3_COMB37);
1508 HAL_AVD_SetReg(BK_COMB_38, (u8Ctl & pResource->g_stillImageParam.u8Str3_COMB38));
1509 HAL_AVD_SetReg(BK_COMB_7C, pResource->g_stillImageParam.u8Str3_COMB7C);
1510 HAL_AVD_SetReg(BK_COMB_ED, pResource->g_stillImageParam.u8Str3_COMBED);
1511 //MDrv_AVD_SetRegValue(BK_COMB_C0, 0x6C);
1512 status = 3;
1513 }
1514 }
1515
1516 else if(u16Value >= pResource->g_stillImageParam.u8Threshold4)
1517 {
1518 _u16PreNoiseMag = u16Value;
1519 check_counter = 0;
1520 Total_Nosiemag = 0;
1521 u8Ctl = HAL_AVD_GetReg(BK_COMB_38);
1522 if(pResource->g_stillImageParam.bMessageOn)
1523 {
1524 //printf("=====>Thread =%d \n\n",u16Value);
1525 ULOGE("AVD","=====>3Thread3: u16Value =0x%x \n\n",u16Value);
1526 }
1527 HAL_AVD_SetReg(BK_COMB_37, pResource->g_stillImageParam.u8Str3_COMB37);
1528 HAL_AVD_SetReg(BK_COMB_38, (u8Ctl & pResource->g_stillImageParam.u8Str3_COMB38));
1529 HAL_AVD_SetReg(BK_COMB_7C, pResource->g_stillImageParam.u8Str3_COMB7C);
1530 HAL_AVD_SetReg(BK_COMB_ED, pResource->g_stillImageParam.u8Str3_COMBED);
1531 //MDrv_AVD_SetRegValue(BK_COMB_C0/., 0x6C);
1532 status = 3;
1533 }
1534
1535
1536 /////////////////////////////////////////////////////////////////////////////////////
1537
1538 }
1539 }
1540 }
1541
_Drv_AVD_DSPReadByte(MS_U8 u8Cmd,MS_U16 u16Addr)1542 static MS_U8 _Drv_AVD_DSPReadByte(MS_U8 u8Cmd, MS_U16 u16Addr)
1543 {
1544 MS_U8 u8Dummy = 200;
1545 MS_U8 u8Data;
1546
1547 HAL_AVD_SetReg(BK_AFEC_C1, u16Addr);
1548 HAL_AVD_SetReg(BK_AFEC_C3, u16Addr>>8);
1549 HAL_AVD_SetReg(BK_AFEC_C0, u8Cmd);
1550
1551 while(u8Dummy--)
1552 {
1553 if (HAL_AVD_GetReg(BK_AFEC_C0) == 0x00)
1554 break;
1555 MsOS_DelayTask(1);
1556 }
1557 u8Data = HAL_AVD_GetReg(BK_AFEC_C2);
1558
1559 return u8Data;
1560 }
1561
1562 //-------------------------------------------------------------------------------------------------
1563 // Global VD functions
1564 //-------------------------------------------------------------------------------------------------
1565
Drv_AVD_Init(VD_INITDATA * pVD_InitData,MS_U32 u32InitDataLen,AVD_RESOURCE_PRIVATE * pResource)1566 AVD_Result Drv_AVD_Init(VD_INITDATA *pVD_InitData, MS_U32 u32InitDataLen, AVD_RESOURCE_PRIVATE *pResource)
1567 {
1568 //BY 20090410 MS_U16 u16TimeOut;
1569 //BY 20090410 MS_U32 u32dst;
1570 //BY 20090410 MS_BOOL bResult;
1571 char pAVD_Mutex_String[10];
1572 if (NULL == strncpy(pAVD_Mutex_String,"Mutex VD",10))
1573 {
1574 #if AVD_DRV_DEBUG
1575 if (pResource->_u8AVDDbgLevel == AVD_DBGLV_DEBUG)
1576 {
1577 ULOGE("AVD","MDrv_AVD_Init strcpy Fail\n");
1578 }
1579 #endif
1580 return E_AVD_FAIL;
1581 }
1582 pResource->_s32AVD_Mutex = MsOS_CreateMutex(E_MSOS_FIFO, pAVD_Mutex_String, MSOS_PROCESS_SHARED);
1583 MS_ASSERT(pResource->_s32AVD_Mutex >= 0);
1584
1585 #if AVD_DRV_DEBUG
1586 if (pResource->_u8AVDDbgLevel == AVD_DBGLV_DEBUG)
1587 {
1588 ULOGE("AVD","MDrv_AVD_Init\n");
1589 }
1590 #endif
1591 if ( sizeof(pResource->g_VD_InitData) == u32InitDataLen)
1592 {
1593 memcpy(&pResource->g_VD_InitData, pVD_InitData, u32InitDataLen);
1594 }
1595 else
1596 {
1597 MS_ASSERT(FALSE);
1598 return E_AVD_FAIL;
1599 }
1600
1601 pResource->_u16DataH[0] = pResource->_u16DataH[1] = pResource->_u16DataH[2] = 1135L;
1602 pResource->_u8HtotalDebounce = 0;
1603 pResource->_eVideoSystem = E_VIDEOSTANDARD_NOTSTANDARD;
1604 pResource->_u8AutoDetMode = FSC_AUTO_DET_ENABLE;
1605 pResource->_u16CurVDStatus = 0;
1606 #if AVD_DRV_DEBUG
1607 pResource->_u8AVDDbgLevel = AVD_DBGLV_NONE;
1608 pResource->u32VDPatchFlagStatus=pResource->u32PreVDPatchFlagStatus=0;
1609 #endif
1610 // BY 20090402 remove un-necessary code HAL_AVD_VDMCU_ResetAddress();
1611
1612 HAL_AVD_RegInit(); // !! any register access should be after this function
1613 HAL_AVD_COMB_SetMemoryProtect(pResource->g_VD_InitData.u32COMB_3D_ADR, pResource->g_VD_InitData.u32COMB_3D_LEN);
1614 bInitSTR = 1; //Init flag for STR load and write DRAM
1615 //store COMB address for STR function
1616 u32COMB_3D_Addr_Str = pResource->g_VD_InitData.u32COMB_3D_ADR;
1617 u32COMB_3D_Len_Str = pResource->g_VD_InitData.u32COMB_3D_LEN;
1618 #if 0 // BY 20090331, for FPGA only, take on effects in real chip, by book.weng
1619 RIU_WriteByte(BK_AFEC_0A, 0x10);
1620 RIU_WriteByte(BK_AFEC_0F, 0x48);
1621 #endif
1622
1623
1624 #if 0 // should call set input directly to set input source
1625 if(g_VD_InitData.eDemodType == DEMODE_MSTAR_VIF)
1626 {
1627 RIU_WriteByte(BK_AFEC_CF, 0x80);
1628 RIU_WriteByte(BK_AFEC_21, 0x1D); // TODO check setting correct or not?
1629 RIU_WriteByte(BK_AFEC_40, 0x91);
1630 }
1631 #endif
1632
1633 #if 0 // BY 20090402
1634 //========MDrv_VD_LoadDSPCode=======
1635 BinInfo.B_ID = g_VD_InitData.u16VDDSPBinID;
1636 MDrv_DMA_Get_BinInfo(&BinInfo, &bResult);
1637 if( bResult != PASS )
1638 {
1639 return;
1640 }
1641 #endif
1642 HAL_AVD_SetDSPCodeType(pResource->g_VD_InitData.u32VDPatchFlag);
1643 #if ((T3_LOAD_CODE==0)&&(TWO_VD_DSP_CODE==0)) //20121003 weicheng
1644 _Drv_AVD_VDMCU_Init(pResource); // should keep this for T3 because VIF initial will need mailbox
1645 #endif
1646
1647 return E_AVD_OK;
1648 }
1649
Drv_AVD_Exit(AVD_RESOURCE_PRIVATE * pResource)1650 void Drv_AVD_Exit(AVD_RESOURCE_PRIVATE *pResource)
1651 {
1652 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
1653 #if AVD_DRV_DEBUG
1654 if (pResource->_u8AVDDbgLevel == AVD_DBGLV_DEBUG)
1655 {
1656 ULOGE("AVD","MDrv_AVD_Exit\n");
1657 }
1658 #endif
1659 #if (NEW_VD_MCU)
1660 //HAL_AVD_VDMCU_SoftStop();
1661 #endif
1662 eSource_Str=E_INPUT_SOURCE_INVALID;
1663 HAL_AVD_AFEC_SetClock(DISABLE);
1664 HAL_AVD_COMB_SetMemoryRequest(DISABLE);
1665 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
1666 }
1667
Drv_AVD_ResetMCU(AVD_RESOURCE_PRIVATE * pResource)1668 MS_BOOL Drv_AVD_ResetMCU(AVD_RESOURCE_PRIVATE *pResource)
1669 {
1670 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
1671 #if AVD_DRV_DEBUG
1672 if (pResource->_u8AVDDbgLevel == AVD_DBGLV_DEBUG)
1673 {
1674 ULOGE("AVD","MDrv_AVD_ResetMCU\n");
1675 }
1676 #endif
1677 HAL_AVD_AFEC_McuReset(); // assume clock source is ready, it's required to switch source before reset after T4
1678 HAL_AVD_AFEC_SetPatchFlag(pResource->g_VD_InitData.u32VDPatchFlag);
1679
1680 // Forced to PAL mode
1681 pResource->_u16CurVDStatus = 0;
1682
1683 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
1684
1685 return TRUE;
1686 }
1687
Drv_AVD_FreezeMCU(MS_BOOL bEnable,AVD_RESOURCE_PRIVATE * pResource)1688 void Drv_AVD_FreezeMCU(MS_BOOL bEnable, AVD_RESOURCE_PRIVATE *pResource) // should be static, no mutex
1689 {
1690 #if AVD_DRV_DEBUG
1691 if (pResource->_u8AVDDbgLevel == AVD_DBGLV_DEBUG)
1692 {
1693 ULOGE("AVD","MDrv_AVD_FreezeMCU %d\n",bEnable);
1694 }
1695 #endif
1696 HAL_AVD_VDMCU_SetFreeze(bEnable);
1697 }
1698
Drv_AVD_Scan_HsyncCheck(MS_U8 u8HtotalTolerance,AVD_RESOURCE_PRIVATE * pResource)1699 MS_U16 Drv_AVD_Scan_HsyncCheck(MS_U8 u8HtotalTolerance, AVD_RESOURCE_PRIVATE *pResource) //TODO should add delay between register read
1700 {
1701 MS_U16 u16CurrentStatus = VD_RESET_ON;
1702 MS_U16 u16Dummy, u16Temp, u16SPLHTotal;
1703 MS_U8 u8Value, u8VdHsyncLockedCount;
1704 static const MS_U16 u16SPL_NSPL[5] =
1705 {
1706 1135, // PAL
1707 1097, // SECAM
1708 910, // NTSC, PAL M
1709 917, // PAL Nc
1710 1127, // NTSC 4.43
1711 };
1712
1713 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
1714
1715 u16Dummy = 20; // just protect program dead lock
1716 u8VdHsyncLockedCount = 0;
1717 while( u16Dummy-- )
1718 {
1719 if( HAL_AVD_AFEC_GetHWHsync() )
1720 {
1721 u16CurrentStatus = HAL_AVD_AFEC_GetStatus();
1722 u8VdHsyncLockedCount++;
1723 }
1724 }
1725 //printf("vdLoop1=%bd\n", u8VdHsyncLockedCount);
1726
1727 if( u8VdHsyncLockedCount>14 )
1728 {
1729 //printf("Second Check\n");
1730 u8VdHsyncLockedCount = 0;
1731 u16Dummy = 10; // just protect program dead lock
1732 u16SPLHTotal = HAL_AVD_AFEC_GetHTotal(); // SPL_NSPL, H total
1733 //printf("Ht=%d\n", u16SPLHTotal);
1734 while( u16Dummy-- )
1735 {
1736 u16Temp = HAL_AVD_AFEC_GetHTotal(); // SPL_NSPL, H total
1737 u16Temp = (u16Temp+u16SPLHTotal)>>1;
1738 u16SPLHTotal = u16Temp;
1739
1740 //printf("Ht=%d\n", u16SPLHTotal);
1741 for(u8Value=0; u8Value<=4;u8Value++)
1742 {
1743 if( abs(u16SPLHTotal-u16SPL_NSPL[u8Value]) < u8HtotalTolerance )
1744 {
1745 //printf("+");
1746 u8VdHsyncLockedCount++;
1747 }
1748 else
1749 {
1750 //printf("-");
1751 }
1752 }
1753 //printf("\n");
1754 }
1755
1756 //printf("vdLoop2=%bd\n", u8VdHsyncLockedCount);
1757 if( u8VdHsyncLockedCount < 8 )
1758 {
1759 u16CurrentStatus = VD_RESET_ON;
1760 }
1761 }
1762 else
1763 {
1764 u16CurrentStatus = VD_RESET_ON;
1765 }
1766
1767 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
1768 return u16CurrentStatus;
1769 }
1770
Drv_AVD_StartAutoStandardDetection(AVD_RESOURCE_PRIVATE * pResource)1771 void Drv_AVD_StartAutoStandardDetection(AVD_RESOURCE_PRIVATE *pResource)
1772 {
1773 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
1774 pResource->_u8AutoDetMode=FSC_AUTO_DET_ENABLE;
1775 HAL_AVD_AFEC_EnableForceMode(DISABLE);
1776 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
1777 }
1778
Drv_AVD_ForceVideoStandard(AVD_VideoStandardType eVideoStandardType,AVD_RESOURCE_PRIVATE * pResource)1779 MS_BOOL Drv_AVD_ForceVideoStandard(AVD_VideoStandardType eVideoStandardType, AVD_RESOURCE_PRIVATE *pResource)
1780 {
1781 //Check input
1782 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
1783
1784 #if AVD_DRV_DEBUG
1785 if (pResource->_u8AVDDbgLevel == AVD_DBGLV_DEBUG)
1786 {
1787 ULOGE("AVD","MDrv_AVD_ForceVideoStandard %d\n",eVideoStandardType);
1788 }
1789 #endif
1790
1791 if (eVideoStandardType >= E_VIDEOSTANDARD_MAX)
1792 MS_ASSERT(FALSE);
1793
1794 pResource->_u8AutoDetMode= FSC_AUTO_DET_DISABLE;
1795 pResource->_eForceVideoStandard=eVideoStandardType;
1796 HAL_AVD_AFEC_EnableForceMode(ENABLE);
1797 switch(eVideoStandardType)
1798 {
1799 case E_VIDEOSTANDARD_NTSC_M:
1800 HAL_AVD_AFEC_SetFSCMode(FSC_MODE_NTSC);
1801 break;
1802 case E_VIDEOSTANDARD_SECAM:
1803 HAL_AVD_AFEC_SetFSCMode(FSC_MODE_SECAM);
1804 break;
1805 case E_VIDEOSTANDARD_NTSC_44:
1806 HAL_AVD_AFEC_SetFSCMode(FSC_MODE_NTSC_443);
1807 break;
1808 case E_VIDEOSTANDARD_PAL_M:
1809 HAL_AVD_AFEC_SetFSCMode(FSC_MODE_PAL_M);
1810 break;
1811 case E_VIDEOSTANDARD_PAL_N:
1812 HAL_AVD_AFEC_SetFSCMode(FSC_MODE_PAL_N);
1813 break;
1814 case E_VIDEOSTANDARD_PAL_60:
1815 HAL_AVD_AFEC_SetFSCMode(FSC_MODE_PAL_60);
1816 break;
1817 default: //E_VIDEOSTANDARD_PAL_BGHI
1818 HAL_AVD_AFEC_SetFSCMode(FSC_MODE_PAL);
1819 break;
1820 }
1821
1822 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
1823
1824 return TRUE;
1825 }
1826
Drv_AVD_3DCombSpeedup(AVD_RESOURCE_PRIVATE * pResource)1827 void Drv_AVD_3DCombSpeedup(AVD_RESOURCE_PRIVATE *pResource)
1828 {
1829 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
1830 _Drv_AVD_3DCombSpeedup(pResource);
1831 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
1832 }
1833
Drv_AVD_LoadDSP(MS_U8 * pu8VD_DSP,MS_U32 len,AVD_RESOURCE_PRIVATE * pResource)1834 void Drv_AVD_LoadDSP(MS_U8 *pu8VD_DSP, MS_U32 len, AVD_RESOURCE_PRIVATE *pResource)
1835 {
1836 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
1837 HAL_AVD_VDMCU_LoadDSP(pu8VD_DSP,len);
1838 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
1839 }
1840
Drv_AVD_BackPorchWindowPositon(MS_BOOL bEnable,MS_U8 u8Value)1841 void Drv_AVD_BackPorchWindowPositon(MS_BOOL bEnable , MS_U8 u8Value)
1842 {
1843 HAL_AVD_AFEC_BackPorchWindowPosition(bEnable , u8Value);
1844 }
1845
Drv_AVD_MBX_ReadByteByVDMbox(MS_U8 u8Addr,AVD_RESOURCE_PRIVATE * pResource)1846 MS_U8 Drv_AVD_MBX_ReadByteByVDMbox(MS_U8 u8Addr, AVD_RESOURCE_PRIVATE *pResource)
1847 {
1848 MS_U8 u8Value;
1849 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
1850 _Drv_AVD_MBX_WaitReady();
1851
1852 HAL_AVD_SetReg(BK_AFEC_C1, u8Addr);
1853 HAL_AVD_SetReg(BK_AFEC_C0, 0x02);
1854
1855 _Drv_AVD_MBX_WaitReady();
1856 u8Value=Drv_AVD_GetRegValue(BK_AFEC_C2);
1857 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
1858 return u8Value;
1859 }
1860
Drv_AVD_SetFlag(MS_U32 u32VDPatchFlag,AVD_RESOURCE_PRIVATE * pResource)1861 void Drv_AVD_SetFlag(MS_U32 u32VDPatchFlag, AVD_RESOURCE_PRIVATE *pResource)
1862 {
1863 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
1864 pResource->g_VD_InitData.u32VDPatchFlag=u32VDPatchFlag;
1865 HAL_AVD_AFEC_SetPatchFlag(pResource->g_VD_InitData.u32VDPatchFlag);
1866 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
1867 }
1868
Drv_AVD_SetRegValue(MS_U16 u16Addr,MS_U8 u8Value)1869 void Drv_AVD_SetRegValue(MS_U16 u16Addr,MS_U8 u8Value)
1870 {
1871 // avoid writing other block
1872 if (((u16Addr & 0xFF00 ) == AFEC_REG_BASE) || \
1873 ((u16Addr & 0xFF00 ) == COMB_REG_BASE) || \
1874 ((u16Addr & 0xFF00 ) == VBI_REG_BASE) || \
1875 ((u16Addr & 0xFF00 ) == MIIC_REG_BASE) ||\
1876 ((u16Addr & 0xFF00 ) == SCM_REG_BASE))
1877 {
1878 HAL_AVD_SetReg( u16Addr ,u8Value);
1879 }
1880 }
1881
Drv_AVD_SetRegFromDSP(AVD_RESOURCE_PRIVATE * pResource)1882 void Drv_AVD_SetRegFromDSP(AVD_RESOURCE_PRIVATE *pResource)
1883 {
1884 MS_U8 u8Ctl, u8Value;
1885 MS_U16 u16Htotal, u16CurrentHStart;
1886 MS_U8 u8update;
1887 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
1888
1889 if(((pResource->_eVDInputSource==E_INPUT_SOURCE_SCART1)||(pResource->_eVDInputSource==E_INPUT_SOURCE_SCART2))&&(pResource->g_VD_InitData.u32VDPatchFlag &AVD_PATCH_SCART_SVIDEO)) //20121211
1890 {
1891 if(MsOS_GetSystemTime() -pResource->_u32SCARTWaitTime >2000)
1892 {
1893 if(!(HAL_AVD_GetReg(BK_AFEC_CC)&0x02)&&(pResource->_eVideoSystem!=E_VIDEOSTANDARD_SECAM))
1894 {
1895 if(pResource->_u8SCARTSwitch==0)
1896 pResource->_u8SCARTSwitch=1;
1897 else
1898 pResource->_u8SCARTSwitch=0;
1899
1900 _Drv_AVD_SCART_Monitor(pResource);
1901 }
1902 else if(pResource->_u8SCARTPrestandard!=pResource->_eVideoSystem)
1903 {
1904 _Drv_AVD_SCART_Monitor(pResource);
1905 }
1906 }
1907 }
1908
1909 //20120719 Brian Shift CLK patch for 43.2M water noise
1910 if( pResource->_bShiftClkFlag == TRUE)
1911 {
1912 _Drv_AVD_ShifClk_Monitor(pResource);
1913 }
1914 HAL_AVD_AFEC_SetRegFromDSP();
1915
1916 {
1917 u16Htotal = HAL_AVD_AFEC_GetHTotal(); // SPL_NSPL, H total
1918
1919 switch( pResource->_eVideoSystem ) // 2006.06.17 Michael, need to check SRC1 if we use MST6xxx
1920 {
1921 case E_VIDEOSTANDARD_NTSC_M: // SIG_NTSC: 910
1922 u16CurrentHStart = 910;
1923 break;
1924
1925 case E_VIDEOSTANDARD_PAL_BGHI: // SIG_PAL: 1135
1926 u16CurrentHStart = 1135;
1927 break;
1928
1929 case E_VIDEOSTANDARD_NTSC_44: // SIG_NTSC_443: 1127
1930 case E_VIDEOSTANDARD_PAL_60:
1931 u16CurrentHStart = 1127;
1932 break;
1933
1934 case E_VIDEOSTANDARD_PAL_M: // SIG_PAL_M: 909
1935 u16CurrentHStart = 909;
1936 break;
1937
1938 case E_VIDEOSTANDARD_PAL_N: // SIG_PAL_NC: 917
1939 u16CurrentHStart = 917;
1940 break;
1941
1942 case E_VIDEOSTANDARD_SECAM: // SIG_SECAM: 1097
1943 u16CurrentHStart = 1097;
1944 break;
1945
1946 default:
1947 // ASSERT
1948 u16CurrentHStart = 1135;
1949 break;
1950 }
1951
1952 pResource->_u16DataH[2] = pResource->_u16DataH[1];
1953 pResource->_u16DataH[1] = pResource->_u16DataH[0];
1954 pResource->_u16DataH[0] = u16Htotal;
1955
1956 if( (pResource->_u16DataH[2] == pResource->_u16DataH[1]) && (pResource->_u16DataH[1] == pResource->_u16DataH[0]) )
1957 {
1958 if( pResource->_u8HtotalDebounce > 3 )
1959 {
1960 pResource->_u16LatchH = pResource->_u16DataH[0];
1961 }
1962 else
1963 {
1964 pResource->_u8HtotalDebounce++;
1965 }
1966 }
1967 else
1968 {
1969 pResource->_u8HtotalDebounce = 0;
1970 }
1971
1972 u16Htotal = pResource->_u16LatchH;
1973
1974 switch( pResource->_eVideoSystem )
1975 {
1976 case E_VIDEOSTANDARD_PAL_BGHI: // SIG_PAL
1977 case E_VIDEOSTANDARD_NTSC_44: // SIG_NTSC_443
1978 u8Value = 3;
1979 break;
1980
1981 case E_VIDEOSTANDARD_PAL_M: // SIG_PAL_M
1982 case E_VIDEOSTANDARD_PAL_N: // SIG_PAL_NC
1983 u8Value = 1;
1984 break;
1985
1986 default: // NTSC
1987 u8Value = 2;
1988 break;
1989 }
1990
1991 if (pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_NTSC_50)
1992 {
1993 if ( ((HAL_AVD_AFEC_GetStatus() & (VD_FSC_TYPE|VD_VSYNC_50HZ|VD_COLOR_LOCKED))
1994 == (VD_FSC_3579|VD_VSYNC_50HZ|VD_COLOR_LOCKED)) ) // not NTSC-50
1995 u8Value = 2;
1996 }
1997
1998 u8Ctl = ( u16Htotal - u8Value ) % 4;
1999 u8update = 1;
2000 if( u8Ctl == 3 )
2001 {
2002 u16Htotal = u16Htotal + 1;
2003 }
2004 else if( u8Ctl == 2 )
2005 {
2006 if (pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_NTSC_50)
2007 {
2008 if ( ((HAL_AVD_AFEC_GetStatus() & (VD_FSC_TYPE|VD_VSYNC_50HZ|VD_COLOR_LOCKED))
2009 == (VD_FSC_3579|VD_VSYNC_50HZ|VD_COLOR_LOCKED)) ) // not NTSC-50
2010 u16Htotal = u16Htotal + 2;
2011 }
2012 else
2013 {
2014 u8update = 0;
2015 }
2016 }
2017 else
2018 {
2019 u16Htotal = u16Htotal - u8Ctl;
2020 }
2021
2022 if (pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_NTSC_50)
2023 {
2024 if ( ((HAL_AVD_AFEC_GetStatus() & (VD_FSC_TYPE|VD_VSYNC_50HZ|VD_COLOR_LOCKED))
2025 == (VD_FSC_3579|VD_VSYNC_50HZ|VD_COLOR_LOCKED)) ) // not NTSC-50
2026 u16CurrentHStart = 918;
2027 }
2028
2029 if( u8update )
2030 {
2031 // HAL_AVD_COMB_SetHtotal( u16Htotal );
2032 HAL_AVD_COMB_SetHtotal(u16CurrentHStart);
2033 }
2034
2035 if (pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_FINE_TUNE_FH_DOT)
2036 {
2037 #define FINE_TUNE_FH_DOT_MAX 20
2038 static MS_U8 u8FhDotDebouncer=0;
2039 u8Ctl = HAL_AVD_AFEC_GetNoiseMag(); // get VD noise magnitude
2040
2041 if((((pResource->_eVDInputSource == E_INPUT_SOURCE_ATV) ||
2042 (pResource->_eVDInputSource == E_INPUT_SOURCE_CVBS1) ||
2043 (pResource->_eVDInputSource == E_INPUT_SOURCE_CVBS2) ||
2044 ( pResource->_eVDInputSource == E_INPUT_SOURCE_CVBS3)) ||
2045 ((pResource->_eVDInputSource == E_INPUT_SOURCE_SCART1) ||
2046 ( pResource->_eVDInputSource == E_INPUT_SOURCE_SCART2))) &&
2047 ((E_VIDEOSTANDARD_NTSC_M ==pResource->_eVideoSystem)||(E_VIDEOSTANDARD_PAL_BGHI==pResource->_eVideoSystem)))
2048 {
2049 if((abs(pResource->_u16LatchH-u16CurrentHStart)>=2)&&(u8Ctl<=((pResource->_eVDInputSource == E_INPUT_SOURCE_ATV) ? 2: 1)))
2050 {
2051 if (u8FhDotDebouncer<FINE_TUNE_FH_DOT_MAX)
2052 {
2053 u8FhDotDebouncer++;
2054 }
2055 }
2056 else if (u8FhDotDebouncer)
2057 {
2058 u8FhDotDebouncer--;
2059 }
2060 }
2061 else
2062 {
2063 u8FhDotDebouncer=0;
2064 }
2065
2066 if (u8FhDotDebouncer>=FINE_TUNE_FH_DOT_MAX)
2067 {
2068 pResource->u32VDPatchFlagStatus |= AVD_PATCH_FINE_TUNE_FH_DOT;
2069 HAL_AVD_COMB_SetNonStandardHtotal(TRUE);
2070 }
2071 else if (!u8FhDotDebouncer)
2072 {
2073 pResource->u32VDPatchFlagStatus &= ~AVD_PATCH_FINE_TUNE_FH_DOT;
2074 HAL_AVD_COMB_SetNonStandardHtotal(FALSE);
2075 }
2076 #if AVD_DRV_DEBUG
2077 if (pResource->_u8AVDDbgLevel == AVD_DBGLV_DEBUG)
2078 {
2079 if (pResource->u32VDPatchFlagStatus & AVD_PATCH_FINE_TUNE_FH_DOT)
2080 ULOGE("AVD","_u16LatchH,u16CurrentHStart,u8FhDotDebouncer= %d %d % d\n",pResource->_u16LatchH,u16CurrentHStart,u8FhDotDebouncer);
2081 }
2082 #endif
2083 }
2084 }
2085
2086
2087 // for Color Hysteresis
2088 if (pResource->_eVDInputSource == E_INPUT_SOURCE_ATV)
2089 {
2090 if ( (HAL_AVD_AFEC_GetStatus() & (VD_HSYNC_LOCKED | VD_STATUS_RDY | VD_COLOR_LOCKED))
2091 == (VD_HSYNC_LOCKED | VD_STATUS_RDY) )
2092 {
2093 HAL_AVD_AFEC_SetColorKillLevel(pResource->g_VD_InitData.u8ColorKillHighBound);
2094 }
2095 else
2096 {
2097 HAL_AVD_AFEC_SetColorKillLevel(pResource->g_VD_InitData.u8ColorKillLowBound);
2098 }
2099 }
2100 else
2101 {
2102 HAL_AVD_AFEC_SetColorKillLevel(pResource->g_VD_InitData.u8ColorKillLowBound);
2103 }
2104
2105 // co-channel
2106 {
2107 if (HAL_AVD_AFEC_GetCoChannelOn())
2108 {
2109 HAL_AVD_VBI_SetTTSigDetSel(TRUE);
2110 }
2111 else
2112 {
2113 HAL_AVD_VBI_SetTTSigDetSel(FALSE);
2114 }
2115 }
2116
2117 // For maintain the Hsync reliability and seneitivity
2118 {
2119 static MS_U8 u8DebounceCnt=0;
2120
2121 if (!(HAL_AVD_AFEC_GetStatus() & (VD_HSYNC_LOCKED|VD_SYNC_LOCKED)))
2122 {
2123 if (u8DebounceCnt < 15)
2124 {
2125 u8DebounceCnt++;
2126 }
2127 }
2128 else
2129 {
2130 if (u8DebounceCnt > 0)
2131 {
2132 u8DebounceCnt--;
2133 }
2134 }
2135
2136 if ((u8DebounceCnt >= 10) || pResource->_u8AutoTuningIsProgress)
2137 {
2138 HAL_AVD_AFEC_EnableBottomAverage(FALSE); // more sensitivity
2139 }
2140 else if (u8DebounceCnt <= 5)
2141 {
2142 HAL_AVD_AFEC_EnableBottomAverage(TRUE); // more reliability
2143 }
2144 }
2145
2146 #if 0 // BY 20090403 Metis,Martina,T3,U3 fixed by hardware, removed
2147 {
2148 MS_U16 u16Status;
2149 u16Status=HAL_AVD_AFEC_GetStatus();
2150 if ( IS_BITS_SET(u16Status, VD_HSYNC_LOCKED|VD_SYNC_LOCKED|VD_STATUS_RDY) )
2151 {
2152 if ((u16Status&VD_FSC_TYPE)==VD_FSC_4285) //SECAM
2153 {
2154 RIU_WriteByteMask( BK_COMB_4A, 0x00, 0x01 ); // COMB_4A=0x56, James.Lu, 20080730
2155 }
2156 }
2157 }
2158 #endif
2159
2160 {
2161 MS_U16 u16StandardVtotal;
2162
2163 if (HAL_AVD_AFEC_GetStatus() & VD_VSYNC_50HZ)
2164 {
2165 u16StandardVtotal = 625;
2166 }
2167 else
2168 {
2169 u16StandardVtotal = 525;
2170 }
2171
2172 // Patch for non-standard V freq issue (3D COMB) should use 2D comb
2173 if (abs(u16StandardVtotal - HAL_AVD_AFEC_GetVTotal()) >= 2)
2174 {
2175 HAL_AVD_COMB_Set3dComb(FALSE);
2176 }
2177 else
2178 {
2179 if(pResource->_b2d3dautoflag==1)
2180 {
2181 HAL_AVD_COMB_Set3dComb(TRUE);
2182 }
2183 else
2184 {
2185 HAL_AVD_COMB_Set3dComb(FALSE);
2186 }
2187
2188 #ifdef AVD_COMB_3D_MID // BY 20090717 enable MID mode after enable 3D comb, if the sequence is wrong, there will be garbage
2189 if ((pResource->_eVDInputSource != E_INPUT_SOURCE_ATV) && (pResource->_eVDInputSource != E_INPUT_SOURCE_SVIDEO1) && (pResource->_eVDInputSource != E_INPUT_SOURCE_SVIDEO2))
2190 {
2191 if (( pResource->_eVideoSystem == E_VIDEOSTANDARD_PAL_BGHI ) || ( pResource->_eVideoSystem == E_VIDEOSTANDARD_NTSC_M ))
2192 {
2193 if (!(pResource->u32VDPatchFlagStatus & AVD_PATCH_FINE_TUNE_FH_DOT))
2194 {
2195 HAL_AVD_COMB_Set3dCombMid(ENABLE);
2196 }
2197 }
2198 }
2199 #endif
2200 }
2201
2202 // patch for color stripe function abnormal at non-standard v, Vestel TG45 issue
2203 if (abs(u16StandardVtotal - HAL_AVD_AFEC_GetVTotal()) >= 9)
2204 {
2205 HAL_AVD_AFEC_SetColorStripe(0x31);
2206 }
2207 else
2208 {
2209 HAL_AVD_AFEC_SetColorStripe(0x40);
2210 }
2211 }
2212
2213 // Fix Comb bug
2214 {
2215 if (HAL_AVD_AFEC_GetBurstOn())
2216 {
2217 HAL_AVD_COMB_SetHsyncTolerance(0x00); // Burst On
2218 }
2219 else
2220 {
2221 HAL_AVD_COMB_SetHsyncTolerance(0x20); // No Burst (for hsync tolerance)
2222 }
2223 }
2224
2225 #if 0
2226 if (g_VD_InitData.u32VDPatchFlag & AVD_PATCH_FINE_TUNE_FSC_SHIFT)
2227 {
2228 #define FINE_TUNE_FSC_SHIFT_CNT_STEP 3
2229 #define FINE_TUNE_FSC_SHIFT_CNT_MAX FINE_TUNE_FSC_SHIFT_CNT_STEP*7
2230 #define FINE_TUNE_FSC_SHIFT_CNT_THR FINE_TUNE_FSC_SHIFT_CNT_STEP*3
2231 static MS_U8 u8FscShiftDebounceCnt=0;
2232
2233 if ((E_VIDEOSTANDARD_NTSC_M==_eVideoSystem)||(E_VIDEOSTANDARD_PAL_BGHI==_eVideoSystem) ||
2234 (E_VIDEOSTANDARD_PAL_M==_eVideoSystem) || (E_VIDEOSTANDARD_PAL_N==_eVideoSystem))
2235 {
2236 if ( !HAL_AVD_COMB_Get3dCombTimingCheck()) // got comb 3D unlocked
2237 {
2238 if (u8FscShiftDebounceCnt<FINE_TUNE_FSC_SHIFT_CNT_MAX)
2239 {
2240 u8FscShiftDebounceCnt+=FINE_TUNE_FSC_SHIFT_CNT_STEP;
2241 }
2242 }
2243 else
2244 {
2245 if (u8FscShiftDebounceCnt)
2246 {
2247 u8FscShiftDebounceCnt--;
2248 }
2249 }
2250 }
2251 else
2252 {
2253 u8FscShiftDebounceCnt = 0;
2254 }
2255 if (u8FscShiftDebounceCnt>=FINE_TUNE_FSC_SHIFT_CNT_THR)
2256 {
2257 u32VDPatchFlagStatus |= AVD_PATCH_FINE_TUNE_FSC_SHIFT;
2258 HAL_AVD_COMB_SetNonStandardFSC(TRUE,TRUE);
2259 }
2260 else if (!u8FscShiftDebounceCnt)
2261 {
2262 u32VDPatchFlagStatus &= ~AVD_PATCH_FINE_TUNE_FSC_SHIFT;
2263 HAL_AVD_COMB_SetNonStandardFSC((E_VIDEOSTANDARD_PAL_BGHI==_eVideoSystem), FALSE);
2264 }
2265 }
2266 #endif
2267
2268 { // burst
2269 MS_BOOL bBurstOn;
2270 static MS_BOOL bPrevBurstOn=FALSE;
2271
2272 bBurstOn = HAL_AVD_AFEC_GetBurstOn();
2273 if ( bBurstOn )
2274 {
2275 if ( !bPrevBurstOn )
2276 {
2277 _Drv_AVD_3DCombSpeedup(pResource);
2278 }
2279 }
2280 #ifdef LOCK3DSPEEDUP_PERFORMANCE_1
2281 else
2282 {
2283 if ( !pResource->_u8Comb10Bit3Flag )
2284 {
2285 HAL_AVD_COMB_Set3dCombSpeed(0x14, 0x10, 0x88);
2286 }
2287 }
2288 #endif
2289 bPrevBurstOn=bBurstOn;
2290
2291 if ( pResource->_u8Comb10Bit3Flag )
2292 {
2293 if ((pResource->_u8Comb10Bit3Flag&(BIT(0))) && (MsOS_GetSystemTime() -pResource->_u32VideoSystemTimer >3000))
2294 {
2295 //MDrv_WriteByteMask( BK_COMB_10, 0, BIT3 );
2296 HAL_AVD_COMB_Set3dCombSpeed(0x50, 0x20, 0x88);
2297 #if ADJUST_CHANNEL_CHANGE_HSYNC
2298 HAL_AVD_AFEC_SetSwingLimit(pResource->g_VD_InitData.u8SwingThreshold);
2299 HAL_AVD_AFEC_EnableBottomAverage(ENABLE); // more reliability
2300 #endif
2301 pResource->_u8Comb10Bit3Flag&=(~(BIT(0)));
2302 #if AVD_DRV_DEBUG
2303 if (pResource->_u8AVDDbgLevel == AVD_DBGLV_DEBUG)
2304 {
2305 ULOGE("AVD","Drv_AVD_3DCombSpeedup Disable\n");
2306 }
2307 #endif
2308 }
2309 if ((pResource->_u8Comb10Bit3Flag&(BIT(1))) && (MsOS_GetSystemTime() -pResource->_u32VideoSystemTimer >2000))
2310 {
2311 if (!(pResource->_u8AfecD4Factory & BIT(4)))
2312 {
2313 HAL_AVD_AFEC_EnableVBIDPLSpeedup(DISABLE);
2314 }
2315 pResource->_u8Comb10Bit3Flag&=(~(BIT(1)));
2316 }
2317 if ((pResource->_u8Comb10Bit3Flag&(BIT(2))) && (MsOS_GetSystemTime() -pResource->_u32VideoSystemTimer >400))
2318 {
2319 HAL_AVD_SetReg(BK_AFEC_A0, HAL_AVD_GetReg(BK_AFEC_A0)&(~BIT(7)));
2320 pResource->_u8Comb10Bit3Flag&=(~(BIT(2)));
2321 }
2322 }
2323 }
2324
2325 #if AVD_DRV_DEBUG
2326 if (pResource->_u8AVDDbgLevel == AVD_DBGLV_DEBUG)
2327 {
2328 if (pResource->u32PreVDPatchFlagStatus != pResource->u32VDPatchFlagStatus)
2329 {
2330 ULOGE("AVD","u32VDPatchFlagStatus %x\n",(unsigned int)pResource->u32VDPatchFlagStatus);
2331 pResource->u32PreVDPatchFlagStatus=pResource->u32VDPatchFlagStatus;
2332 }
2333 }
2334 #endif
2335 #if 0
2336 if (pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_NON_STANDARD_VTOTAL)
2337 {
2338 _Drv_AVD_SyncRangeHandler(pResource);
2339 }
2340 #endif
2341 if (pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_FINE_TUNE_STILL_IMAGE)
2342 {
2343 _Drv_AVD_COMB_StillImage(pResource);
2344 }
2345 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
2346 }
2347
Drv_AVD_SetInput(AVD_InputSourceType eSource,MS_U8 u8ScartFB,AVD_RESOURCE_PRIVATE * pResource)2348 MS_BOOL Drv_AVD_SetInput(AVD_InputSourceType eSource, MS_U8 u8ScartFB, AVD_RESOURCE_PRIVATE *pResource) //SCART_FB eFB)
2349 {
2350 VD_HSYNC_SENSITIVITY eVDHsyncSensitivityforAV;
2351 //Basic Input Checking
2352 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
2353 #if AVD_DRV_DEBUG
2354 if (pResource->_u8AVDDbgLevel == AVD_DBGLV_DEBUG)
2355 {
2356 ULOGE("AVD","MDrv_AVD_SetInput %d\n",eSource);
2357 }
2358 #endif
2359 if (eSource >= E_INPUT_SOURCE_MAX)
2360 MS_ASSERT(FALSE);
2361
2362 eSource= (AVD_InputSourceType)(((MS_U8)eSource) & 0x0F);
2363 pResource->_eVDInputSource=eSource;
2364
2365 // store source type information for STR function
2366 eSource_Str = eSource;
2367 u8ScartFB_Str = u8ScartFB;
2368 eDemodType_Str = pResource->g_VD_InitData.eDemodType;
2369 u32XTAL_Clock_Str = pResource->g_VD_InitData.u32XTAL_Clock;
2370
2371 HAL_AVD_AFEC_SetInput(eSource,u8ScartFB,pResource->g_VD_InitData.eDemodType, pResource->g_VD_InitData.u32XTAL_Clock);
2372 //HAL_AVD_COMB_SetMemoryRequest(ENABLE);
2373
2374 ///Brian A1 VIF and ADC different AGC mapping
2375 #if(TWO_VD_DSP_CODE)// weicheng 20121003
2376 /*
2377 if(eSource==E_INPUT_SOURCE_ATV)
2378 {
2379 HAL_AVD_SetDSPCodeType(AVD_DSP_CODE_TYPE_VIF);
2380 }
2381 else
2382 {
2383 HAL_AVD_SetDSPCodeType(AVD_DSP_CODE_TYPE_ADC);
2384 }
2385 */
2386 _Drv_AVD_VDMCU_Init(pResource);
2387 #endif
2388
2389 if(pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_CVBS_NEGATIVESIG) //20130115 dia.chiu for TCL CVBS negative signal unlock
2390 {
2391 if((eSource == E_INPUT_SOURCE_CVBS1)||(eSource == E_INPUT_SOURCE_CVBS2)||(eSource == E_INPUT_SOURCE_CVBS3))
2392 {
2393 eVDHsyncSensitivityforAV.u8DetectWinAfterLock= 0x01;
2394 eVDHsyncSensitivityforAV.u8DetectWinBeforeLock= 0x01;
2395 eVDHsyncSensitivityforAV.u8CNTRFailBeforeLock = 0x01;
2396 eVDHsyncSensitivityforAV.u8CNTRSyncBeforeLock = 0x3E;
2397 eVDHsyncSensitivityforAV.u8CNTRSyncAfterLock = 0x00;
2398 HAL_AVD_AFEC_SetHsyncSensitivity(eVDHsyncSensitivityforAV);
2399 }
2400 else
2401 {
2402 HAL_AVD_AFEC_SetHsyncSensitivity(pResource->g_VD_InitData.eVDHsyncSensitivityNormal);
2403 }
2404 }
2405
2406 // set gain
2407 if (eSource == E_INPUT_SOURCE_ATV)
2408 {
2409 if (pResource->g_VD_InitData.bRFGainSel==VD_USE_FIX_GAIN)
2410 {
2411 HAL_AVD_AFEC_AGCSetMode(AVD_AGC_DISABLE);
2412
2413 if(pResource->g_VD_InitData.eDemodType == DEMODE_MSTAR_VIF)
2414 {
2415 HAL_AVD_AFEC_AGCSetCoarseGain(VD_AGC_COARSE_GAIN);
2416 HAL_AVD_AFEC_AGCSetFineGain(pResource->g_VD_InitData.u8RFGain);
2417 }
2418 else
2419 {
2420 HAL_AVD_AFEC_AGCSetCoarseGain(VD_AGC_COARSE_GAIN);
2421 HAL_AVD_AFEC_AGCSetFineGain(pResource->g_VD_InitData.u8RFGain);
2422 }
2423 }
2424 else
2425 {
2426 HAL_AVD_AFEC_AGCSetMode(AVD_AGC_ENABLE);
2427 }
2428 }
2429 else
2430 {
2431 if (pResource->g_VD_InitData.bAVGainSel==VD_USE_FIX_GAIN)
2432 {
2433 HAL_AVD_AFEC_AGCSetMode(AVD_AGC_DISABLE);
2434 HAL_AVD_AFEC_AGCSetCoarseGain(VD_AGC_COARSE_GAIN);
2435 HAL_AVD_AFEC_AGCSetFineGain(pResource->g_VD_InitData.u8AVGain);
2436 }
2437 else
2438 {
2439 HAL_AVD_AFEC_AGCSetMode(AVD_AGC_ENABLE);
2440 }
2441 //20120719 Brian Leave ATV source, disable the shift clk monitor
2442 pResource->_bShiftClkFlag = FALSE;
2443 }
2444
2445 // VD MCU Reset
2446 // BY 20090410, move function body here MDrv_AVD_McuReset();
2447 #if T3_LOAD_CODE //weicheng 20121003
2448 _Drv_AVD_VDMCU_Init(); // must reload code for T3
2449 #else
2450 HAL_AVD_AFEC_McuReset();
2451 #endif
2452 HAL_AVD_AFEC_SetPatchFlag(pResource->g_VD_InitData.u32VDPatchFlag);
2453 // Forced to PAL mode
2454 pResource->_eLastStandard = E_VIDEOSTANDARD_NOTSTANDARD;
2455 pResource->_eVideoSystem=E_VIDEOSTANDARD_PAL_BGHI;
2456 pResource->_u16CurVDStatus = 0;
2457 HAL_AVD_COMB_SetMemoryRequest(ENABLE);
2458 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
2459
2460 return TRUE;
2461 }
2462
Drv_AVD_SetVideoStandard(AVD_VideoStandardType eStandard,MS_BOOL bIsInAutoTuning,AVD_RESOURCE_PRIVATE * pResource)2463 MS_BOOL Drv_AVD_SetVideoStandard(AVD_VideoStandardType eStandard, MS_BOOL bIsInAutoTuning, AVD_RESOURCE_PRIVATE *pResource)
2464 {
2465 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
2466
2467 #if AVD_DRV_DEBUG
2468 if (pResource->_u8AVDDbgLevel == AVD_DBGLV_DEBUG)
2469 {
2470 ULOGE("AVD","MDrv_AVD_SetVideoStandard %d\n",eStandard);
2471 }
2472 #endif
2473
2474 pResource->_eVideoSystem = eStandard;
2475
2476 //Check input
2477 if (eStandard>=E_VIDEOSTANDARD_MAX)
2478 MS_ASSERT(FALSE);
2479
2480 switch (eStandard)
2481 {
2482 case E_VIDEOSTANDARD_NTSC_44:
2483 if((pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK) == AVD_PATCH_HTOTAL_USER)
2484 {
2485 HAL_AVD_AFEC_SetHTotal(pResource->_u16Htt_UserMD);
2486 }
2487 else
2488 {
2489 HAL_AVD_AFEC_SetHTotal(_u16HtotalNTSC_443[(pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK)>>8]* (VD_USE_FB + 1));
2490 }
2491
2492 HAL_AVD_AFEC_SetBT656Width(0xB4);
2493 pResource->_u16LatchH = 1127L;
2494 pResource->_u16CurVDStatus= VD_FSC_4433 | VD_STATUS_RDY;
2495 HAL_AVD_AFEC_SetFSCMode(FSC_MODE_NTSC_443);
2496 break;
2497 case E_VIDEOSTANDARD_PAL_60: // 1127
2498 if((pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK) == AVD_PATCH_HTOTAL_USER)
2499 {
2500 HAL_AVD_AFEC_SetHTotal(pResource->_u16Htt_UserMD);
2501 }
2502 else
2503 {
2504 HAL_AVD_AFEC_SetHTotal(_u16HtotalPAL_60[(pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK)>>8] * (VD_USE_FB + 1));
2505 }
2506 HAL_AVD_AFEC_SetBT656Width(0xB4);
2507 pResource->_u16LatchH = 1127L;
2508 pResource->_u16CurVDStatus= VD_PAL_SWITCH | VD_FSC_4433 | VD_STATUS_RDY;
2509 HAL_AVD_AFEC_SetFSCMode(FSC_MODE_PAL_60);
2510 break;
2511 case E_VIDEOSTANDARD_SECAM:
2512 if ( bIsInAutoTuning )
2513 {
2514 if((pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK) == AVD_PATCH_HTOTAL_USER)
2515 {
2516 HAL_AVD_AFEC_SetHTotal(pResource->_u16Htt_UserMD);
2517 }
2518 else
2519 {
2520 HAL_AVD_AFEC_SetHTotal(_u16HtotalPAL[(pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK)>>8] * (VD_USE_FB + 1));
2521 }
2522 }
2523 else
2524 {
2525 if((pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK) == AVD_PATCH_HTOTAL_USER)
2526 {
2527 HAL_AVD_AFEC_SetHTotal(pResource->_u16Htt_UserMD);
2528 }
2529 else
2530 {
2531 HAL_AVD_AFEC_SetHTotal(_u16HtotalSECAM[(pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK)>>8] * (VD_USE_FB + 1));
2532 }
2533 }
2534
2535 HAL_AVD_AFEC_SetBT656Width(0xB2);
2536 pResource->_u16LatchH = 1097L;
2537 pResource->_u16CurVDStatus = (VD_VSYNC_50HZ | VD_FSC_4285 | VD_STATUS_RDY);
2538 HAL_AVD_AFEC_SetFSCMode(FSC_MODE_SECAM);
2539 break;
2540
2541 case E_VIDEOSTANDARD_PAL_M: // 909
2542 if((pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK) == AVD_PATCH_HTOTAL_USER)
2543 {
2544 HAL_AVD_AFEC_SetHTotal(pResource->_u16Htt_UserMD);
2545 }
2546 else
2547 {
2548 HAL_AVD_AFEC_SetHTotal(_u16HtotalPAL_M[(pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK)>>8] * (VD_USE_FB + 1));
2549 }
2550 HAL_AVD_AFEC_SetBT656Width(0x8E);
2551 pResource->_u16LatchH = 909L;
2552 pResource->_u16CurVDStatus = (VD_PAL_SWITCH | VD_FSC_3575 | VD_STATUS_RDY);
2553 HAL_AVD_AFEC_SetFSCMode(FSC_MODE_PAL_M);
2554 break;
2555
2556 case E_VIDEOSTANDARD_PAL_N: // 917
2557 if((pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK) == AVD_PATCH_HTOTAL_USER)
2558 {
2559 HAL_AVD_AFEC_SetHTotal(pResource->_u16Htt_UserMD);
2560 }
2561 else
2562 {
2563 HAL_AVD_AFEC_SetHTotal(_u16HtotalPAL_NC[(pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK)>>8] * (VD_USE_FB + 1));
2564 }
2565 HAL_AVD_AFEC_SetBT656Width(0x93);
2566 pResource->_u16LatchH = 917L;
2567 pResource->_u16CurVDStatus = (VD_VSYNC_50HZ | VD_PAL_SWITCH | VD_FSC_3582 | VD_STATUS_RDY);
2568 HAL_AVD_AFEC_SetFSCMode(FSC_MODE_PAL_N);
2569 break;
2570
2571 case E_VIDEOSTANDARD_NTSC_M: // 910
2572 if((pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK) == AVD_PATCH_HTOTAL_USER)
2573 {
2574 HAL_AVD_AFEC_SetHTotal(pResource->_u16Htt_UserMD);
2575 }
2576 else
2577 {
2578 HAL_AVD_AFEC_SetHTotal(_u16HtotalNTSC[(pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK)>>8] * (VD_USE_FB + 1));
2579 }
2580 HAL_AVD_AFEC_SetBT656Width(0x6D);
2581 pResource->_u16LatchH = 910L;
2582 pResource->_u16CurVDStatus = (VD_FSC_3579 | VD_STATUS_RDY);
2583 HAL_AVD_AFEC_SetFSCMode(FSC_MODE_NTSC);
2584 break;
2585 default: // case E_VIDEOSTANDARD_PAL_BGHI: // 1135
2586 if((pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK) == AVD_PATCH_HTOTAL_USER)
2587 {
2588 HAL_AVD_AFEC_SetHTotal(pResource->_u16Htt_UserMD);
2589 }
2590 else
2591 {
2592 HAL_AVD_AFEC_SetHTotal(_u16HtotalPAL[(pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK)>>8] * (VD_USE_FB + 1));
2593 }
2594 HAL_AVD_AFEC_SetBT656Width(0xB6);
2595 pResource->_u16LatchH = 1135L;
2596 pResource->_u16CurVDStatus = (VD_VSYNC_50HZ | VD_PAL_SWITCH | VD_FSC_4433 | VD_STATUS_RDY);
2597 HAL_AVD_AFEC_SetFSCMode(FSC_MODE_PAL);
2598 break;
2599 }
2600
2601 if ((pResource->_eVDInputSource == E_INPUT_SOURCE_SVIDEO1) || (pResource->_eVDInputSource == E_INPUT_SOURCE_SVIDEO2))
2602 {
2603 if (E_VIDEOSTANDARD_NTSC_M == eStandard)
2604 {
2605 HAL_AVD_COMB_SetYCPipe(0x20);
2606 }
2607 else // SIG_NTSC_443, SIG_PAL, SIG_PAL_M, SIG_PAL_NC, SIG_SECAM
2608 {
2609 HAL_AVD_COMB_SetYCPipe(0x30);
2610 }
2611
2612 switch (eStandard)
2613 {
2614 case E_VIDEOSTANDARD_PAL_M:
2615 case E_VIDEOSTANDARD_PAL_N:
2616 HAL_AVD_COMB_SetCbCrInverse(0x04);
2617 break;
2618
2619 case E_VIDEOSTANDARD_NTSC_44:
2620 HAL_AVD_COMB_SetCbCrInverse(0x0C);
2621 break;
2622
2623 case E_VIDEOSTANDARD_PAL_60:
2624 HAL_AVD_COMB_SetCbCrInverse(0x08);
2625 break;
2626
2627 case E_VIDEOSTANDARD_NTSC_M:
2628 case E_VIDEOSTANDARD_SECAM:
2629 HAL_AVD_COMB_SetCbCrInverse(0x00);
2630 break;
2631
2632 case E_VIDEOSTANDARD_PAL_BGHI:
2633 default:
2634 HAL_AVD_COMB_SetCbCrInverse(0x08);
2635 break;
2636 }
2637 }
2638 else
2639 {
2640 if(pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_SCART_SVIDEO)
2641 {
2642 if((pResource->_eVDInputSource!=E_INPUT_SOURCE_SCART1)&&(pResource->_eVDInputSource!=E_INPUT_SOURCE_SCART2))
2643 {
2644 HAL_AVD_COMB_SetYCPipe(0x20);
2645 HAL_AVD_COMB_SetCbCrInverse(0x00);
2646 }
2647 }
2648 else
2649 {
2650 HAL_AVD_COMB_SetYCPipe(0x20);
2651 HAL_AVD_COMB_SetCbCrInverse(0x00);
2652 }
2653 }
2654
2655 if (pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_NTSC_50)
2656 {
2657 if ((HAL_AVD_AFEC_GetStatus() & (VD_FSC_TYPE|VD_VSYNC_50HZ|VD_COLOR_LOCKED))
2658 == (VD_FSC_3579|VD_VSYNC_50HZ|VD_COLOR_LOCKED)) // NTSC-50
2659 {
2660 HAL_AVD_COMB_SetVerticalTimingDetectMode(0x02);
2661 }
2662 else
2663 {
2664 HAL_AVD_COMB_SetVerticalTimingDetectMode(0x00);
2665 }
2666 }
2667
2668 if (eStandard == E_VIDEOSTANDARD_NTSC_44)
2669 {
2670 HAL_AVD_COMB_SetLineBufferMode(0x06);
2671 HAL_AVD_COMB_SetHtotal(0x467);
2672 }
2673 else if ((pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_NTSC_50) && ((HAL_AVD_AFEC_GetStatus() & (VD_FSC_TYPE|VD_VSYNC_50HZ|VD_COLOR_LOCKED))
2674 == (VD_FSC_3579|VD_VSYNC_50HZ|VD_COLOR_LOCKED))) // NTSC-50
2675 {
2676 HAL_AVD_COMB_SetLineBufferMode(0x06);
2677 HAL_AVD_COMB_SetHtotal(0x396);
2678 }
2679 else
2680 {
2681 HAL_AVD_COMB_SetLineBufferMode(0x07);
2682 HAL_AVD_COMB_SetHtotal(0x38D);
2683 }
2684
2685 if (eStandard == E_VIDEOSTANDARD_SECAM)
2686 {
2687 HAL_AVD_VBI_SetVPSPhaseAcc(0x9A6D);
2688 }
2689 else
2690 {
2691 HAL_AVD_VBI_SetVPSPhaseAcc(0x018C);
2692 }
2693
2694 {
2695 if (HAL_AVD_AFEC_GetBurstOn())
2696 {
2697 _Drv_AVD_3DCombSpeedup(pResource);
2698 }
2699 }
2700
2701 #if 0
2702 if (g_VD_InitData.u32VDPatchFlag & AVD_PATCH_FINE_TUNE_COMB_F2) //bug's life, for Eris ATT, James.Lu, 20080327
2703 {
2704
2705 if(((_eVDInputSource == E_INPUT_SOURCE_CVBS1) ||
2706 (_eVDInputSource == E_INPUT_SOURCE_CVBS2) ||
2707 ( _eVDInputSource == E_INPUT_SOURCE_CVBS3)) && (eStandard == E_VIDEOSTANDARD_NTSC_M))
2708 {
2709 HAL_AVD_COMB_SetF2(0x57);
2710 }
2711 else
2712 {
2713 HAL_AVD_COMB_SetF2(0x47);
2714 }
2715 }
2716
2717
2718 if (g_VD_InitData.u32VDPatchFlag & AVD_PATCH_FINE_TUNE_3D_COMB)
2719 {
2720 HAL_AVD_COMB_Set3dFineTune((eStandard==E_VIDEOSTANDARD_PAL_BGHI));
2721 }
2722
2723
2724 {
2725 switch (eStandard)
2726 {
2727 case E_VIDEOSTANDARD_PAL_BGHI:
2728 HAL_AVD_COMB_Set3dDetectionTolerance(0x06);
2729 break;
2730 case E_VIDEOSTANDARD_PAL_M:
2731 HAL_AVD_COMB_Set3dDetectionTolerance(0x04);
2732 break;
2733 default:
2734 HAL_AVD_COMB_Set3dDetectionTolerance(0x05);
2735 break;
2736 }
2737 }
2738 #endif
2739
2740 if (pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_NON_STANDARD_VTOTAL) //bug's life, for Eris ATT, James.Lu, 20080327
2741 {
2742 #ifndef MSOS_TYPE_LINUX
2743 if(
2744 ((pResource->_eVDInputSource == E_INPUT_SOURCE_CVBS1) ||
2745 (pResource->_eVDInputSource == E_INPUT_SOURCE_CVBS2) ||
2746 (pResource->_eVDInputSource == E_INPUT_SOURCE_CVBS3) ||
2747 ( pResource->_eVDInputSource == E_INPUT_SOURCE_ATV)) &&
2748 (eStandard!=E_VIDEOSTANDARD_NOTSTANDARD)
2749 )
2750 {
2751 MS_U16 u16Vtotal=HAL_AVD_AFEC_GetVTotal();
2752 if ((u16Vtotal < 675 ) && (u16Vtotal > 570))
2753 pResource->u16PreVtotal = 625;
2754 else
2755 pResource->u16PreVtotal = 525;
2756 }
2757 else
2758 {
2759 pResource->u16PreVtotal = 0;
2760 }
2761 #endif
2762 }
2763 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
2764
2765 return TRUE;
2766 }
2767
Drv_AVD_SetChannelChange(AVD_RESOURCE_PRIVATE * pResource)2768 void Drv_AVD_SetChannelChange(AVD_RESOURCE_PRIVATE *pResource)
2769 {
2770 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
2771 #if AVD_DRV_DEBUG
2772 if (pResource->_u8AVDDbgLevel == AVD_DBGLV_DEBUG)
2773 {
2774 ULOGE("AVD","Drv_AVD_SetChannelChange\n");
2775 }
2776 #endif
2777 HAL_AVD_AFEC_SetChannelChange();
2778 //MDrv_AVD_3DCombSpeedup();
2779 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
2780 }
2781
Drv_AVD_SetHsyncDetectionForTuning(MS_BOOL bEnable,AVD_RESOURCE_PRIVATE * pResource)2782 void Drv_AVD_SetHsyncDetectionForTuning(MS_BOOL bEnable, AVD_RESOURCE_PRIVATE *pResource)
2783 {
2784 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
2785 #if AVD_DRV_DEBUG
2786 if (pResource->_u8AVDDbgLevel == AVD_DBGLV_DEBUG)
2787 {
2788 ULOGE("AVD","MDrv_AVD_SetHsyncDetectionForTuning %d\n",bEnable);
2789 }
2790 #endif
2791
2792 if (bEnable) // for Auto Scan Mode
2793 {
2794 HAL_AVD_AFEC_SetHsyncSensitivity(pResource->g_VD_InitData.eVDHsyncSensitivityTuning);
2795 HAL_AVD_AFEC_SetSwingLimit(0);
2796 HAL_AVD_AFEC_EnableBottomAverage(DISABLE); // more sensitivity
2797 pResource->_u8AutoTuningIsProgress = TRUE;
2798 }
2799 else // for Normal Mode
2800 {
2801 HAL_AVD_AFEC_SetHsyncSensitivity(pResource->g_VD_InitData.eVDHsyncSensitivityNormal);
2802 HAL_AVD_AFEC_SetSwingLimit(pResource->g_VD_InitData.u8SwingThreshold);
2803 HAL_AVD_AFEC_EnableBottomAverage(ENABLE); // more reliability
2804 pResource->_u8AutoTuningIsProgress = FALSE;
2805 }
2806 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
2807 }
2808
Drv_AVD_Set3dComb(MS_BOOL bEnable,AVD_RESOURCE_PRIVATE * pResource)2809 void Drv_AVD_Set3dComb(MS_BOOL bEnable, AVD_RESOURCE_PRIVATE *pResource)
2810 {
2811 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
2812 // it's ok to enable/disable 3D comb for svideo input
2813 if(bEnable)
2814 {
2815 pResource->_b2d3dautoflag=1;
2816 }
2817 else
2818 {
2819 pResource->_b2d3dautoflag=0;
2820 }
2821 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
2822 }
2823
Drv_AVD_SetShiftClk(MS_BOOL bEnable,AVD_ATV_CLK_TYPE eShiftMode,AVD_RESOURCE_PRIVATE * pResource)2824 void Drv_AVD_SetShiftClk(MS_BOOL bEnable,AVD_ATV_CLK_TYPE eShiftMode, AVD_RESOURCE_PRIVATE *pResource)
2825 {
2826 if( (pResource->_eVDInputSource == E_INPUT_SOURCE_ATV) && (pResource->g_VD_InitData.eDemodType == DEMODE_MSTAR_VIF))
2827 {
2828 if(pResource->_u8AutoTuningIsProgress == TRUE)
2829 {
2830 eShiftMode=E_ATV_CLK_ORIGIN_43P2MHZ;
2831 }
2832 if((bEnable == FALSE) || (eShiftMode == E_ATV_CLK_ORIGIN_43P2MHZ))
2833 {
2834 pResource->_bShiftClkFlag = FALSE;
2835 HAL_AVD_ShiftClk(eShiftMode, E_VIDEOSTANDARD_AUTO,pResource->g_VD_InitData.u32XTAL_Clock);
2836 }
2837 else
2838 {
2839 pResource->_bShiftClkFlag = bEnable;
2840 }
2841 pResource->gShiftMode = eShiftMode;
2842 }
2843 else
2844 {
2845 pResource->_bShiftClkFlag = FALSE;
2846 }
2847 }
2848
Drv_AVD_SetFreerunPLL(AVD_VideoFreq eVideoFreq,AVD_RESOURCE_PRIVATE * pResource)2849 void Drv_AVD_SetFreerunPLL(AVD_VideoFreq eVideoFreq, AVD_RESOURCE_PRIVATE *pResource)
2850 {
2851 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
2852 if( eVideoFreq == E_VIDEO_FQ_60Hz )
2853 {
2854 HAL_AVD_COMB_SetHtotal((MS_U16)0x38E);
2855 }
2856 else if( eVideoFreq == E_VIDEO_FQ_50Hz )
2857 {
2858 HAL_AVD_COMB_SetHtotal((MS_U16)0x46F);
2859 }
2860 else if( eVideoFreq == E_VIDEO_FQ_NOSIGNAL )
2861 {
2862 //Do nothing
2863 }else
2864 {
2865 MS_ASSERT(FALSE);
2866 }
2867 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
2868 }
2869
Drv_AVD_SetFreerunFreq(AVD_FreeRunFreq eFreerunfreq,AVD_RESOURCE_PRIVATE * pResource)2870 void Drv_AVD_SetFreerunFreq(AVD_FreeRunFreq eFreerunfreq, AVD_RESOURCE_PRIVATE *pResource)
2871 {
2872 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
2873 if (eFreerunfreq >= E_FREERUN_FQ_MAX)
2874 MS_ASSERT(FALSE);
2875
2876 switch(eFreerunfreq)
2877 {
2878 case E_FREERUN_FQ_AUTO:
2879 HAL_AVD_AFEC_SetVtotal(0x00);
2880 break;
2881
2882 case E_FREERUN_FQ_50Hz:
2883 HAL_AVD_AFEC_SetVtotal(0x01);
2884 break;
2885
2886 case E_FREERUN_FQ_60Hz:
2887 HAL_AVD_AFEC_SetVtotal(0x03);
2888 break;
2889
2890 default:
2891 break;
2892 }
2893 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
2894 }
2895
Drv_AVD_SetFactoryPara(AVD_Factory_Para FactoryPara,MS_U8 u8Value,AVD_RESOURCE_PRIVATE * pResource)2896 void Drv_AVD_SetFactoryPara(AVD_Factory_Para FactoryPara,MS_U8 u8Value, AVD_RESOURCE_PRIVATE *pResource)
2897 {
2898 MS_U8 u8tmp;
2899
2900 switch(FactoryPara)
2901 {
2902 case E_FACTORY_PARA_AFEC_D4:
2903 HAL_AVD_SetReg(BK_AFEC_D4,u8Value);
2904 break;
2905 case E_FACTORY_PARA_AFEC_D8:
2906 HAL_AVD_SetReg(BK_AFEC_D8,u8Value);
2907 break;
2908 case E_FACTORY_PARA_AFEC_D5_BIT2:
2909 u8tmp = HAL_AVD_GetReg(BK_AFEC_D5);
2910 u8tmp &= (~BIT(2));
2911 HAL_AVD_SetReg(BK_AFEC_D5,u8tmp |(u8Value & BIT(2)));
2912 break;
2913 case E_FACTORY_PARA_AFEC_D9_BIT0:
2914 u8tmp = HAL_AVD_GetReg(BK_AFEC_D9);
2915 u8tmp &= (~BIT(0));
2916 HAL_AVD_SetReg(BK_AFEC_D9,u8tmp |(u8Value & BIT(0)));
2917 break;
2918 case E_FACTORY_PARA_AFEC_A0:
2919 HAL_AVD_SetReg(BK_AFEC_A0,u8Value);
2920 break;
2921 case E_FACTORY_PARA_AFEC_A1:
2922 HAL_AVD_SetReg(BK_AFEC_A1,u8Value);
2923 break;
2924 case E_FACTORY_PARA_AFEC_66_BIT67:
2925 u8tmp = HAL_AVD_GetReg(BK_AFEC_66);
2926 u8tmp &= (~(BIT(6)|BIT(7)));
2927 HAL_AVD_SetReg(BK_AFEC_66,u8tmp |(u8Value & (BIT(6)|BIT(7))));
2928 break;
2929 case E_FACTORY_PARA_AFEC_6E_BIT7654:
2930 u8tmp = HAL_AVD_GetReg(BK_AFEC_6E);
2931 u8tmp &= 0x0F;
2932 HAL_AVD_SetReg(BK_AFEC_6E,u8tmp |(u8Value & 0xF0));
2933 break;
2934 case E_FACTORY_PARA_AFEC_6E_BIT3210:
2935 u8tmp = HAL_AVD_GetReg(BK_AFEC_6E);
2936 u8tmp &= 0XF0;
2937 HAL_AVD_SetReg(BK_AFEC_6E,u8tmp |(u8Value & 0x0F));
2938 break;
2939 case E_FACTORY_PARA_AFEC_43:
2940 u8tmp = HAL_AVD_GetReg(BK_AFEC_43);
2941 u8tmp &= (~(BIT(5)|BIT(6)));
2942 HAL_AVD_SetReg(BK_AFEC_43,u8tmp |(u8Value & (BIT(5)|BIT(6))));
2943 u8tmp = HAL_AVD_GetReg(BK_AFEC_55);
2944 HAL_AVD_SetReg(BK_AFEC_55,u8tmp|BIT(2));
2945 MsOS_DelayTask(2);
2946 HAL_AVD_SetReg(BK_AFEC_55,u8tmp &(~BIT(2)));
2947 break;
2948 case E_FACTORY_PARA_AFEC_44:
2949 HAL_AVD_SetReg(BK_AFEC_44,u8Value);
2950 HAL_AVD_AFEC_AGCSetMode(AVD_AGC_DISABLE);
2951 break;
2952 case E_FACTORY_PARA_AFEC_CB:
2953 u8tmp = HAL_AVD_GetReg(BK_AFEC_CB);
2954 u8tmp &= BIT(7);
2955 HAL_AVD_SetReg(BK_AFEC_CB,u8tmp|(u8Value & 0x7F)); //except BIT7
2956 break;
2957 case E_FACTORY_PARA_AFEC_CF_BIT2:
2958 u8tmp = HAL_AVD_GetReg(BK_AFEC_CF);
2959 u8tmp &= (~BIT(2));
2960 HAL_AVD_SetReg(BK_AFEC_CF,u8tmp |(u8Value & BIT(2)));
2961 break;
2962 case E_FACTORY_PARA_AFEC_D5_BIT3:
2963 u8tmp = HAL_AVD_GetReg(BK_AFEC_D5);
2964 u8tmp &= (~BIT(3));
2965 HAL_AVD_SetReg(BK_AFEC_D5,u8tmp |(u8Value & BIT(3)));
2966 break;
2967 case E_FACTORY_PARA_AFEC_D7_HIGH:
2968 pResource->g_VD_InitData.u8ColorKillHighBound = u8Value;
2969 break;
2970 case E_FACTORY_PARA_AFEC_D7_LOW:
2971 pResource->g_VD_InitData.u8ColorKillLowBound = u8Value;
2972 break;
2973 default:
2974 ULOGE("AVD","ERROR!!! Invalid Factory Parameter!\n");
2975 break;
2976 }
2977 }
2978
Drv_AVD_SetDbgLevel(AVD_DbgLv u8DbgLevel,AVD_RESOURCE_PRIVATE * pResource)2979 MS_BOOL Drv_AVD_SetDbgLevel(AVD_DbgLv u8DbgLevel, AVD_RESOURCE_PRIVATE *pResource)
2980 {
2981 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
2982 #if AVD_DRV_DEBUG
2983 pResource->_u8AVDDbgLevel = u8DbgLevel;
2984 #endif
2985 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
2986 return TRUE;
2987 }
2988
Drv_AVD_SetPQFineTune(AVD_RESOURCE_PRIVATE * pResource)2989 void Drv_AVD_SetPQFineTune(AVD_RESOURCE_PRIVATE *pResource)
2990 {
2991 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
2992 HAL_AVD_SetPQFineTune();
2993 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
2994 }
2995
Drv_AVD_Set3dCombSpeed(MS_U8 u8COMB57,MS_U8 u8COMB58,AVD_RESOURCE_PRIVATE * pResource)2996 void Drv_AVD_Set3dCombSpeed(MS_U8 u8COMB57, MS_U8 u8COMB58, AVD_RESOURCE_PRIVATE *pResource)
2997 {
2998 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
2999 pResource->_u8Comb57 = u8COMB57;
3000 pResource->_u8Comb58 = u8COMB58;
3001 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
3002 }
3003
Drv_AVD_SetStillImageParam(AVD_Still_Image_Param param,AVD_RESOURCE_PRIVATE * pResource)3004 void Drv_AVD_SetStillImageParam(AVD_Still_Image_Param param, AVD_RESOURCE_PRIVATE *pResource)
3005 {
3006 pResource->g_stillImageParam.bMessageOn = param.bMessageOn;
3007
3008 pResource->g_stillImageParam.u8Str1_COMB37 = param.u8Str1_COMB37;
3009 pResource->g_stillImageParam.u8Str1_COMB38 = param.u8Str1_COMB38;
3010 pResource->g_stillImageParam.u8Str1_COMB7C = param.u8Str1_COMB7C;
3011 pResource->g_stillImageParam.u8Str1_COMBED = param.u8Str1_COMBED;
3012
3013 pResource->g_stillImageParam.u8Str2_COMB37 = param.u8Str2_COMB37;
3014 pResource->g_stillImageParam.u8Str2_COMB38 = param.u8Str2_COMB38;
3015 pResource->g_stillImageParam.u8Str2_COMB7C = param.u8Str2_COMB7C;
3016 pResource->g_stillImageParam.u8Str2_COMBED = param.u8Str2_COMBED;
3017
3018 pResource->g_stillImageParam.u8Str3_COMB37 = param.u8Str3_COMB37;
3019 pResource->g_stillImageParam.u8Str3_COMB38 = param.u8Str3_COMB38;
3020 pResource->g_stillImageParam.u8Str3_COMB7C = param.u8Str3_COMB7C;
3021 pResource->g_stillImageParam.u8Str3_COMBED = param.u8Str3_COMBED;
3022
3023 pResource->g_stillImageParam.u8Threshold1 = param.u8Threshold1;
3024 pResource->g_stillImageParam.u8Threshold2 = param.u8Threshold2;
3025 pResource->g_stillImageParam.u8Threshold3 = param.u8Threshold3;
3026 pResource->g_stillImageParam.u8Threshold4 = param.u8Threshold4;
3027 }
3028
Drv_AVD_Set2D3DPatchOnOff(MS_BOOL bEnable)3029 void Drv_AVD_Set2D3DPatchOnOff(MS_BOOL bEnable)
3030 {
3031 HAL_AVD_Set2D3DPatchOnOff(bEnable);
3032 ULOGE("AVD","Patch %s \r\n",(bEnable)?"On" : "Off" );
3033 }
3034
Drv_AVD_SetAutoFineGainToFixed(void)3035 MS_U8 Drv_AVD_SetAutoFineGainToFixed(void)
3036 {
3037 #if 1
3038 // Keep the function but do nothing, for compatibility.
3039 return 0;
3040 #else
3041 MS_U8 u8CoaseGain,u8LPFGain, u8temp;
3042 MS_U16 u16FineGain;
3043
3044 AVD_LOCK();
3045
3046 HAL_AVD_AFEC_AGCSetMode(AVD_AGC_ENABLE);//auto gain
3047 MsOS_DelayTask(400);
3048
3049 //printf("0x353F:%x\r\n",HAL_AVD_GetReg(0x353F));
3050 //printf("0x3544:%x\r\n",HAL_AVD_GetReg(0x3544));
3051 //printf("0x355F:%x\r\n",HAL_AVD_GetReg(0x355F));
3052 //printf("0x3540:%x\r\n",HAL_AVD_GetReg(0x3540));
3053
3054 u8LPFGain = ((MDrv_AVD_DSPReadByte(2, 0x81)&BIT(4))>>4); //DSP_81[4], LPF gain
3055 u8CoaseGain = MDrv_AVD_DSPReadByte(2, 0x80)&0x0F; //DSP_80[3:0], coarse gain
3056 //Read AGC fine-gain data DSP_80[11:4]
3057 u16FineGain = ((MDrv_AVD_DSPReadByte(2, 0x80)&0xF0)>>4)+((MDrv_AVD_DSPReadByte(2, 0x81)&0x0F)<<4);
3058
3059 //printf("u8LPFGain:%x\r\n",u8LPFGain);
3060 //printf("u8CoaseGain:%x\r\n",u8CoaseGain);
3061 //printf("u16FineGain:%x\r\n",u16FineGain);
3062
3063 u8temp = HAL_AVD_GetReg(BK_AFEC_3F)& 0xF0;
3064 HAL_AVD_SetReg(BK_AFEC_3F, u8CoaseGain | u8temp); //AFEC_3F[3:0], coarse gain
3065
3066 HAL_AVD_SetReg(BK_AFEC_44, (u16FineGain)& 0xFF);//AFEC_44[7:0], fine gain
3067
3068 u8temp = HAL_AVD_GetReg(BK_AFEC_40);
3069 u8temp &= (~ BIT(4));
3070 HAL_AVD_SetReg(BK_AFEC_40,u8temp |(u8LPFGain & BIT(2))); //AFEC_40[4]LPF gain
3071
3072 //printf("0x353F:%x\r\n",HAL_AVD_GetReg(0x353F));
3073 //printf("0x3544:%x\r\n",HAL_AVD_GetReg(0x3544));
3074 //printf("0x355F:%x\r\n",HAL_AVD_GetReg(0x355F));
3075 //printf("0x3540:%x\r\n",HAL_AVD_GetReg(0x3540));
3076
3077 MsOS_DelayTask(10);
3078
3079 HAL_AVD_AFEC_AGCSetMode(AVD_AGC_DISABLE);//fixed gain
3080
3081 AVD_UNLOCK();
3082
3083 return (u16FineGain>>6);
3084 #endif
3085 }
3086
Drv_AVD_GetRegValue(MS_U16 u16Addr)3087 MS_U8 Drv_AVD_GetRegValue(MS_U16 u16Addr)
3088 {
3089 return HAL_AVD_GetReg( u16Addr );
3090 }
3091
Drv_AVD_GetStatus(void)3092 MS_U16 Drv_AVD_GetStatus(void)
3093 {
3094 return HAL_AVD_AFEC_GetStatus();
3095 }
3096
Drv_AVD_GetNoiseMag(void)3097 MS_U8 Drv_AVD_GetNoiseMag(void)
3098 {
3099 return HAL_AVD_AFEC_GetNoiseMag();
3100 }
3101
Drv_AVD_GetVTotal(void)3102 MS_U16 Drv_AVD_GetVTotal(void)
3103 {
3104 return HAL_AVD_AFEC_GetVTotal();
3105 }
3106
Drv_AVD_GetStandardDetection(MS_U16 * u16LatchStatus,AVD_RESOURCE_PRIVATE * pResource)3107 AVD_VideoStandardType Drv_AVD_GetStandardDetection(MS_U16 *u16LatchStatus, AVD_RESOURCE_PRIVATE *pResource)
3108 {
3109 MS_U16 u16Status;
3110 AVD_VideoStandardType eVideoStandard;
3111
3112 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
3113 *u16LatchStatus = u16Status = HAL_AVD_AFEC_GetStatus();
3114
3115
3116 if ( !IS_BITS_SET(u16Status, VD_HSYNC_LOCKED|VD_SYNC_LOCKED|VD_STATUS_RDY) )
3117 {
3118 pResource->_eLastStandard=E_VIDEOSTANDARD_NOTSTANDARD;
3119 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
3120 return E_VIDEOSTANDARD_NOTSTANDARD;
3121 }
3122
3123
3124 if (pResource->_u8AutoDetMode==FSC_AUTO_DET_DISABLE)
3125 {
3126 eVideoStandard = pResource->_eForceVideoStandard;
3127 }
3128 else
3129 {
3130 if (u16Status & VD_BURST_ON)
3131 {
3132 switch (u16Status & VD_FSC_TYPE)
3133 {
3134 case VD_FSC_4433: // (FSC_MODE_PAL << 5):
3135 HAL_AVD_ADC_SetGMC(0x06);
3136 #if (!TEST_VD_DSP)
3137 if (u16Status & VD_VSYNC_50HZ) // 50 Hz
3138 #endif
3139 {
3140 eVideoStandard = E_VIDEOSTANDARD_PAL_BGHI;
3141 }
3142 #if (!TEST_VD_DSP)
3143 else // 60MHz
3144 {
3145 if (u16Status & VD_PAL_SWITCH)
3146 {
3147 eVideoStandard = E_VIDEOSTANDARD_PAL_60; // or vsdNTSC_44
3148 }
3149 else
3150 {
3151 eVideoStandard = E_VIDEOSTANDARD_NTSC_44;
3152 }
3153 }
3154 #endif
3155 break;
3156
3157 case VD_FSC_3579:
3158 if (pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_NTSC_50)
3159 {
3160 if ( u16Status & VD_VSYNC_50HZ ) // 50Hz
3161 {
3162 // 3.579545MHz, NTSC-50
3163 // glock RIU_WriteByteMask(L_BK_ADC_ATOP(0x37), 0x07, 0x07);
3164 eVideoStandard = E_VIDEOSTANDARD_PAL_BGHI;
3165 }
3166 else
3167 {
3168 // 3.579545MHz, NTSC
3169 HAL_AVD_ADC_SetGMC(0x07);
3170 eVideoStandard = E_VIDEOSTANDARD_NTSC_M;
3171 }
3172 }
3173 else
3174 {
3175 HAL_AVD_ADC_SetGMC(0x07);
3176 eVideoStandard = E_VIDEOSTANDARD_NTSC_M;
3177 }
3178 break;
3179
3180 case VD_FSC_3575: // (FSC_MODE_PAL_M << 5):
3181 HAL_AVD_ADC_SetGMC(0x07);
3182 eVideoStandard = E_VIDEOSTANDARD_PAL_M;
3183 break;
3184
3185 case VD_FSC_3582: // (FSC_MODE_PAL_N << 5):
3186 HAL_AVD_ADC_SetGMC(0x07);
3187 eVideoStandard = E_VIDEOSTANDARD_PAL_N;
3188 break;
3189
3190 #if (TEST_VD_DSP)
3191 case (FSC_MODE_NTSC_443 << 5):
3192 eVideoStandard = E_VIDEOSTANDARD_NTSC_44;
3193 break;
3194
3195 case (FSC_MODE_PAL_60 << 5):
3196 eVideoStandard = E_VIDEOSTANDARD_PAL_60;
3197 break;
3198 #endif
3199
3200 default:
3201 eVideoStandard = E_VIDEOSTANDARD_NOTSTANDARD;
3202 break;
3203 }
3204 }
3205 else
3206 {
3207 if (u16Status & VD_VSYNC_50HZ)
3208 {
3209 if ((u16Status & VD_FSC_TYPE) == VD_FSC_4285)
3210 {
3211 HAL_AVD_ADC_SetGMC(0x06);
3212 // if (u16Status & VD_VSYNC_50HZ) // SECAM must 50 Hz
3213 {
3214 eVideoStandard = E_VIDEOSTANDARD_SECAM;
3215 }
3216 }
3217 else
3218 {
3219 HAL_AVD_ADC_SetGMC(0x06);
3220 eVideoStandard = E_VIDEOSTANDARD_PAL_BGHI;
3221 }
3222 }
3223 else
3224 {
3225 HAL_AVD_ADC_SetGMC(0x07);
3226 eVideoStandard = E_VIDEOSTANDARD_NTSC_M;
3227 }
3228 }
3229 }
3230
3231 pResource->_eLastStandard=eVideoStandard;
3232
3233 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
3234 return eVideoStandard;
3235 }
3236
Drv_AVD_GetCaptureWindow(void * stCapWin,AVD_VideoStandardType eVideoStandardType,AVD_RESOURCE_PRIVATE * pResource)3237 void Drv_AVD_GetCaptureWindow(void *stCapWin, AVD_VideoStandardType eVideoStandardType , AVD_RESOURCE_PRIVATE *pResource)
3238 {
3239 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
3240 #if AVD_DRV_DEBUG
3241 if (pResource->_u8AVDDbgLevel == AVD_DBGLV_DEBUG)
3242 {
3243 ULOGE("AVD","MDrv_AVD_GetCaptureWindow %ld %d\n",(pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK)>>8, _u16HtotalPAL[(pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK)>>8]);
3244 }
3245 #endif
3246 switch (eVideoStandardType)
3247 {
3248 case E_VIDEOSTANDARD_PAL_BGHI:
3249 ((MS_WINDOW_TYPE *)stCapWin)->width=(((MS_U32)720*(_u16HtotalPAL[(pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK)>>8])+432)/864);
3250 break;
3251 case E_VIDEOSTANDARD_NTSC_M:
3252 ((MS_WINDOW_TYPE *)stCapWin)->width=(((MS_U32)720*(_u16HtotalNTSC[(pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK)>>8])+429)/858);
3253 break;
3254 case E_VIDEOSTANDARD_SECAM:
3255 ((MS_WINDOW_TYPE *)stCapWin)->width=(((MS_U32)720*(_u16HtotalSECAM[(pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK)>>8])+432)/864);
3256 break;
3257 case E_VIDEOSTANDARD_NTSC_44:
3258 ((MS_WINDOW_TYPE *)stCapWin)->width=(((MS_U32)720*(_u16HtotalNTSC_443[(pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK)>>8])+432)/864);
3259 break;
3260 case E_VIDEOSTANDARD_PAL_M:
3261 ((MS_WINDOW_TYPE *)stCapWin)->width=(((MS_U32)720*(_u16HtotalPAL_M[(pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK)>>8])+429)/858);
3262 break;
3263 case E_VIDEOSTANDARD_PAL_N:
3264 ((MS_WINDOW_TYPE *)stCapWin)->width=(((MS_U32)720*(_u16HtotalPAL_NC[(pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK)>>8])+429)/858);
3265 break;
3266 case E_VIDEOSTANDARD_PAL_60:
3267 ((MS_WINDOW_TYPE *)stCapWin)->width=(((MS_U32)720*(_u16HtotalPAL_60[(pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK)>>8])+432)/864);
3268 break;
3269 default :
3270 ((MS_WINDOW_TYPE *)stCapWin)->width=(((MS_U32)720*(_u16HtotalPAL[(pResource->g_VD_InitData.u32VDPatchFlag & AVD_PATCH_HTOTAL_MASK)>>8])+432)/864);
3271 break;
3272 }
3273 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
3274 }
3275
Drv_AVD_GetVerticalFreq(void)3276 AVD_VideoFreq Drv_AVD_GetVerticalFreq(void)
3277 {
3278 MS_U16 u16Status;
3279
3280 u16Status = HAL_AVD_AFEC_GetStatus();
3281 if( IS_BITS_SET(u16Status, VD_HSYNC_LOCKED | VD_STATUS_RDY) )
3282 {
3283 if( VD_VSYNC_50HZ & u16Status )
3284 {
3285 return E_VIDEO_FQ_50Hz;
3286 }
3287 else
3288 {
3289 return E_VIDEO_FQ_60Hz;
3290 }
3291 }
3292 return E_VIDEO_FQ_NOSIGNAL;
3293 }
3294
Drv_AVD_GetHsyncEdge(void)3295 MS_U8 Drv_AVD_GetHsyncEdge(void)
3296 {
3297 return HAL_AVD_GetHsyncEdge();
3298 }
3299
Drv_AVD_GetDSPFineGain(AVD_RESOURCE_PRIVATE * pResource)3300 MS_U8 Drv_AVD_GetDSPFineGain(AVD_RESOURCE_PRIVATE *pResource)
3301 {
3302 MS_U8 u8CoaseGain,u8LPFGain, u8temp;
3303 MS_U16 u16FineGain;
3304
3305 AVD_LOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
3306
3307 u8LPFGain = ((_Drv_AVD_DSPReadByte(2, 0x81)&BIT(4))>>4); //DSP_81[4], LPF gain
3308 u8CoaseGain = _Drv_AVD_DSPReadByte(2, 0x80)&0x0F; //DSP_80[3:0], coarse gain
3309 //Read AGC fine-gain data DSP_80[11:4]
3310 u16FineGain = ((_Drv_AVD_DSPReadByte(2, 0x80)&0xF0)>>4)+((_Drv_AVD_DSPReadByte(2, 0x81)&0x0F)<<4);
3311
3312 u8temp = HAL_AVD_GetReg(BK_AFEC_3F)& 0xF0;
3313 HAL_AVD_SetReg(BK_AFEC_3F, u8CoaseGain | u8temp); //AFEC_3F[3:0], coarse gain
3314
3315 HAL_AVD_SetReg(BK_AFEC_44, (u16FineGain)& 0xFF);//AFEC_44[7:0], fine gain
3316
3317 u8temp = HAL_AVD_GetReg(BK_AFEC_40);
3318 u8temp &= (~ BIT(4));
3319 HAL_AVD_SetReg(BK_AFEC_40,u8temp |(u8LPFGain & BIT(2))); //AFEC_40[4]LPF gain
3320
3321 AVD_UNLOCK(pResource->_s32AVD_Mutex,pResource->_u8AVDDbgLevel);
3322
3323 return (u16FineGain>>6);
3324 }
3325
Drv_AVD_GetDSPVersion(void)3326 MS_U16 Drv_AVD_GetDSPVersion(void)
3327 {
3328 return (HAL_AVD_GetReg(BK_AFEC_D0)+DSP_VER_OFFSET);
3329 }
3330
Drv_AVD_GetLibVer(const MSIF_Version ** ppVersion)3331 AVD_Result Drv_AVD_GetLibVer(const MSIF_Version **ppVersion)
3332 {
3333 // No mutex check, it can be called before Init
3334 if (!ppVersion)
3335 {
3336 return E_AVD_FAIL;
3337 }
3338
3339 *ppVersion = &_drv_avd_version;
3340
3341 return E_AVD_OK;
3342 }
3343
Drv_AVD_GetInfo(AVD_Info * pAVD_Info,AVD_RESOURCE_PRIVATE * pResource)3344 void Drv_AVD_GetInfo(AVD_Info *pAVD_Info,AVD_RESOURCE_PRIVATE *pResource)
3345 {
3346 pAVD_Info->eVDInputSource=pResource->_eVDInputSource;
3347 pAVD_Info->eVideoSystem=pResource->_eVideoSystem;
3348 pAVD_Info->eLastStandard=pResource->_eLastStandard;
3349 pAVD_Info->u8AutoDetMode=pResource->_u8AutoDetMode;
3350 pAVD_Info->u16CurVDStatus=pResource->_u16CurVDStatus;
3351 pAVD_Info->u8AutoTuningIsProgress=pResource->_u8AutoTuningIsProgress;
3352 }
3353
Drv_AVD_IsSyncLocked(void)3354 MS_BOOL Drv_AVD_IsSyncLocked(void)
3355 {
3356 if( IS_BITS_SET(HAL_AVD_AFEC_GetStatus(), VD_HSYNC_LOCKED) ) // should not check vsync lock during channel scan
3357 {
3358 return TRUE;
3359 }
3360 return FALSE;
3361 }
3362
Drv_AVD_IsSignalInterlaced(void)3363 MS_BOOL Drv_AVD_IsSignalInterlaced(void)
3364 {
3365 if ( IS_BITS_SET(HAL_AVD_AFEC_GetStatus(), VD_INTERLACED | VD_HSYNC_LOCKED | VD_STATUS_RDY) )
3366 {
3367 return TRUE;
3368 }
3369 return FALSE;
3370 }
3371
Drv_AVD_IsColorOn(void)3372 MS_BOOL Drv_AVD_IsColorOn(void)
3373 {
3374 if ( IS_BITS_SET(HAL_AVD_AFEC_GetStatus(), VD_COLOR_LOCKED | VD_HSYNC_LOCKED | VD_STATUS_RDY) )
3375 {
3376 return TRUE;
3377 }
3378 return FALSE;
3379 }
3380
Drv_AVD_SetPowerState(EN_POWER_MODE u16PowerState,AVD_RESOURCE_PRIVATE * pResource)3381 MS_U32 Drv_AVD_SetPowerState(EN_POWER_MODE u16PowerState, AVD_RESOURCE_PRIVATE *pResource)
3382 {
3383 static EN_POWER_MODE _prev_u16PowerState = E_POWER_MECHANICAL;
3384 MS_U32 u32Return = 1;
3385
3386 if (u16PowerState == E_POWER_SUSPEND)
3387 {
3388 _prev_u16PowerState = u16PowerState;
3389 u32Return = 0;//SUSPEND_OK;
3390 pResource->_bSTRFlag = 1;
3391 pResource->_u16DPL_MSB = HAL_AVD_GetReg(BK_AFEC_9D); //for STR store DPL info for DC on/off
3392 pResource->_u16DPL_LSB = HAL_AVD_GetReg(BK_AFEC_9E);
3393 }
3394 else if (u16PowerState == E_POWER_RESUME)
3395 {
3396
3397 if (_prev_u16PowerState == E_POWER_SUSPEND)
3398 {
3399 Drv_AVD_Init(&pResource->g_VD_InitData, sizeof(pResource->g_VD_InitData) , pResource);
3400 pResource->_bSTRFlag = 0;
3401 HAL_AVD_SetReg(BK_AFEC_9D, pResource->_u16DPL_MSB); //for STR load DPL info for DC on/off
3402 HAL_AVD_SetReg(BK_AFEC_9E, pResource->_u16DPL_LSB);
3403
3404 // for STR resume, PAL-I error detect to SECAM. Need to re-init SECAM register.
3405 HAL_AVD_SetReg(BK_SECAM_0A,0x20);
3406 HAL_AVD_SetReg(BK_SECAM_0B,0x42);
3407 _prev_u16PowerState = u16PowerState;
3408 u32Return = 0;//RESUME_OK;
3409 }
3410 else
3411 {
3412 u32Return = 1;//SUSPEND_FAILED;
3413 }
3414 }
3415 else
3416 {
3417 u32Return = 1;
3418 }
3419
3420 return u32Return;// for success
3421 }
3422
Drv_AVD_GetMacroVisionDetect(void)3423 MS_BOOL Drv_AVD_GetMacroVisionDetect(void)
3424 {
3425 return HAL_AVD_AFEC_GetMacroVisionDetect();
3426 }
3427
Drv_AVD_GetCGMSDetect(void)3428 MS_BOOL Drv_AVD_GetCGMSDetect(void)
3429 {
3430 return HAL_AVD_VBI_GetCGMSDetect();
3431 }
3432
vd_str_stablestatus(void)3433 void vd_str_stablestatus(void)
3434 {
3435 MS_U16 u16Status=0;
3436 MS_U8 u8StableCounter=0;
3437
3438 MS_U32 u32TimeoutATV = MsOS_GetSystemTime() + 600;
3439 MS_U32 u32TimeoutAV = MsOS_GetSystemTime() + 1000;
3440
3441 if(eSource_Str==E_INPUT_SOURCE_ATV)
3442 {
3443 while(MsOS_GetSystemTime() < u32TimeoutATV)
3444 {
3445 if((u16Status & VD_STATUS_RDY) != VD_STATUS_RDY) //VD status Not ready
3446 {
3447 u8StableCounter=0;
3448 }
3449 else //VD status ready
3450 {
3451 if((u16Status & VD_HSYNC_LOCKED)) //VD Hsync Luck
3452 {
3453 u8StableCounter++;
3454 if(u8StableCounter>10)
3455 {
3456 break;
3457 }
3458 }
3459 else //VD Hsync unLuck
3460 {
3461 u8StableCounter=0;
3462 }
3463 }
3464 MsOS_DelayTask(10);
3465 u16Status=HAL_AVD_AFEC_GetStatus();
3466 }
3467 }
3468 else
3469 {
3470 while(MsOS_GetSystemTime() < u32TimeoutAV)
3471 {
3472 if((u16Status & VD_STATUS_RDY) != VD_STATUS_RDY) //VD status Not ready
3473 {
3474 u8StableCounter=0;
3475 }
3476 else //VD status ready
3477 {
3478 if((u16Status & VD_HSYNC_LOCKED)) //VD Hsync Luck
3479 {
3480 u8StableCounter++;
3481 if(u8StableCounter>10)
3482 {
3483 break;
3484 }
3485 }
3486 else //VD Hsync unLuck
3487 {
3488 u8StableCounter=0;
3489 }
3490 }
3491 MsOS_DelayTask(10);
3492 u16Status=HAL_AVD_AFEC_GetStatus();
3493 }
3494 }
3495 }
3496
Drv_AVD_SetBurstWinStart(MS_U8 u8BusrtStartPosition)3497 void Drv_AVD_SetBurstWinStart(MS_U8 u8BusrtStartPosition)
3498 {
3499 HAL_AVD_SetBurstWinStart(u8BusrtStartPosition);
3500 }
3501
Drv_AVD_IsAVDAlive(void)3502 MS_BOOL Drv_AVD_IsAVDAlive(void)
3503 {
3504 MS_U16 u16CurHeartclock;
3505 MS_U16 u16LastHeartclock;
3506 MS_U8 u8DeadCnt=0;
3507 MS_U8 i=0;
3508
3509 u16LastHeartclock=HAL_AVD_GetReg(BK_AFEC_D6);
3510 MsOS_DelayTask(1);
3511 for(i=0;i<5;i++)
3512 {
3513 u16CurHeartclock=HAL_AVD_GetReg(BK_AFEC_D6);
3514 if(u16CurHeartclock == u16LastHeartclock)
3515 {
3516 u8DeadCnt++;
3517 }
3518 u16LastHeartclock=u16CurHeartclock;
3519
3520 MsOS_DelayTask(2);
3521 }
3522
3523 if(u8DeadCnt==0)
3524 {
3525 ULOGE("AVD","MDrv_AVD_IsAVDAlive Status : Alive\n");
3526 return TRUE;
3527 }
3528 else
3529 {
3530 ULOGE("AVD","MDrv_AVD_IsAVDAlive Status : Dead\n");
3531 return FALSE;
3532 }
3533 }
3534
3535 #if defined(MSOS_TYPE_LINUX_KERNEL)
vd_str_timingchangedetection(void)3536 AVD_VideoStandardType vd_str_timingchangedetection(void)
3537 {
3538 MS_U16 u16Status=0;
3539 AVD_VideoStandardType eVideoStandard = E_VIDEOSTANDARD_NOTSTANDARD;
3540 u16Status= HAL_AVD_AFEC_GetStatus();
3541
3542 if (!IS_BITS_SET(u16Status, VD_HSYNC_LOCKED|VD_SYNC_LOCKED|VD_STATUS_RDY))
3543 {
3544 return E_VIDEOSTANDARD_NOTSTANDARD;
3545 }
3546 else
3547 {
3548 if(u16Status & VD_BURST_ON)
3549 {
3550 switch (u16Status & VD_FSC_TYPE)
3551 {
3552 case VD_FSC_4433: // (FSC_MODE_PAL << 5):
3553 if (u16Status & VD_VSYNC_50HZ) // 50 Hz
3554 {
3555 eVideoStandard = E_VIDEOSTANDARD_PAL_BGHI;
3556 }
3557 else // 60MHz
3558 {
3559 if (u16Status & VD_PAL_SWITCH)
3560 {
3561 eVideoStandard = E_VIDEOSTANDARD_PAL_60; // or vsdNTSC_44
3562 }
3563 else
3564 {
3565 eVideoStandard = E_VIDEOSTANDARD_NTSC_44;
3566 }
3567 }
3568 break;
3569
3570 case VD_FSC_3579:
3571 eVideoStandard = E_VIDEOSTANDARD_NTSC_M;
3572 break;
3573
3574 case VD_FSC_3575: // (FSC_MODE_PAL_M << 5):
3575 eVideoStandard = E_VIDEOSTANDARD_PAL_M;
3576 break;
3577
3578 case VD_FSC_3582: // (FSC_MODE_PAL_N << 5):
3579 eVideoStandard = E_VIDEOSTANDARD_PAL_N;
3580 break;
3581
3582 default:
3583 eVideoStandard = E_VIDEOSTANDARD_NOTSTANDARD;
3584 break;
3585 }
3586 }
3587 else
3588 {
3589 if (u16Status & VD_VSYNC_50HZ)
3590 {
3591 if ((u16Status & VD_FSC_TYPE) == VD_FSC_4285)
3592 {
3593 {
3594 eVideoStandard = E_VIDEOSTANDARD_SECAM;
3595 }
3596 }
3597 else
3598 {
3599 eVideoStandard = E_VIDEOSTANDARD_PAL_BGHI;
3600 }
3601 }
3602 else
3603 {
3604 eVideoStandard = E_VIDEOSTANDARD_NTSC_M;
3605 }
3606 }
3607 }
3608
3609 return eVideoStandard;
3610 }
3611 #endif
3612
Drv_AVD_IsLockAudioCarrier(void)3613 MS_BOOL Drv_AVD_IsLockAudioCarrier(void)
3614 {
3615 MS_U16 u16tmp,u16tmp1=0;
3616 MS_U8 u8tmp;
3617 MS_U16 u16outedge,u16outedgesum=0;
3618 MS_U16 u16noise,u16noisesum=0;
3619
3620 // in of window H sync edge;
3621 u16tmp1 = HAL_AVD_GetHsyncEdge() & 0x3F;
3622 if(u16tmp1 == 0)
3623 u16tmp1 = 1 ;// to protect u16tmp1 not equal 0
3624
3625 // Output of window H sync edge
3626 HAL_AVD_SetReg(BK_AFEC_04, 0x0B);
3627 u16outedgesum = HAL_AVD_GetReg(BK_AFEC_03);
3628 if(u16outedgesum == 0)
3629 u16outedgesum = 1 ;// to protect u16outedgesum not equal 0
3630
3631 // noise mag
3632 HAL_AVD_SetReg(BK_AFEC_04, 0x04);
3633 u16noisesum = HAL_AVD_GetReg(BK_AFEC_02);
3634 if(u16noisesum == 0)
3635 u16noisesum = 1 ;// to protect u16noisesum not equal 0
3636
3637 for(u8tmp=0;u8tmp<10;u8tmp++)
3638 {
3639 // in of window H sync edge
3640 u16tmp = HAL_AVD_GetHsyncEdge() & 0x3F;
3641 u16tmp1 = ((9*u16tmp1) + (1*u16tmp))/10;
3642
3643 // Output of window H sync edge
3644 HAL_AVD_SetReg(BK_AFEC_04, 0x0B);
3645 u16outedge = HAL_AVD_GetReg(BK_AFEC_03);
3646 u16outedgesum = ((9*u16outedgesum) + (1*u16outedge))/10;
3647
3648 // noise mag
3649 HAL_AVD_SetReg(BK_AFEC_04, 0x04);
3650 u16noise = HAL_AVD_GetReg(BK_AFEC_02);
3651 u16noisesum = ((9*u16noisesum) + (1*u16noise))/10;
3652 MsOS_DelayTask(1);
3653 }
3654
3655 if((u16tmp1>=0x35)||((u16outedgesum >3)&&(u16noise > 0x50)))
3656 return TRUE;
3657 else
3658 return FALSE;
3659 }