1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* 3 * Cadence DDR Driver 4 * 5 * Copyright (C) 2012-2026 Cadence Design Systems, Inc. 6 * Copyright (C) 2018-2026 Texas Instruments Incorporated - https://www.ti.com/ 7 */ 8 9 #ifndef LPDDR4_CTL_REGS_H 10 #define LPDDR4_CTL_REGS_H 11 12 #include <cdefs.h> 13 14 #include "lpddr4_macros.h" 15 16 typedef struct __packed ti_lpddr4_ctlregs_s { 17 volatile uint32_t DENALI_CTL[423]; 18 volatile char pad__0[0x1964U]; 19 volatile uint32_t DENALI_PI[345]; 20 volatile char pad__1[0x1A9CU]; 21 volatile uint32_t DENALI_PHY_0[126]; 22 volatile char pad__2[0x208U]; 23 volatile uint32_t DENALI_PHY_256[126]; 24 volatile char pad__3[0x208U]; 25 volatile uint32_t DENALI_PHY_512[43]; 26 volatile char pad__4[0x354U]; 27 volatile uint32_t DENALI_PHY_768[43]; 28 volatile char pad__5[0x354U]; 29 volatile uint32_t DENALI_PHY_1024[43]; 30 volatile char pad__6[0x354U]; 31 volatile uint32_t DENALI_PHY_1280[126]; 32 } lpddr4_ctlregs; 33 34 #endif /* LPDDR4_CTL_REGS_H */ 35