1 /*
2 * drivers/usb/gadget/dwc2_udc_otg.c
3 * Designware DWC2 on-chip full/high speed USB OTG 2.0 device controllers
4 *
5 * Copyright (C) 2008 for Samsung Electronics
6 *
7 * BSP Support for Samsung's UDC driver
8 * available at:
9 * git://git.kernel.org/pub/scm/linux/kernel/git/kki_ap/linux-2.6-samsung.git
10 *
11 * State machine bugfixes:
12 * Marek Szyprowski <m.szyprowski@samsung.com>
13 *
14 * Ported to u-boot:
15 * Marek Szyprowski <m.szyprowski@samsung.com>
16 * Lukasz Majewski <l.majewski@samsumg.com>
17 *
18 * SPDX-License-Identifier: GPL-2.0+
19 */
20 #undef DEBUG
21 #include <common.h>
22 #include <clk.h>
23 #include <dm.h>
24 #include <generic-phy.h>
25 #include <malloc.h>
26 #include <reset.h>
27
28 #include <linux/errno.h>
29 #include <linux/list.h>
30
31 #include <linux/usb/ch9.h>
32 #include <linux/usb/otg.h>
33 #include <linux/usb/gadget.h>
34
35 #include <asm/byteorder.h>
36 #include <asm/unaligned.h>
37 #include <asm/io.h>
38
39 #include <asm/mach-types.h>
40
41 #include <power/regulator.h>
42
43 #include "dwc2_udc_otg_regs.h"
44 #include "dwc2_udc_otg_priv.h"
45
46 /***********************************************************/
47
48 #define OTG_DMA_MODE 1
49
50 #define DEBUG_SETUP 0
51 #define DEBUG_EP0 0
52 #define DEBUG_ISR 0
53 #define DEBUG_OUT_EP 0
54 #define DEBUG_IN_EP 0
55
56 #include <usb/dwc2_udc.h>
57
58 #define EP0_CON 0
59 #define EP_MASK 0xF
60
61 static char *state_names[] = {
62 "WAIT_FOR_SETUP",
63 "DATA_STATE_XMIT",
64 "DATA_STATE_NEED_ZLP",
65 "WAIT_FOR_OUT_STATUS",
66 "DATA_STATE_RECV",
67 "WAIT_FOR_COMPLETE",
68 "WAIT_FOR_OUT_COMPLETE",
69 "WAIT_FOR_IN_COMPLETE",
70 "WAIT_FOR_NULL_COMPLETE",
71 };
72
73 #define DRIVER_VERSION "15 March 2009"
74
75 struct dwc2_udc *the_controller;
76
77 static const char driver_name[] = "dwc2-udc";
78 static const char ep0name[] = "ep0-control";
79
80 /* Max packet size*/
81 static unsigned int ep0_fifo_size = 64;
82 static unsigned int ep_fifo_size = 512;
83 static unsigned int ep_fifo_size2 = 1024;
84 static int reset_available = 1;
85
86 static struct usb_ctrlrequest *usb_ctrl;
87 static dma_addr_t usb_ctrl_dma_addr;
88
89 /*
90 Local declarations.
91 */
92 static int dwc2_ep_enable(struct usb_ep *ep,
93 const struct usb_endpoint_descriptor *);
94 static int dwc2_ep_disable(struct usb_ep *ep);
95 static struct usb_request *dwc2_alloc_request(struct usb_ep *ep,
96 gfp_t gfp_flags);
97 static void dwc2_free_request(struct usb_ep *ep, struct usb_request *);
98
99 static int dwc2_queue(struct usb_ep *ep, struct usb_request *, gfp_t gfp_flags);
100 static int dwc2_dequeue(struct usb_ep *ep, struct usb_request *);
101 static int dwc2_fifo_status(struct usb_ep *ep);
102 static void dwc2_fifo_flush(struct usb_ep *ep);
103 static void dwc2_ep0_read(struct dwc2_udc *dev);
104 static void dwc2_ep0_kick(struct dwc2_udc *dev, struct dwc2_ep *ep);
105 static void dwc2_handle_ep0(struct dwc2_udc *dev);
106 static int dwc2_ep0_write(struct dwc2_udc *dev);
107 static int write_fifo_ep0(struct dwc2_ep *ep, struct dwc2_request *req);
108 static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status);
109 static void stop_activity(struct dwc2_udc *dev,
110 struct usb_gadget_driver *driver);
111 static int udc_enable(struct dwc2_udc *dev);
112 static void udc_set_address(struct dwc2_udc *dev, unsigned char address);
113 static void reconfig_usbd(struct dwc2_udc *dev);
114 static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed);
115 static void nuke(struct dwc2_ep *ep, int status);
116 static int dwc2_udc_set_halt(struct usb_ep *_ep, int value);
117 static void dwc2_udc_set_nak(struct dwc2_ep *ep);
118
set_udc_gadget_private_data(void * p)119 void set_udc_gadget_private_data(void *p)
120 {
121 debug_cond(DEBUG_SETUP != 0,
122 "%s: the_controller: 0x%p, p: 0x%p\n", __func__,
123 the_controller, p);
124 the_controller->gadget.dev.device_data = p;
125 }
126
get_udc_gadget_private_data(struct usb_gadget * gadget)127 void *get_udc_gadget_private_data(struct usb_gadget *gadget)
128 {
129 return gadget->dev.device_data;
130 }
131
132 static struct usb_ep_ops dwc2_ep_ops = {
133 .enable = dwc2_ep_enable,
134 .disable = dwc2_ep_disable,
135
136 .alloc_request = dwc2_alloc_request,
137 .free_request = dwc2_free_request,
138
139 .queue = dwc2_queue,
140 .dequeue = dwc2_dequeue,
141
142 .set_halt = dwc2_udc_set_halt,
143 .fifo_status = dwc2_fifo_status,
144 .fifo_flush = dwc2_fifo_flush,
145 };
146
147 #define create_proc_files() do {} while (0)
148 #define remove_proc_files() do {} while (0)
149
150 /***********************************************************/
151
152 struct dwc2_usbotg_reg *reg;
153
dfu_usb_get_reset(void)154 bool dfu_usb_get_reset(void)
155 {
156 return !!(readl(®->gintsts) & INT_RESET);
157 }
158
otg_phy_init(struct dwc2_udc * dev)159 __weak void otg_phy_init(struct dwc2_udc *dev) {}
otg_phy_off(struct dwc2_udc * dev)160 __weak void otg_phy_off(struct dwc2_udc *dev) {}
161
162 /***********************************************************/
163
164 #include "dwc2_udc_otg_xfer_dma.c"
165
166 /*
167 * udc_disable - disable USB device controller
168 */
udc_disable(struct dwc2_udc * dev)169 static void udc_disable(struct dwc2_udc *dev)
170 {
171 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
172
173 udc_set_address(dev, 0);
174
175 dev->ep0state = WAIT_FOR_SETUP;
176 dev->gadget.speed = USB_SPEED_UNKNOWN;
177 dev->usb_address = 0;
178 dev->connected = 0;
179
180 otg_phy_off(dev);
181 }
182
183 /*
184 * udc_reinit - initialize software state
185 */
udc_reinit(struct dwc2_udc * dev)186 static void udc_reinit(struct dwc2_udc *dev)
187 {
188 unsigned int i;
189
190 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
191
192 /* device/ep0 records init */
193 INIT_LIST_HEAD(&dev->gadget.ep_list);
194 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
195 dev->ep0state = WAIT_FOR_SETUP;
196
197 /* basic endpoint records init */
198 for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) {
199 struct dwc2_ep *ep = &dev->ep[i];
200
201 if (i != 0)
202 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list);
203
204 ep->desc = 0;
205 ep->stopped = 0;
206 INIT_LIST_HEAD(&ep->queue);
207 ep->pio_irqs = 0;
208 }
209
210 /* the rest was statically initialized, and is read-only */
211 }
212
213 #define BYTES2MAXP(x) (x / 8)
214 #define MAXP2BYTES(x) (x * 8)
215
216 /* until it's enabled, this UDC should be completely invisible
217 * to any USB host.
218 */
udc_enable(struct dwc2_udc * dev)219 static int udc_enable(struct dwc2_udc *dev)
220 {
221 debug_cond(DEBUG_SETUP != 0, "%s: %p\n", __func__, dev);
222
223 otg_phy_init(dev);
224 reconfig_usbd(dev);
225
226 debug_cond(DEBUG_SETUP != 0,
227 "DWC2 USB 2.0 OTG Controller Core Initialized : 0x%x\n",
228 readl(®->gintmsk));
229
230 dev->gadget.speed = USB_SPEED_UNKNOWN;
231
232 return 0;
233 }
234
235 #if !CONFIG_IS_ENABLED(DM_USB_GADGET)
236 /*
237 Register entry point for the peripheral controller driver.
238 */
usb_gadget_register_driver(struct usb_gadget_driver * driver)239 int usb_gadget_register_driver(struct usb_gadget_driver *driver)
240 {
241 struct dwc2_udc *dev = the_controller;
242 int retval = 0;
243 unsigned long flags = 0;
244
245 debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name");
246
247 if (!driver
248 || (driver->speed != USB_SPEED_FULL
249 && driver->speed != USB_SPEED_HIGH)
250 || !driver->bind || !driver->disconnect || !driver->setup)
251 return -EINVAL;
252 if (!dev)
253 return -ENODEV;
254 if (dev->driver)
255 return -EBUSY;
256
257 spin_lock_irqsave(&dev->lock, flags);
258 /* first hook up the driver ... */
259 dev->driver = driver;
260 spin_unlock_irqrestore(&dev->lock, flags);
261
262 if (retval) { /* TODO */
263 printf("target device_add failed, error %d\n", retval);
264 return retval;
265 }
266
267 retval = driver->bind(&dev->gadget);
268 if (retval) {
269 debug_cond(DEBUG_SETUP != 0,
270 "%s: bind to driver --> error %d\n",
271 dev->gadget.name, retval);
272 dev->driver = 0;
273 return retval;
274 }
275
276 enable_irq(IRQ_OTG);
277
278 debug_cond(DEBUG_SETUP != 0,
279 "Registered gadget driver %s\n", dev->gadget.name);
280 udc_enable(dev);
281
282 return 0;
283 }
284
285 /*
286 * Unregister entry point for the peripheral controller driver.
287 */
usb_gadget_unregister_driver(struct usb_gadget_driver * driver)288 int usb_gadget_unregister_driver(struct usb_gadget_driver *driver)
289 {
290 struct dwc2_udc *dev = the_controller;
291 unsigned long flags = 0;
292
293 if (!dev)
294 return -ENODEV;
295 if (!driver || driver != dev->driver)
296 return -EINVAL;
297
298 spin_lock_irqsave(&dev->lock, flags);
299 dev->driver = 0;
300 stop_activity(dev, driver);
301 spin_unlock_irqrestore(&dev->lock, flags);
302
303 driver->unbind(&dev->gadget);
304
305 disable_irq(IRQ_OTG);
306
307 udc_disable(dev);
308 return 0;
309 }
310 #else /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
311
dwc2_gadget_start(struct usb_gadget * g,struct usb_gadget_driver * driver)312 static int dwc2_gadget_start(struct usb_gadget *g,
313 struct usb_gadget_driver *driver)
314 {
315 struct dwc2_udc *dev = the_controller;
316
317 debug_cond(DEBUG_SETUP != 0, "%s: %s\n", __func__, "no name");
318
319 if (!driver ||
320 (driver->speed != USB_SPEED_FULL &&
321 driver->speed != USB_SPEED_HIGH) ||
322 !driver->bind || !driver->disconnect || !driver->setup)
323 return -EINVAL;
324
325 if (!dev)
326 return -ENODEV;
327
328 if (dev->driver)
329 return -EBUSY;
330
331 /* first hook up the driver ... */
332 dev->driver = driver;
333
334 debug_cond(DEBUG_SETUP != 0,
335 "Registered gadget driver %s\n", dev->gadget.name);
336 return udc_enable(dev);
337 }
338
dwc2_gadget_stop(struct usb_gadget * g)339 static int dwc2_gadget_stop(struct usb_gadget *g)
340 {
341 struct dwc2_udc *dev = the_controller;
342
343 if (!dev)
344 return -ENODEV;
345
346 if (!dev->driver)
347 return -EINVAL;
348
349 dev->driver = 0;
350 stop_activity(dev, dev->driver);
351
352 udc_disable(dev);
353
354 return 0;
355 }
356
357 #endif /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
358
359 /*
360 * done - retire a request; caller blocked irqs
361 */
done(struct dwc2_ep * ep,struct dwc2_request * req,int status)362 static void done(struct dwc2_ep *ep, struct dwc2_request *req, int status)
363 {
364 unsigned int stopped = ep->stopped;
365
366 debug("%s: %s %p, req = %p, stopped = %d\n",
367 __func__, ep->ep.name, ep, &req->req, stopped);
368
369 list_del_init(&req->queue);
370
371 if (likely(req->req.status == -EINPROGRESS))
372 req->req.status = status;
373 else
374 status = req->req.status;
375
376 if (status && status != -ESHUTDOWN) {
377 debug("complete %s req %p stat %d len %u/%u\n",
378 ep->ep.name, &req->req, status,
379 req->req.actual, req->req.length);
380 }
381
382 /* don't modify queue heads during completion callback */
383 ep->stopped = 1;
384
385 #ifdef DEBUG
386 printf("calling complete callback\n");
387 {
388 int i, len = req->req.length;
389
390 printf("pkt[%d] = ", req->req.length);
391 if (len > 64)
392 len = 64;
393 for (i = 0; i < len; i++) {
394 printf("%02x", ((u8 *)req->req.buf)[i]);
395 if ((i & 7) == 7)
396 printf(" ");
397 }
398 printf("\n");
399 }
400 #endif
401 spin_unlock(&ep->dev->lock);
402 req->req.complete(&ep->ep, &req->req);
403 spin_lock(&ep->dev->lock);
404
405 debug("callback completed\n");
406
407 ep->stopped = stopped;
408 }
409
410 /*
411 * nuke - dequeue ALL requests
412 */
nuke(struct dwc2_ep * ep,int status)413 static void nuke(struct dwc2_ep *ep, int status)
414 {
415 struct dwc2_request *req;
416
417 debug("%s: %s %p\n", __func__, ep->ep.name, ep);
418
419 /* called with irqs blocked */
420 while (!list_empty(&ep->queue)) {
421 req = list_entry(ep->queue.next, struct dwc2_request, queue);
422 done(ep, req, status);
423 }
424 }
425
stop_activity(struct dwc2_udc * dev,struct usb_gadget_driver * driver)426 static void stop_activity(struct dwc2_udc *dev,
427 struct usb_gadget_driver *driver)
428 {
429 int i;
430
431 /* don't disconnect drivers more than once */
432 if (dev->gadget.speed == USB_SPEED_UNKNOWN)
433 driver = 0;
434 dev->gadget.speed = USB_SPEED_UNKNOWN;
435
436 /* prevent new request submissions, kill any outstanding requests */
437 for (i = 0; i < DWC2_MAX_ENDPOINTS; i++) {
438 struct dwc2_ep *ep = &dev->ep[i];
439 ep->stopped = 1;
440 nuke(ep, -ESHUTDOWN);
441 }
442
443 /* report disconnect; the driver is already quiesced */
444 if (driver) {
445 spin_unlock(&dev->lock);
446 driver->disconnect(&dev->gadget);
447 spin_lock(&dev->lock);
448 }
449
450 /* re-init driver-visible data structures */
451 udc_reinit(dev);
452 }
453
reconfig_usbd(struct dwc2_udc * dev)454 static void reconfig_usbd(struct dwc2_udc *dev)
455 {
456 /* 2. Soft-reset OTG Core and then unreset again. */
457 int i;
458 unsigned int uTemp = writel(CORE_SOFT_RESET, ®->grstctl);
459 uint32_t dflt_gusbcfg;
460 uint32_t rx_fifo_sz, tx_fifo_sz, np_tx_fifo_sz;
461 u32 max_hw_ep;
462 int pdata_hw_ep;
463
464 debug("Reseting OTG controller\n");
465
466 dflt_gusbcfg =
467 0<<15 /* PHY Low Power Clock sel*/
468 |1<<14 /* Non-Periodic TxFIFO Rewind Enable*/
469 |0x5<<10 /* Turnaround time*/
470 |0<<9 | 0<<8 /* [0:HNP disable,1:HNP enable][ 0:SRP disable*/
471 /* 1:SRP enable] H1= 1,1*/
472 |0<<7 /* Ulpi DDR sel*/
473 |0<<6 /* 0: high speed utmi+, 1: full speed serial*/
474 |0<<4 /* 0: utmi+, 1:ulpi*/
475 #ifdef CONFIG_USB_GADGET_DWC2_OTG_PHY_BUS_WIDTH_8
476 |0<<3 /* phy i/f 0:8bit, 1:16bit*/
477 #else
478 |1<<3 /* phy i/f 0:8bit, 1:16bit*/
479 #endif
480 |0x7<<0; /* HS/FS Timeout**/
481
482 if (dev->pdata->usb_gusbcfg)
483 dflt_gusbcfg = dev->pdata->usb_gusbcfg;
484
485 if (dev->pdata->force_b_session_valid)
486 dflt_gusbcfg |= 1 << 30; /* FDMOD: Force device mode */
487
488 writel(dflt_gusbcfg, ®->gusbcfg);
489
490 /* 3. Put the OTG device core in the disconnected state.*/
491 uTemp = readl(®->dctl);
492 uTemp |= SOFT_DISCONNECT;
493 writel(uTemp, ®->dctl);
494
495 udelay(20);
496
497 /* 4. Make the OTG device core exit from the disconnected state.*/
498 uTemp = readl(®->dctl);
499 uTemp = uTemp & ~SOFT_DISCONNECT;
500 writel(uTemp, ®->dctl);
501
502 /* 5. Configure OTG Core to initial settings of device mode.*/
503 /* [][1: full speed(30Mhz) 0:high speed]*/
504 writel(EP_MISS_CNT(1) | DEV_SPEED_HIGH_SPEED_20, ®->dcfg);
505
506 mdelay(1);
507
508 /* 6. Unmask the core interrupts*/
509 writel(GINTMSK_INIT, ®->gintmsk);
510
511 /* 7. Set NAK bit of EP0, EP1, EP2*/
512 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[EP0_CON].doepctl);
513 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[EP0_CON].diepctl);
514
515 for (i = 1; i < DWC2_MAX_ENDPOINTS; i++) {
516 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->out_endp[i].doepctl);
517 writel(DEPCTL_EPDIS|DEPCTL_SNAK, ®->in_endp[i].diepctl);
518 }
519
520 /* 8. Unmask EPO interrupts*/
521 writel(((1 << EP0_CON) << DAINT_OUT_BIT)
522 | (1 << EP0_CON), ®->daintmsk);
523
524 /* 9. Unmask device OUT EP common interrupts*/
525 writel(DOEPMSK_INIT, ®->doepmsk);
526
527 /* 10. Unmask device IN EP common interrupts*/
528 writel(DIEPMSK_INIT, ®->diepmsk);
529
530 rx_fifo_sz = RX_FIFO_SIZE;
531 np_tx_fifo_sz = NPTX_FIFO_SIZE;
532 tx_fifo_sz = PTX_FIFO_SIZE;
533
534 if (dev->pdata->rx_fifo_sz)
535 rx_fifo_sz = dev->pdata->rx_fifo_sz;
536 if (dev->pdata->np_tx_fifo_sz)
537 np_tx_fifo_sz = dev->pdata->np_tx_fifo_sz;
538 if (dev->pdata->tx_fifo_sz)
539 tx_fifo_sz = dev->pdata->tx_fifo_sz;
540
541 /* 11. Set Rx FIFO Size (in 32-bit words) */
542 writel(rx_fifo_sz, ®->grxfsiz);
543
544 /* 12. Set Non Periodic Tx FIFO Size */
545 writel((np_tx_fifo_sz << 16) | rx_fifo_sz,
546 ®->gnptxfsiz);
547
548 /* retrieve the number of IN Endpoints (excluding ep0) */
549 max_hw_ep = (readl(®->ghwcfg4) & GHWCFG4_NUM_IN_EPS_MASK) >>
550 GHWCFG4_NUM_IN_EPS_SHIFT;
551 pdata_hw_ep = dev->pdata->tx_fifo_sz_nb;
552
553 /* tx_fifo_sz_nb should equal to number of IN Endpoint */
554 if (pdata_hw_ep && max_hw_ep != pdata_hw_ep)
555 pr_warn("Got %d hw endpoint but %d tx-fifo-size in array !!\n",
556 max_hw_ep, pdata_hw_ep);
557
558 for (i = 0; i < max_hw_ep; i++) {
559 if (pdata_hw_ep)
560 tx_fifo_sz = dev->pdata->tx_fifo_sz_array[i];
561
562 writel((rx_fifo_sz + np_tx_fifo_sz + (tx_fifo_sz * i)) |
563 tx_fifo_sz << 16, ®->dieptxf[i]);
564 }
565 /* Flush the RX FIFO */
566 writel(RX_FIFO_FLUSH, ®->grstctl);
567 while (readl(®->grstctl) & RX_FIFO_FLUSH)
568 debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__);
569
570 /* Flush all the Tx FIFO's */
571 writel(TX_FIFO_FLUSH_ALL, ®->grstctl);
572 writel(TX_FIFO_FLUSH_ALL | TX_FIFO_FLUSH, ®->grstctl);
573 while (readl(®->grstctl) & TX_FIFO_FLUSH)
574 debug("%s: waiting for DWC2_UDC_OTG_GRSTCTL\n", __func__);
575
576 /* 13. Clear NAK bit of EP0, EP1, EP2*/
577 /* For Slave mode*/
578 /* EP0: Control OUT */
579 writel(DEPCTL_EPDIS | DEPCTL_CNAK,
580 ®->out_endp[EP0_CON].doepctl);
581
582 /* 14. Initialize OTG Link Core.*/
583 writel(GAHBCFG_INIT, ®->gahbcfg);
584 }
585
set_max_pktsize(struct dwc2_udc * dev,enum usb_device_speed speed)586 static void set_max_pktsize(struct dwc2_udc *dev, enum usb_device_speed speed)
587 {
588 unsigned int ep_ctrl;
589 int i;
590
591 if (speed == USB_SPEED_HIGH) {
592 ep0_fifo_size = 64;
593 ep_fifo_size = 512;
594 ep_fifo_size2 = 1024;
595 dev->gadget.speed = USB_SPEED_HIGH;
596 } else {
597 ep0_fifo_size = 64;
598 ep_fifo_size = 64;
599 ep_fifo_size2 = 64;
600 dev->gadget.speed = USB_SPEED_FULL;
601 }
602
603 dev->ep[0].ep.maxpacket = ep0_fifo_size;
604 for (i = 1; i < DWC2_MAX_ENDPOINTS; i++)
605 dev->ep[i].ep.maxpacket = ep_fifo_size;
606
607 /* EP0 - Control IN (64 bytes)*/
608 ep_ctrl = readl(®->in_endp[EP0_CON].diepctl);
609 writel(ep_ctrl|(0<<0), ®->in_endp[EP0_CON].diepctl);
610
611 /* EP0 - Control OUT (64 bytes)*/
612 ep_ctrl = readl(®->out_endp[EP0_CON].doepctl);
613 writel(ep_ctrl|(0<<0), ®->out_endp[EP0_CON].doepctl);
614 }
615
dwc2_ep_enable(struct usb_ep * _ep,const struct usb_endpoint_descriptor * desc)616 static int dwc2_ep_enable(struct usb_ep *_ep,
617 const struct usb_endpoint_descriptor *desc)
618 {
619 struct dwc2_ep *ep;
620 struct dwc2_udc *dev;
621 unsigned long flags = 0;
622
623 debug("%s: %p\n", __func__, _ep);
624
625 ep = container_of(_ep, struct dwc2_ep, ep);
626 if (!_ep || !desc || ep->desc || _ep->name == ep0name
627 || desc->bDescriptorType != USB_DT_ENDPOINT
628 || ep->bEndpointAddress != desc->bEndpointAddress
629 || ep_maxpacket(ep) <
630 le16_to_cpu(get_unaligned(&desc->wMaxPacketSize))) {
631
632 debug("%s: bad ep or descriptor\n", __func__);
633 return -EINVAL;
634 }
635
636 /* xfer types must match, except that interrupt ~= bulk */
637 if (ep->bmAttributes != desc->bmAttributes
638 && ep->bmAttributes != USB_ENDPOINT_XFER_BULK
639 && desc->bmAttributes != USB_ENDPOINT_XFER_INT) {
640
641 debug("%s: %s type mismatch\n", __func__, _ep->name);
642 return -EINVAL;
643 }
644
645 /* hardware _could_ do smaller, but driver doesn't */
646 if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK &&
647 le16_to_cpu(get_unaligned(&desc->wMaxPacketSize)) >
648 ep_maxpacket(ep)) || !get_unaligned(&desc->wMaxPacketSize)) {
649
650 debug("%s: bad %s maxpacket\n", __func__, _ep->name);
651 return -ERANGE;
652 }
653
654 dev = ep->dev;
655 if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) {
656
657 debug("%s: bogus device state\n", __func__);
658 return -ESHUTDOWN;
659 }
660
661 ep->stopped = 0;
662 ep->desc = desc;
663 ep->pio_irqs = 0;
664 ep->ep.maxpacket = le16_to_cpu(get_unaligned(&desc->wMaxPacketSize));
665
666 /* Reset halt state */
667 dwc2_udc_set_nak(ep);
668 dwc2_udc_set_halt(_ep, 0);
669
670 spin_lock_irqsave(&ep->dev->lock, flags);
671 dwc2_udc_ep_activate(ep);
672 spin_unlock_irqrestore(&ep->dev->lock, flags);
673
674 debug("%s: enabled %s, stopped = %d, maxpacket = %d\n",
675 __func__, _ep->name, ep->stopped, ep->ep.maxpacket);
676 return 0;
677 }
678
679 /*
680 * Disable EP
681 */
dwc2_ep_disable(struct usb_ep * _ep)682 static int dwc2_ep_disable(struct usb_ep *_ep)
683 {
684 struct dwc2_ep *ep;
685 unsigned long flags = 0;
686
687 debug("%s: %p\n", __func__, _ep);
688
689 ep = container_of(_ep, struct dwc2_ep, ep);
690 if (!_ep || !ep->desc) {
691 debug("%s: %s not enabled\n", __func__,
692 _ep ? ep->ep.name : NULL);
693 return -EINVAL;
694 }
695
696 spin_lock_irqsave(&ep->dev->lock, flags);
697
698 /* Nuke all pending requests */
699 nuke(ep, -ESHUTDOWN);
700
701 ep->desc = 0;
702 ep->stopped = 1;
703
704 spin_unlock_irqrestore(&ep->dev->lock, flags);
705
706 debug("%s: disabled %s\n", __func__, _ep->name);
707 return 0;
708 }
709
dwc2_alloc_request(struct usb_ep * ep,gfp_t gfp_flags)710 static struct usb_request *dwc2_alloc_request(struct usb_ep *ep,
711 gfp_t gfp_flags)
712 {
713 struct dwc2_request *req;
714
715 debug("%s: %s %p\n", __func__, ep->name, ep);
716
717 req = memalign(CONFIG_SYS_CACHELINE_SIZE, sizeof(*req));
718 if (!req)
719 return 0;
720
721 memset(req, 0, sizeof *req);
722 INIT_LIST_HEAD(&req->queue);
723
724 return &req->req;
725 }
726
dwc2_free_request(struct usb_ep * ep,struct usb_request * _req)727 static void dwc2_free_request(struct usb_ep *ep, struct usb_request *_req)
728 {
729 struct dwc2_request *req;
730
731 debug("%s: %p\n", __func__, ep);
732
733 req = container_of(_req, struct dwc2_request, req);
734 WARN_ON(!list_empty(&req->queue));
735 kfree(req);
736 }
737
738 /* dequeue JUST ONE request */
dwc2_dequeue(struct usb_ep * _ep,struct usb_request * _req)739 static int dwc2_dequeue(struct usb_ep *_ep, struct usb_request *_req)
740 {
741 struct dwc2_ep *ep;
742 struct dwc2_request *req;
743 unsigned long flags = 0;
744
745 debug("%s: %p\n", __func__, _ep);
746
747 ep = container_of(_ep, struct dwc2_ep, ep);
748 if (!_ep || ep->ep.name == ep0name)
749 return -EINVAL;
750
751 spin_lock_irqsave(&ep->dev->lock, flags);
752
753 /* make sure it's actually queued on this endpoint */
754 list_for_each_entry(req, &ep->queue, queue) {
755 if (&req->req == _req)
756 break;
757 }
758 if (&req->req != _req) {
759 spin_unlock_irqrestore(&ep->dev->lock, flags);
760 return -EINVAL;
761 }
762
763 done(ep, req, -ECONNRESET);
764
765 spin_unlock_irqrestore(&ep->dev->lock, flags);
766 return 0;
767 }
768
769 /*
770 * Return bytes in EP FIFO
771 */
dwc2_fifo_status(struct usb_ep * _ep)772 static int dwc2_fifo_status(struct usb_ep *_ep)
773 {
774 int count = 0;
775 struct dwc2_ep *ep;
776
777 ep = container_of(_ep, struct dwc2_ep, ep);
778 if (!_ep) {
779 debug("%s: bad ep\n", __func__);
780 return -ENODEV;
781 }
782
783 debug("%s: %d\n", __func__, ep_index(ep));
784
785 /* LPD can't report unclaimed bytes from IN fifos */
786 if (ep_is_in(ep))
787 return -EOPNOTSUPP;
788
789 return count;
790 }
791
792 /*
793 * Flush EP FIFO
794 */
dwc2_fifo_flush(struct usb_ep * _ep)795 static void dwc2_fifo_flush(struct usb_ep *_ep)
796 {
797 struct dwc2_ep *ep;
798
799 ep = container_of(_ep, struct dwc2_ep, ep);
800 if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) {
801 debug("%s: bad ep\n", __func__);
802 return;
803 }
804
805 debug("%s: %d\n", __func__, ep_index(ep));
806 }
807
808 static const struct usb_gadget_ops dwc2_udc_ops = {
809 /* current versions must always be self-powered */
810 #if CONFIG_IS_ENABLED(DM_USB_GADGET)
811 .udc_start = dwc2_gadget_start,
812 .udc_stop = dwc2_gadget_stop,
813 #endif
814 };
815
816 static struct dwc2_udc memory = {
817 .usb_address = 0,
818 .gadget = {
819 .ops = &dwc2_udc_ops,
820 .ep0 = &memory.ep[0].ep,
821 .name = driver_name,
822 },
823
824 /* control endpoint */
825 .ep[0] = {
826 .ep = {
827 .name = ep0name,
828 .ops = &dwc2_ep_ops,
829 .maxpacket = EP0_FIFO_SIZE,
830 },
831 .dev = &memory,
832
833 .bEndpointAddress = 0,
834 .bmAttributes = 0,
835
836 .ep_type = ep_control,
837 },
838
839 /* first group of endpoints */
840 .ep[1] = {
841 .ep = {
842 .name = "ep1in-bulk",
843 .ops = &dwc2_ep_ops,
844 .maxpacket = EP_FIFO_SIZE,
845 },
846 .dev = &memory,
847
848 .bEndpointAddress = USB_DIR_IN | 1,
849 .bmAttributes = USB_ENDPOINT_XFER_BULK,
850
851 .ep_type = ep_bulk_out,
852 .fifo_num = 1,
853 },
854
855 .ep[2] = {
856 .ep = {
857 .name = "ep2out-bulk",
858 .ops = &dwc2_ep_ops,
859 .maxpacket = EP_FIFO_SIZE,
860 },
861 .dev = &memory,
862
863 .bEndpointAddress = USB_DIR_OUT | 2,
864 .bmAttributes = USB_ENDPOINT_XFER_BULK,
865
866 .ep_type = ep_bulk_in,
867 .fifo_num = 2,
868 },
869
870 .ep[3] = {
871 .ep = {
872 .name = "ep3in-int",
873 .ops = &dwc2_ep_ops,
874 .maxpacket = EP_FIFO_SIZE,
875 },
876 .dev = &memory,
877
878 .bEndpointAddress = USB_DIR_IN | 3,
879 .bmAttributes = USB_ENDPOINT_XFER_INT,
880
881 .ep_type = ep_interrupt,
882 .fifo_num = 3,
883 },
884 };
885
886 /*
887 * probe - binds to the platform device
888 */
889
dwc2_udc_probe(struct dwc2_plat_otg_data * pdata)890 int dwc2_udc_probe(struct dwc2_plat_otg_data *pdata)
891 {
892 struct dwc2_udc *dev = &memory;
893 int retval = 0;
894
895 debug("%s: %p\n", __func__, pdata);
896
897 dev->pdata = pdata;
898
899 reg = (struct dwc2_usbotg_reg *)pdata->regs_otg;
900
901 dev->gadget.is_dualspeed = 1; /* Hack only*/
902 dev->gadget.is_otg = 0;
903 dev->gadget.is_a_peripheral = 0;
904 dev->gadget.b_hnp_enable = 0;
905 dev->gadget.a_hnp_support = 0;
906 dev->gadget.a_alt_hnp_support = 0;
907
908 the_controller = dev;
909
910 usb_ctrl = memalign(CONFIG_SYS_CACHELINE_SIZE,
911 ROUND(sizeof(struct usb_ctrlrequest),
912 CONFIG_SYS_CACHELINE_SIZE));
913 if (!usb_ctrl) {
914 pr_err("No memory available for UDC!\n");
915 return -ENOMEM;
916 }
917
918 usb_ctrl_dma_addr = (dma_addr_t) usb_ctrl;
919
920 udc_reinit(dev);
921
922 return retval;
923 }
924
dwc2_udc_handle_interrupt(void)925 int dwc2_udc_handle_interrupt(void)
926 {
927 u32 intr_status = readl(®->gintsts);
928 u32 gintmsk = readl(®->gintmsk);
929
930 if (intr_status & gintmsk)
931 return dwc2_udc_irq(1, (void *)the_controller);
932
933 return 0;
934 }
935
936 #if !CONFIG_IS_ENABLED(DM_USB_GADGET)
937
usb_gadget_handle_interrupts(int index)938 int usb_gadget_handle_interrupts(int index)
939 {
940 return dwc2_udc_handle_interrupt();
941 }
942
943 #else /* CONFIG_IS_ENABLED(DM_USB_GADGET) */
944
945 struct dwc2_priv_data {
946 struct clk_bulk clks;
947 struct reset_ctl_bulk resets;
948 struct phy *phys;
949 int num_phys;
950 struct udevice *usb33d_supply;
951 };
952
dm_usb_gadget_handle_interrupts(struct udevice * dev)953 int dm_usb_gadget_handle_interrupts(struct udevice *dev)
954 {
955 return dwc2_udc_handle_interrupt();
956 }
957
dwc2_phy_setup(struct udevice * dev,struct phy ** array,int * num_phys)958 int dwc2_phy_setup(struct udevice *dev, struct phy **array, int *num_phys)
959 {
960 int i, ret, count;
961 struct phy *usb_phys;
962
963 /* Return if no phy declared */
964 if (!dev_read_prop(dev, "phys", NULL))
965 return 0;
966
967 count = dev_count_phandle_with_args(dev, "phys", "#phy-cells");
968 if (count <= 0)
969 return count;
970
971 usb_phys = devm_kcalloc(dev, count, sizeof(struct phy),
972 GFP_KERNEL);
973 if (!usb_phys)
974 return -ENOMEM;
975
976 for (i = 0; i < count; i++) {
977 ret = generic_phy_get_by_index(dev, i, &usb_phys[i]);
978 if (ret && ret != -ENOENT) {
979 dev_err(dev, "Failed to get USB PHY%d for %s\n",
980 i, dev->name);
981 return ret;
982 }
983 }
984
985 for (i = 0; i < count; i++) {
986 ret = generic_phy_init(&usb_phys[i]);
987 if (ret) {
988 dev_err(dev, "Can't init USB PHY%d for %s\n",
989 i, dev->name);
990 goto phys_init_err;
991 }
992 }
993
994 for (i = 0; i < count; i++) {
995 ret = generic_phy_power_on(&usb_phys[i]);
996 if (ret) {
997 dev_err(dev, "Can't power USB PHY%d for %s\n",
998 i, dev->name);
999 goto phys_poweron_err;
1000 }
1001 }
1002
1003 *array = usb_phys;
1004 *num_phys = count;
1005
1006 return 0;
1007
1008 phys_poweron_err:
1009 for (i = count - 1; i >= 0; i--)
1010 generic_phy_power_off(&usb_phys[i]);
1011
1012 for (i = 0; i < count; i++)
1013 generic_phy_exit(&usb_phys[i]);
1014
1015 return ret;
1016
1017 phys_init_err:
1018 for (; i >= 0; i--)
1019 generic_phy_exit(&usb_phys[i]);
1020
1021 return ret;
1022 }
1023
dwc2_phy_shutdown(struct udevice * dev,struct phy * usb_phys,int num_phys)1024 void dwc2_phy_shutdown(struct udevice *dev, struct phy *usb_phys, int num_phys)
1025 {
1026 int i, ret;
1027
1028 for (i = 0; i < num_phys; i++) {
1029 if (!generic_phy_valid(&usb_phys[i]))
1030 continue;
1031
1032 ret = generic_phy_power_off(&usb_phys[i]);
1033 ret |= generic_phy_exit(&usb_phys[i]);
1034 if (ret) {
1035 dev_err(dev, "Can't shutdown USB PHY%d for %s\n",
1036 i, dev->name);
1037 }
1038 }
1039 }
1040
dwc2_udc_otg_ofdata_to_platdata(struct udevice * dev)1041 static int dwc2_udc_otg_ofdata_to_platdata(struct udevice *dev)
1042 {
1043 struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
1044 ulong drvdata;
1045 void (*set_params)(struct dwc2_plat_otg_data *data);
1046 int ret;
1047
1048 if (usb_get_dr_mode(dev->node) != USB_DR_MODE_PERIPHERAL &&
1049 usb_get_dr_mode(dev->node) != USB_DR_MODE_OTG) {
1050 dev_dbg(dev, "Invalid mode\n");
1051 return -ENODEV;
1052 }
1053
1054 platdata->regs_otg = dev_read_addr(dev);
1055
1056 platdata->rx_fifo_sz = dev_read_u32_default(dev, "g-rx-fifo-size", 0);
1057 platdata->np_tx_fifo_sz = dev_read_u32_default(dev,
1058 "g-np-tx-fifo-size", 0);
1059
1060 platdata->tx_fifo_sz_nb =
1061 dev_read_size(dev, "g-tx-fifo-size") / sizeof(u32);
1062 if (platdata->tx_fifo_sz_nb > DWC2_MAX_HW_ENDPOINTS)
1063 platdata->tx_fifo_sz_nb = DWC2_MAX_HW_ENDPOINTS;
1064 if (platdata->tx_fifo_sz_nb) {
1065 ret = dev_read_u32_array(dev, "g-tx-fifo-size",
1066 platdata->tx_fifo_sz_array,
1067 platdata->tx_fifo_sz_nb);
1068 if (ret)
1069 return ret;
1070 }
1071
1072 platdata->force_b_session_valid =
1073 dev_read_bool(dev, "u-boot,force-b-session-valid");
1074
1075 /* force platdata according compatible */
1076 drvdata = dev_get_driver_data(dev);
1077 if (drvdata) {
1078 set_params = (void *)drvdata;
1079 set_params(platdata);
1080 }
1081
1082 return 0;
1083 }
1084
dwc2_set_stm32mp1_hsotg_params(struct dwc2_plat_otg_data * p)1085 static void dwc2_set_stm32mp1_hsotg_params(struct dwc2_plat_otg_data *p)
1086 {
1087 p->activate_stm_id_vb_detection = true;
1088 p->usb_gusbcfg =
1089 0 << 15 /* PHY Low Power Clock sel*/
1090 | 0x9 << 10 /* USB Turnaround time (0x9 for HS phy) */
1091 | 0 << 9 /* [0:HNP disable,1:HNP enable]*/
1092 | 0 << 8 /* [0:SRP disable 1:SRP enable]*/
1093 | 0 << 6 /* 0: high speed utmi+, 1: full speed serial*/
1094 | 0x7 << 0; /* FS timeout calibration**/
1095
1096 if (p->force_b_session_valid)
1097 p->usb_gusbcfg |= 1 << 30; /* FDMOD: Force device mode */
1098 }
1099
dwc2_udc_otg_reset_init(struct udevice * dev,struct reset_ctl_bulk * resets)1100 static int dwc2_udc_otg_reset_init(struct udevice *dev,
1101 struct reset_ctl_bulk *resets)
1102 {
1103 int ret;
1104
1105 ret = reset_get_bulk(dev, resets);
1106 if (ret == -ENOTSUPP)
1107 return 0;
1108
1109 if (ret)
1110 return ret;
1111
1112 ret = reset_assert_bulk(resets);
1113
1114 if (!ret) {
1115 udelay(2);
1116 ret = reset_deassert_bulk(resets);
1117 }
1118 if (ret) {
1119 reset_release_bulk(resets);
1120 return ret;
1121 }
1122
1123 return 0;
1124 }
1125
dwc2_udc_otg_clk_init(struct udevice * dev,struct clk_bulk * clks)1126 static int dwc2_udc_otg_clk_init(struct udevice *dev,
1127 struct clk_bulk *clks)
1128 {
1129 int ret;
1130
1131 ret = clk_get_bulk(dev, clks);
1132 if (ret == -ENOSYS)
1133 return 0;
1134
1135 if (ret)
1136 return ret;
1137
1138 ret = clk_enable_bulk(clks);
1139 if (ret) {
1140 clk_release_bulk(clks);
1141 return ret;
1142 }
1143
1144 return 0;
1145 }
1146
dwc2_udc_otg_probe(struct udevice * dev)1147 static int dwc2_udc_otg_probe(struct udevice *dev)
1148 {
1149 struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
1150 struct dwc2_priv_data *priv = dev_get_priv(dev);
1151 struct dwc2_usbotg_reg *usbotg_reg =
1152 (struct dwc2_usbotg_reg *)platdata->regs_otg;
1153 int ret;
1154
1155 ret = dwc2_udc_otg_clk_init(dev, &priv->clks);
1156 if (ret)
1157 return ret;
1158
1159 ret = dwc2_udc_otg_reset_init(dev, &priv->resets);
1160 if (ret)
1161 return ret;
1162
1163 ret = dwc2_phy_setup(dev, &priv->phys, &priv->num_phys);
1164 if (ret)
1165 return ret;
1166
1167 if (CONFIG_IS_ENABLED(DM_REGULATOR) &&
1168 platdata->activate_stm_id_vb_detection &&
1169 !platdata->force_b_session_valid) {
1170 ret = device_get_supply_regulator(dev, "usb33d-supply",
1171 &priv->usb33d_supply);
1172 if (ret) {
1173 dev_err(dev, "can't get voltage level detector supply\n");
1174 return ret;
1175 }
1176 ret = regulator_set_enable(priv->usb33d_supply, true);
1177 if (ret) {
1178 dev_err(dev, "can't enable voltage level detector supply\n");
1179 return ret;
1180 }
1181 /* Enable vbus sensing */
1182 setbits_le32(&usbotg_reg->ggpio,
1183 GGPIO_STM32_OTG_GCCFG_VBDEN |
1184 GGPIO_STM32_OTG_GCCFG_IDEN);
1185 }
1186
1187 if (platdata->force_b_session_valid)
1188 /* Override B session bits : value and enable */
1189 setbits_le32(&usbotg_reg->gotgctl,
1190 A_VALOEN | A_VALOVAL | B_VALOEN | B_VALOVAL);
1191
1192 ret = dwc2_udc_probe(platdata);
1193 if (ret)
1194 return ret;
1195
1196 the_controller->driver = 0;
1197
1198 ret = usb_add_gadget_udc((struct device *)dev, &the_controller->gadget);
1199
1200 return ret;
1201 }
1202
dwc2_udc_otg_remove(struct udevice * dev)1203 static int dwc2_udc_otg_remove(struct udevice *dev)
1204 {
1205 struct dwc2_priv_data *priv = dev_get_priv(dev);
1206
1207 usb_del_gadget_udc(&the_controller->gadget);
1208
1209 reset_release_bulk(&priv->resets);
1210
1211 clk_release_bulk(&priv->clks);
1212
1213 dwc2_phy_shutdown(dev, priv->phys, priv->num_phys);
1214
1215 return dm_scan_fdt_dev(dev);
1216 }
1217
1218 static const struct udevice_id dwc2_udc_otg_ids[] = {
1219 { .compatible = "snps,dwc2" },
1220 { .compatible = "st,stm32mp1-hsotg",
1221 .data = (ulong)dwc2_set_stm32mp1_hsotg_params },
1222 {},
1223 };
1224
1225 U_BOOT_DRIVER(dwc2_udc_otg) = {
1226 .name = "dwc2-udc-otg",
1227 .id = UCLASS_USB_GADGET_GENERIC,
1228 .of_match = dwc2_udc_otg_ids,
1229 .ofdata_to_platdata = dwc2_udc_otg_ofdata_to_platdata,
1230 .probe = dwc2_udc_otg_probe,
1231 .remove = dwc2_udc_otg_remove,
1232 .platdata_auto_alloc_size = sizeof(struct dwc2_plat_otg_data),
1233 .priv_auto_alloc_size = sizeof(struct dwc2_priv_data),
1234 };
1235
dwc2_udc_B_session_valid(struct udevice * dev)1236 int dwc2_udc_B_session_valid(struct udevice *dev)
1237 {
1238 struct dwc2_plat_otg_data *platdata = dev_get_platdata(dev);
1239 struct dwc2_usbotg_reg *usbotg_reg =
1240 (struct dwc2_usbotg_reg *)platdata->regs_otg;
1241
1242 return readl(&usbotg_reg->gotgctl) & B_SESSION_VALID;
1243 }
1244 #endif /* CONFIG_IS_ENABLED(DM_USB_GADGET) */
1245