1 /* 2 * Copyright (c) 2021-2026, Renesas Electronics Corporation. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #ifndef __DDR_MC_IF_H__ 8 #define __DDR_MC_IF_H__ 9 10 #include <ddr_mc_regs.h> 11 12 #define MC_INIT_NUM 436 13 14 #define LP_CMD_OFFSET 0 15 16 #define DDRMC_R000 DENALI_CTL_00 17 #define DDRMC_R001 DENALI_CTL_11 18 #define DDRMC_R002 DENALI_CTL_14 19 #define DDRMC_R003 DENALI_CTL_15 20 #define DDRMC_R004 DENALI_CTL_56 21 #define DDRMC_R005 DENALI_CTL_59 22 #define DDRMC_R006 DENALI_CTL_60 23 #define DDRMC_R007 DENALI_CTL_64 24 #define DDRMC_R008 DENALI_CTL_67 25 #define DDRMC_R009 DENALI_CTL_70 26 #define DDRMC_R010 DENALI_CTL_71 27 #define DDRMC_R011 DENALI_CTL_73 28 #define DDRMC_R012 DENALI_CTL_74 29 #define DDRMC_R013 DENALI_CTL_75 30 #define DDRMC_R014 DENALI_CTL_76 31 #define DDRMC_R015 DENALI_CTL_81 32 #define DDRMC_R016 DENALI_CTL_82 33 #define DDRMC_R017 DENALI_CTL_83 34 #define DDRMC_R018 DENALI_CTL_84 35 #define DDRMC_R019 DENALI_CTL_133 36 #define DDRMC_R020 DENALI_CTL_134 37 #define DDRMC_R021 DENALI_CTL_146 38 #define DDRMC_R022 DENALI_CTL_147 39 #define DDRMC_R023 DENALI_CTL_154 40 #define DDRMC_R024 DENALI_CTL_155 41 #define DDRMC_R025 DENALI_CTL_176 42 #define DDRMC_R026 DENALI_CTL_177 43 #define DDRMC_R027 DENALI_CTL_391 44 #define DDRMC_R028 DENALI_CTL_398 45 #define DDRMC_R029 DENALI_CTL_401 46 #define DDRMC_R030 DENALI_CTL_403 47 #define DDRMC_R031 DENALI_CTL_404 48 #define DDRMC_R032 DENALI_CTL_405 49 #define DDRMC_R033 DENALI_CTL_406 50 #define DDRMC_R034 DENALI_CTL_407 51 #define DDRMC_R035 DENALI_CTL_408 52 #define DDRMC_R036 DENALI_CTL_409 53 #define DDRMC_R037 DENALI_CTL_410 54 #define DDRMC_R038 DENALI_CTL_411 55 #define DDRMC_R039 DENALI_CTL_413 56 #define DDRMC_R040 DENALI_CTL_414 57 #define DDRMC_R041 DENALI_CTL_415 58 #define DDRMC_R042 DENALI_CTL_416 59 #define DDRMC_R043 DENALI_CTL_417 60 #define DDRMC_R044 DENALI_CTL_418 61 62 #endif // __DDR_MC_IF_H__ 63