xref: /utopia/UTPA2-700.0.x/modules/demodulator/drv/dvb_extdemod/drvDMD_EXTERN_MSB124x.h (revision 53ee8cc121a030b8d368113ac3e966b4705770ef)
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95 ///////////////////////////////////////////////////////////////////////////////////////////////////
96 ///
97 /// @file   drvDMD_EXTERN_MSB124x.h
98 /// @brief  MSB124x Driver Interface
99 /// @author MStar Semiconductor Inc.
100 ///////////////////////////////////////////////////////////////////////////////////////////////////
101 
102 #ifndef _DRV_DVBT_H_
103 #define _DRV_DVBT_H_
104 
105 #include "MsCommon.h"
106 //#include "drvDMD_common.h"
107 #ifdef __cplusplus
108 extern "C"
109 {
110 #endif
111 
112 
113 //-------------------------------------------------------------------------------------------------
114 //  Driver Capability
115 //-------------------------------------------------------------------------------------------------
116 #define SUPPORT_MULTI_DEMOD      1  //0
117 
118 //-------------------------------------------------------------------------------------------------
119 //  Macro and Define
120 //-------------------------------------------------------------------------------------------------
121 #define MSIF_DMD_MSB124X_INTERN_LIB_CODE           {'1','2', '4','x'} //Lib code
122 #define MSIF_DMD_MSB124X_INTERN_LIBVER             {'0','1'}      //LIB version
123 #define MSIF_DMD_MSB124X_INTERN_BUILDNUM           {'0','0' }    //Build Number
124 #define MSIF_DMD_MSB124X_INTERN_CHANGELIST         {'0','0','0','0','0','0','0','0'} //P4 ChangeList Number
125 
126 #define DMD_MSB124X_EXTERN_VER                 /* Character String for DRV/API version             */  \
127     MSIF_TAG,                           /* 'MSIF'                                           */  \
128     MSIF_CLASS,                         /* '00'                                             */  \
129     MSIF_CUS,                           /* 0x0000                                           */  \
130     MSIF_MOD,                           /* 0x0000                                           */  \
131     MSIF_CHIP,                                                                                  \
132     MSIF_CPU,                                                                                   \
133     MSIF_DMD_MSB124X_INTERN_LIB_CODE,      /* IP__                                             */  \
134     MSIF_DMD_MSB124X_INTERN_LIBVER,        /* 0.0 ~ Z.Z                                        */  \
135     MSIF_DMD_MSB124X_INTERN_BUILDNUM,      /* 00 ~ 99                                          */  \
136     MSIF_DMD_MSB124X_INTERN_CHANGELIST,    /* CL#                                              */  \
137     MSIF_OS
138 
139 #define IS_BITS_SET(val, bits)                  (((val)&(bits)) == (bits))
140 
141 //-------------------------------------------------------------------------------------------------
142 //  Type and Structure
143 //-------------------------------------------------------------------------------------------------
144 typedef enum
145 {
146     E_DMD_MSB124X_DBGLV_NONE,    // disable all the debug message
147     E_DMD_MSB124X_DBGLV_INFO,    // information
148     E_DMD_MSB124X_DBGLV_NOTICE,  // normal but significant condition
149     E_DMD_MSB124X_DBGLV_WARNING, // warning conditions
150     E_DMD_MSB124X_DBGLV_ERR,     // error conditions
151     E_DMD_MSB124X_DBGLV_CRIT,    // critical conditions
152     E_DMD_MSB124X_DBGLV_ALERT,   // action must be taken immediately
153     E_DMD_MSB124X_DBGLV_EMERG,   // system is unusable
154     E_DMD_MSB124X_DBGLV_DEBUG,   // debug-level messages
155 } eDMD_MSB124X_DbgLv;
156 
157 typedef enum
158 {
159     // fw version, check sum,Address Start at 0x00
160     C_CHECK_SUM_L = 0x00,
161     C_CHECK_SUM_H,
162     C_FW_VER_0,
163     C_FW_VER_1,
164     C_FW_VER_2,
165 
166     // Operation Mode Settings,Address Start at 0x20
167     C_opmode_auto_scan_sym_rate= 0x20,
168     C_opmode_auto_scan_qam,
169     C_if_inv_pwm_out_en,
170 
171     // Config Params
172     C_config_zif= 0x23,
173     C_config_fc_l,
174     C_config_fc_h,
175     C_config_fs_l,
176     C_config_fs_h,
177     C_config_bw_l,    // 0x28
178     C_config_bw_h,
179     C_config_bw1_l,
180     C_config_bw1_h,
181     C_config_bw2_l,
182     C_config_bw2_h,
183     C_config_bw3_l,
184     C_config_bw3_h,
185     C_config_qam,     // 0x30
186     C_config_cci,
187     C_config_ts_serial,
188     C_config_ts_clk_rate,
189     C_config_ts_out_inv,
190     C_config_ts_data_swap,
191     C_config_iq_swap,
192 
193      //not always changed
194      C_opmode_rfagc_en,
195      C_opmode_humdet_en,   // 0x38
196      C_opmode_dcr_en,
197      C_opmode_iqb_en,
198      C_opmode_auto_iq,
199      C_opmode_auto_rfmax,
200 
201      C_opmode_atv_detector_en,
202 
203      C_config_rssi,
204      C_config_rfmax,
205 
206      C_lock_indicator, //0x40, [0] = TR lock HIS , [7] = FEC lock
207 
208      C_CFO10_L,
209      C_CFO10_H,
210 
211      C_SNR100_L,
212      C_SNR100_H,
213      C_config_spread_span,
214      C_config_spread_step,
215 
216     DVBC_PARAM_LEN,
217 
218     C_phase_tuning_en = 0x135,
219     C_phase_tuning_num = 0x136,
220 } DVBC_Param;
221 
222 typedef enum
223 {
224 #if 1
225     // operation mode settings
226     T_OPMODE_RFAGC_EN  = 0x20,   // 0x20
227     T_OPMODE_HUMDET_EN,
228     T_OPMODE_DCR_EN,
229     T_OPMODE_IIS_EN,
230     T_OPMODE_CCI_EN,
231     T_OPMODE_ACI_EN,
232     T_OPMODE_IQB_EN,
233     T_OPMODE_AUTO_IQ,
234     T_OPMODE_AUTO_RFMAX,    // 0x28
235     T_OPMODE_AUTO_ACI,
236     T_OPMODE_FIX_MODE_CP,
237     T_OPMODE_FIX_TPS,
238     T_OPMODE_AUTO_SCAN,
239     T_OPMODE_RSV_0X2D,
240     T_OPMODE_RSV_0X2E,
241     T_OPMODE_RSV_0X2F,
242 
243     // channel config param
244     T_CONFIG_RSSI,    // 0x30
245     T_CONFIG_ZIF,
246     T_CONFIG_FREQ,
247     T_CONFIG_FC_L,
248     T_CONFIG_FC_H,
249     T_CONFIG_FS_L,
250     T_CONFIG_FS_H,
251     T_CONFIG_BW,
252     T_CONFIG_MODE,    // 0x38
253     T_CONFIG_CP,
254     T_CONFIG_LP_SEL,
255     T_CONFIG_CSTL,
256     T_CONFIG_HIER,
257     T_CONFIG_HPCR,
258     T_CONFIG_LPCR,
259     T_CONFIG_IQ_SWAP,
260     T_CONFIG_RFMAX,    // 0x40
261     T_CONFIG_CCI,
262     T_CONFIG_ICFO_RANGE,
263     T_CONFIG_RFAGC_REF,
264     T_CONFIG_IFAGC_REF_2K,
265     T_CONFIG_IFAGC_REF_8K,
266     T_CONFIG_IFAGC_REF_ACI,
267     T_CONFIG_IFAGC_REF_IIS_2K,
268     T_CONFIG_IFAGC_REF_IIS_8K,    // 0x48
269     T_CONFIG_ACI_DET_TH_L,
270     T_CONFIG_ACI_DET_TH_H,
271     T_CONFIG_TS_SERIAL,
272     T_CONFIG_TS_CLK_RATE,
273     T_CONFIG_TS_OUT_INV,
274     T_CONFIG_TS_DATA_SWAP,
275     T_CONFIG_2K_SFO_H,
276     T_CONFIG_2K_SFO_L,    // 0x50
277     T_CONFIG_8K_SFO_H,
278     T_CONFIG_8K_SFO_L,
279     T_CONFIG_CHECK_CHANNEL,
280     T_CONFIG_SLICER_SNR_POS,
281     T_CONFIG_TDP_CCI_KP,
282     T_CONFIG_CCI_FSWEEP,
283     T_CONFIG_TS_CLK_RATE_AUTO,
284     T_CONFIG_IF_INV_PWM_OUT_EN,
285 
286     /**********************
287      * crc =
288      *    ~(T_OPMODE_RFAGC_EN^T_OPMODE_HUMDET_EN^....^T_CONFIG_TS_CLK_RATE_AUTO)
289      ************************/
290     T_PARAM_CHECK_SUM,
291 
292     T_DVBT_LOCK_HIS   = 0xF0,
293     T_DVBT2_NOCHAN_Flag = 0xF1,
294     T_DVBT_NOCHAN_Flag = 0xF2,
295     T_DETECT_DONE_Flag = 0xF3,
296 
297     T_CONFIG_SPREAD_SPAN=0xF7,   //0xF7
298     T_CONFIG_SPREAD_STEP=0xF8,   //0xF8
299 
300     T_PHASE_TUNING_EN = 0x135,
301     T_PHASE_TUNING_NUM = 0x136,
302 
303     DVBT_PARAM_LEN,
304 #else
305 T_OPMODE_RFAGC_EN  = 0x20,
306 T_OPMODE_AUTO_IQ,
307 T_CONFIG_ZIF,
308 T_CONFIG_FC_L,
309 T_CONFIG_FC_H,
310 T_CONFIG_FS_L,
311 T_CONFIG_FS_H,
312 T_CONFIG_BW,
313 T_CONFIG_IQ_SWAP,
314 T_CONFIG_TS_SERIAL,
315 T_CONFIG_TS_CLK_RATE,
316 T_CONFIG_TS_OUT_INV,
317 T_CONFIG_TS_DATA_SWAP,
318 T_CONFIG_TS_CLK_RATE_AUTO,
319 T_PARAM_CHECK_SUM,
320  DVBT_PARAM_LEN,
321 
322 #endif
323 } DVBT_Param;
324 
325 typedef enum
326 {
327     // fw version, check sum
328     E_T2_CHECK_SUM_L      = 0x00,
329     E_T2_CHECK_SUM_H,
330     E_T2_FW_VER_0,
331     E_T2_FW_VER_1,
332     E_T2_FW_VER_2,
333 
334     // operation mode
335     E_T2_ZIF_EN           = 0x20,
336     E_T2_RF_AGC_EN,
337     E_T2_HUM_DET_EN,
338     E_T2_DCR_EN,
339     E_T2_IQB_EN,
340     E_T2_IIS_EN,
341     E_T2_CCI_EN,
342     E_T2_LOW_PWR_DET_EN,
343     E_T2_ACI_DET_EN,
344     E_T2_TD_MOTION_EN,
345     E_T2_FD_MOTION_EN,
346 
347     // channel tuning param
348     E_T2_BW               = 0x40,
349     E_T2_FC_L             = 0x41,
350     E_T2_FC_H             = 0x42,
351     E_T2_FS_L,
352     E_T2_FS_H,
353     E_T2_ZIF,
354     E_T2_GI,
355     E_T2_ACI_DET_TYPE,
356     E_T2_AGC_REF,         //0x48
357     E_T2_RSSI_REF,
358     E_T2_SNR_TIME_L,
359     E_T2_SNR_TIME_H,
360     E_T2_BER_CMP_TIME_L,
361     E_T2_BER_CMP_TIME_H,
362     E_T2_SFO_CFO_NUM,
363     E_T2_CCI,
364     E_T2_ACI_DET_TH_L,    //0x50
365     E_T2_ACI_DET_TH_H,
366     E_T2_TS_SERIAL     = 0x52,
367     E_T2_TS_CLK_RATE   = 0x53,
368     E_T2_TS_OUT_INV    = 0x54,
369     E_T2_TS_DATA_SWAP  = 0x55,
370     E_T2_TDP_CCI_KP,
371     E_T2_CCI_FSWEEP,      //0x57
372     E_T2_TS_ERR_POL,      //0x58
373     E_T2_IF_AGC_INV_PWM_EN,  //0x59
374     E_T2_CCI_TYPE,	     //0x5A
375     E_T2_LITE,                 //0x5B
376 
377     // dvbt2 lock history
378     E_T2_DVBT2_LOCK_HIS   = 0xF0,
379     E_T2_FEF_DET_IND,
380     E_T2_MPLP_NO_COMMON_IND,
381 
382     E_T2_SNR_L,             // 0xf3
383     E_T2_SNR_H,             // 0xf4
384     E_T2_DOPPLER_DET_FLAG,  // 0xf5
385     E_T2_DOPPLER_DET_TH_L,  // 0xf6
386     E_T2_DOPPLER_DET_TH_H,  // 0xf7
387     E_T2_SPREAD_SPAN,       //0xf8
388     E_T2_SPREAD_STEP,       //0xf9
389 
390     // splp, mplp releted
391     E_T2_PLP_ID_ARR       = 0x100,
392     E_T2_L1_FLAG          = 0x120,
393     E_T2_PLP_ID,
394     E_T2_GROUP_ID,
395 
396     E_T2_PHASE_TUNING_EN = 0x135,
397     E_T2_PHASE_TUNING_NUM = 0x136,
398 
399     E_T2_PARAM_NUM,
400 } E_DVBT2_PARAM;
401 
402 typedef enum
403 {
404     E_DMD_MSB124X_DEMOD_I2C_DYNAMIC_SLAVE_ID_1,
405     E_DMD_MSB124X_DEMOD_I2C_DYNAMIC_SLAVE_ID_2,
406     E_DMD_MSB124X_DEMOD_I2C_DYNAMIC_SLAVE_ID_3,
407     E_DMD_MSB124X_DEMOD_I2C_DYNAMIC_SLAVE_ID_4
408 } eDMD_MSB124X_DemodI2CSlaveID;
409 
410 typedef enum
411 {
412     E_DMD_MSB124X_DEMOD_I2C_READ_BYTES,
413     E_DMD_MSB124X_DEMOD_I2C_WRITE_BYTES
414 } eDMD_MSB124X_DemodI2CMethod;
415 
416 /// For demod init
417 typedef struct
418 {
419     MS_U8 u8WO_SPI_Flash;
420     MS_BOOL bPreloadDSPCodeFromMainCHIPI2C;
421     MS_BOOL bFlashWPEnable;
422     void (*fpGPIOReset)(MS_BOOL bOnOff);
423     MS_BOOL (*fpMSB124X_I2C_Access)(eDMD_MSB124X_DemodI2CSlaveID eSlaveID, eDMD_MSB124X_DemodI2CMethod eMethod, MS_U8 u8AddrSize, MS_U8 *pu8Addr, MS_U16 u16Size, MS_U8 *pu8Data);
424     MS_U8* pDVBC_DSP_REG;
425     MS_U8* pDVBT_DSP_REG;
426     MS_U8* pDVBT2_DSP_REG;
427     MS_BOOL bEnableSPILoadCode;
428     void (*fpMSB124x_SPIPAD_En)(MS_BOOL bOnOff);
429     MS_U8 u8WO_Sdram;// 1 means no sdram on board
430 } sDMD_MSB124X_InitData;
431 
432 typedef enum
433 {
434     E_DMD_MSB124X_DEMOD_NONE,
435     E_DMD_MSB124X_DEMOD_DVBT2,
436     E_DMD_MSB124X_DEMOD_DVBT,
437     E_DMD_MSB124X_DEMOD_DVBC,
438     E_DMD_MSB124X_DEMOD_DVBS2,
439 } eDMD_MSB124X_DemodulatorType;
440 
441 typedef enum
442 {
443     E_DMD_MSB124X_FAIL=0,
444     E_DMD_MSB124X_OK=1
445 } DMD_MSB124X_Result;
446 
447 
448 typedef struct
449 {
450     MS_U16 u16Version;
451 } DMD_MSB124X_Info;
452 
453 //-------------------------------------------------------------------------------------------------
454 //  Function and Variable
455 //-------------------------------------------------------------------------------------------------
456 ////////////////////////////////////////////////////////////////////////////////
457 /// MDrv_DMD_DVBT_Init
458 ////////////////////////////////////////////////////////////////////////////////
459 extern MS_BOOL MDrv_DMD_MSB124X_Init(sDMD_MSB124X_InitData *pDMD_MSB124X_InitData, MS_U32 u32InitDataLen);
460 ////////////////////////////////////////////////////////////////////////////////
461 /// Should be called when exit VD input source
462 ////////////////////////////////////////////////////////////////////////////////
463 extern MS_BOOL MDrv_DMD_MSB124X_Exit(void);
464 //------------------------------------------------------------------------------
465 /// Set detailed level of DVBT driver debug message
466 /// u8DbgLevel : debug level for Parallel Flash driver\n
467 /// AVD_DBGLV_NONE,    ///< disable all the debug message\n
468 /// AVD_DBGLV_INFO,    ///< information\n
469 /// AVD_DBGLV_NOTICE,  ///< normal but significant condition\n
470 /// AVD_DBGLV_WARNING, ///< warning conditions\n
471 /// AVD_DBGLV_ERR,     ///< error conditions\n
472 /// AVD_DBGLV_CRIT,    ///< critical conditions\n
473 /// AVD_DBGLV_ALERT,   ///< action must be taken immediately\n
474 /// AVD_DBGLV_EMERG,   ///< system is unusable\n
475 /// AVD_DBGLV_DEBUG,   ///< debug-level messages\n
476 /// @return TRUE : succeed
477 /// @return FALSE : failed to set the debug level
478 //------------------------------------------------------------------------------
479 extern MS_BOOL MDrv_DMD_MSB124X_SetDbgLevel(eDMD_MSB124X_DbgLv u8DbgLevel);
480 //-------------------------------------------------------------------------------------------------
481 /// Get the information of DVBT driver\n
482 /// @return the pointer to the driver information
483 //-------------------------------------------------------------------------------------------------
484 //extern DMD_DVBT_Info* MDrv_DMD_DVBT_GetInfo(DMD_DVBT_INFO_TYPE eInfoType);
485 //-------------------------------------------------------------------------------------------------
486 /// Get DVBT driver version
487 /// when get ok, return the pointer to the driver version
488 //-------------------------------------------------------------------------------------------------
489 extern MS_BOOL MDrv_DMD_MSB124X_GetLibVer(const MSIF_Version **ppVersion);
490 ////////////////////////////////////////////////////////////////////////////////
491 /// Get DVBT FW version
492 /// u16Addr       : the address of DVBT's register\n
493 ////////////////////////////////////////////////////////////////////////////////
494 extern MS_BOOL MDrv_DMD_MSB124X_GetFWVer(MS_U16 *ver);
495 ////////////////////////////////////////////////////////////////////////////////
496 /// To get DVBT's register  value, only for special purpose.\n
497 /// u16Addr       : the address of DVBT's register\n
498 /// return the value of AFEC's register\n
499 ////////////////////////////////////////////////////////////////////////////////
500 extern MS_BOOL MDrv_DMD_MSB124X_GetReg(MS_U16 u16Addr, MS_U8 *pu8Data);
501 ////////////////////////////////////////////////////////////////////////////////
502 /// To set DVBT's register value, only for special purpose.\n
503 /// u16Addr       : the address of DVBT's register\n
504 /// u8Value        : the value to be set\n
505 ////////////////////////////////////////////////////////////////////////////////
506 extern MS_BOOL MDrv_DMD_MSB124X_SetReg(MS_U16 u16Addr, MS_U8 u8Data);
507 ////////////////////////////////////////////////////////////////////////////////
508 /// To set DVBT's register value, only for special purpose.\n
509 /// u16Addr       : the address of DVBT's register\n
510 /// u8Value        : the value to be set\n
511 ////////////////////////////////////////////////////////////////////////////////
512 extern MS_BOOL MDrv_DMD_MSB124X_SetRegs(MS_U16 u16Addr, MS_U8* u8pData, MS_U16 data_size);
513 ////////////////////////////////////////////////////////////////////////////////
514 /// To set DVBT's register value, only for special purpose.\n
515 /// u16Addr       : the address of DVBT's register\n
516 /// u8Value        : the value to be set\n
517 ////////////////////////////////////////////////////////////////////////////////
518 extern MS_BOOL MDrv_DMD_MSB124X_SetReg2Bytes(MS_U16 u16Addr, MS_U16 u16Data);
519 ////////////////////////////////////////////////////////////////////////////////
520 /// To get DVBT's register  value, only for special purpose.\n
521 /// u16Addr       : the address of DVBT's register\n
522 /// return the value of AFEC's register\n
523 ////////////////////////////////////////////////////////////////////////////////
524 extern MS_BOOL MDrv_DMD_MSB124X_GetDSPReg(MS_U16 u16Addr, MS_U8 *pu8Data);
525 ////////////////////////////////////////////////////////////////////////////////
526 /// To set DVBT's register value, only for special purpose.\n
527 /// u16Addr       : the address of DVBT's register\n
528 /// u8Value        : the value to be set\n
529 ////////////////////////////////////////////////////////////////////////////////
530 extern MS_BOOL MDrv_DMD_MSB124X_SetDSPReg(MS_U16 u16Addr, MS_U8 u8Data);
531 ////////////////////////////////////////////////////////////////////////////////
532 /// MDrv_DMD_MSB124X_SetCurrentDemodulatorType
533 ////////////////////////////////////////////////////////////////////////////////
534 extern void MDrv_DMD_MSB124X_SetCurrentDemodulatorType(eDMD_MSB124X_DemodulatorType eCurrentDemodulatorType);
535 ////////////////////////////////////////////////////////////////////////////////
536 /// MDrv_DMD_MSB124X_LoadDSPCode
537 ////////////////////////////////////////////////////////////////////////////////
538 extern MS_BOOL MDrv_DMD_MSB124X_LoadDSPCode(void);
539 ////////////////////////////////////////////////////////////////////////////////
540 /// MDrv_DMD_MSB124X__DTV_DVBT_DSPReg_CRC
541 ////////////////////////////////////////////////////////////////////////////////
542 extern MS_BOOL MDrv_DMD_MSB124X_DTV_DVBT_DSPReg_CRC(void);
543 ////////////////////////////////////////////////////////////////////////////////
544 /// power on init
545 ////////////////////////////////////////////////////////////////////////////////
546 extern MS_BOOL MDrv_DMD_MSB124X_Power_On_Initialization(void);
547 ////////////////////////////////////////////////////////////////////////////////
548 /// load dsp code
549 ////////////////////////////////////////////////////////////////////////////////
550 extern MS_BOOL MDrv_DMD_MSB1245_LoadDSPCodeToSram(void);
551 //EXT API
552 #if (SUPPORT_MULTI_DEMOD)
553 extern MS_BOOL MDrv_DMD_MSB124X_SwitchHandle(MS_S32 s32Handle);
554 extern MS_S32 MDrv_DMD_MSB124X_GetCurrentHandle(void);
555 extern MS_BOOL MDrv_MDM_MSB124X_CreateNode(MS_S32 *s32Handle);
556 extern MS_BOOL MDrv_MDM_MSB124X_DeleteNode(MS_S32 s32Handle);
557 extern MS_BOOL MDrv_DMD_MSB124X_Init_EX(MS_S32 s32Handle, sDMD_MSB124X_InitData *pDMD_MSB124X_InitData, MS_U32 u32InitDataLen);
558 extern MS_BOOL MDrv_DMD_MSB124X_Exit_EX(MS_S32 s32Handle);
559 //////////////////////////////////////////////////////
560 extern MS_BOOL MDrv_DMD_MSB124X_GetReg_EX(MS_S32 s32Handle, MS_U16 u16Addr, MS_U8 *pu8Data);
561 extern MS_BOOL MDrv_DMD_MSB124X_SetReg_EX(MS_S32 s32Handle, MS_U16 u16Addr, MS_U8 u8Data);
562 extern MS_BOOL MDrv_DMD_MSB124X_SetRegs_EX(MS_S32 s32Handle,MS_U16 u16Addr, MS_U8* u8pData, MS_U16 data_size);
563 extern MS_BOOL MDrv_DMD_MSB124X_SetReg2Bytes_EX(MS_S32 s32Handle, MS_U16 u16Addr, MS_U16 u16Data);
564 
565 extern MS_BOOL MDrv_DMD_MSB124X_GetDSPReg_EX(MS_S32 s32Handle, MS_U16 u16Addr, MS_U8 *pu8Data);
566 extern MS_BOOL MDrv_DMD_MSB124X_SetDSPReg_EX(MS_S32 s32Handle, MS_U16 u16Addr, MS_U8 u8Data);
567 extern void MDrv_DMD_MSB124X_SetCurrentDemodulatorType_EX(MS_S32 s32Handle, eDMD_MSB124X_DemodulatorType eCurrentDemodulatorType);
568 extern MS_BOOL MDrv_DMD_MSB124X_LoadDSPCode_EX(MS_S32 s32Handle);
569 extern MS_BOOL MDrv_DMD_MSB124X_DTV_DVBT_DSPReg_CRC_EX(MS_S32 s32Handle);
570 extern MS_BOOL MDrv_DMD_MSB124X_Power_On_Initialization_EX(MS_S32 s32Handle);
571 extern MS_BOOL MDrv_DMD_MSB1245_LoadDSPCodeToSram_EX(MS_S32 s32Handle);
572 #endif
573 #ifdef __cplusplus
574 }
575 #endif
576 
577 
578 #endif // _DRV_DVBT_H_
579 
580 
581