1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 * You should have received a copy of the GNU General Public License along with 15 * this program; if not, write to the Free Software Foundation, Inc., 16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA 17 * 18 * 19 ******************************************************************************/ 20 #ifndef __ODM_TYPES_H__ 21 #define __ODM_TYPES_H__ 22 23 // 24 // Define Different SW team support 25 // 26 #define ODM_AP 0x01 //BIT0 27 #define ODM_ADSL 0x02 //BIT1 28 #define ODM_CE 0x04 //BIT2 29 #define ODM_WIN 0x08 //BIT3 30 31 // Deifne HW endian support 32 #define ODM_ENDIAN_BIG 0 33 #define ODM_ENDIAN_LITTLE 1 34 35 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) 36 #define GET_PDM_ODM(__pAdapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__pAdapter))->DM_OutSrc))) 37 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) 38 #define GET_PDM_ODM(__pAdapter) ((PDM_ODM_T)(&((GET_HAL_DATA(__pAdapter))->odmpriv))) 39 #endif 40 41 #if (DM_ODM_SUPPORT_TYPE != ODM_WIN) 42 #define RT_PCI_INTERFACE 1 43 #define RT_USB_INTERFACE 2 44 #define RT_SDIO_INTERFACE 3 45 #endif 46 47 typedef enum _HAL_STATUS{ 48 HAL_STATUS_SUCCESS, 49 HAL_STATUS_FAILURE, 50 /*RT_STATUS_PENDING, 51 RT_STATUS_RESOURCE, 52 RT_STATUS_INVALID_CONTEXT, 53 RT_STATUS_INVALID_PARAMETER, 54 RT_STATUS_NOT_SUPPORT, 55 RT_STATUS_OS_API_FAILED,*/ 56 }HAL_STATUS,*PHAL_STATUS; 57 58 #if( DM_ODM_SUPPORT_TYPE == ODM_AP) 59 #define MP_DRIVER 0 60 #endif 61 #if(DM_ODM_SUPPORT_TYPE != ODM_WIN) 62 63 #define VISTA_USB_RX_REVISE 0 64 65 // 66 // Declare for ODM spin lock defintion temporarily fro compile pass. 67 // 68 typedef enum _RT_SPINLOCK_TYPE{ 69 RT_TX_SPINLOCK = 1, 70 RT_RX_SPINLOCK = 2, 71 RT_RM_SPINLOCK = 3, 72 RT_CAM_SPINLOCK = 4, 73 RT_SCAN_SPINLOCK = 5, 74 RT_LOG_SPINLOCK = 7, 75 RT_BW_SPINLOCK = 8, 76 RT_CHNLOP_SPINLOCK = 9, 77 RT_RF_OPERATE_SPINLOCK = 10, 78 RT_INITIAL_SPINLOCK = 11, 79 RT_RF_STATE_SPINLOCK = 12, // For RF state. Added by Bruce, 2007-10-30. 80 #if VISTA_USB_RX_REVISE 81 RT_USBRX_CONTEXT_SPINLOCK = 13, 82 RT_USBRX_POSTPROC_SPINLOCK = 14, // protect data of Adapter->IndicateW/ IndicateR 83 #endif 84 //Shall we define Ndis 6.2 SpinLock Here ? 85 RT_PORT_SPINLOCK=16, 86 RT_VNIC_SPINLOCK=17, 87 RT_HVL_SPINLOCK=18, 88 RT_H2C_SPINLOCK = 20, // For H2C cmd. Added by tynli. 2009.11.09. 89 90 RT_BTData_SPINLOCK=25, 91 92 RT_WAPI_OPTION_SPINLOCK=26, 93 RT_WAPI_RX_SPINLOCK=27, 94 95 // add for 92D CCK control issue 96 RT_CCK_PAGEA_SPINLOCK = 28, 97 RT_BUFFER_SPINLOCK = 29, 98 RT_CHANNEL_AND_BANDWIDTH_SPINLOCK = 30, 99 RT_GEN_TEMP_BUF_SPINLOCK = 31, 100 RT_AWB_SPINLOCK = 32, 101 RT_FW_PS_SPINLOCK = 33, 102 RT_HW_TIMER_SPIN_LOCK = 34, 103 RT_MPT_WI_SPINLOCK = 35, 104 RT_P2P_SPIN_LOCK = 36, // Protect P2P context 105 RT_DBG_SPIN_LOCK = 37, 106 RT_IQK_SPINLOCK = 38, 107 RT_PENDED_OID_SPINLOCK = 39, 108 RT_CHNLLIST_SPINLOCK = 40, 109 RT_INDIC_SPINLOCK = 41, //protect indication 110 RT_RFD_SPINLOCK = 42, 111 RT_SYNC_IO_CNT_SPINLOCK = 43, 112 RT_LAST_SPINLOCK, 113 }RT_SPINLOCK_TYPE; 114 115 #endif 116 117 118 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) 119 #define STA_INFO_T RT_WLAN_STA 120 #define PSTA_INFO_T PRT_WLAN_STA 121 122 #define CONFIG_HW_ANTENNA_DIVERSITY 123 #define CONFIG_SW_ANTENNA_DIVERSITY 124 /*#define CONFIG_PATH_DIVERSITY*/ 125 /*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ 126 #define CONFIG_ANT_DETECTION 127 #define CONFIG_RA_DBG_CMD 128 129 #define __func__ __FUNCTION__ 130 #define PHYDM_TESTCHIP_SUPPORT TESTCHIP_SUPPORT 131 132 #elif (DM_ODM_SUPPORT_TYPE == ODM_AP) 133 134 // To let ADSL/AP project compile ok; it should be removed after all conflict are solved. Added by Annie, 2011-10-07. 135 #define ADSL_AP_BUILD_WORKAROUND 136 #define AP_BUILD_WORKAROUND 137 138 //2 [ Configure RA Debug H2C CMD ] 139 #define CONFIG_RA_DBG_CMD 140 141 /*#define CONFIG_PATH_DIVERSITY*/ 142 /*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ 143 144 //2 [ Configure Antenna Diversity ] 145 #if defined(CONFIG_RTL_8881A_ANT_SWITCH) || defined(CONFIG_SLOT_0_ANT_SWITCH) || defined(CONFIG_SLOT_1_ANT_SWITCH) 146 #define CONFIG_HW_ANTENNA_DIVERSITY 147 #define ODM_EVM_ENHANCE_ANTDIV 148 149 //---------- 150 #if(!defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A) && !defined(CONFIG_2G_CGCS_RX_DIVERSITY) && !defined(CONFIG_2G_CG_TRX_DIVERSITY) && !defined(CONFIG_2G_CG_SMART_ANT_DIVERSITY)) 151 #define CONFIG_NO_2G_DIVERSITY 152 #endif 153 154 #ifdef CONFIG_NO_5G_DIVERSITY_8881A 155 #define CONFIG_NO_5G_DIVERSITY 156 #elif defined(CONFIG_5G_CGCS_RX_DIVERSITY_8881A) 157 #define CONFIG_5G_CGCS_RX_DIVERSITY 158 #elif defined(CONFIG_5G_CG_TRX_DIVERSITY_8881A) 159 #define CONFIG_5G_CG_TRX_DIVERSITY 160 #elif defined(CONFIG_2G5G_CG_TRX_DIVERSITY_8881A) 161 #define CONFIG_2G5G_CG_TRX_DIVERSITY 162 #endif 163 #if(!defined(CONFIG_NO_5G_DIVERSITY) && !defined(CONFIG_5G_CGCS_RX_DIVERSITY) && !defined(CONFIG_5G_CG_TRX_DIVERSITY) && !defined(CONFIG_2G5G_CG_TRX_DIVERSITY) && !defined(CONFIG_5G_CG_SMART_ANT_DIVERSITY)) 164 #define CONFIG_NO_5G_DIVERSITY 165 #endif 166 //---------- 167 #if ( defined(CONFIG_NO_2G_DIVERSITY) && defined(CONFIG_NO_5G_DIVERSITY) ) 168 #define CONFIG_NOT_SUPPORT_ANTDIV 169 #elif( !defined(CONFIG_NO_2G_DIVERSITY) && defined(CONFIG_NO_5G_DIVERSITY) ) 170 #define CONFIG_2G_SUPPORT_ANTDIV 171 #elif( defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_NO_5G_DIVERSITY) ) 172 #define CONFIG_5G_SUPPORT_ANTDIV 173 #elif( (!defined(CONFIG_NO_2G_DIVERSITY) && !defined(CONFIG_NO_5G_DIVERSITY)) || defined(CONFIG_2G5G_CG_TRX_DIVERSITY) ) 174 #define CONFIG_2G5G_SUPPORT_ANTDIV 175 #endif 176 //---------- 177 #endif 178 #ifdef AP_BUILD_WORKAROUND 179 #include "../typedef.h" 180 #else 181 typedef void VOID,*PVOID; 182 typedef unsigned char BOOLEAN,*PBOOLEAN; 183 typedef unsigned char u1Byte,*pu1Byte; 184 typedef unsigned short u2Byte,*pu2Byte; 185 typedef unsigned int u4Byte,*pu4Byte; 186 typedef unsigned long long u8Byte,*pu8Byte; 187 #if 1 188 /* In ARM platform, system would use the type -- "char" as "unsigned char" 189 * And we only use s1Byte/ps1Byte as INT8 now, so changes the type of s1Byte.*/ 190 typedef signed char s1Byte,*ps1Byte; 191 #else 192 typedef char s1Byte,*ps1Byte; 193 #endif 194 typedef short s2Byte,*ps2Byte; 195 typedef long s4Byte,*ps4Byte; 196 typedef long long s8Byte,*ps8Byte; 197 #endif 198 199 typedef struct rtl8192cd_priv *prtl8192cd_priv; 200 typedef struct stat_info STA_INFO_T,*PSTA_INFO_T; 201 typedef struct timer_list RT_TIMER, *PRT_TIMER; 202 typedef void * RT_TIMER_CALL_BACK; 203 204 #ifdef CONFIG_PCI_HCI 205 #define DEV_BUS_TYPE RT_PCI_INTERFACE 206 #endif 207 208 #define _TRUE 1 209 #define _FALSE 0 210 211 #if (defined(TESTCHIP_SUPPORT)) 212 #define PHYDM_TESTCHIP_SUPPORT 1 213 #else 214 #define PHYDM_TESTCHIP_SUPPORT 0 215 #endif 216 217 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) 218 #include <drv_types.h> 219 220 /*#define CONFIG_RA_DBG_CMD*/ 221 /*#define CONFIG_ANT_DETECTION*/ 222 /*#define CONFIG_PATH_DIVERSITY*/ 223 /*#define CONFIG_RA_DYNAMIC_RTY_LIMIT*/ 224 225 #if 0 226 typedef u8 u1Byte, *pu1Byte; 227 typedef u16 u2Byte,*pu2Byte; 228 typedef u32 u4Byte,*pu4Byte; 229 typedef u64 u8Byte,*pu8Byte; 230 typedef s8 s1Byte,*ps1Byte; 231 typedef s16 s2Byte,*ps2Byte; 232 typedef s32 s4Byte,*ps4Byte; 233 typedef s64 s8Byte,*ps8Byte; 234 #else 235 #define u1Byte u8 236 #define pu1Byte u8* 237 238 #define u2Byte u16 239 #define pu2Byte u16* 240 241 #define u4Byte u32 242 #define pu4Byte u32* 243 244 #define u8Byte u64 245 #define pu8Byte u64* 246 247 #define s1Byte s8 248 #define ps1Byte s8* 249 250 #define s2Byte s16 251 #define ps2Byte s16* 252 253 #define s4Byte s32 254 #define ps4Byte s32* 255 256 #define s8Byte s64 257 #define ps8Byte s64* 258 259 #endif 260 #ifdef CONFIG_USB_HCI 261 #define DEV_BUS_TYPE RT_USB_INTERFACE 262 #elif defined(CONFIG_PCI_HCI) 263 #define DEV_BUS_TYPE RT_PCI_INTERFACE 264 #elif defined(CONFIG_SDIO_HCI) 265 #define DEV_BUS_TYPE RT_SDIO_INTERFACE 266 #elif defined(CONFIG_GSPI_HCI) 267 #define DEV_BUS_TYPE RT_SDIO_INTERFACE 268 #endif 269 270 271 #if defined(CONFIG_LITTLE_ENDIAN) 272 #define ODM_ENDIAN_TYPE ODM_ENDIAN_LITTLE 273 #elif defined (CONFIG_BIG_ENDIAN) 274 #define ODM_ENDIAN_TYPE ODM_ENDIAN_BIG 275 #endif 276 277 typedef struct timer_list RT_TIMER, *PRT_TIMER; 278 typedef void * RT_TIMER_CALL_BACK; 279 #define STA_INFO_T struct sta_info 280 #define PSTA_INFO_T struct sta_info * 281 282 283 284 #define TRUE _TRUE 285 #define FALSE _FALSE 286 287 288 #define SET_TX_DESC_ANTSEL_A_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 24, 1, __Value) 289 #define SET_TX_DESC_ANTSEL_B_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+8, 25, 1, __Value) 290 #define SET_TX_DESC_ANTSEL_C_88E(__pTxDesc, __Value) SET_BITS_TO_LE_4BYTE(__pTxDesc+28, 29, 1, __Value) 291 292 //define useless flag to avoid compile warning 293 #define USE_WORKITEM 0 294 #define FOR_BRAZIL_PRETEST 0 295 /*#define BT_30_SUPPORT 0*/ 296 #define FPGA_TWO_MAC_VERIFICATION 0 297 #define RTL8881A_SUPPORT 0 298 299 #if (defined(TESTCHIP_SUPPORT)) 300 #define PHYDM_TESTCHIP_SUPPORT 1 301 #else 302 #define PHYDM_TESTCHIP_SUPPORT 0 303 #endif 304 #endif 305 306 #define READ_NEXT_PAIR(v1, v2, i) do { if (i+2 >= ArrayLen) break; i += 2; v1 = Array[i]; v2 = Array[i+1]; } while(0) 307 #define COND_ELSE 2 308 #define COND_ENDIF 3 309 310 #endif // __ODM_TYPES_H__ 311 312