1# SPDX-License-Identifier: GPL-2.0 2 3menu "DesignWare PCI Core Support" 4 depends on PCI 5 6config PCIE_DW 7 bool 8 9config PCIE_DW_HOST 10 bool 11 depends on PCI_MSI_IRQ_DOMAIN 12 select PCIE_DW 13 14config PCIE_DW_EP 15 bool 16 depends on PCI_ENDPOINT 17 select PCIE_DW 18 19config PCI_DRA7XX 20 bool 21 22config PCI_DRA7XX_HOST 23 bool "TI DRA7xx PCIe controller Host Mode" 24 depends on SOC_DRA7XX || COMPILE_TEST 25 depends on PCI_MSI_IRQ_DOMAIN 26 depends on OF && HAS_IOMEM && TI_PIPE3 27 select PCIE_DW_HOST 28 select PCI_DRA7XX 29 default y if SOC_DRA7XX 30 help 31 Enables support for the PCIe controller in the DRA7xx SoC to work in 32 host mode. There are two instances of PCIe controller in DRA7xx. 33 This controller can work either as EP or RC. In order to enable 34 host-specific features PCI_DRA7XX_HOST must be selected and in order 35 to enable device-specific features PCI_DRA7XX_EP must be selected. 36 This uses the DesignWare core. 37 38config PCI_DRA7XX_EP 39 bool "TI DRA7xx PCIe controller Endpoint Mode" 40 depends on SOC_DRA7XX || COMPILE_TEST 41 depends on PCI_ENDPOINT 42 depends on OF && HAS_IOMEM && TI_PIPE3 43 select PCIE_DW_EP 44 select PCI_DRA7XX 45 help 46 Enables support for the PCIe controller in the DRA7xx SoC to work in 47 endpoint mode. There are two instances of PCIe controller in DRA7xx. 48 This controller can work either as EP or RC. In order to enable 49 host-specific features PCI_DRA7XX_HOST must be selected and in order 50 to enable device-specific features PCI_DRA7XX_EP must be selected. 51 This uses the DesignWare core. 52 53config PCIE_DW_PLAT 54 bool 55 56config PCIE_DW_PLAT_HOST 57 bool "Platform bus based DesignWare PCIe Controller - Host mode" 58 depends on PCI && PCI_MSI_IRQ_DOMAIN 59 select PCIE_DW_HOST 60 select PCIE_DW_PLAT 61 help 62 Enables support for the PCIe controller in the Designware IP to 63 work in host mode. There are two instances of PCIe controller in 64 Designware IP. 65 This controller can work either as EP or RC. In order to enable 66 host-specific features PCIE_DW_PLAT_HOST must be selected and in 67 order to enable device-specific features PCI_DW_PLAT_EP must be 68 selected. 69 70config PCIE_DW_PLAT_EP 71 bool "Platform bus based DesignWare PCIe Controller - Endpoint mode" 72 depends on PCI && PCI_MSI_IRQ_DOMAIN 73 depends on PCI_ENDPOINT 74 select PCIE_DW_EP 75 select PCIE_DW_PLAT 76 help 77 Enables support for the PCIe controller in the Designware IP to 78 work in endpoint mode. There are two instances of PCIe controller 79 in Designware IP. 80 This controller can work either as EP or RC. In order to enable 81 host-specific features PCIE_DW_PLAT_HOST must be selected and in 82 order to enable device-specific features PCI_DW_PLAT_EP must be 83 selected. 84 85config PCIE_DW_ROCKCHIP 86 tristate "Rockchip DesignWare PCIe controller" 87 select PCIE_DW 88 select PCIE_DW_HOST 89 depends on ARCH_ROCKCHIP 90 depends on OF 91 help 92 Enables support for the DW PCIe controller in the Rockchip SoC. 93 94config PCIE_RK_THREADED_INIT 95 bool "Threaded initialize Rockchip DW based PCIe controller" 96 depends on PCIE_DW_ROCKCHIP 97 default y 98 help 99 Enables threaded initialize Rockchip DW based PCIe controller. 100 101config PCIE_DW_DMATEST 102 bool "DesignWare PCIe DMA test" 103 depends on PCIE_DW_ROCKCHIP 104 depends on !ROCKCHIP_PCIE_DMA_OBJ 105 help 106 Enables support for the DW PCIe controller DMA test. 107 108config PCIE_DW_ROCKCHIP_EP 109 bool "Rockchip DesignWare PCIe EP controller" 110 select PCIE_DW 111 depends on ARCH_ROCKCHIP 112 depends on OF 113 help 114 Enables support for the DW PCIe controller in the Rockchip SoC. 115 116config PCI_EXYNOS 117 bool "Samsung Exynos PCIe controller" 118 depends on SOC_EXYNOS5440 || COMPILE_TEST 119 depends on PCI_MSI_IRQ_DOMAIN 120 select PCIE_DW_HOST 121 122config PCI_IMX6 123 bool "Freescale i.MX6/7/8 PCIe controller" 124 depends on ARCH_MXC || COMPILE_TEST 125 depends on PCI_MSI_IRQ_DOMAIN 126 select PCIE_DW_HOST 127 128config PCIE_SPEAR13XX 129 bool "STMicroelectronics SPEAr PCIe controller" 130 depends on ARCH_SPEAR13XX || COMPILE_TEST 131 depends on PCI_MSI_IRQ_DOMAIN 132 select PCIE_DW_HOST 133 help 134 Say Y here if you want PCIe support on SPEAr13XX SoCs. 135 136config PCI_KEYSTONE 137 bool 138 139config PCI_KEYSTONE_HOST 140 bool "PCI Keystone Host Mode" 141 depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST) 142 depends on PCI_MSI_IRQ_DOMAIN 143 select PCIE_DW_HOST 144 select PCI_KEYSTONE 145 help 146 Enables support for the PCIe controller in the Keystone SoC to 147 work in host mode. The PCI controller on Keystone is based on 148 DesignWare hardware and therefore the driver re-uses the 149 DesignWare core functions to implement the driver. 150 151config PCI_KEYSTONE_EP 152 bool "PCI Keystone Endpoint Mode" 153 depends on ARCH_KEYSTONE || ARCH_K3 || ((ARM || ARM64) && COMPILE_TEST) 154 depends on PCI_ENDPOINT 155 select PCIE_DW_EP 156 select PCI_KEYSTONE 157 help 158 Enables support for the PCIe controller in the Keystone SoC to 159 work in endpoint mode. The PCI controller on Keystone is based 160 on DesignWare hardware and therefore the driver re-uses the 161 DesignWare core functions to implement the driver. 162 163config PCI_LAYERSCAPE 164 bool "Freescale Layerscape PCIe controller - Host mode" 165 depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) 166 depends on PCI_MSI_IRQ_DOMAIN 167 select MFD_SYSCON 168 select PCIE_DW_HOST 169 help 170 Say Y here if you want to enable PCIe controller support on Layerscape 171 SoCs to work in Host mode. 172 This controller can work either as EP or RC. The RCW[HOST_AGT_PEX] 173 determines which PCIe controller works in EP mode and which PCIe 174 controller works in RC mode. 175 176config PCI_LAYERSCAPE_EP 177 bool "Freescale Layerscape PCIe controller - Endpoint mode" 178 depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) 179 depends on PCI_ENDPOINT 180 select PCIE_DW_EP 181 help 182 Say Y here if you want to enable PCIe controller support on Layerscape 183 SoCs to work in Endpoint mode. 184 This controller can work either as EP or RC. The RCW[HOST_AGT_PEX] 185 determines which PCIe controller works in EP mode and which PCIe 186 controller works in RC mode. 187 188config PCI_HISI 189 depends on OF && (ARM64 || COMPILE_TEST) 190 bool "HiSilicon Hip05 and Hip06 SoCs PCIe controllers" 191 depends on PCI_MSI_IRQ_DOMAIN 192 select PCIE_DW_HOST 193 select PCI_HOST_COMMON 194 help 195 Say Y here if you want PCIe controller support on HiSilicon 196 Hip05 and Hip06 SoCs 197 198config PCIE_QCOM 199 bool "Qualcomm PCIe controller" 200 depends on OF && (ARCH_QCOM || COMPILE_TEST) 201 depends on PCI_MSI_IRQ_DOMAIN 202 select PCIE_DW_HOST 203 help 204 Say Y here to enable PCIe controller support on Qualcomm SoCs. The 205 PCIe controller uses the DesignWare core plus Qualcomm-specific 206 hardware wrappers. 207 208config PCIE_ARMADA_8K 209 bool "Marvell Armada-8K PCIe controller" 210 depends on ARCH_MVEBU || COMPILE_TEST 211 depends on PCI_MSI_IRQ_DOMAIN 212 select PCIE_DW_HOST 213 help 214 Say Y here if you want to enable PCIe controller support on 215 Armada-8K SoCs. The PCIe controller on Armada-8K is based on 216 DesignWare hardware and therefore the driver re-uses the 217 DesignWare core functions to implement the driver. 218 219config PCIE_ARTPEC6 220 bool 221 222config PCIE_ARTPEC6_HOST 223 bool "Axis ARTPEC-6 PCIe controller Host Mode" 224 depends on MACH_ARTPEC6 || COMPILE_TEST 225 depends on PCI_MSI_IRQ_DOMAIN 226 select PCIE_DW_HOST 227 select PCIE_ARTPEC6 228 help 229 Enables support for the PCIe controller in the ARTPEC-6 SoC to work in 230 host mode. This uses the DesignWare core. 231 232config PCIE_ARTPEC6_EP 233 bool "Axis ARTPEC-6 PCIe controller Endpoint Mode" 234 depends on MACH_ARTPEC6 || COMPILE_TEST 235 depends on PCI_ENDPOINT 236 select PCIE_DW_EP 237 select PCIE_ARTPEC6 238 help 239 Enables support for the PCIe controller in the ARTPEC-6 SoC to work in 240 endpoint mode. This uses the DesignWare core. 241 242config PCIE_INTEL_GW 243 bool "Intel Gateway PCIe host controller support" 244 depends on OF && (X86 || COMPILE_TEST) 245 depends on PCI_MSI_IRQ_DOMAIN 246 select PCIE_DW_HOST 247 help 248 Say 'Y' here to enable PCIe Host controller support on Intel 249 Gateway SoCs. 250 The PCIe controller uses the DesignWare core plus Intel-specific 251 hardware wrappers. 252 253config PCIE_KIRIN 254 depends on OF && (ARM64 || COMPILE_TEST) 255 bool "HiSilicon Kirin series SoCs PCIe controllers" 256 depends on PCI_MSI_IRQ_DOMAIN 257 select PCIE_DW_HOST 258 help 259 Say Y here if you want PCIe controller support 260 on HiSilicon Kirin series SoCs. 261 262config PCIE_HISI_STB 263 bool "HiSilicon STB SoCs PCIe controllers" 264 depends on ARCH_HISI || COMPILE_TEST 265 depends on PCI_MSI_IRQ_DOMAIN 266 select PCIE_DW_HOST 267 help 268 Say Y here if you want PCIe controller support on HiSilicon STB SoCs 269 270config PCI_MESON 271 tristate "MESON PCIe controller" 272 depends on PCI_MSI_IRQ_DOMAIN 273 default m if ARCH_MESON 274 select PCIE_DW_HOST 275 help 276 Say Y here if you want to enable PCI controller support on Amlogic 277 SoCs. The PCI controller on Amlogic is based on DesignWare hardware 278 and therefore the driver re-uses the DesignWare core functions to 279 implement the driver. 280 281config PCIE_TEGRA194 282 tristate 283 284config PCIE_TEGRA194_HOST 285 tristate "NVIDIA Tegra194 (and later) PCIe controller - Host Mode" 286 depends on ARCH_TEGRA_194_SOC || COMPILE_TEST 287 depends on PCI_MSI_IRQ_DOMAIN 288 select PCIE_DW_HOST 289 select PHY_TEGRA194_P2U 290 select PCIE_TEGRA194 291 help 292 Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to 293 work in host mode. There are two instances of PCIe controllers in 294 Tegra194. This controller can work either as EP or RC. In order to 295 enable host-specific features PCIE_TEGRA194_HOST must be selected and 296 in order to enable device-specific features PCIE_TEGRA194_EP must be 297 selected. This uses the DesignWare core. 298 299config PCIE_TEGRA194_EP 300 tristate "NVIDIA Tegra194 (and later) PCIe controller - Endpoint Mode" 301 depends on ARCH_TEGRA_194_SOC || COMPILE_TEST 302 depends on PCI_ENDPOINT 303 select PCIE_DW_EP 304 select PHY_TEGRA194_P2U 305 select PCIE_TEGRA194 306 help 307 Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to 308 work in host mode. There are two instances of PCIe controllers in 309 Tegra194. This controller can work either as EP or RC. In order to 310 enable host-specific features PCIE_TEGRA194_HOST must be selected and 311 in order to enable device-specific features PCIE_TEGRA194_EP must be 312 selected. This uses the DesignWare core. 313 314config PCIE_UNIPHIER 315 bool "Socionext UniPhier PCIe host controllers" 316 depends on ARCH_UNIPHIER || COMPILE_TEST 317 depends on OF && HAS_IOMEM 318 depends on PCI_MSI_IRQ_DOMAIN 319 select PCIE_DW_HOST 320 help 321 Say Y here if you want PCIe host controller support on UniPhier SoCs. 322 This driver supports LD20 and PXs3 SoCs. 323 324config PCIE_UNIPHIER_EP 325 bool "Socionext UniPhier PCIe endpoint controllers" 326 depends on ARCH_UNIPHIER || COMPILE_TEST 327 depends on OF && HAS_IOMEM 328 depends on PCI_ENDPOINT 329 select PCIE_DW_EP 330 help 331 Say Y here if you want PCIe endpoint controller support on 332 UniPhier SoCs. This driver supports Pro5 SoC. 333 334config PCIE_AL 335 bool "Amazon Annapurna Labs PCIe controller" 336 depends on OF && (ARM64 || COMPILE_TEST) 337 depends on PCI_MSI_IRQ_DOMAIN 338 select PCIE_DW_HOST 339 help 340 Say Y here to enable support of the Amazon's Annapurna Labs PCIe 341 controller IP on Amazon SoCs. The PCIe controller uses the DesignWare 342 core plus Annapurna Labs proprietary hardware wrappers. This is 343 required only for DT-based platforms. ACPI platforms with the 344 Annapurna Labs PCIe controller don't need to enable this. 345 346endmenu 347