xref: /OK3568_Linux_fs/kernel/drivers/clk/Kconfig (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1# SPDX-License-Identifier: GPL-2.0
2
3config HAVE_CLK
4	bool
5	help
6	  The <linux/clk.h> calls support software clock gating and
7	  thus are a key power management tool on many systems.
8
9config CLKDEV_LOOKUP
10	bool
11	select HAVE_CLK
12
13config HAVE_CLK_PREPARE
14	bool
15
16config HAVE_LEGACY_CLK # TODO: Remove once all legacy users are migrated
17	bool
18	select HAVE_CLK
19	help
20	  Select this option when the clock API in <linux/clk.h> is implemented
21	  by platform/architecture code. This method is deprecated. Modern
22	  code should select COMMON_CLK instead and not define a custom
23	  'struct clk'.
24
25menuconfig COMMON_CLK
26	bool "Common Clock Framework"
27	depends on !HAVE_LEGACY_CLK
28	select HAVE_CLK_PREPARE
29	select CLKDEV_LOOKUP
30	select SRCU
31	select RATIONAL
32	help
33	  The common clock framework is a single definition of struct
34	  clk, useful across many platforms, as well as an
35	  implementation of the clock API in include/linux/clk.h.
36	  Architectures utilizing the common struct clk should select
37	  this option.
38
39if COMMON_CLK
40
41config COMMON_CLK_PROCFS
42	bool "Common Clock PROCFS interface"
43	depends on COMMON_CLK && PROC_FS && ARCH_ROCKCHIP
44	default n
45	help
46	  Turns on the PROCFS interface for clock.
47
48config COMMON_CLK_WM831X
49	tristate "Clock driver for WM831x/2x PMICs"
50	depends on MFD_WM831X
51	help
52	  Supports the clocking subsystem of the WM831x/2x series of
53	  PMICs from Wolfson Microelectronics.
54
55source "drivers/clk/versatile/Kconfig"
56
57config CLK_HSDK
58	bool "PLL Driver for HSDK platform"
59	depends on ARC_SOC_HSDK || COMPILE_TEST
60	depends on HAS_IOMEM
61	help
62	  This driver supports the HSDK core, system, ddr, tunnel and hdmi PLLs
63	  control.
64
65config COMMON_CLK_MAX77686
66	tristate "Clock driver for Maxim 77620/77686/77802 MFD"
67	depends on MFD_MAX77686 || MFD_MAX77620 || COMPILE_TEST
68	help
69	  This driver supports Maxim 77620/77686/77802 crystal oscillator
70	  clock.
71
72config COMMON_CLK_MAX9485
73	tristate "Maxim 9485 Programmable Clock Generator"
74	depends on I2C
75	help
76	  This driver supports Maxim 9485 Programmable Audio Clock Generator
77
78config COMMON_CLK_RK808
79	tristate "Clock driver for RK805/RK808/RK809/RK817/RK818"
80	depends on MFD_RK808
81	help
82	  This driver supports RK805, RK809 and RK817, RK808 and RK818 crystal oscillator clock.
83	  These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
84	  Clkout1 is always on, Clkout2 can off by control register.
85
86config COMMON_CLK_HI655X
87	tristate "Clock driver for Hi655x" if EXPERT
88	depends on (MFD_HI655X_PMIC || COMPILE_TEST)
89	depends on REGMAP
90	default MFD_HI655X_PMIC
91	help
92	  This driver supports the hi655x PMIC clock. This
93	  multi-function device has one fixed-rate oscillator, clocked
94	  at 32KHz.
95
96config COMMON_CLK_SCMI
97	tristate "Clock driver controlled via SCMI interface"
98	depends on ARM_SCMI_PROTOCOL || COMPILE_TEST
99	help
100	  This driver provides support for clocks that are controlled
101	  by firmware that implements the SCMI interface.
102
103	  This driver uses SCMI Message Protocol to interact with the
104	  firmware providing all the clock controls.
105
106config COMMON_CLK_SCPI
107	tristate "Clock driver controlled via SCPI interface"
108	depends on ARM_SCPI_PROTOCOL || COMPILE_TEST
109	help
110	  This driver provides support for clocks that are controlled
111	  by firmware that implements the SCPI interface.
112
113	  This driver uses SCPI Message Protocol to interact with the
114	  firmware providing all the clock controls.
115
116config COMMON_CLK_SI5341
117	tristate "Clock driver for SiLabs 5341 and 5340 A/B/C/D devices"
118	depends on I2C
119	select REGMAP_I2C
120	help
121	  This driver supports Silicon Labs Si5341 and Si5340 programmable clock
122	  generators. Not all features of these chips are currently supported
123	  by the driver, in particular it only supports XTAL input. The chip can
124	  be pre-programmed to support other configurations and features not yet
125	  implemented in the driver.
126
127config COMMON_CLK_SI5351
128	tristate "Clock driver for SiLabs 5351A/B/C"
129	depends on I2C
130	select REGMAP_I2C
131	help
132	  This driver supports Silicon Labs 5351A/B/C programmable clock
133	  generators.
134
135config COMMON_CLK_SI514
136	tristate "Clock driver for SiLabs 514 devices"
137	depends on I2C
138	depends on OF
139	select REGMAP_I2C
140	help
141	  This driver supports the Silicon Labs 514 programmable clock
142	  generator.
143
144config COMMON_CLK_SI544
145	tristate "Clock driver for SiLabs 544 devices"
146	depends on I2C
147	select REGMAP_I2C
148	help
149	  This driver supports the Silicon Labs 544 programmable clock
150	  generator.
151
152config COMMON_CLK_SI570
153	tristate "Clock driver for SiLabs 570 and compatible devices"
154	depends on I2C
155	depends on OF
156	select REGMAP_I2C
157	help
158	  This driver supports Silicon Labs 570/571/598/599 programmable
159	  clock generators.
160
161config COMMON_CLK_BM1880
162	bool "Clock driver for Bitmain BM1880 SoC"
163	depends on ARCH_BITMAIN || COMPILE_TEST
164	default ARCH_BITMAIN
165	help
166	  This driver supports the clocks on Bitmain BM1880 SoC.
167
168config COMMON_CLK_CDCE706
169	tristate "Clock driver for TI CDCE706 clock synthesizer"
170	depends on I2C
171	select REGMAP_I2C
172	help
173	  This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
174
175config COMMON_CLK_CDCE925
176	tristate "Clock driver for TI CDCE913/925/937/949 devices"
177	depends on I2C
178	depends on OF
179	select REGMAP_I2C
180	help
181	  This driver supports the TI CDCE913/925/937/949 programmable clock
182	  synthesizer. Each chip has different number of PLLs and outputs.
183	  For example, the CDCE925 contains two PLLs with spread-spectrum
184	  clocking support and five output dividers. The driver only supports
185	  the following setup, and uses a fixed setting for the output muxes.
186	  Y1 is derived from the input clock
187	  Y2 and Y3 derive from PLL1
188	  Y4 and Y5 derive from PLL2
189	  Given a target output frequency, the driver will set the PLL and
190	  divider to best approximate the desired output.
191
192config COMMON_CLK_CS2000_CP
193	tristate "Clock driver for CS2000 Fractional-N Clock Synthesizer & Clock Multiplier"
194	depends on I2C
195	help
196	  If you say yes here you get support for the CS2000 clock multiplier.
197
198config COMMON_CLK_FSL_SAI
199	bool "Clock driver for BCLK of Freescale SAI cores"
200	depends on ARCH_LAYERSCAPE || COMPILE_TEST
201	help
202	  This driver supports the Freescale SAI (Synchronous Audio Interface)
203	  to be used as a generic clock output. Some SoCs have restrictions
204	  regarding the possible pin multiplexer settings. Eg. on some SoCs
205	  two SAI interfaces can only be enabled together. If just one is
206	  needed, the BCLK pin of the second one can be used as general
207	  purpose clock output. Ideally, it can be used to drive an audio
208	  codec (sometimes known as MCLK).
209
210config COMMON_CLK_GEMINI
211	bool "Clock driver for Cortina Systems Gemini SoC"
212	depends on ARCH_GEMINI || COMPILE_TEST
213	select MFD_SYSCON
214	select RESET_CONTROLLER
215	help
216	  This driver supports the SoC clocks on the Cortina Systems Gemini
217	  platform, also known as SL3516 or CS3516.
218
219config COMMON_CLK_ASPEED
220	bool "Clock driver for Aspeed BMC SoCs"
221	depends on ARCH_ASPEED || COMPILE_TEST
222	default ARCH_ASPEED
223	select MFD_SYSCON
224	select RESET_CONTROLLER
225	help
226	  This driver supports the SoC clocks on the Aspeed BMC platforms.
227
228	  The G4 and G5 series, including the ast2400 and ast2500, are supported
229	  by this driver.
230
231config COMMON_CLK_S2MPS11
232	tristate "Clock driver for S2MPS1X/S5M8767 MFD"
233	depends on MFD_SEC_CORE || COMPILE_TEST
234	help
235	  This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
236	  clock. These multi-function devices have two (S2MPS14) or three
237	  (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
238
239config CLK_TWL6040
240	tristate "External McPDM functional clock from twl6040"
241	depends on TWL6040_CORE
242	help
243	  Enable the external functional clock support on OMAP4+ platforms for
244	  McPDM. McPDM module is using the external bit clock on the McPDM bus
245	  as functional clock.
246
247config COMMON_CLK_AXI_CLKGEN
248	tristate "AXI clkgen driver"
249	depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST
250	help
251	  Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
252	  FPGAs. It is commonly used in Analog Devices' reference designs.
253
254config CLK_QORIQ
255	bool "Clock driver for Freescale QorIQ platforms"
256	depends on (PPC_E500MC || ARM || ARM64 || COMPILE_TEST) && OF
257	help
258	  This adds the clock driver support for Freescale QorIQ platforms
259	  using common clock framework.
260
261config CLK_LS1028A_PLLDIG
262        tristate "Clock driver for LS1028A Display output"
263        depends on ARCH_LAYERSCAPE || COMPILE_TEST
264        default ARCH_LAYERSCAPE
265        help
266          This driver support the Display output interfaces(LCD, DPHY) pixel clocks
267          of the QorIQ Layerscape LS1028A, as implemented TSMC CLN28HPM PLL. Not all
268          features of the PLL are currently supported by the driver. By default,
269          configured bypass mode with this PLL.
270
271config COMMON_CLK_XGENE
272	bool "Clock driver for APM XGene SoC"
273	default ARCH_XGENE
274	depends on ARM64 || COMPILE_TEST
275	help
276	  Support for the APM X-Gene SoC reference, PLL, and device clocks.
277
278config COMMON_CLK_LOCHNAGAR
279	tristate "Cirrus Logic Lochnagar clock driver"
280	depends on MFD_LOCHNAGAR
281	help
282	  This driver supports the clocking features of the Cirrus Logic
283	  Lochnagar audio development board.
284
285config COMMON_CLK_NXP
286	def_bool COMMON_CLK && (ARCH_LPC18XX || ARCH_LPC32XX)
287	select REGMAP_MMIO if ARCH_LPC32XX
288	select MFD_SYSCON if ARCH_LPC18XX
289	help
290	  Support for clock providers on NXP platforms.
291
292config COMMON_CLK_PALMAS
293	tristate "Clock driver for TI Palmas devices"
294	depends on MFD_PALMAS
295	help
296	  This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
297	  using common clock framework.
298
299config COMMON_CLK_PWM
300	tristate "Clock driver for PWMs used as clock outputs"
301	depends on PWM
302	help
303	  Adapter driver so that any PWM output can be (mis)used as clock signal
304	  at 50% duty cycle.
305
306config COMMON_CLK_PXA
307	def_bool COMMON_CLK && ARCH_PXA
308	help
309	  Support for the Marvell PXA SoC.
310
311config COMMON_CLK_PIC32
312	def_bool COMMON_CLK && MACH_PIC32
313
314config COMMON_CLK_OXNAS
315	bool "Clock driver for the OXNAS SoC Family"
316	depends on ARCH_OXNAS || COMPILE_TEST
317	select MFD_SYSCON
318	help
319	  Support for the OXNAS SoC Family clocks.
320
321config COMMON_CLK_VC5
322	tristate "Clock driver for IDT VersaClock 5,6 devices"
323	depends on I2C
324	depends on OF
325	select REGMAP_I2C
326	help
327	  This driver supports the IDT VersaClock 5 and VersaClock 6
328	  programmable clock generators.
329
330config COMMON_CLK_STM32MP157
331	def_bool COMMON_CLK && MACH_STM32MP157
332	help
333	  Support for stm32mp157 SoC family clocks
334
335config COMMON_CLK_STM32F
336	def_bool COMMON_CLK && (MACH_STM32F429 || MACH_STM32F469 || MACH_STM32F746)
337	help
338	  Support for stm32f4 and stm32f7 SoC families clocks
339
340config COMMON_CLK_STM32H7
341	def_bool COMMON_CLK && MACH_STM32H743
342	help
343	  Support for stm32h7 SoC family clocks
344
345config COMMON_CLK_MMP2
346	def_bool COMMON_CLK && (MACH_MMP2_DT || MACH_MMP3_DT)
347	help
348	  Support for Marvell MMP2 and MMP3 SoC clocks
349
350config COMMON_CLK_MMP2_AUDIO
351        tristate "Clock driver for MMP2 Audio subsystem"
352        depends on COMMON_CLK_MMP2 || COMPILE_TEST
353        help
354          This driver supports clocks for Audio subsystem on MMP2 SoC.
355
356config COMMON_CLK_BD718XX
357	tristate "Clock driver for 32K clk gates on ROHM PMICs"
358	depends on MFD_ROHM_BD718XX || MFD_ROHM_BD70528 || MFD_ROHM_BD71828
359	help
360	  This driver supports ROHM BD71837, ROHM BD71847, ROHM BD71828 and
361	  ROHM BD70528 PMICs clock gates.
362
363config COMMON_CLK_FIXED_MMIO
364	bool "Clock driver for Memory Mapped Fixed values"
365	depends on COMMON_CLK && OF
366	help
367	  Support for Memory Mapped IO Fixed clocks
368
369source "drivers/clk/actions/Kconfig"
370source "drivers/clk/analogbits/Kconfig"
371source "drivers/clk/baikal-t1/Kconfig"
372source "drivers/clk/bcm/Kconfig"
373source "drivers/clk/hisilicon/Kconfig"
374source "drivers/clk/imgtec/Kconfig"
375source "drivers/clk/imx/Kconfig"
376source "drivers/clk/ingenic/Kconfig"
377source "drivers/clk/keystone/Kconfig"
378source "drivers/clk/mediatek/Kconfig"
379source "drivers/clk/meson/Kconfig"
380source "drivers/clk/mvebu/Kconfig"
381source "drivers/clk/qcom/Kconfig"
382source "drivers/clk/renesas/Kconfig"
383source "drivers/clk/rockchip/Kconfig"
384source "drivers/clk/samsung/Kconfig"
385source "drivers/clk/sifive/Kconfig"
386source "drivers/clk/sprd/Kconfig"
387source "drivers/clk/sunxi/Kconfig"
388source "drivers/clk/sunxi-ng/Kconfig"
389source "drivers/clk/tegra/Kconfig"
390source "drivers/clk/ti/Kconfig"
391source "drivers/clk/uniphier/Kconfig"
392source "drivers/clk/x86/Kconfig"
393source "drivers/clk/zynqmp/Kconfig"
394
395endif
396