1 /****************************************************************************** 2 * 3 * Copyright(c) 2007 - 2017 Realtek Corporation. 4 * 5 * This program is free software; you can redistribute it and/or modify it 6 * under the terms of version 2 of the GNU General Public License as 7 * published by the Free Software Foundation. 8 * 9 * This program is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 12 * more details. 13 * 14 *****************************************************************************/ 15 16 17 #ifndef __ODM_DBG_H__ 18 #define __ODM_DBG_H__ 19 20 /*#define DEBUG_VERSION "1.1"*/ /*2015.07.29 YuChen*/ 21 /*#define DEBUG_VERSION "1.2"*/ /*2015.08.28 Dino*/ 22 /*#define DEBUG_VERSION "1.3"*/ /*2016.04.28 YuChen*/ 23 #define DEBUG_VERSION "1.4" /*2017.03.13 Dino*/ 24 25 /* ----------------------------------------------------------------------------- 26 * Define the debug levels 27 * 28 * 1. DBG_TRACE and DBG_LOUD are used for normal cases. 29 * So that, they can help SW engineer to develope or trace states changed 30 * and also help HW enginner to trace every operation to and from HW, 31 * e.g IO, Tx, Rx. 32 * 33 * 2. DBG_WARNNING and DBG_SERIOUS are used for unusual or error cases, 34 * which help us to debug SW or HW. 35 * 36 * ----------------------------------------------------------------------------- 37 * 38 * Never used in a call to ODM_RT_TRACE()! 39 * */ 40 #define ODM_DBG_OFF 1 41 42 /* 43 * Fatal bug. 44 * For example, Tx/Rx/IO locked up, OS hangs, memory access violation, 45 * resource allocation failed, unexpected HW behavior, HW BUG and so on. 46 * */ 47 #define ODM_DBG_SERIOUS 2 48 49 /* 50 * Abnormal, rare, or unexpeted cases. 51 * For example, IRP/Packet/OID canceled, device suprisely unremoved and so on. 52 * */ 53 #define ODM_DBG_WARNING 3 54 55 /* 56 * Normal case with useful information about current SW or HW state. 57 * For example, Tx/Rx descriptor to fill, Tx/Rx descriptor completed status, 58 * SW protocol state change, dynamic mechanism state change and so on. 59 * */ 60 #define ODM_DBG_LOUD 4 61 62 /* 63 * Normal case with detail execution flow or information. 64 * */ 65 #define ODM_DBG_TRACE 5 66 67 /*FW DBG MSG*/ 68 #define RATE_DECISION BIT(0) 69 #define INIT_RA_TABLE BIT(1) 70 #define RATE_UP BIT(2) 71 #define RATE_DOWN BIT(3) 72 #define TRY_DONE BIT(4) 73 #define RA_H2C BIT(5) 74 #define F_RATE_AP_RPT BIT(7) 75 76 /* ----------------------------------------------------------------------------- 77 * Define the tracing components 78 * 79 * ----------------------------------------------------------------------------- 80 *BB FW Functions*/ 81 #define PHYDM_FW_COMP_RA BIT(0) 82 #define PHYDM_FW_COMP_MU BIT(1) 83 #define PHYDM_FW_COMP_PATH_DIV BIT(2) 84 #define PHYDM_FW_COMP_PT BIT(3) 85 86 87 88 89 /*------------------------Export Marco Definition---------------------------*/ 90 91 #define config_phydm_read_txagc_check(data) (data != INVALID_TXAGC_DATA) 92 93 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) 94 #define dbg_print DbgPrint 95 #define dcmd_printf DCMD_Printf 96 #define dcmd_scanf DCMD_Scanf 97 #define RT_PRINTK dbg_print 98 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) && defined(DM_ODM_CE_MAC80211) 99 #define dbg_print(args...) 100 #define RT_PRINTK(fmt, args...) \ 101 RT_TRACE(((struct rtl_priv *)p_dm->adapter), \ 102 COMP_PHYDM, DBG_DMESG, fmt, ## args) 103 #define RT_DISP(dbgtype, dbgflag, printstr) 104 #elif (DM_ODM_SUPPORT_TYPE == ODM_CE) 105 #define dbg_print printk 106 #define RT_PRINTK(fmt, args...) dbg_print(fmt, ## args) 107 #define RT_DISP(dbgtype, dbgflag, printstr) 108 #else 109 #define dbg_print panic_printk 110 /*#define RT_PRINTK(fmt, args...) dbg_print("%s(): " fmt, __FUNCTION__, ## args);*/ 111 #define RT_PRINTK(args...) dbg_print(args) 112 #endif 113 114 #ifndef ASSERT 115 #define ASSERT(expr) 116 #endif 117 118 #if DBG 119 #define PHYDM_DBG(p_dm, comp, fmt) \ 120 do { \ 121 if ((comp) & (p_dm->debug_components)) { \ 122 \ 123 dbg_print("[PHYDM] "); \ 124 RT_PRINTK fmt; \ 125 } \ 126 } while (0) 127 128 #define PHYDM_DBG_F(p_dm, comp, fmt) do {\ 129 if ((comp) & p_dm->debug_components) { \ 130 \ 131 RT_PRINTK fmt; \ 132 } \ 133 } while (0) 134 135 #define PHYDM_PRINT_ADDR(p_dm, comp, title_str, ptr) do {\ 136 if ((comp) & p_dm->debug_components) { \ 137 \ 138 int __i; \ 139 u8 *__ptr = (u8 *)ptr; \ 140 dbg_print("[PHYDM] "); \ 141 dbg_print(title_str); \ 142 dbg_print(" "); \ 143 for (__i = 0; __i < 6; __i++) \ 144 dbg_print("%02X%s", __ptr[__i], (__i == 5) ? "" : "-"); \ 145 dbg_print("\n"); \ 146 } \ 147 } while (0) 148 149 #define ODM_RT_TRACE(p_dm, comp, level, fmt) \ 150 do { \ 151 if (((comp) & p_dm->debug_components) && (level <= p_dm->debug_level || level == ODM_DBG_SERIOUS)) { \ 152 \ 153 if (p_dm->support_ic_type == ODM_RTL8188E) \ 154 dbg_print("[PhyDM-8188E] "); \ 155 else if (p_dm->support_ic_type == ODM_RTL8192E) \ 156 dbg_print("[PhyDM-8192E] "); \ 157 else if (p_dm->support_ic_type == ODM_RTL8812) \ 158 dbg_print("[PhyDM-8812A] "); \ 159 else if (p_dm->support_ic_type == ODM_RTL8821) \ 160 dbg_print("[PhyDM-8821A] "); \ 161 else if (p_dm->support_ic_type == ODM_RTL8814A) \ 162 dbg_print("[PhyDM-8814A] "); \ 163 else if (p_dm->support_ic_type == ODM_RTL8703B) \ 164 dbg_print("[PhyDM-8703B] "); \ 165 else if (p_dm->support_ic_type == ODM_RTL8822B) \ 166 dbg_print("[PhyDM-8822B] "); \ 167 else if (p_dm->support_ic_type == ODM_RTL8188F) \ 168 dbg_print("[PhyDM-8188F] "); \ 169 RT_PRINTK fmt; \ 170 } \ 171 } while (0) 172 173 #else 174 #define PHYDM_DBG(p_dm, comp, fmt) 175 #define PHYDM_DBG_F(p_dm, comp, fmt) 176 #define PHYDM_PRINT_ADDR(p_dm, comp, title_str, ptr) 177 178 #define ODM_RT_TRACE(p_dm, comp, level, fmt) 179 #endif 180 181 #define BB_DBGPORT_PRIORITY_3 3 /*Debug function (the highest priority)*/ 182 #define BB_DBGPORT_PRIORITY_2 2 /*Check hang function & Strong function*/ 183 #define BB_DBGPORT_PRIORITY_1 1 /*Watch dog function*/ 184 #define BB_DBGPORT_RELEASE 0 /*Init value (the lowest priority)*/ 185 186 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) 187 #define PHYDM_DBGPRINT 0 188 #define PHYDM_SSCANF(x, y, z) dcmd_scanf(x, y, z) 189 #define PHYDM_VAST_INFO_SNPRINTF PHYDM_SNPRINTF 190 #if (PHYDM_DBGPRINT == 1) 191 #define PHYDM_SNPRINTF(msg) \ 192 do {\ 193 rsprintf msg;\ 194 dbg_print(output);\ 195 } while (0) 196 #else 197 #define PHYDM_SNPRINTF(msg) \ 198 do {\ 199 rsprintf msg;\ 200 dcmd_printf(output);\ 201 } while (0) 202 #endif 203 #else 204 #if (DM_ODM_SUPPORT_TYPE == ODM_CE) || defined(__OSK__) 205 #define PHYDM_DBGPRINT 0 206 #else 207 #define PHYDM_DBGPRINT 1 208 #endif 209 #define MAX_ARGC 20 210 #define MAX_ARGV 16 211 #define DCMD_DECIMAL "%d" 212 #define DCMD_CHAR "%c" 213 #define DCMD_HEX "%x" 214 215 #define PHYDM_SSCANF(x, y, z) sscanf(x, y, z) 216 217 #define PHYDM_VAST_INFO_SNPRINTF(msg)\ 218 do {\ 219 snprintf msg;\ 220 dbg_print(output);\ 221 } while (0) 222 223 #if (PHYDM_DBGPRINT == 1) 224 #define PHYDM_SNPRINTF(msg)\ 225 do {\ 226 snprintf msg;\ 227 dbg_print(output);\ 228 } while (0) 229 #else 230 #define PHYDM_SNPRINTF(msg)\ 231 do {\ 232 if (out_len > used)\ 233 used += snprintf msg;\ 234 } while (0) 235 #endif 236 #endif 237 238 void 239 phydm_init_debug_setting( 240 struct PHY_DM_STRUCT *p_dm 241 ); 242 243 void 244 phydm_bb_dbg_port_header_sel( 245 void *p_dm_void, 246 u32 header_idx 247 ); 248 249 u8 250 phydm_set_bb_dbg_port( 251 void *p_dm_void, 252 u8 curr_dbg_priority, 253 u32 debug_port 254 ); 255 256 void 257 phydm_release_bb_dbg_port( 258 void *p_dm_void 259 ); 260 261 u32 262 phydm_get_bb_dbg_port_value( 263 void *p_dm_void 264 ); 265 266 void 267 phydm_reset_rx_rate_distribution( 268 struct PHY_DM_STRUCT *p_dm_odm 269 ); 270 271 void 272 phydm_rx_rate_distribution 273 ( 274 void *p_dm_void 275 ); 276 277 void 278 phydm_get_avg_phystatus_val 279 ( 280 void *p_dm_void 281 ); 282 283 void 284 phydm_get_phy_statistic( 285 void *p_dm_void 286 ); 287 288 void 289 phydm_basic_dbg_message( 290 void *p_dm_void 291 ); 292 293 void 294 phydm_basic_profile( 295 void *p_dm_void, 296 u32 *_used, 297 char *output, 298 u32 *_out_len 299 ); 300 #if (DM_ODM_SUPPORT_TYPE & (ODM_CE | ODM_AP)) 301 s32 302 phydm_cmd( 303 struct PHY_DM_STRUCT *p_dm, 304 char *input, 305 u32 in_len, 306 u8 flag, 307 char *output, 308 u32 out_len 309 ); 310 #endif 311 void 312 phydm_cmd_parser( 313 struct PHY_DM_STRUCT *p_dm, 314 char input[][16], 315 u32 input_num, 316 u8 flag, 317 char *output, 318 u32 out_len 319 ); 320 321 #if (DM_ODM_SUPPORT_TYPE == ODM_WIN) 322 void phydm_sbd_check( 323 struct PHY_DM_STRUCT *p_dm 324 ); 325 326 void phydm_sbd_callback( 327 struct timer_list *p_timer 328 ); 329 330 void phydm_sbd_workitem_callback( 331 void *p_context 332 ); 333 #endif 334 335 void 336 phydm_fw_trace_en_h2c( 337 void *p_dm_void, 338 boolean enable, 339 u32 fw_debug_component, 340 u32 monitor_mode, 341 u32 macid 342 ); 343 344 void 345 phydm_fw_trace_handler( 346 void *p_dm_void, 347 u8 *cmd_buf, 348 u8 cmd_len 349 ); 350 351 void 352 phydm_fw_trace_handler_code( 353 void *p_dm_void, 354 u8 *buffer, 355 u8 cmd_len 356 ); 357 358 void 359 phydm_fw_trace_handler_8051( 360 void *p_dm_void, 361 u8 *cmd_buf, 362 u8 cmd_len 363 ); 364 365 #endif /* __ODM_DBG_H__ */ 366