1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 2 /* 3 * 4 * (C) COPYRIGHT 2019-2022 ARM Limited. All rights reserved. 5 * 6 * This program is free software and is provided to you under the terms of the 7 * GNU General Public License version 2 as published by the Free Software 8 * Foundation, and any use by you of this program is subject to the terms 9 * of such GNU license. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, you can access it online at 18 * http://www.gnu.org/licenses/gpl-2.0.html. 19 * 20 */ 21 22 #ifndef _UAPI_BASE_JM_KERNEL_H_ 23 #define _UAPI_BASE_JM_KERNEL_H_ 24 25 #include <linux/types.h> 26 #include "../mali_base_common_kernel.h" 27 28 /* Memory allocation, access/hint flags & mask specific to JM GPU. 29 * 30 * See base_mem_alloc_flags. 31 */ 32 33 /* Used as BASE_MEM_FIXED in other backends */ 34 #define BASE_MEM_RESERVED_BIT_8 ((base_mem_alloc_flags)1 << 8) 35 36 /** 37 * BASE_MEM_RESERVED_BIT_19 - Bit 19 is reserved. 38 * 39 * Do not remove, use the next unreserved bit for new flags 40 */ 41 #define BASE_MEM_RESERVED_BIT_19 ((base_mem_alloc_flags)1 << 19) 42 43 /** 44 * BASE_MEM_TILER_ALIGN_TOP - Memory starting from the end of the initial commit is aligned 45 * to 'extension' pages, where 'extension' must be a power of 2 and no more than 46 * BASE_MEM_TILER_ALIGN_TOP_EXTENSION_MAX_PAGES 47 */ 48 #define BASE_MEM_TILER_ALIGN_TOP ((base_mem_alloc_flags)1 << 20) 49 50 /* Use the GPU VA chosen by the kernel client */ 51 #define BASE_MEM_FLAG_MAP_FIXED ((base_mem_alloc_flags)1 << 27) 52 53 /* Force trimming of JIT allocations when creating a new allocation */ 54 #define BASEP_MEM_PERFORM_JIT_TRIM ((base_mem_alloc_flags)1 << 29) 55 56 /* Note that the number of bits used for base_mem_alloc_flags 57 * must be less than BASE_MEM_FLAGS_NR_BITS !!! 58 */ 59 60 /* A mask of all the flags which are only valid for allocations within kbase, 61 * and may not be passed from user space. 62 */ 63 #define BASEP_MEM_FLAGS_KERNEL_ONLY \ 64 (BASEP_MEM_PERMANENT_KERNEL_MAPPING | BASEP_MEM_NO_USER_FREE | \ 65 BASE_MEM_FLAG_MAP_FIXED | BASEP_MEM_PERFORM_JIT_TRIM) 66 67 /* A mask of all currently reserved flags 68 */ 69 #define BASE_MEM_FLAGS_RESERVED \ 70 (BASE_MEM_RESERVED_BIT_8 | BASE_MEM_RESERVED_BIT_19) 71 72 73 /* Similar to BASE_MEM_TILER_ALIGN_TOP, memory starting from the end of the 74 * initial commit is aligned to 'extension' pages, where 'extension' must be a power 75 * of 2 and no more than BASE_MEM_TILER_ALIGN_TOP_EXTENSION_MAX_PAGES 76 */ 77 #define BASE_JIT_ALLOC_MEM_TILER_ALIGN_TOP (1 << 0) 78 79 /** 80 * BASE_JIT_ALLOC_HEAP_INFO_IS_SIZE - If set, the heap info address points 81 * to a __u32 holding the used size in bytes; 82 * otherwise it points to a __u64 holding the lowest address of unused memory. 83 */ 84 #define BASE_JIT_ALLOC_HEAP_INFO_IS_SIZE (1 << 1) 85 86 /** 87 * BASE_JIT_ALLOC_VALID_FLAGS - Valid set of just-in-time memory allocation flags 88 * 89 * Note: BASE_JIT_ALLOC_HEAP_INFO_IS_SIZE cannot be set if heap_info_gpu_addr 90 * in %base_jit_alloc_info is 0 (atom with BASE_JIT_ALLOC_HEAP_INFO_IS_SIZE set 91 * and heap_info_gpu_addr being 0 will be rejected). 92 */ 93 #define BASE_JIT_ALLOC_VALID_FLAGS \ 94 (BASE_JIT_ALLOC_MEM_TILER_ALIGN_TOP | BASE_JIT_ALLOC_HEAP_INFO_IS_SIZE) 95 96 /* Bitpattern describing the ::base_context_create_flags that can be 97 * passed to base_context_init() 98 */ 99 #define BASEP_CONTEXT_CREATE_ALLOWED_FLAGS \ 100 (BASE_CONTEXT_CCTX_EMBEDDED | BASEP_CONTEXT_CREATE_KERNEL_FLAGS) 101 102 /* 103 * Private flags used on the base context 104 * 105 * These start at bit 31, and run down to zero. 106 * 107 * They share the same space as base_context_create_flags, and so must 108 * not collide with them. 109 */ 110 111 /* Private flag tracking whether job descriptor dumping is disabled */ 112 #define BASEP_CONTEXT_FLAG_JOB_DUMP_DISABLED \ 113 ((base_context_create_flags)(1 << 31)) 114 115 /* Flags for base tracepoint specific to JM */ 116 #define BASE_TLSTREAM_FLAGS_MASK (BASE_TLSTREAM_ENABLE_LATENCY_TRACEPOINTS | \ 117 BASE_TLSTREAM_JOB_DUMPING_ENABLED) 118 /* 119 * Dependency stuff, keep it private for now. May want to expose it if 120 * we decide to make the number of semaphores a configurable 121 * option. 122 */ 123 #define BASE_JD_ATOM_COUNT 256 124 125 /* Maximum number of concurrent render passes. 126 */ 127 #define BASE_JD_RP_COUNT (256) 128 129 /* Set/reset values for a software event */ 130 #define BASE_JD_SOFT_EVENT_SET ((unsigned char)1) 131 #define BASE_JD_SOFT_EVENT_RESET ((unsigned char)0) 132 133 /** 134 * struct base_jd_udata - Per-job data 135 * 136 * @blob: per-job data array 137 * 138 * This structure is used to store per-job data, and is completely unused 139 * by the Base driver. It can be used to store things such as callback 140 * function pointer, data to handle job completion. It is guaranteed to be 141 * untouched by the Base driver. 142 */ 143 struct base_jd_udata { 144 __u64 blob[2]; 145 }; 146 147 /** 148 * typedef base_jd_dep_type - Job dependency type. 149 * 150 * A flags field will be inserted into the atom structure to specify whether a 151 * dependency is a data or ordering dependency (by putting it before/after 152 * 'core_req' in the structure it should be possible to add without changing 153 * the structure size). 154 * When the flag is set for a particular dependency to signal that it is an 155 * ordering only dependency then errors will not be propagated. 156 */ 157 typedef __u8 base_jd_dep_type; 158 159 #define BASE_JD_DEP_TYPE_INVALID (0) /**< Invalid dependency */ 160 #define BASE_JD_DEP_TYPE_DATA (1U << 0) /**< Data dependency */ 161 #define BASE_JD_DEP_TYPE_ORDER (1U << 1) /**< Order dependency */ 162 163 /** 164 * typedef base_jd_core_req - Job chain hardware requirements. 165 * 166 * A job chain must specify what GPU features it needs to allow the 167 * driver to schedule the job correctly. By not specifying the 168 * correct settings can/will cause an early job termination. Multiple 169 * values can be ORed together to specify multiple requirements. 170 * Special case is ::BASE_JD_REQ_DEP, which is used to express complex 171 * dependencies, and that doesn't execute anything on the hardware. 172 */ 173 typedef __u32 base_jd_core_req; 174 175 /* Requirements that come from the HW */ 176 177 /* No requirement, dependency only 178 */ 179 #define BASE_JD_REQ_DEP ((base_jd_core_req)0) 180 181 /* Requires fragment shaders 182 */ 183 #define BASE_JD_REQ_FS ((base_jd_core_req)1 << 0) 184 185 /* Requires compute shaders 186 * 187 * This covers any of the following GPU job types: 188 * - Vertex Shader Job 189 * - Geometry Shader Job 190 * - An actual Compute Shader Job 191 * 192 * Compare this with BASE_JD_REQ_ONLY_COMPUTE, which specifies that the 193 * job is specifically just the "Compute Shader" job type, and not the "Vertex 194 * Shader" nor the "Geometry Shader" job type. 195 */ 196 #define BASE_JD_REQ_CS ((base_jd_core_req)1 << 1) 197 198 /* Requires tiling */ 199 #define BASE_JD_REQ_T ((base_jd_core_req)1 << 2) 200 201 /* Requires cache flushes */ 202 #define BASE_JD_REQ_CF ((base_jd_core_req)1 << 3) 203 204 /* Requires value writeback */ 205 #define BASE_JD_REQ_V ((base_jd_core_req)1 << 4) 206 207 /* SW-only requirements - the HW does not expose these as part of the job slot 208 * capabilities 209 */ 210 211 /* Requires fragment job with AFBC encoding */ 212 #define BASE_JD_REQ_FS_AFBC ((base_jd_core_req)1 << 13) 213 214 /* SW-only requirement: coalesce completion events. 215 * If this bit is set then completion of this atom will not cause an event to 216 * be sent to userspace, whether successful or not; completion events will be 217 * deferred until an atom completes which does not have this bit set. 218 * 219 * This bit may not be used in combination with BASE_JD_REQ_EXTERNAL_RESOURCES. 220 */ 221 #define BASE_JD_REQ_EVENT_COALESCE ((base_jd_core_req)1 << 5) 222 223 /* SW Only requirement: the job chain requires a coherent core group. We don't 224 * mind which coherent core group is used. 225 */ 226 #define BASE_JD_REQ_COHERENT_GROUP ((base_jd_core_req)1 << 6) 227 228 /* SW Only requirement: The performance counters should be enabled only when 229 * they are needed, to reduce power consumption. 230 */ 231 #define BASE_JD_REQ_PERMON ((base_jd_core_req)1 << 7) 232 233 /* SW Only requirement: External resources are referenced by this atom. 234 * 235 * This bit may not be used in combination with BASE_JD_REQ_EVENT_COALESCE and 236 * BASE_JD_REQ_SOFT_EVENT_WAIT. 237 */ 238 #define BASE_JD_REQ_EXTERNAL_RESOURCES ((base_jd_core_req)1 << 8) 239 240 /* SW Only requirement: Software defined job. Jobs with this bit set will not be 241 * submitted to the hardware but will cause some action to happen within the 242 * driver 243 */ 244 #define BASE_JD_REQ_SOFT_JOB ((base_jd_core_req)1 << 9) 245 246 #define BASE_JD_REQ_SOFT_DUMP_CPU_GPU_TIME (BASE_JD_REQ_SOFT_JOB | 0x1) 247 #define BASE_JD_REQ_SOFT_FENCE_TRIGGER (BASE_JD_REQ_SOFT_JOB | 0x2) 248 #define BASE_JD_REQ_SOFT_FENCE_WAIT (BASE_JD_REQ_SOFT_JOB | 0x3) 249 250 /* 0x4 RESERVED for now */ 251 252 /* SW only requirement: event wait/trigger job. 253 * 254 * - BASE_JD_REQ_SOFT_EVENT_WAIT: this job will block until the event is set. 255 * - BASE_JD_REQ_SOFT_EVENT_SET: this job sets the event, thus unblocks the 256 * other waiting jobs. It completes immediately. 257 * - BASE_JD_REQ_SOFT_EVENT_RESET: this job resets the event, making it 258 * possible for other jobs to wait upon. It completes immediately. 259 */ 260 #define BASE_JD_REQ_SOFT_EVENT_WAIT (BASE_JD_REQ_SOFT_JOB | 0x5) 261 #define BASE_JD_REQ_SOFT_EVENT_SET (BASE_JD_REQ_SOFT_JOB | 0x6) 262 #define BASE_JD_REQ_SOFT_EVENT_RESET (BASE_JD_REQ_SOFT_JOB | 0x7) 263 264 #define BASE_JD_REQ_SOFT_DEBUG_COPY (BASE_JD_REQ_SOFT_JOB | 0x8) 265 266 /* SW only requirement: Just In Time allocation 267 * 268 * This job requests a single or multiple just-in-time allocations through a 269 * list of base_jit_alloc_info structure which is passed via the jc element of 270 * the atom. The number of base_jit_alloc_info structures present in the 271 * list is passed via the nr_extres element of the atom 272 * 273 * It should be noted that the id entry in base_jit_alloc_info must not 274 * be reused until it has been released via BASE_JD_REQ_SOFT_JIT_FREE. 275 * 276 * Should this soft job fail it is expected that a BASE_JD_REQ_SOFT_JIT_FREE 277 * soft job to free the JIT allocation is still made. 278 * 279 * The job will complete immediately. 280 */ 281 #define BASE_JD_REQ_SOFT_JIT_ALLOC (BASE_JD_REQ_SOFT_JOB | 0x9) 282 283 /* SW only requirement: Just In Time free 284 * 285 * This job requests a single or multiple just-in-time allocations created by 286 * BASE_JD_REQ_SOFT_JIT_ALLOC to be freed. The ID list of the just-in-time 287 * allocations is passed via the jc element of the atom. 288 * 289 * The job will complete immediately. 290 */ 291 #define BASE_JD_REQ_SOFT_JIT_FREE (BASE_JD_REQ_SOFT_JOB | 0xa) 292 293 /* SW only requirement: Map external resource 294 * 295 * This job requests external resource(s) are mapped once the dependencies 296 * of the job have been satisfied. The list of external resources are 297 * passed via the jc element of the atom which is a pointer to a 298 * base_external_resource_list. 299 */ 300 #define BASE_JD_REQ_SOFT_EXT_RES_MAP (BASE_JD_REQ_SOFT_JOB | 0xb) 301 302 /* SW only requirement: Unmap external resource 303 * 304 * This job requests external resource(s) are unmapped once the dependencies 305 * of the job has been satisfied. The list of external resources are 306 * passed via the jc element of the atom which is a pointer to a 307 * base_external_resource_list. 308 */ 309 #define BASE_JD_REQ_SOFT_EXT_RES_UNMAP (BASE_JD_REQ_SOFT_JOB | 0xc) 310 311 /* HW Requirement: Requires Compute shaders (but not Vertex or Geometry Shaders) 312 * 313 * This indicates that the Job Chain contains GPU jobs of the 'Compute 314 * Shaders' type. 315 * 316 * In contrast to BASE_JD_REQ_CS, this does not indicate that the Job 317 * Chain contains 'Geometry Shader' or 'Vertex Shader' jobs. 318 */ 319 #define BASE_JD_REQ_ONLY_COMPUTE ((base_jd_core_req)1 << 10) 320 321 /* HW Requirement: Use the base_jd_atom::device_nr field to specify a 322 * particular core group 323 * 324 * If both BASE_JD_REQ_COHERENT_GROUP and this flag are set, this flag 325 * takes priority 326 * 327 * This is only guaranteed to work for BASE_JD_REQ_ONLY_COMPUTE atoms. 328 */ 329 #define BASE_JD_REQ_SPECIFIC_COHERENT_GROUP ((base_jd_core_req)1 << 11) 330 331 /* SW Flag: If this bit is set then the successful completion of this atom 332 * will not cause an event to be sent to userspace 333 */ 334 #define BASE_JD_REQ_EVENT_ONLY_ON_FAILURE ((base_jd_core_req)1 << 12) 335 336 /* SW Flag: If this bit is set then completion of this atom will not cause an 337 * event to be sent to userspace, whether successful or not. 338 */ 339 #define BASEP_JD_REQ_EVENT_NEVER ((base_jd_core_req)1 << 14) 340 341 /* SW Flag: Skip GPU cache clean and invalidation before starting a GPU job. 342 * 343 * If this bit is set then the GPU's cache will not be cleaned and invalidated 344 * until a GPU job starts which does not have this bit set or a job completes 345 * which does not have the BASE_JD_REQ_SKIP_CACHE_END bit set. Do not use 346 * if the CPU may have written to memory addressed by the job since the last job 347 * without this bit set was submitted. 348 */ 349 #define BASE_JD_REQ_SKIP_CACHE_START ((base_jd_core_req)1 << 15) 350 351 /* SW Flag: Skip GPU cache clean and invalidation after a GPU job completes. 352 * 353 * If this bit is set then the GPU's cache will not be cleaned and invalidated 354 * until a GPU job completes which does not have this bit set or a job starts 355 * which does not have the BASE_JD_REQ_SKIP_CACHE_START bit set. Do not use 356 * if the CPU may read from or partially overwrite memory addressed by the job 357 * before the next job without this bit set completes. 358 */ 359 #define BASE_JD_REQ_SKIP_CACHE_END ((base_jd_core_req)1 << 16) 360 361 /* Request the atom be executed on a specific job slot. 362 * 363 * When this flag is specified, it takes precedence over any existing job slot 364 * selection logic. 365 */ 366 #define BASE_JD_REQ_JOB_SLOT ((base_jd_core_req)1 << 17) 367 368 /* SW-only requirement: The atom is the start of a renderpass. 369 * 370 * If this bit is set then the job chain will be soft-stopped if it causes the 371 * GPU to write beyond the end of the physical pages backing the tiler heap, and 372 * committing more memory to the heap would exceed an internal threshold. It may 373 * be resumed after running one of the job chains attached to an atom with 374 * BASE_JD_REQ_END_RENDERPASS set and the same renderpass ID. It may be 375 * resumed multiple times until it completes without memory usage exceeding the 376 * threshold. 377 * 378 * Usually used with BASE_JD_REQ_T. 379 */ 380 #define BASE_JD_REQ_START_RENDERPASS ((base_jd_core_req)1 << 18) 381 382 /* SW-only requirement: The atom is the end of a renderpass. 383 * 384 * If this bit is set then the atom incorporates the CPU address of a 385 * base_jd_fragment object instead of the GPU address of a job chain. 386 * 387 * Which job chain is run depends upon whether the atom with the same renderpass 388 * ID and the BASE_JD_REQ_START_RENDERPASS bit set completed normally or 389 * was soft-stopped when it exceeded an upper threshold for tiler heap memory 390 * usage. 391 * 392 * It also depends upon whether one of the job chains attached to the atom has 393 * already been run as part of the same renderpass (in which case it would have 394 * written unresolved multisampled and otherwise-discarded output to temporary 395 * buffers that need to be read back). The job chain for doing a forced read and 396 * forced write (from/to temporary buffers) is run as many times as necessary. 397 * 398 * Usually used with BASE_JD_REQ_FS. 399 */ 400 #define BASE_JD_REQ_END_RENDERPASS ((base_jd_core_req)1 << 19) 401 402 /* SW-only requirement: The atom needs to run on a limited core mask affinity. 403 * 404 * If this bit is set then the kbase_context.limited_core_mask will be applied 405 * to the affinity. 406 */ 407 #define BASE_JD_REQ_LIMITED_CORE_MASK ((base_jd_core_req)1 << 20) 408 409 /* These requirement bits are currently unused in base_jd_core_req 410 */ 411 #define BASEP_JD_REQ_RESERVED \ 412 (~(BASE_JD_REQ_ATOM_TYPE | BASE_JD_REQ_EXTERNAL_RESOURCES | \ 413 BASE_JD_REQ_EVENT_ONLY_ON_FAILURE | BASEP_JD_REQ_EVENT_NEVER | \ 414 BASE_JD_REQ_EVENT_COALESCE | \ 415 BASE_JD_REQ_COHERENT_GROUP | BASE_JD_REQ_SPECIFIC_COHERENT_GROUP | \ 416 BASE_JD_REQ_FS_AFBC | BASE_JD_REQ_PERMON | \ 417 BASE_JD_REQ_SKIP_CACHE_START | BASE_JD_REQ_SKIP_CACHE_END | \ 418 BASE_JD_REQ_JOB_SLOT | BASE_JD_REQ_START_RENDERPASS | \ 419 BASE_JD_REQ_END_RENDERPASS | BASE_JD_REQ_LIMITED_CORE_MASK)) 420 421 /* Mask of all bits in base_jd_core_req that control the type of the atom. 422 * 423 * This allows dependency only atoms to have flags set 424 */ 425 #define BASE_JD_REQ_ATOM_TYPE \ 426 (BASE_JD_REQ_FS | BASE_JD_REQ_CS | BASE_JD_REQ_T | BASE_JD_REQ_CF | \ 427 BASE_JD_REQ_V | BASE_JD_REQ_SOFT_JOB | BASE_JD_REQ_ONLY_COMPUTE) 428 429 /** 430 * BASE_JD_REQ_SOFT_JOB_TYPE - Mask of all bits in base_jd_core_req that 431 * controls the type of a soft job. 432 */ 433 #define BASE_JD_REQ_SOFT_JOB_TYPE (BASE_JD_REQ_SOFT_JOB | 0x1f) 434 435 /* Returns non-zero value if core requirements passed define a soft job or 436 * a dependency only job. 437 */ 438 #define BASE_JD_REQ_SOFT_JOB_OR_DEP(core_req) \ 439 (((core_req) & BASE_JD_REQ_SOFT_JOB) || \ 440 ((core_req) & BASE_JD_REQ_ATOM_TYPE) == BASE_JD_REQ_DEP) 441 442 /** 443 * enum kbase_jd_atom_state - Atom states 444 * 445 * @KBASE_JD_ATOM_STATE_UNUSED: Atom is not used. 446 * @KBASE_JD_ATOM_STATE_QUEUED: Atom is queued in JD. 447 * @KBASE_JD_ATOM_STATE_IN_JS: Atom has been given to JS (is runnable/running). 448 * @KBASE_JD_ATOM_STATE_HW_COMPLETED: Atom has been completed, but not yet 449 * handed back to job dispatcher for 450 * dependency resolution. 451 * @KBASE_JD_ATOM_STATE_COMPLETED: Atom has been completed, but not yet handed 452 * back to userspace. 453 */ 454 enum kbase_jd_atom_state { 455 KBASE_JD_ATOM_STATE_UNUSED, 456 KBASE_JD_ATOM_STATE_QUEUED, 457 KBASE_JD_ATOM_STATE_IN_JS, 458 KBASE_JD_ATOM_STATE_HW_COMPLETED, 459 KBASE_JD_ATOM_STATE_COMPLETED 460 }; 461 462 /** 463 * typedef base_atom_id - Type big enough to store an atom number in. 464 */ 465 typedef __u8 base_atom_id; 466 467 /** 468 * struct base_dependency - base dependency 469 * 470 * @atom_id: An atom number 471 * @dependency_type: Dependency type 472 */ 473 struct base_dependency { 474 base_atom_id atom_id; 475 base_jd_dep_type dependency_type; 476 }; 477 478 /** 479 * struct base_jd_fragment - Set of GPU fragment job chains used for rendering. 480 * 481 * @norm_read_norm_write: Job chain for full rendering. 482 * GPU address of a fragment job chain to render in the 483 * circumstance where the tiler job chain did not exceed 484 * its memory usage threshold and no fragment job chain 485 * was previously run for the same renderpass. 486 * It is used no more than once per renderpass. 487 * @norm_read_forced_write: Job chain for starting incremental 488 * rendering. 489 * GPU address of a fragment job chain to render in 490 * the circumstance where the tiler job chain exceeded 491 * its memory usage threshold for the first time and 492 * no fragment job chain was previously run for the 493 * same renderpass. 494 * Writes unresolved multisampled and normally- 495 * discarded output to temporary buffers that must be 496 * read back by a subsequent forced_read job chain 497 * before the renderpass is complete. 498 * It is used no more than once per renderpass. 499 * @forced_read_forced_write: Job chain for continuing incremental 500 * rendering. 501 * GPU address of a fragment job chain to render in 502 * the circumstance where the tiler job chain 503 * exceeded its memory usage threshold again 504 * and a fragment job chain was previously run for 505 * the same renderpass. 506 * Reads unresolved multisampled and 507 * normally-discarded output from temporary buffers 508 * written by a previous forced_write job chain and 509 * writes the same to temporary buffers again. 510 * It is used as many times as required until 511 * rendering completes. 512 * @forced_read_norm_write: Job chain for ending incremental rendering. 513 * GPU address of a fragment job chain to render in the 514 * circumstance where the tiler job chain did not 515 * exceed its memory usage threshold this time and a 516 * fragment job chain was previously run for the same 517 * renderpass. 518 * Reads unresolved multisampled and normally-discarded 519 * output from temporary buffers written by a previous 520 * forced_write job chain in order to complete a 521 * renderpass. 522 * It is used no more than once per renderpass. 523 * 524 * This structure is referenced by the main atom structure if 525 * BASE_JD_REQ_END_RENDERPASS is set in the base_jd_core_req. 526 */ 527 struct base_jd_fragment { 528 __u64 norm_read_norm_write; 529 __u64 norm_read_forced_write; 530 __u64 forced_read_forced_write; 531 __u64 forced_read_norm_write; 532 }; 533 534 /** 535 * typedef base_jd_prio - Base Atom priority. 536 * 537 * Only certain priority levels are actually implemented, as specified by the 538 * BASE_JD_PRIO_<...> definitions below. It is undefined to use a priority 539 * level that is not one of those defined below. 540 * 541 * Priority levels only affect scheduling after the atoms have had dependencies 542 * resolved. For example, a low priority atom that has had its dependencies 543 * resolved might run before a higher priority atom that has not had its 544 * dependencies resolved. 545 * 546 * In general, fragment atoms do not affect non-fragment atoms with 547 * lower priorities, and vice versa. One exception is that there is only one 548 * priority value for each context. So a high-priority (e.g.) fragment atom 549 * could increase its context priority, causing its non-fragment atoms to also 550 * be scheduled sooner. 551 * 552 * The atoms are scheduled as follows with respect to their priorities: 553 * * Let atoms 'X' and 'Y' be for the same job slot who have dependencies 554 * resolved, and atom 'X' has a higher priority than atom 'Y' 555 * * If atom 'Y' is currently running on the HW, then it is interrupted to 556 * allow atom 'X' to run soon after 557 * * If instead neither atom 'Y' nor atom 'X' are running, then when choosing 558 * the next atom to run, atom 'X' will always be chosen instead of atom 'Y' 559 * * Any two atoms that have the same priority could run in any order with 560 * respect to each other. That is, there is no ordering constraint between 561 * atoms of the same priority. 562 * 563 * The sysfs file 'js_ctx_scheduling_mode' is used to control how atoms are 564 * scheduled between contexts. The default value, 0, will cause higher-priority 565 * atoms to be scheduled first, regardless of their context. The value 1 will 566 * use a round-robin algorithm when deciding which context's atoms to schedule 567 * next, so higher-priority atoms can only preempt lower priority atoms within 568 * the same context. See KBASE_JS_SYSTEM_PRIORITY_MODE and 569 * KBASE_JS_PROCESS_LOCAL_PRIORITY_MODE for more details. 570 */ 571 typedef __u8 base_jd_prio; 572 573 /* Medium atom priority. This is a priority higher than BASE_JD_PRIO_LOW */ 574 #define BASE_JD_PRIO_MEDIUM ((base_jd_prio)0) 575 /* High atom priority. This is a priority higher than BASE_JD_PRIO_MEDIUM and 576 * BASE_JD_PRIO_LOW 577 */ 578 #define BASE_JD_PRIO_HIGH ((base_jd_prio)1) 579 /* Low atom priority. */ 580 #define BASE_JD_PRIO_LOW ((base_jd_prio)2) 581 /* Real-Time atom priority. This is a priority higher than BASE_JD_PRIO_HIGH, 582 * BASE_JD_PRIO_MEDIUM, and BASE_JD_PRIO_LOW 583 */ 584 #define BASE_JD_PRIO_REALTIME ((base_jd_prio)3) 585 586 /* Invalid atom priority (max uint8_t value) */ 587 #define BASE_JD_PRIO_INVALID ((base_jd_prio)255) 588 589 /* Count of the number of priority levels. This itself is not a valid 590 * base_jd_prio setting 591 */ 592 #define BASE_JD_NR_PRIO_LEVELS 4 593 594 /** 595 * struct base_jd_atom_v2 - Node of a dependency graph used to submit a 596 * GPU job chain or soft-job to the kernel driver. 597 * 598 * @jc: GPU address of a job chain or (if BASE_JD_REQ_END_RENDERPASS 599 * is set in the base_jd_core_req) the CPU address of a 600 * base_jd_fragment object. 601 * @udata: User data. 602 * @extres_list: List of external resources. 603 * @nr_extres: Number of external resources or JIT allocations. 604 * @jit_id: Zero-terminated array of IDs of just-in-time memory 605 * allocations written to by the atom. When the atom 606 * completes, the value stored at the 607 * &struct_base_jit_alloc_info.heap_info_gpu_addr of 608 * each allocation is read in order to enforce an 609 * overall physical memory usage limit. 610 * @pre_dep: Pre-dependencies. One need to use SETTER function to assign 611 * this field; this is done in order to reduce possibility of 612 * improper assignment of a dependency field. 613 * @atom_number: Unique number to identify the atom. 614 * @prio: Atom priority. Refer to base_jd_prio for more details. 615 * @device_nr: Core group when BASE_JD_REQ_SPECIFIC_COHERENT_GROUP 616 * specified. 617 * @jobslot: Job slot to use when BASE_JD_REQ_JOB_SLOT is specified. 618 * @core_req: Core requirements. 619 * @renderpass_id: Renderpass identifier used to associate an atom that has 620 * BASE_JD_REQ_START_RENDERPASS set in its core requirements 621 * with an atom that has BASE_JD_REQ_END_RENDERPASS set. 622 * @padding: Unused. Must be zero. 623 * 624 * This structure has changed since UK 10.2 for which base_jd_core_req was a 625 * __u16 value. 626 * 627 * In UK 10.3 a core_req field of a __u32 type was added to the end of the 628 * structure, and the place in the structure previously occupied by __u16 629 * core_req was kept but renamed to compat_core_req. 630 * 631 * From UK 11.20 - compat_core_req is now occupied by __u8 jit_id[2]. 632 * Compatibility with UK 10.x from UK 11.y is not handled because 633 * the major version increase prevents this. 634 * 635 * For UK 11.20 jit_id[2] must be initialized to zero. 636 */ 637 struct base_jd_atom_v2 { 638 __u64 jc; 639 struct base_jd_udata udata; 640 __u64 extres_list; 641 __u16 nr_extres; 642 __u8 jit_id[2]; 643 struct base_dependency pre_dep[2]; 644 base_atom_id atom_number; 645 base_jd_prio prio; 646 __u8 device_nr; 647 __u8 jobslot; 648 base_jd_core_req core_req; 649 __u8 renderpass_id; 650 __u8 padding[7]; 651 }; 652 653 /** 654 * struct base_jd_atom - Same as base_jd_atom_v2, but has an extra seq_nr 655 * at the beginning. 656 * 657 * @seq_nr: Sequence number of logical grouping of atoms. 658 * @jc: GPU address of a job chain or (if BASE_JD_REQ_END_RENDERPASS 659 * is set in the base_jd_core_req) the CPU address of a 660 * base_jd_fragment object. 661 * @udata: User data. 662 * @extres_list: List of external resources. 663 * @nr_extres: Number of external resources or JIT allocations. 664 * @jit_id: Zero-terminated array of IDs of just-in-time memory 665 * allocations written to by the atom. When the atom 666 * completes, the value stored at the 667 * &struct_base_jit_alloc_info.heap_info_gpu_addr of 668 * each allocation is read in order to enforce an 669 * overall physical memory usage limit. 670 * @pre_dep: Pre-dependencies. One need to use SETTER function to assign 671 * this field; this is done in order to reduce possibility of 672 * improper assignment of a dependency field. 673 * @atom_number: Unique number to identify the atom. 674 * @prio: Atom priority. Refer to base_jd_prio for more details. 675 * @device_nr: Core group when BASE_JD_REQ_SPECIFIC_COHERENT_GROUP 676 * specified. 677 * @jobslot: Job slot to use when BASE_JD_REQ_JOB_SLOT is specified. 678 * @core_req: Core requirements. 679 * @renderpass_id: Renderpass identifier used to associate an atom that has 680 * BASE_JD_REQ_START_RENDERPASS set in its core requirements 681 * with an atom that has BASE_JD_REQ_END_RENDERPASS set. 682 * @padding: Unused. Must be zero. 683 */ 684 typedef struct base_jd_atom { 685 __u64 seq_nr; 686 __u64 jc; 687 struct base_jd_udata udata; 688 __u64 extres_list; 689 __u16 nr_extres; 690 __u8 jit_id[2]; 691 struct base_dependency pre_dep[2]; 692 base_atom_id atom_number; 693 base_jd_prio prio; 694 __u8 device_nr; 695 __u8 jobslot; 696 base_jd_core_req core_req; 697 __u8 renderpass_id; 698 __u8 padding[7]; 699 } base_jd_atom; 700 701 /* Job chain event code bits 702 * Defines the bits used to create ::base_jd_event_code 703 */ 704 enum { 705 BASE_JD_SW_EVENT_KERNEL = (1u << 15), /* Kernel side event */ 706 BASE_JD_SW_EVENT = (1u << 14), /* SW defined event */ 707 /* Event indicates success (SW events only) */ 708 BASE_JD_SW_EVENT_SUCCESS = (1u << 13), 709 BASE_JD_SW_EVENT_JOB = (0u << 11), /* Job related event */ 710 BASE_JD_SW_EVENT_BAG = (1u << 11), /* Bag related event */ 711 BASE_JD_SW_EVENT_INFO = (2u << 11), /* Misc/info event */ 712 BASE_JD_SW_EVENT_RESERVED = (3u << 11), /* Reserved event type */ 713 /* Mask to extract the type from an event code */ 714 BASE_JD_SW_EVENT_TYPE_MASK = (3u << 11) 715 }; 716 717 /** 718 * enum base_jd_event_code - Job chain event codes 719 * 720 * @BASE_JD_EVENT_RANGE_HW_NONFAULT_START: Start of hardware non-fault status 721 * codes. 722 * Obscurely, BASE_JD_EVENT_TERMINATED 723 * indicates a real fault, because the 724 * job was hard-stopped. 725 * @BASE_JD_EVENT_NOT_STARTED: Can't be seen by userspace, treated as 726 * 'previous job done'. 727 * @BASE_JD_EVENT_STOPPED: Can't be seen by userspace, becomes 728 * TERMINATED, DONE or JOB_CANCELLED. 729 * @BASE_JD_EVENT_TERMINATED: This is actually a fault status code - the job 730 * was hard stopped. 731 * @BASE_JD_EVENT_ACTIVE: Can't be seen by userspace, jobs only returned on 732 * complete/fail/cancel. 733 * @BASE_JD_EVENT_RANGE_HW_NONFAULT_END: End of hardware non-fault status codes. 734 * Obscurely, BASE_JD_EVENT_TERMINATED 735 * indicates a real fault, 736 * because the job was hard-stopped. 737 * @BASE_JD_EVENT_RANGE_HW_FAULT_OR_SW_ERROR_START: Start of hardware fault and 738 * software error status codes. 739 * @BASE_JD_EVENT_RANGE_HW_FAULT_OR_SW_ERROR_END: End of hardware fault and 740 * software error status codes. 741 * @BASE_JD_EVENT_RANGE_SW_SUCCESS_START: Start of software success status 742 * codes. 743 * @BASE_JD_EVENT_RANGE_SW_SUCCESS_END: End of software success status codes. 744 * @BASE_JD_EVENT_RANGE_KERNEL_ONLY_START: Start of kernel-only status codes. 745 * Such codes are never returned to 746 * user-space. 747 * @BASE_JD_EVENT_RANGE_KERNEL_ONLY_END: End of kernel-only status codes. 748 * @BASE_JD_EVENT_DONE: atom has completed successfull 749 * @BASE_JD_EVENT_JOB_CONFIG_FAULT: Atom dependencies configuration error which 750 * shall result in a failed atom 751 * @BASE_JD_EVENT_JOB_POWER_FAULT: The job could not be executed because the 752 * part of the memory system required to access 753 * job descriptors was not powered on 754 * @BASE_JD_EVENT_JOB_READ_FAULT: Reading a job descriptor into the Job 755 * manager failed 756 * @BASE_JD_EVENT_JOB_WRITE_FAULT: Writing a job descriptor from the Job 757 * manager failed 758 * @BASE_JD_EVENT_JOB_AFFINITY_FAULT: The job could not be executed because the 759 * specified affinity mask does not intersect 760 * any available cores 761 * @BASE_JD_EVENT_JOB_BUS_FAULT: A bus access failed while executing a job 762 * @BASE_JD_EVENT_INSTR_INVALID_PC: A shader instruction with an illegal program 763 * counter was executed. 764 * @BASE_JD_EVENT_INSTR_INVALID_ENC: A shader instruction with an illegal 765 * encoding was executed. 766 * @BASE_JD_EVENT_INSTR_TYPE_MISMATCH: A shader instruction was executed where 767 * the instruction encoding did not match the 768 * instruction type encoded in the program 769 * counter. 770 * @BASE_JD_EVENT_INSTR_OPERAND_FAULT: A shader instruction was executed that 771 * contained invalid combinations of operands. 772 * @BASE_JD_EVENT_INSTR_TLS_FAULT: A shader instruction was executed that tried 773 * to access the thread local storage section 774 * of another thread. 775 * @BASE_JD_EVENT_INSTR_ALIGN_FAULT: A shader instruction was executed that 776 * tried to do an unsupported unaligned memory 777 * access. 778 * @BASE_JD_EVENT_INSTR_BARRIER_FAULT: A shader instruction was executed that 779 * failed to complete an instruction barrier. 780 * @BASE_JD_EVENT_DATA_INVALID_FAULT: Any data structure read as part of the job 781 * contains invalid combinations of data. 782 * @BASE_JD_EVENT_TILE_RANGE_FAULT: Tile or fragment shading was asked to 783 * process a tile that is entirely outside the 784 * bounding box of the frame. 785 * @BASE_JD_EVENT_STATE_FAULT: Matches ADDR_RANGE_FAULT. A virtual address 786 * has been found that exceeds the virtual 787 * address range. 788 * @BASE_JD_EVENT_OUT_OF_MEMORY: The tiler ran out of memory when executing a job. 789 * @BASE_JD_EVENT_UNKNOWN: If multiple jobs in a job chain fail, only 790 * the first one the reports an error will set 791 * and return full error information. 792 * Subsequent failing jobs will not update the 793 * error status registers, and may write an 794 * error status of UNKNOWN. 795 * @BASE_JD_EVENT_DELAYED_BUS_FAULT: The GPU received a bus fault for access to 796 * physical memory where the original virtual 797 * address is no longer available. 798 * @BASE_JD_EVENT_SHAREABILITY_FAULT: Matches GPU_SHAREABILITY_FAULT. A cache 799 * has detected that the same line has been 800 * accessed as both shareable and non-shareable 801 * memory from inside the GPU. 802 * @BASE_JD_EVENT_TRANSLATION_FAULT_LEVEL1: A memory access hit an invalid table 803 * entry at level 1 of the translation table. 804 * @BASE_JD_EVENT_TRANSLATION_FAULT_LEVEL2: A memory access hit an invalid table 805 * entry at level 2 of the translation table. 806 * @BASE_JD_EVENT_TRANSLATION_FAULT_LEVEL3: A memory access hit an invalid table 807 * entry at level 3 of the translation table. 808 * @BASE_JD_EVENT_TRANSLATION_FAULT_LEVEL4: A memory access hit an invalid table 809 * entry at level 4 of the translation table. 810 * @BASE_JD_EVENT_PERMISSION_FAULT: A memory access could not be allowed due to 811 * the permission flags set in translation 812 * table 813 * @BASE_JD_EVENT_TRANSTAB_BUS_FAULT_LEVEL1: A bus fault occurred while reading 814 * level 0 of the translation tables. 815 * @BASE_JD_EVENT_TRANSTAB_BUS_FAULT_LEVEL2: A bus fault occurred while reading 816 * level 1 of the translation tables. 817 * @BASE_JD_EVENT_TRANSTAB_BUS_FAULT_LEVEL3: A bus fault occurred while reading 818 * level 2 of the translation tables. 819 * @BASE_JD_EVENT_TRANSTAB_BUS_FAULT_LEVEL4: A bus fault occurred while reading 820 * level 3 of the translation tables. 821 * @BASE_JD_EVENT_ACCESS_FLAG: Matches ACCESS_FLAG_0. A memory access hit a 822 * translation table entry with the ACCESS_FLAG 823 * bit set to zero in level 0 of the 824 * page table, and the DISABLE_AF_FAULT flag 825 * was not set. 826 * @BASE_JD_EVENT_MEM_GROWTH_FAILED: raised for JIT_ALLOC atoms that failed to 827 * grow memory on demand 828 * @BASE_JD_EVENT_JOB_CANCELLED: raised when this atom was hard-stopped or its 829 * dependencies failed 830 * @BASE_JD_EVENT_JOB_INVALID: raised for many reasons, including invalid data 831 * in the atom which overlaps with 832 * BASE_JD_EVENT_JOB_CONFIG_FAULT, or if the 833 * platform doesn't support the feature specified in 834 * the atom. 835 * @BASE_JD_EVENT_DRV_TERMINATED: this is a special event generated to indicate 836 * to userspace that the KBase context has been 837 * destroyed and Base should stop listening for 838 * further events 839 * @BASE_JD_EVENT_REMOVED_FROM_NEXT: raised when an atom that was configured in 840 * the GPU has to be retried (but it has not 841 * started) due to e.g., GPU reset 842 * @BASE_JD_EVENT_END_RP_DONE: this is used for incremental rendering to signal 843 * the completion of a renderpass. This value 844 * shouldn't be returned to userspace but I haven't 845 * seen where it is reset back to JD_EVENT_DONE. 846 * 847 * HW and low-level SW events are represented by event codes. 848 * The status of jobs which succeeded are also represented by 849 * an event code (see @BASE_JD_EVENT_DONE). 850 * Events are usually reported as part of a &struct base_jd_event. 851 * 852 * The event codes are encoded in the following way: 853 * * 10:0 - subtype 854 * * 12:11 - type 855 * * 13 - SW success (only valid if the SW bit is set) 856 * * 14 - SW event (HW event if not set) 857 * * 15 - Kernel event (should never be seen in userspace) 858 * 859 * Events are split up into ranges as follows: 860 * * BASE_JD_EVENT_RANGE_<description>_START 861 * * BASE_JD_EVENT_RANGE_<description>_END 862 * 863 * code is in <description>'s range when: 864 * BASE_JD_EVENT_RANGE_<description>_START <= code < 865 * BASE_JD_EVENT_RANGE_<description>_END 866 * 867 * Ranges can be asserted for adjacency by testing that the END of the previous 868 * is equal to the START of the next. This is useful for optimizing some tests 869 * for range. 870 * 871 * A limitation is that the last member of this enum must explicitly be handled 872 * (with an assert-unreachable statement) in switch statements that use 873 * variables of this type. Otherwise, the compiler warns that we have not 874 * handled that enum value. 875 */ 876 enum base_jd_event_code { 877 /* HW defined exceptions */ 878 BASE_JD_EVENT_RANGE_HW_NONFAULT_START = 0, 879 880 /* non-fatal exceptions */ 881 BASE_JD_EVENT_NOT_STARTED = 0x00, 882 BASE_JD_EVENT_DONE = 0x01, 883 BASE_JD_EVENT_STOPPED = 0x03, 884 BASE_JD_EVENT_TERMINATED = 0x04, 885 BASE_JD_EVENT_ACTIVE = 0x08, 886 887 BASE_JD_EVENT_RANGE_HW_NONFAULT_END = 0x40, 888 BASE_JD_EVENT_RANGE_HW_FAULT_OR_SW_ERROR_START = 0x40, 889 890 /* job exceptions */ 891 BASE_JD_EVENT_JOB_CONFIG_FAULT = 0x40, 892 BASE_JD_EVENT_JOB_POWER_FAULT = 0x41, 893 BASE_JD_EVENT_JOB_READ_FAULT = 0x42, 894 BASE_JD_EVENT_JOB_WRITE_FAULT = 0x43, 895 BASE_JD_EVENT_JOB_AFFINITY_FAULT = 0x44, 896 BASE_JD_EVENT_JOB_BUS_FAULT = 0x48, 897 BASE_JD_EVENT_INSTR_INVALID_PC = 0x50, 898 BASE_JD_EVENT_INSTR_INVALID_ENC = 0x51, 899 BASE_JD_EVENT_INSTR_TYPE_MISMATCH = 0x52, 900 BASE_JD_EVENT_INSTR_OPERAND_FAULT = 0x53, 901 BASE_JD_EVENT_INSTR_TLS_FAULT = 0x54, 902 BASE_JD_EVENT_INSTR_BARRIER_FAULT = 0x55, 903 BASE_JD_EVENT_INSTR_ALIGN_FAULT = 0x56, 904 BASE_JD_EVENT_DATA_INVALID_FAULT = 0x58, 905 BASE_JD_EVENT_TILE_RANGE_FAULT = 0x59, 906 BASE_JD_EVENT_STATE_FAULT = 0x5A, 907 BASE_JD_EVENT_OUT_OF_MEMORY = 0x60, 908 BASE_JD_EVENT_UNKNOWN = 0x7F, 909 910 /* GPU exceptions */ 911 BASE_JD_EVENT_DELAYED_BUS_FAULT = 0x80, 912 BASE_JD_EVENT_SHAREABILITY_FAULT = 0x88, 913 914 /* MMU exceptions */ 915 BASE_JD_EVENT_TRANSLATION_FAULT_LEVEL1 = 0xC1, 916 BASE_JD_EVENT_TRANSLATION_FAULT_LEVEL2 = 0xC2, 917 BASE_JD_EVENT_TRANSLATION_FAULT_LEVEL3 = 0xC3, 918 BASE_JD_EVENT_TRANSLATION_FAULT_LEVEL4 = 0xC4, 919 BASE_JD_EVENT_PERMISSION_FAULT = 0xC8, 920 BASE_JD_EVENT_TRANSTAB_BUS_FAULT_LEVEL1 = 0xD1, 921 BASE_JD_EVENT_TRANSTAB_BUS_FAULT_LEVEL2 = 0xD2, 922 BASE_JD_EVENT_TRANSTAB_BUS_FAULT_LEVEL3 = 0xD3, 923 BASE_JD_EVENT_TRANSTAB_BUS_FAULT_LEVEL4 = 0xD4, 924 BASE_JD_EVENT_ACCESS_FLAG = 0xD8, 925 926 /* SW defined exceptions */ 927 BASE_JD_EVENT_MEM_GROWTH_FAILED = 928 BASE_JD_SW_EVENT | BASE_JD_SW_EVENT_JOB | 0x000, 929 BASE_JD_EVENT_JOB_CANCELLED = 930 BASE_JD_SW_EVENT | BASE_JD_SW_EVENT_JOB | 0x002, 931 BASE_JD_EVENT_JOB_INVALID = 932 BASE_JD_SW_EVENT | BASE_JD_SW_EVENT_JOB | 0x003, 933 934 BASE_JD_EVENT_RANGE_HW_FAULT_OR_SW_ERROR_END = BASE_JD_SW_EVENT | 935 BASE_JD_SW_EVENT_RESERVED | 0x3FF, 936 937 BASE_JD_EVENT_RANGE_SW_SUCCESS_START = BASE_JD_SW_EVENT | 938 BASE_JD_SW_EVENT_SUCCESS | 0x000, 939 940 BASE_JD_EVENT_DRV_TERMINATED = BASE_JD_SW_EVENT | 941 BASE_JD_SW_EVENT_SUCCESS | BASE_JD_SW_EVENT_INFO | 0x000, 942 943 BASE_JD_EVENT_RANGE_SW_SUCCESS_END = BASE_JD_SW_EVENT | 944 BASE_JD_SW_EVENT_SUCCESS | BASE_JD_SW_EVENT_RESERVED | 0x3FF, 945 946 BASE_JD_EVENT_RANGE_KERNEL_ONLY_START = BASE_JD_SW_EVENT | 947 BASE_JD_SW_EVENT_KERNEL | 0x000, 948 BASE_JD_EVENT_REMOVED_FROM_NEXT = BASE_JD_SW_EVENT | 949 BASE_JD_SW_EVENT_KERNEL | BASE_JD_SW_EVENT_JOB | 0x000, 950 BASE_JD_EVENT_END_RP_DONE = BASE_JD_SW_EVENT | 951 BASE_JD_SW_EVENT_KERNEL | BASE_JD_SW_EVENT_JOB | 0x001, 952 953 BASE_JD_EVENT_RANGE_KERNEL_ONLY_END = BASE_JD_SW_EVENT | 954 BASE_JD_SW_EVENT_KERNEL | BASE_JD_SW_EVENT_RESERVED | 0x3FF 955 }; 956 957 /** 958 * struct base_jd_event_v2 - Event reporting structure 959 * 960 * @event_code: event code of type @ref base_jd_event_code. 961 * @atom_number: the atom number that has completed. 962 * @padding: padding. 963 * @udata: user data. 964 * 965 * This structure is used by the kernel driver to report information 966 * about GPU events. They can either be HW-specific events or low-level 967 * SW events, such as job-chain completion. 968 * 969 * The event code contains an event type field which can be extracted 970 * by ANDing with BASE_JD_SW_EVENT_TYPE_MASK. 971 */ 972 struct base_jd_event_v2 { 973 __u32 event_code; 974 base_atom_id atom_number; 975 __u8 padding[3]; 976 struct base_jd_udata udata; 977 }; 978 979 /** 980 * struct base_dump_cpu_gpu_counters - Structure for 981 * BASE_JD_REQ_SOFT_DUMP_CPU_GPU_COUNTERS 982 * jobs. 983 * @system_time: gpu timestamp 984 * @cycle_counter: gpu cycle count 985 * @sec: cpu time(sec) 986 * @usec: cpu time(usec) 987 * @padding: padding 988 * 989 * This structure is stored into the memory pointed to by the @jc field 990 * of &struct base_jd_atom. 991 * 992 * It must not occupy the same CPU cache line(s) as any neighboring data. 993 * This is to avoid cases where access to pages containing the structure 994 * is shared between cached and un-cached memory regions, which would 995 * cause memory corruption. 996 */ 997 998 struct base_dump_cpu_gpu_counters { 999 __u64 system_time; 1000 __u64 cycle_counter; 1001 __u64 sec; 1002 __u32 usec; 1003 __u8 padding[36]; 1004 }; 1005 1006 /** 1007 * struct mali_base_gpu_core_props - GPU core props info 1008 * 1009 * @product_id: Pro specific value. 1010 * @version_status: Status of the GPU release. No defined values, but starts at 1011 * 0 and increases by one for each release status (alpha, beta, EAC, etc.). 1012 * 4 bit values (0-15). 1013 * @minor_revision: Minor release number of the GPU. "P" part of an "RnPn" 1014 * release number. 1015 * 8 bit values (0-255). 1016 * @major_revision: Major release number of the GPU. "R" part of an "RnPn" 1017 * release number. 1018 * 4 bit values (0-15). 1019 * @padding: padding to align to 8-byte 1020 * @gpu_freq_khz_max: The maximum GPU frequency. Reported to applications by 1021 * clGetDeviceInfo() 1022 * @log2_program_counter_size: Size of the shader program counter, in bits. 1023 * @texture_features: TEXTURE_FEATURES_x registers, as exposed by the GPU. This 1024 * is a bitpattern where a set bit indicates that the format is supported. 1025 * Before using a texture format, it is recommended that the corresponding 1026 * bit be checked. 1027 * @paddings_1: Padding bytes. 1028 * @gpu_available_memory_size: Theoretical maximum memory available to the GPU. 1029 * It is unlikely that a client will be able to allocate all of this memory 1030 * for their own purposes, but this at least provides an upper bound on the 1031 * memory available to the GPU. 1032 * This is required for OpenCL's clGetDeviceInfo() call when 1033 * CL_DEVICE_GLOBAL_MEM_SIZE is requested, for OpenCL GPU devices. The 1034 * client will not be expecting to allocate anywhere near this value. 1035 * @num_exec_engines: The number of execution engines. Only valid for tGOX 1036 * (Bifrost) GPUs, where GPU_HAS_REG_CORE_FEATURES is defined. Otherwise, 1037 * this is always 0. 1038 * @paddings_2: Padding bytes. 1039 */ 1040 struct mali_base_gpu_core_props { 1041 __u32 product_id; 1042 __u16 version_status; 1043 __u16 minor_revision; 1044 __u16 major_revision; 1045 __u16 padding; 1046 __u32 gpu_freq_khz_max; 1047 __u32 log2_program_counter_size; 1048 __u32 texture_features[BASE_GPU_NUM_TEXTURE_FEATURES_REGISTERS]; 1049 __u8 paddings_1[4]; 1050 __u64 gpu_available_memory_size; 1051 __u8 num_exec_engines; 1052 __u8 paddings_2[7]; 1053 }; 1054 1055 #endif /* _UAPI_BASE_JM_KERNEL_H_ */ 1056