1 #ifndef _RK_AIQ_TYPES_ADEBAYER_HW_H_
2 #define _RK_AIQ_TYPES_ADEBAYER_HW_H_
3 
4 #define RK_DEBAYER_V2_FIX_BIT_INT_TO_FLOAT      7
5 #define RK_DEBAYER_V2_FIX_BIT_LOG2              12
6 
7 #define RK_DEBAYER_V2_FIX_BIT_IIR_WGT_CLIP      3
8 #define RK_DEBAYER_V2_FIX_BIT_IIR_GHOST         6
9 
10 #define RK_DEBAYER_V2_FIX_BIT_ALPHA_SCALE       10
11 #define RK_DEBAYER_V2_FIX_BIT_EDGE_SCALE        10
12 
13 #define RK_DEBAYER_V2_FIX_BIT_INV_SIGMA         16
14 #define RK_DEBAYER_V2_FIX_BIT_INV_BF_SIGMA      16
15 
16 #define RK_DEBAYER_V2_FIX_BIT_WGT_SLOPE         7
17 
18 typedef struct AdebayerHwConfigV1_s {
19     unsigned char enable;
20     unsigned char filter_c_en;
21     unsigned char filter_g_en;
22     unsigned char gain_offset;
23     unsigned short hf_offset;
24     unsigned char thed1;
25     unsigned char thed0;
26     unsigned char dist_scale;
27     unsigned char max_ratio;
28     unsigned char clip_en;
29     signed char filter1_coe[5];
30     signed char filter2_coe[5];
31     unsigned char offset;
32     unsigned char shift_num;
33     unsigned char order_max;
34     unsigned char order_min;
35     bool updatecfg;
36 } AdebayerHwConfigV1_t;
37 
38 
39 typedef struct AdebayerHwConfigV2_s {
40     /* CONTROL */
41     bool updatecfg;
42     unsigned char enable;
43     unsigned char filter_g_en;
44     unsigned char filter_c_en;
45     /* G_INTERP */
46     unsigned char clip_en;
47     unsigned char dist_scale;
48     unsigned char thed0;
49     unsigned char thed1;
50     unsigned char select_thed;
51     unsigned char max_ratio;
52     /* G_INTERP_FILTER */
53     int  filter1_coe[4];
54     int  filter2_coe[4];
55 
56     /* C_FILTER_GUIDE_GAUS */
57     int  guid_gaus_coe[3];
58     /* C_FILTER_CE_GAUS */
59     int  ce_gaus_coe[3];
60     /* C_FILTER_ALPHA_GAUS */
61     int  alpha_gaus_coe[3];
62 
63     /* C_FILTER_IIR_0 */
64     unsigned char ce_sgm;
65     unsigned char exp_shift;
66     /* C_FILTER_IIR_1 */
67     unsigned char wet_clip;
68     unsigned char wet_ghost;
69     /* C_FILTER_BF */
70     unsigned char bf_clip;
71     unsigned char bf_curwgt;
72     unsigned short bf_sgm;
73     /* G_INTERP_OFFSET */
74     unsigned short hf_offset;
75     unsigned short gain_offset;
76     /* G_FILTER_OFFSET */
77     unsigned short offset;
78     /* C_FILTER_LOG_OFFSET */
79     unsigned short loghf_offset;
80     unsigned short loggd_offset;
81     /* C_FILTER_IIR_0 */
82     unsigned short wgtslope;
83     /* C_FILTER_ALPHA */
84     unsigned short alpha_offset;
85     /* C_FILTER_EDGE */
86     unsigned short edge_offset;
87     unsigned int edge_scale;
88     /* C_FILTER_ALPHA */
89     unsigned int alpha_scale;
90 } AdebayerHwConfigV2_t;
91 
92 #endif//_RK_AIQ_TYPES_ADEBAYER_HW_H_
93