1 /******************************************************************************
2  *
3  * Copyright(c) 2007 - 2017  Realtek Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms of version 2 of the GNU General Public License as
7  * published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope that it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  *
14  * The full GNU General Public License is included in this distribution in the
15  * file called LICENSE.
16  *
17  * Contact Information:
18  * wlanfae <wlanfae@realtek.com>
19  * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
20  * Hsinchu 300, Taiwan.
21  *
22  * Larry Finger <Larry.Finger@lwfinger.net>
23  *
24  *****************************************************************************/
25 #ifndef __INC_PHYDM_API_H_8822B__
26 #define __INC_PHYDM_API_H_8822B__
27 
28 #if (RTL8822B_SUPPORT == 1)
29 #define PHY_CONFIG_VERSION_8822B "28.5.34"
30 /* @2017.01.18 */
31 /* @(HW user guide version: R28, SW user guide version: R05, Modification: R34)*/
32 /* @remove A cut setting, refine CCK txfilter and OFDM CCA setting by YuChen*/
33 
34 #define SMTANT_TMP_RFE_TYPE 100
35 #define ANT_2T3R_RFE_TYPE 101
36 #define ANT_2T4R_RFE_TYPE 102
37 
38 #define INVALID_RF_DATA 0xffffffff
39 #define INVALID_TXAGC_DATA 0xff
40 
41 #define PSD_VAL_NUM 3
42 #define PSD_SMP_NUM 3
43 #define FREQ_PT_2G_NUM 14
44 #define FREQ_PT_5G_NUM 10
45 
46 #define number_channel_interferecne 4
47 
48 #define config_phydm_read_rf_check_8822b(data) (data != INVALID_RF_DATA)
49 #define config_phydm_read_txagc_check_8822b(data) (data != INVALID_TXAGC_DATA)
50 
51 enum agc_tab_sel {
52 	DEFAULT_AGC_TABLE,
53 	LNA_SAT_AGC_TABLE,
54 	AUTO_AGC_TABLE
55 };
56 
57 void phydm_rfe_8822b_init(struct dm_struct *dm);
58 
59 boolean
60 phydm_rfe_8822b(struct dm_struct *dm, u8 channel);
61 
62 u32 config_phydm_read_rf_reg_8822b(struct dm_struct *dm,
63 				   enum rf_path path,
64 				   u32 reg_addr, u32 bit_mask);
65 
66 boolean
67 config_phydm_write_rf_reg_8822b(struct dm_struct *dm,
68 				enum rf_path path, u32 reg_addr,
69 				u32 bit_mask, u32 data);
70 
71 boolean
72 config_phydm_write_txagc_8822b(struct dm_struct *dm, u32 pw_idx,
73 			       enum rf_path path, u8 hw_rate);
74 
75 u8 config_phydm_read_txagc_8822b(struct dm_struct *dm,
76 				 enum rf_path path, u8 hw_rate);
77 
78 void phydm_dynamic_spur_det_eliminate(struct dm_struct *dm);
79 
80 boolean
81 config_phydm_switch_band_8822b(struct dm_struct *dm,
82 			       u8 central_ch);
83 
84 boolean
85 config_phydm_switch_channel_8822b(struct dm_struct *dm,
86 				  u8 central_ch);
87 
88 __iram_odm_func__
89 boolean
90 config_phydm_switch_agc_tab_8822b(struct dm_struct *dm,
91 				  u8 channel, enum agc_tab_sel tab_sel);
92 
93 boolean
94 config_phydm_switch_bandwidth_8822b(struct dm_struct *dm,
95 				    u8 primary_ch_idx,
96 				    enum channel_width bw);
97 
98 boolean
99 config_phydm_switch_channel_bw_8822b(struct dm_struct *dm,
100 				     u8 central_ch,
101 				     u8 primary_ch_idx,
102 				     enum channel_width bw);
103 void
104 phydm_config_tx_path_8822b(struct dm_struct *dm, enum bb_path tx_path,
105 			   enum bb_path tx_path_sel_1ss,
106 			   enum bb_path tx_path_sel_cck);
107 
108 boolean
109 config_phydm_trx_mode_8822b(struct dm_struct *dm,
110 			    enum bb_path tx_path_en,
111 			    enum bb_path rx_path,
112 			    enum bb_path tx_path_sel_1ss);
113 
114 boolean
115 config_phydm_parameter_init_8822b(struct dm_struct *dm,
116 				  enum odm_parameter_init type);
117 
118 /* @======================================================================== */
119 /* @These following functions can be used for PHY DM only*/
120 
121 boolean
122 phydm_write_txagc_1byte_8822b(struct dm_struct *dm, u32 pw_idx,
123 			      enum rf_path path, u8 hw_rate);
124 
125 void phydm_get_condi_num_acc_8822b(void *dm_void);
126 
127 u32 phydm_get_condi_num_8822b(struct dm_struct *dm);
128 
129 __iram_odm_func__
130 void phydm_rxagc_switch_8822b(struct dm_struct *dm,
131 			      boolean enable_rxagc_switch);
132 
133 boolean
134 phydm_rfe_8822b_lps(struct dm_struct *dm, boolean enable_sw_rfe);
135 
136 /* @======================================================================== */
137 
138 #endif /* RTL8822B_SUPPORT == 1 */
139 #endif /*  @__INC_PHYDM_API_H_8822B__ */
140