Changes in README.440-DDR-performance

57dc53a72460e8e301fa1cc7951b41db8e731485 - Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging

Mon, 08 Feb 2016 14:48:04 +0000

Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging List of files: /rk3399_rockchip-uboot/doc/README.440-DDR-performance

a187559e3d586891c917279044c5386d1b2adc6e - Use correct spelling of "U-Boot"

Sat, 06 Feb 2016 03:30:11 +0000

Use correct spelling of "U-Boot"Correct spelling of "U-Boot" shall be used in all written text(documentation, comments in source files etc.).Signed-off-by: Bin Meng Reviewed-by: Heiko Schocher Reviewed-by: Simon Glass Reviewed-by: Minkyu Kang List of files: /rk3399_rockchip-uboot/doc/README.440-DDR-performance

281f69ede28cd3d8be5d62a96b5a0b73e6065858 - Merge branch 'wd'

Wed, 09 Aug 2006 18:36:54 +0000

Merge branch 'wd' List of files: /rk3399_rockchip-uboot/doc/README.440-DDR-performance

98280e3d431db77d92219438b8840853bd7cb412 - Merge with /home/wd/git/u-boot/master

Mon, 07 Aug 2006 21:21:52 +0000

Merge with /home/wd/git/u-boot/master List of files: /rk3399_rockchip-uboot/doc/README.440-DDR-performance

a2c95a72247990dee9a03b26b4dc9fc0182c97ed - PPC440 DDR setup: Set SDRAM0_CFG0[PMU]=0 for best performance

Fri, 28 Jul 2006 16:34:58 +0000

PPC440 DDR setup: Set SDRAM0_CFG0[PMU]=0 for best performanceAMCC suggested to set the PMU bit to 0 for best performace onthe PPC440 DDR controller.Please see doc/README.440-DDR-performance for details.Patch by Stefan Roese, 28 Jul 2006 List of files: /rk3399_rockchip-uboot/doc/README.440-DDR-performance