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MStar hereby reserves the // rights to any and all damages, losses, costs and expenses resulting therefrom. // //////////////////////////////////////////////////////////////////////////////// /////////////////////////////////////////////////////////////////////////////////////////////////// /// /// @file drvUART.h /// @brief UART Driver Interface /// @author MStar Semiconductor Inc. /////////////////////////////////////////////////////////////////////////////////////////////////// /*! \defgroup G_UART UART interface \ingroup G_PERIPHERAL \brief UART is a piece of computer hardware that translates data between parallel and serial forms. UARTs are commonly used in conjunction with communication standards such as EIA, RS-232, RS-422 or RS-485. The universal designation indicates that the data format and transmission speeds are configurable. The electric signaling levels and methods are handled by a driver circuit external to the UART. Features - A clock generator, usually a multiple of the bit rate to allow sampling in the middle of a bit period. - Input and Output shift registers - Transmit/Receive control - Read/Write control logic - Transmit/Receive buffers (optional) - Parallel data bus buffer (optional) - First-in, first-out (FIFO) buffer memory (optional) UART Block Diagram: \n \image html drvUART_pic1.png Operation Code Flow: \n -# Prepare UART setting for each operation -# Set and start UART in command handle -# Trigger UART \defgroup G_UART_INIT Initialization Task relative \ingroup G_UART \defgroup G_UART_TXRX Transmit/Receive control Task relative \ingroup G_UART \defgroup G_UART_OTHER other relative \ingroup G_UART */ #ifndef __MDRV_UART_H__ #define __MDRV_UART_H__ /// /// @file drvUART.h /// @brief MStar driver for UART devices /// /// @par Example: connect AEON uart to UART port0, output message /// @code /// ms_uart_dev_t uart; /// /// mdrv_uart_connect(E_UART_PORT0, E_UART_AEON); /// uart = mdrv_uart_open(E_UART_AEON); /// if (uart != UART_DEV_NULL) /// { /// mdrv_uart_set_baudrate(uart, 38400); // must do this after base clock changed /// setconsole(uart); // set this uart device as console /// } /// printf("uart test"); /// mdrv_uart_close(uart); /// @endcode /// /// /// @par Example: use buffered output /// @code /// ms_uart_dev_t uart; /// char tx_buffer[1024]; /// /// uart = mdrv_uart_open(E_UART_PIU_UART0); /// if (uart != UART_DEV_NULL) /// { // /// mdrv_uart_set_tx_buffer(uart, tx_buffer, sizeof(tx_buffer)); /// } /// @endcode #ifdef __cplusplus extern "C" { #endif #include "MsTypes.h" #include "MsDevice.h" //------------------------------------------------------------------------------------------------- // Driver Capability //------------------------------------------------------------------------------------------------- #define UART_CAPS_AEON 0x00000001 #define UART_CAPS_PIU 0x00000002 //------------------------------------------------------------------------------------------------- // Macro and Define //------------------------------------------------------------------------------------------------- // #define UART_TYPE_DEF /// Version string. #define UART_DRV_VERSION /* Character String for DRV/API version */ \ MSIF_TAG, /* 'MSIF' */ \ MSIF_CLASS, /* '00' */ \ MSIF_CUS, /* 0x0000 */ \ MSIF_MOD, /* 0x0000 */ \ MSIF_CHIP, \ MSIF_CPU, \ {'U','A','R','T'}, /* IP__ */ \ {'0','1'}, /* 0.0 ~ Z.Z */ \ {'0','6'}, /* 00 ~ 99 */ \ {'0','0','3','1','0','0','5','0'}, /* CL# */ \ MSIF_OS #define UART_TYPE_AEON 0x10 #define UART_TYPE_PIU 0x20 #define UART_TYPE_EYWA 0 // Baud rate //#define UART_BAUD_RATE 38400 //9600 //19200 //38400 //57600 //115200 =>too frequent Rx INT #define UART_BAUD_RATE 115200 #define UART_DEV_NULL ((ms_uart_dev_t)0) //------------------------------------------------------------------------------------------------- // Type and Structure //------------------------------------------------------------------------------------------------- typedef enum { E_UART_OK, E_UART_FAIL, } UART_Result; typedef struct _UART_DrvInfo { MS_BOOL Init; MS_U32 Caps; } UART_DrvInfo; typedef struct _UART_DrvStatus { MS_BOOL HwBusy; } UART_DrvStatus; /// UART devices, not all of them can be access directly typedef enum { E_UART_INVALID = -1, ///< INVALID E_UART_AEON, ///< AEON E_UART_VDEC, ///< VD_MHEG5 (only used in mdrv_uart_connect()) E_UART_TSP, ///< TSP (only used in mdrv_uart_connect()) E_UART_PIU_UART0, ///< PIU0 E_UART_PIU_UART1, ///< PIU1 (only available for some chips) E_UART_PIU_UART2, ///< PIU2 (only available for some chips) E_UART_PIU_FUART0, ///< PIU Fast UART (only available for some chips) E_UART_HK51_UART0, ///< HK51 UART0 (only used in mdrv_uart_connect()) E_UART_HK51_UART1, ///< HK51 UART1 (only used in mdrv_uart_connect()) E_UART_VD51_UART0, ///< VD51 UART0 (only used in mdrv_uart_connect()) E_UART_VD51_UART1, ///< VD51 UART1 (only used in mdrv_uart_connect()) ///< (only available for some chips) E_UART_AEON_R2, ///< AEON_R2 for HK E_UART_AEON_AUDIO_R2, ///< AEON_R2 for Audio E_UART_DMD51_UART0, ///< DMD51 UART0 (only used in mdrv_uart_connect()) E_UART_DMD51_UART1, ///< DMD51 UART1 (only used in mdrv_uart_connect()) E_UART_SECURE_R2, ///< SECURE_R2 (only available for some chips) E_UART_OFF, ///< UART Disable } UART_DEVICE_TYPE; /// UART port /// different port have different pad mux, please check package spec. /// sometimes the net name will mislead the real port number typedef enum { E_UART_PORT_INVALID = -1,///< invalid uart port E_UART_PORT0, ///< usually muxed with DDCA E_UART_PORT1, ///< port 1 E_UART_PORT2, ///< port 2 E_UART_PORT3, ///< port 3 E_UART_PORT4, ///< port 4 } UART_PORT_TYPE; /// UART Pad /// different port have different pad mux /// sometimes the net name will mislead the real pad number typedef enum { //<< port 0 pad default with DDCA //port1 --> second uart mode E_UART_PAD_1_0, /// third uart mode E_UART_PAD_2_0, /// fourth uart mode E_UART_PAD_3_0, /// fast uart mode E_UART_PAD_4_0, ///