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//==============================================================================
/// [MsAce_LIB_Group_DTV1.h]
/// Date: 20090414
/// Descriptions:
//==============================================================================


#ifndef MSACE_LIB_GROUP_DTV1_H
#define MSACE_LIB_GROUP_DTV1_H

#include "ace_hwreg_utility2.h"
#include "hwreg_ace.h"

/////////////// Chakra2 define start

#define BOOL    MS_BOOL
#define BYTE    MS_U8
#define WORD    MS_U16
#define DWORD   MS_U32
#define U8      MS_U8
#define U16     MS_U16
#define code


#define BK_SELECT_00                BK_SCALER_BASE
#define REG_BANK_VOP                0x10
#define REG_BANK_S_VOP              0x0F
#define REG_BANK_VTRACK             0x2F
#define REG_BANK_VIP                0x63
#define REG_BANK_ACE                0x18

#define BK_REG_L( x, y )            ((x) | (((y) << 1)))
#define L_BK_VOP(x)                 BK_REG_L(BK_SCALER_BASE,x)
#define L_BK_ACE(x)                 BK_REG_L(BK_SCALER_BASE,x)
#define L_BK_VIP(x)                 BK_REG_L(BK_SCALER_BASE,x)

//////////////// Chakra2 define end


#define XDATA

#define UNAVAILABLE             0xFF

#define REG_ADDR_SC_BANK_SEL    BK_SELECT_00
#define BANK_CM_MAIN            REG_BANK_VTRACK
#define BANK_CM_SUB             REG_BANK_VIP
#define BANK_ACE                REG_BANK_ACE
#define REG_ADDR_CM_MAIN        L_BK_VOP(0x71)
#define REG_ADDR_CM_SUB         L_BK_VIP(0x51)
#define REG_ADDR_CM_CTL_MAIN    L_BK_VOP(0x70)
#define REG_ADDR_CM_CTL_SUB     L_BK_VIP(0x50)
#define REG_ADDR_ACE_R2Y_EQ_SEL L_BK_ACE(0x6F)
#define ENABLE_CM_CTL1          (BIT(0)|BIT(1)|BIT(4)|BIT(5)| BIT(6)|BIT(7)|BIT(8)|BIT(9))
#define ENABLE_CM_CTL2          (BIT(0)|BIT(1)|BIT(4)|BIT(5)| BIT(6)|BIT(7)|BIT(8)|BIT(9))
#define MASK_CM_CTL             (BIT(0)|BIT(1)|BIT(4)|BIT(5)| BIT(6)|BIT(7)|BIT(8)|BIT(9))
#define MASK_CM_CTL_EN          (BIT(0))
#define MASK_CM_CTL_RB_RANGE    (BIT(4) | BIT(5) | BIT(6) | BIT(7) | BIT(8) | BIT(9))

#define DECLARA_CMCTL_VARIABLE  U16 CTLVal;

#if SCALER_REGISTER_SPREAD
#define DECLARA_BANK_VARIABLE   MS_U32 u32Bank = 0;
#define BACKUP_SC_BANK          u32Bank = 0; //SCALER_REGISTER_SPREAD do not need backup bank
#define RECOVER_SC_BANK
//Because of u32Bank already set device 1 bank offset, do not set bank offset in SC_W2BYTE again, SC_W2BYTE(id) must equal to 0
#define ACE_WRITE_CM(id, addr, data)            SC_W2BYTE(id, ((DWORD)(addr) | (u32Bank << 8)),data)
#define ACE_WRITE_CM_CTL(id, addr, data, mask)  SC_W2BYTEMSK(id, ((DWORD)(addr) | (u32Bank << 8)),data,mask)
#define ACE_READ_CTL(id, addr, mask)            SC_R2BYTEMSK(id, ((DWORD)(addr) | (u32Bank << 8)),mask)
#else
#define DECLARA_BANK_VARIABLE   U8 u8Bank;
#define BACKUP_SC_BANK          {u8Bank = GET_SC_BANK();}
#define RECOVER_SC_BANK         {SET_SC_BANK(u8Bank);}
#define ACE_WRITE_CM(id, addr, data)        MDrv_Write2Byte(L_BK_VOP((addr)/2), (data))
#define ACE_WRITE_CM_CTL(id, addr, data, mask)  MDrv_Write2ByteMask(addr, data, mask)
#define ACE_READ_CTL(id, addr, mask)            MDrv_ReadRegBit(addr, mask)
#endif

// For scaler bank switch
#if SCALER_REGISTER_SPREAD
#define GET_SC_BANK()
#define SET_SC_BANK(bank)  u32Bank = bank;
#else
#define GET_SC_BANK()                MDrv_ReadByte(REG_ADDR_SC_BANK_SEL)
#define SET_SC_BANK(bank)       \
            ACE_INSTANCE_PRIVATE* psAECInstPri = NULL;   \
            MS_U32 u32MsACEID = 0; \
            if(UtopiaInstanceGetPrivate(pInstance, (void*)&psAECInstPri)==UTOPIA_STATUS_SUCCESS) \
            { \
                u32MsACEID = psAECInstPri->u32DeviceID; \
            } \
            MDrv_WriteByte(REG_ADDR_SC_BANK_SEL, bank + u32XCDeviceBankOffset[u32MsACEID])
#endif

// Control sin&cos function
#define USE_ACE_INTERNAL_SIN_COS    0
#define sin     clampsin
#define cos     clampcos

#endif