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MStar hereby reserves the // rights to any and all damages, losses, costs and expenses resulting therefrom. // //////////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////////////////////////////////// // file halAESDMA.h // @brief AESDMA HAL // @author MStar Semiconductor,Inc. //////////////////////////////////////////////////////////////////////////////////////////////////// #ifndef __HAL_RSA_H__ #define __HAL_RSA_H__ //-------------------------------------------------------------------------------------------------- // Driver Compiler Option //-------------------------------------------------------------------------------------------------- //-------------------------------------------------------------------------------------------------- // AESDMA Hardware Abstraction Layer //-------------------------------------------------------------------------------------------------- // TSP Register #define _TspPid ((REG_Pid*)(REG_PIDFLT_BASE)) #define _TspSec ((REG_Sec*)(REG_SECFLT_BASE)) #define DIGEST_SIZE_SHA1 5 //160-bit #define DIGEST_SIZE_SHA256 8 //256-bit #define SHA_MIU1_ENABLE 0x80000000 //Enable access MIU1 #define SHA_UNIT_SIZE 8 //64-bits //-------------------------------------------------------------------------------------------------- // Macro of bit operations //-------------------------------------------------------------------------------------------------- #define HAS_FLAG(flag, bit) ((flag) & (bit)) #define SET_FLAG(flag, bit) ((flag)|= (bit)) #define RESET_FLAG(flag, bit) ((flag)&= (~(bit))) #define SET_FLAG1(flag, bit) ((flag)| (bit)) #define RESET_FLAG1(flag, bit) ((flag)& (~(bit))) typedef enum { RAM_READ = 0x0, RAM_WRITE = 0x1 } RAM_DIR_t; typedef enum { E_RSA_SW_RESET_OFF = 0x0, E_RSA_SW_RESET_ON = 0x1 } RSA_SW_RESET_t; typedef enum { E_RSA_USE_SW_KEY = 0x0, E_RSA_USE_HW_KEY = 0x1 } RSA_HW_KEY_t; typedef enum { E_RSA_USE_PRIV_KEY = 0x0, E_RSA_USE_PUB_KEY = 0x1 } RSA_PUB_KEY_t; typedef enum { E_RSA_HW_PRI_KEY = 0x0, E_RSA_HW_PUB_KEY1 = 0x1, E_RSA_HW_PUB_KEY2 = 0x2 } RSA_PUB_KEY_SEL_t; /// HW PARSER Mode typedef enum { E_RSA_ADDRESS_E = 0, E_RSA_ADDRESS_N, E_RSA_ADDRESS_A, E_RSA_ADDRESS_Z, } RSA_IND32Address; //////////////////////////////////////////////// // HAL API //////////////////////////////////////////////// void HAL_RSA_ClearInt(void); void HAL_RSA_Reset(void); void HAL_RSA_Ind32Ctrl(MS_U8 u8dirction); void HAL_RSA_LoadSram(MS_U32 *u32Buf, RSA_IND32Address eMode); void HAL_RSA_SetKeyLength(MS_U32 u32keylen); void HAL_RSA_SetKeyType(MS_U8 u8hwkey, MS_U8 u8pubkey); void HAL_RSA_Rootkey_Sel(MS_U8 u8KeySrc); void HAL_RSA_ExponetialStart(void); MS_U32 HAL_RSA_GetStatus(void); void HAL_RSA_FileOutStart(void); void HAL_RSA_SetFileOutAddr(MS_U32 u32offset); MS_U32 HAL_RSA_FileOut(void); MS_U32 HAL_RSA_Get_RSA_IsFinished(void); void HAL_RSA_SetBank(MS_VIRT u32NonPmBankAddr); MS_BOOL HAL_RSA_SetSecureRange(MS_U32 u32addr, MS_U32 u32size); void HAL_RSA_Hwkey_Switch(void); MS_U32 HAL_RSA_Read_Hwkey_Switch(void); #endif // #ifndef __HAL_TSP_H__