// //****************************************************************************** // MStar Software // Copyright (c) 2010 - 2012 MStar Semiconductor, Inc. All rights reserved. // All software, firmware and related documentation herein ("MStar Software") are // intellectual property of MStar Semiconductor, Inc. ("MStar") and protected by // law, including, but not limited to, copyright law and international treaties. // Any use, modification, reproduction, retransmission, or republication of all // or part of MStar Software is expressly prohibited, unless prior written // permission has been granted by MStar. // // By accessing, browsing and/or using MStar Software, you acknowledge that you // have read, understood, and agree, to be bound by below terms ("Terms") and to // comply with all applicable laws and regulations: // // 1. MStar shall retain any and all right, ownership and interest to MStar // Software and any modification/derivatives thereof. // No right, ownership, or interest to MStar Software and any // modification/derivatives thereof is transferred to you under Terms. // // 2. You understand that MStar Software might include, incorporate or be // supplied together with third party`s software and the use of MStar // Software may require additional licenses from third parties. // Therefore, you hereby agree it is your sole responsibility to separately // obtain any and all third party right and license necessary for your use of // such third party`s software. // // 3. MStar Software and any modification/derivatives thereof shall be deemed as // MStar`s confidential information and you agree to keep MStar`s // confidential information in strictest confidence and not disclose to any // third party. // // 4. MStar Software is provided on an "AS IS" basis without warranties of any // kind. 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If requested, MStar may from time to time provide technical supports or // services in relation with MStar Software to you for your use of // MStar Software in conjunction with your or your customer`s product // ("Services"). // You understand and agree that, except otherwise agreed by both parties in // writing, Services are provided on an "AS IS" basis and the warranty // disclaimer set forth in Section 4 above shall apply. // // 6. Nothing contained herein shall be construed as by implication, estoppels // or otherwise: // (a) conferring any license or right to use MStar name, trademark, service // mark, symbol or any other identification; // (b) obligating MStar or any of its affiliates to furnish any person, // including without limitation, you and your customers, any assistance // of any kind whatsoever, or any information; or // (c) conferring any license or right under any intellectual property right. // // 7. These terms shall be governed by and construed in accordance with the laws // of Taiwan, R.O.C., excluding its conflict of law rules. // Any and all dispute arising out hereof or related hereto shall be finally // settled by arbitration referred to the Chinese Arbitration Association, // Taipei in accordance with the ROC Arbitration Law and the Arbitration // Rules of the Association by three (3) arbitrators appointed in accordance // with the said Rules. // The place of arbitration shall be in Taipei, Taiwan and the language shall // be English. // The arbitration award shall be final and binding to both parties. // //****************************************************************************** // #ifdef MSOS_TYPE_LINUX_KERNEL #include #include #include #else #include #include #endif #include "MsCommon.h" #include "gpd_reg.h" #include "drvgpd.h" #include "MsOS.h" #include "osalGPD.h" #include "halCHIP.h" MS_VIRT READBITBASE; static MS_U32 g_iwidth; static MS_U32 g_iheight; static MS_U32 g_gpd_cacheable = TRUE; static MS_VIRT gRIU_REG_BASE; #define DRVGPD_FLIP_GO void _GPD_PrintMem(MS_U32 u32Addr, MS_U32 u32Size) { MS_U32 u32i; console_printf("===========================================================\n"); console_printf("print memory addr=0x%tx, size=0x%tx\n", (ptrdiff_t)u32Addr, (ptrdiff_t)u32Size); console_printf("===========================================================\n"); for(u32i=0; u32i 0) { vdata = ((DEFAULT_ALPHA<<24)|(((MS_U8 *)(*ptr))[0]<<16) |(((MS_U8 *)(*ptr))[1]<<8) |((MS_U8 *)(*ptr))[2]); set_single_cmd(0x8320,vdata); num--; (*ptr)+=3; } } #else void drv_gpd_Init(void) { g_iwidth = 0; g_iheight = 0; hal_gpd_SetMIUProtectMask(gRIU_REG_BASE, TRUE); console_printf("before reset.....bitpos=%td\n", (ptrdiff_t)drv_gpd_bitpos()); GPD_SET_MS_U32REG(reg_gpd_rst, 1); GPD_SET_MS_U32REG(reg_gpd_rst, 1); GPD_SET_MS_U32REG(reg_gpd_rst, 1); GPD_SET_MS_U32REG(reg_gpd_rst, 0); #if ENABLE_GPD_PATCH GPD_SET_MS_U32REG(reg_gpd_rst, 1); GPD_SET_MS_U32REG(reg_gpd_rst, 1); GPD_SET_MS_U32REG(reg_gpd_rst, 1); GPD_SET_MS_U32REG(reg_gpd_rst, 0); GPD_SET_MS_U32REG(reg_gpd_rst, 1); GPD_SET_MS_U32REG(reg_gpd_rst, 1); GPD_SET_MS_U32REG(reg_gpd_rst, 1); GPD_SET_MS_U32REG(reg_gpd_rst, 0); #endif console_printf("after reset.....bitpos=%td\n", (ptrdiff_t)drv_gpd_bitpos()); hal_gpd_SetMIUProtectMask(gRIU_REG_BASE, FALSE); #if ENABLE_GPD_PATCH // disable clock gating GPD_SET_MS_U32REG(reg_mreq_always_active, 1); GPD_SET_MS_U32REG(reg_eng_always_active, 0x3f); // disable zcache/ccache GPD_SET_MS_U32REG(reg_cache_hit_cmp, 0x0); console_printf("set reg_mreq_always_active = 1\n"); console_printf("set reg_eng_always_active = 0x3f\n"); console_printf("set reg_cache_hit_cmp = 0\n"); #endif } void drv_gpd_set_bstart_end(MS_PHY bstart, MS_PHY bend) { GPD_SET_MS_U32REG(reg_gpd_bstart, bstart & (~DRAMBASE)); GPD_SET_MS_U32REG(reg_gpd_bend, bend & (~DRAMBASE)); GPD_SET_MS_U32REG(reg_gpd_boffset, 0); #ifdef DRVGPD_FLIP_GO { MS_U32 val = GPD_GET_MS_U32REG(reg_gpd_bsaddr_go) ^ 1; GPD_SET_MS_U32REG(reg_gpd_bsaddr_go, val); } #else GPD_SET_MS_U32REG(reg_gpd_bsaddr_go, 1); #endif } void drv_gpd_set_ocolor(MS_U32 ocolor_typ) { GPD_SET_MS_U32REG(reg_gpd_ocolor, ocolor_typ); } void drv_gpd_write_cmap(MS_U32 num, MS_U8 *ptr,MS_U32 trans_idx) { MS_U32 i, vdata; MS_U8 r, g, b, a; GPD_SET_MS_U32REG(reg_gif_local_tbl, 0); for (i = 0; i < num; i++) { if (ptr) { r = *ptr++; g = *ptr++; b = *ptr++; } else { r = read_bits(8); g = read_bits(8); b = read_bits(8); } if (i == trans_idx) a = 0; else a = 0xFF; vdata = (a << 24) | (r << 16) | (g << 8) | b; GPD_SET_MS_U32REG(reg_gpd_cmem_wd, vdata); } } #endif #if 0 void drv_gpd_set_pitch(MS_U32 pitch) { GPDreg.h832c &=~(0xFFFF<> 3) - 1); } void drv_gpd_set_scline_height_progressive(MS_U32 height) { GPD_SET_MS_U32REG(reg_png_scline0_height, height - 1); } void drv_gpd_set_scline_width_interlace(MS_U32 width, MS_U8 bpp) { GPD_SET_MS_U32REG(reg_png_scline0_width, ((((width + 7) >> 3) * bpp + 7) >> 3) - 1); GPD_SET_MS_U32REG(reg_png_scline1_width, ((((width - 4 + 7) >> 3) * bpp + 7) >> 3) - 1); GPD_SET_MS_U32REG(reg_png_scline2_width, ((((width + 3) >> 2) * bpp + 7) >> 3) - 1); GPD_SET_MS_U32REG(reg_png_scline3_width, ((((width - 2 + 3) >> 2) * bpp + 7) >> 3) - 1); GPD_SET_MS_U32REG(reg_png_scline4_width, ((((width + 1) >> 1) * bpp + 7) >> 3) - 1); GPD_SET_MS_U32REG(reg_png_scline5_width, ((((width - 1 + 1) >> 1) * bpp + 7) >> 3) - 1); GPD_SET_MS_U32REG(reg_png_scline6_width, ((( width ) * bpp + 7) >> 3) - 1); } void drv_gpd_set_scline_height_interlace(MS_U32 height) { GPD_SET_MS_U32REG(reg_png_scline0_height, ((height + 7) >> 3) - 1); GPD_SET_MS_U32REG(reg_png_scline1_height, ((height + 7) >> 3) - 1); GPD_SET_MS_U32REG(reg_png_scline2_height, ((height - 4 + 7) >> 3) - 1); GPD_SET_MS_U32REG(reg_png_scline3_height, ((height + 3) >> 2) - 1); GPD_SET_MS_U32REG(reg_png_scline4_height, ((height - 2 + 3) >> 2) - 1); GPD_SET_MS_U32REG(reg_png_scline5_height, ((height + 1) >> 1) - 1); GPD_SET_MS_U32REG(reg_png_scline6_height, ((height - 1 + 1) >> 1) - 1); } #endif #if 0 void drv_gpd_set_png_go(void) { MDrv_CQ_SWReset(); set_nop_cmd(2); set_single_cmd(0x831c,PNG_GO); MDrv_CQ_Fire(); } MS_U32 val = 1; void drv_gpd_set_blk_go(void) { MS_U32 dbg=0xff; MDrv_CQ_SWReset(); set_nop_cmd(5); set_single_cmd(0x831c,PNG_BLK_GO); if(val) GPDreg.h8328 |=(GIF_LOCAL_TBL); else GPDreg.h8328 &=~(GIF_LOCAL_TBL); set_single_cmd(0x8328,GPDreg.h8328); MDrv_CQ_Fire(); while(dbg!=val) dbg=((gpd_read_debug_port(0)&_BIT28)>>28); val=!val; } void drv_gpd_set_png_done(void) { MDrv_CQ_SWReset(); GPDreg.h83b8 |= (PNG_DONE); set_single_cmd(0x83b8,GPDreg.h83b8); MDrv_CQ_Fire(); } void drv_gpd_set_cmp_type(MS_U8 cmp) { MDrv_CQ_SWReset(); GPDreg.h83b8 &=~(0x3<>28); val=!val; } */ } void drv_gpd_set_png_done(MS_U32 value) { GPD_SET_MS_U32REG(reg_png_done, value); } void drv_gpd_set_cmp_type(MS_U8 type) { GPD_SET_MS_U32REG(reg_png_compress_type, type); } #endif #if 0 void drv_gpd_set_lbase_g1(MS_U32 data) //lbase 2~4 { MDrv_CQ_SWReset(); GPDreg.h837c=data; set_single_cmd(0x837c,GPDreg.h837c); } void drv_gpd_set_lbase_g2(MS_U32 data) //5~7 { GPDreg.h8380=data; set_single_cmd(0x8380,GPDreg.h8380); } void drv_gpd_set_lbase_g3(MS_U32 data) //8~10 { GPDreg.h8384=data; set_single_cmd(0x8384,GPDreg.h8384); } void drv_gpd_set_lbase_g4(MS_U32 data) //11~13 { GPDreg.h8388=data; set_single_cmd(0x8388,GPDreg.h8388); } void drv_gpd_set_lbase_g5(MS_U32 data) //lbase 14~15 { GPDreg.h838c=data; set_single_cmd(0x838c,GPDreg.h838c); } void drv_gpd_set_dbase_g1(MS_U32 data) //dbase 2~3 { GPDreg.h838c &= ~(0x3ff<=HAL_MIU1_BASE) { console_printf("GPD on MIU1!!!!!!!!!!!!\n"); // MIU1 return TRUE; } else { console_printf("GPD on MIU0!!!!!!!!!!!!\n"); // MIU0 return FALSE; } } void MDrv_GPD_Reg_Base(MS_U32* u32RIUBase, MS_U32* u32XIUBase) { hal_gpd_reg_base(u32RIUBase, u32XIUBase); } void MDrv_GPD_MIU_Client(MS_U8* u8Offset, MS_U16* u16BitMask) { hal_gpd_miu_client(u8Offset, u16BitMask); } static GPD_IsrFuncCb _pGPDIsrCb = NULL; static MS_U8 bIsrEnable = FALSE; static void _GPD_ISRHandler(MS_U32 IsrNum) { console_printf("_GPD_ISRHandler: IsrNum = %td\n", (ptrdiff_t)IsrNum); if(_pGPDIsrCb) { _pGPDIsrCb(); } } MS_U8 MDrv_GPD_EnableISR(GPD_IsrFuncCb IsrCb) { if(TRUE == bIsrEnable) { console_printf("GPD ISR has been enabled!!\n"); return FALSE; } if(TRUE == OSAL_GPD_ISR_Attach((OSAL_GPD_IsrFuncCb)_GPD_ISRHandler)) { console_printf("Attach GPD ISR Success!!\n"); if(TRUE == OSAL_GPD_ISR_Enable()) { console_printf("MDrv_GPD_EnableISR : Success!!\n"); bIsrEnable = TRUE; if(IsrCb) { _pGPDIsrCb = IsrCb; } return TRUE; } } GPD_DRV_ERROR("MDrv_GPD_EnableISR Failed!!\n"); return FALSE; } /********************************************************************/ MS_U8 MDrv_GPD_DisableISR(void) { if(FALSE == bIsrEnable) { console_printf("GPD ISR has been disabled!!\n"); return FALSE; } if(TRUE == OSAL_GPD_ISR_Disable()) { console_printf("Disable GPD ISR Success!!\n"); if(TRUE == OSAL_GPD_ISR_Detach()) { console_printf("MDrv_GPD_DisableISR : Success!!\n"); bIsrEnable = FALSE; _pGPDIsrCb = NULL; return TRUE; } } return FALSE; } void MDrv_GPD_SetISRMask(void) { console_printf("1......\n"); // GPD_SET_MS_U32REG(reg_int_mask, 0x1e); GPD_SET_MS_U32REG(reg_int_mask, 0x1c); // GPD_SET_MS_U32REG(reg_int_sw_force, 0x1f); console_printf("2......\n"); } void MDrv_GPD_PrintGPDBuf(void) { console_printf("Dump Z buffer=============================start\n"); _GPD_PrintMem(u32ZbufVA, 2*1024); console_printf("Dump Z buffer=============================end\n"); console_printf("Dump C buffer=============================start\n"); _GPD_PrintMem(u32CbufVA, 32*1024); console_printf("Dump C buffer=============================end\n"); } void drv_gpd_set_cacheable(MS_U32 u32Cacheable) { g_gpd_cacheable = u32Cacheable; } MS_U32 drv_gpd_get_cacheable(void) { return g_gpd_cacheable; } MS_VIRT drv_gpd_get_RIU_BASE(void) { return gRIU_REG_BASE; } void drv_gpd_set_access_bound(MS_U32 w_start, MS_U32 w_end, MS_U32 i_start, MS_U32 i_end) { #ifdef GPD_MIU_WRITE_PROTECT_SUPPORT MS_U8 u8MiuSel = 0; MS_U32 u32Start = (MS_U32)MIN(w_start, i_start); _phy_to_miu_offset(u8MiuSel, u32Start, u32Start); MS_U32 u32End = (MS_U32)MAX(w_end, i_end); _phy_to_miu_offset(u8MiuSel, u32End, u32End); console_printf("[MIU protect]: [%lx, %lx]\n", u32Start, u32End); GPD_SET_MS_U32REG(reg_lb_addr, u32Start>>3); GPD_SET_MS_U32REG(reg_ub_addr, u32End>>3); #else UNUSED(w_start); UNUSED(w_end); UNUSED(i_start); UNUSED(i_end); #endif }