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MStar hereby reserves the // rights to any and all damages, losses, costs and expenses resulting therefrom. // //////////////////////////////////////////////////////////////////////////////// //////////////////////////////////////////////////////////////////////////////////////////////////// // file halCMDQ.h // @brief CMDQ HAL // @author MStar Semiconductor,Inc. //////////////////////////////////////////////////////////////////////////////////////////////////// #ifndef __HAL_CMDQ_H__ #define __HAL_CMDQ_H__ #include "regCMDQ.h" // Trigger Bus Defination #define HAL_GE_GE2CMDQ_TRI 0xFFFF #define HAL_BDMA_INT_BDMA_0 0xFFFF #define HAL_BDMA_INT_BDMA_1 0xFFFF #define HAL_GPU_GPU2CMDQ_TRIG 0xFFFF #define HAL_GOPG0_GOP_CMDQ_INT_0 0xFFFF #define HAL_GOPG1_GOP_CMDQ_INT_1 0xFFFF #define HAL_GOPG2_GOP_CMDQ_INT_2 0xFFFF #define HAL_GOPG3_GOP_CMDQ_INT_3 0xFFFF #define HAL_SCALAR_SC2CMDQ_TRIG_0 0xFFFF #define HAL_SCALAR_SC2CMDQ_TRIG_1 0xFFFF #define HAL_SCALAR_SC2CMDQ_TRIG_2 0xFFFF #define HAL_SCALAR_SC2CMDQ_TRIG_3 0xFFFF #define HAL_AESDMA_CMDQDMA_FINISHED 0xFFFF #define HAL_AESDMA_CMDQDMA_FINISHED_2 0xFFFF #define HAL_VOP_DCM2GOP_VDE 0xFFFF #define HAL_VOP_DCS2GOP_VDE 0xFFFF #define HAL_XC_DIP_CMDQ_INT 0xFFFF #define BUS_SHIFT 4 //-------------------------------------------------------------------------------------------------- //-------------------------------------------------------------------------------------------------- // Macro of bit operations //-------------------------------------------------------------------------------------------------- #define HAS_FLAG(flag, bit) ((flag) & (bit)) #define SET_FLAG(flag, bit) ((flag)|= (bit)) #define RESET_FLAG(flag, bit) ((flag)&= (~(bit))) #define SET_FLAG1(flag, bit) ((flag)| (bit)) #define RESET_FLAG1(flag, bit) ((flag)& (~(bit))) //////////////////////////////////////////////// // HAL API //////////////////////////////////////////////// void HAL_CMDQ_SetBank(MS_U32 u32BankAddr); void HAL_CMDQ_Enable(void); void HAL_CMDQ_Stop(void); void HAL_CMDQ_Reset(void); void HAL_CMDQ_Set_Miu_Length(MS_U32 value); void HAL_CMDQ_Set_Miu_Request(MS_U32 value); MS_BOOL HAL_CMDQ_Set_Mode(int ModeSel); void HAL_CMDQ_Set_Start_Pointer(MS_U32 StartAddr); void HAL_CMDQ_Set_End_Pointer(MS_U32 EndAddr); void HAL_CMDQ_Set_Offset_Pointer(MS_U32 OffsetAddr); void HAL_CMDQ_Set_Timer(MS_U32 time); void HAL_CMDQ_Set_Ratio(MS_U32 ratio); void HAL_CMDQ_Reset_Soft_Interrupt(void); void HAL_CMDQ_Reset_Start_Pointer_bit(void); void HAL_CMDQ_Read_Soft_Interrupt(void); void HAL_CMDQ_Read_Dec_Done(void); void HAL_CMDQ_Start(void); MS_U32 HAL_CMDQ_Read_Dummy_Register(void); void HAL_CMDQ_Write_Dummy_Register(MS_U32 DummyValue); void HAL_CMDQ_Set_MIU_SELECT(MS_U32 miu_select); MS_U32 HAL_CMDQ_Read_Start_Pointer(void); MS_U32 HAL_CMDQ_Read_End_Pointer(void); void HAL_CMDQ_Write_Dummy_Register_release_polling(int Write_bit); MS_U32 HAL_CMDQ_Error_Command(MS_U32 select_bit); void HAL_CMDQ_Write_Pointer(MS_U32 Write_value); MS_U32 HAL_CMDQ_Read_Pointer(void); MS_U32 HAL_CMDQ_Get_Write_Pointer(void); #endif // #ifndef _CMDQ_REG_MCU_H_