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Zxx";Wm1Z`s pln!( !11111111111111a aaa aaaaj  drivers/core/of_access.cWARNING at %s:%d/%s()! drivers/mtd/mtdcore.c%s: unlock failed, writes may not work Magic(%x) is not support Tag is overflow %s.%s/chosensame-as-splu-boot,spl-boot-order%s: decompress error, ret=%d digest+ U-Boot SPL board initspl_early_init() failed: %d SPL Hotkey: ctrl+%c ctrl+b: Bootrom download! UnknownKernelJumping to %s(0x%08lx) via ARM Trusted Firmware(0x%08lx) Jumping to U-Boot(0x%08lx) Trying to boot from %s SPL: Unsupported Boot Device! SPL: failed to boot from all boot devices clock-frequency#clock-cellsclock-namesassigned-clock-parentsassigned-clocksassigned-clock-ratesInsufficient RAM for page table: 0x%lx > 0x%lx. Please increase the size in get_page_table_size()Unknown crypto algorithm: 0x%x Removing MTD device #%d (%s) with use count %d Error when deleting partition "%s" (%d) /clocksu-boot,dm-pre-relocu-boot,dm-splMMC error: The cmd index is %d, ret is %d Cannot set speed (err=%d) Cannot set mode (err=%d) Bad mode in "Error" handler, esr 0x%08x Bad mode in "Fiq" handler, esr 0x%08x Bad mode in "Irq" handler, esr 0x%08x Bad mode in "Synchronous Abort" handler, esr 0x%08x Resetting CPU ... Call trace: PC: [< %08lx >] LR: [< %08lx >] Stack: Copy info from "Call trace..." to a file(eg. dump.txt), and run command in your U-Boot project: ./scripts/stacktrace.sh dump.txt %s Unsupported bus width: %d #address-cells%s: %s: %s %s: num banks %d exceeds hardcoded limit %d. Recompile with higher MEMORY_BANKS_MAX? device_typeWARNING: could not set %s %s. reg/aliaseslinux,phandlecompatible#size-cells%s: Bad cell count for %s rangesstatusokayMissing DTB MMC Device %d not found MTD Device %d not found Can't read verified-boot flag ## Verified-boot: %d /configurations%s: Missing FDT description in DTB totalsizeCan't get hash algo propertyuboot-ignore-skipped Can't get hash value propertyUnsupported hash algorithmBad hash value len Bad hash: %02xBad hash value(...) Unsupported %s address size archcompdatadata-offsetdata-positiondata-sizealgohashCorrupted or truncated tree error! %s for '%s' hash node in '%s' image node CPUCompressionError: gunzip out of data in header ### ERROR ### Please RESET the board ### sha256Can't find expected crypto device %s: algo %s failed, ret=%d incorrect header checkunknown compression methodinvalid window sizeunknown header flags setheader crc mismatchinvalid block typeinvalid stored block lengthstoo many length or distance symbolsinvalid code lengths setinvalid bit length repeatinvalid literal/lengths setinvalid distances setincorrect data checkincorrect length checkinvalid distance too far backinvalid distance codeinvalid literal/length code%s: Invalid Argument(s) *** ERROR: Can't read MBR header *** *** ERROR: Can't read GPT header *** %s: ERROR: Can't allocate %#lX bytes for GPT Entries *** ERROR: Can't read GPT Entries *** GPT: Failed to allocate memory for PTE Macronix Quad bit not set sys malloc pool space exhausted Caution! Your devices Erase group is 0x%x The erase range would be change to 0x%lx~0x%lx mmc_blkMMC: block number 0x%lx exceeds max(0x%lx) Re-init retry timeout %s: Re-init mmc_read_blocks error mmc erase failed %s: %d, time %lu mmc fail to send stop cmd Status Error: 0x%08X Timeout waiting card ready MMC: no card present Card did not respond to voltage select! MMC: SET_DSR failed switch to bus width for hs400 failed mmc write failed map table blk begin[%d] overflow 0x%.4xrk-nandV1.00Attempt to erase non block-aligned data, pos= %llx, len= %llx map_erase error %d while erasing %llx Write in GPT area, lba=%ld cnt=%ld %s: Fail to malloc!Skipping bad block 0x%08x in read NAND read from offset %x failed %d Attempt to write non page-aligned data Skipping bad block 0x%08x in write NAND write to offset %llx failed %d drivers/mtd/nand/spi/macronix.cnand-bbt: bbt_write fail, blk=%d recheck fail %d-%d nand-bbt: bbt_update failed nand-bbt: bbt_update fail, blk=%d ret= %d nand-bbt: read_bbt blk=%d fail=%d update=%d nand-bbt: read_bbt check fail blk=%d ret=%d update=%d reg-offsetreg-shiftns16550 failed to get clock, err=%d reg-names//:drivers/core/of_addr.cBUG at %s:%d/%s()! BUG!%s: *** ERROR: Invalid GPT *** %s: *** ERROR: Invalid Backup GPT *** %s: *** Using Backup GPT *** pinconfigpinctrl-namespinctrl-%dcould not find pctldev U-Boot SPL 2017.09-g3aa32998d6d-250107 #lxh (Jan 08 2025 - 16:54:13), fwver: v1.06 arm,psci-0.2psci-sysresetarm,psci-1.0missing "method" property hvcinvalid "method" property: %s %s unsupport rate %s: wait pll lock timeout! pll_id=%ld %s: wait init status timeout phys%s Get syscon grf failed%s: caldone timeout. %s: dllrdy timeout. %s: gpll=%lu, cpll=%ld cpu pvtpll %d KHz inno_hdmi_pll_clk%s gpll=%lu %s: could not find cru device do not access non secure area, half word offset = %d Please input correct addr, offset(bytes) is 0x%x The zone is written. rk3528_secure_otp_write_byte_noecc error %s timeout during write setup 2 %s timeout during write setup 3 %s timeout during write setup 4 %s timeout during write setup 5 %s timeout during write setup 6 %s timeout during write setup 8 rk3528_secure_otp_write_2_bytes error Please input correct addr, offset is 0x%x %s timeout during write setup 1 %s timeout during write setup 7 %s timeout during write setup 9 unsupported bank_num %d Failed to get clk index %d, ret=%d Failed to enable(%d) clk(%ld): ret=%d rk_calcNp_and_initmodop failCan't find "clocks" property Can't read "clocks" property Can't read "clock-frequency" property %s: Failed to set clk(%ld): ret=%d total length(0x%08x) != init length(0x%08x)! Best phase range %d-%d (%d len) Successfully tuned phase to %d, used %ldms non-removablefifo-depthfifo-modeclock-freq-min-maxciu-samplemmc-hs200-1_8vdefault-sample-phaseCANNOT FIND Fout by auto,fout = %lu Can't FIND postdiv1/2 to make fout=%lu in 800~2000M. %s: invalid clk rate %s timeout during ecc_enable rockchip,grfrockchip,pmudrivers/pinctrl/pinctrl-rockchip.crockchip,ioc1rockchip,rmiodrivers/pinctrl/rockchip/pinctrl-rockchip-core.crockchip,pinsunsupported type DRV_TYPE_IO_SMIC %s: Unknown pll type for pll clk %ld %s unsupported rate timeout during wait dp2stb timeout during wait stb2act timeout during wait rd timeout during wait act2stb timeout during wait stb2dp %s rockchip_otp_ecc_enable err %s timeout during set ceb %s timeout during set rstb %s timeout during read setup Invalid "bus-width" value %s clk set rate fail! %s fail to get clk mmc-hs400-1_8vmmc-hs400-enhanced-strobefixed-emmc-driver-typesecure_confmask_addrcru_rst_addr%d %d dll training failed in %dMHz, reduce the speed xfer data failed ret %d dir %d xfer data failed ret %d sfc-no-dmarockchip,sclk-x2-bypassrockchip,max-dllCould not get clock for %s: %d Could not get ahb clock for %s: %d sfc cmd=%02xH(6BH-x4) SFC reset never finished set_freq=%dHz fail, check if it's the cru support level dma timeout wait sfc idle timeout FATAL: unexpected command to back_to_bootrom() %s: Internal clock never stabilised. %s: Aligned buffer alloc failed!!! %s: Reset 0x%x never completed. %s: MMC: %d busy timeout increasing to: %u ms. %s: Timeout for status update! %s: Error detected in status(0x%X)! %s: Transfer data timeout %s: Timeout to wait cmd & data inhibit %s: Your controller doesn't support SDMA!! %s: Hardware doesn't specify base clock frequency Page table pointer not setup.pte not found ELR: %lx LR: %lx ESR: %lx (ec=%ld) x%-2d: %016lx x%-2d: %016lx nor%dFailed to unregister MTD %s and the spi_flash object is going away: you're in deep trouble!spi_flashCannot create block device SF: Erase offset/length not multiple of erase size SF: Failed to set up slave labelunrecognized JEDEC id bytes: %02x, %02x, %02x enabling reset hack; may not recover from unexpected reboots Erase operation failed. Program operation failed. Attempted to modify a protected sector. flash operation timed out spi-max-frequencyspi-cpolspi-cphaspi-cs-highspi-3wirespi-half-duplexspi-tx-bus-widthspi-rx-bus-widthspi-nand%dunknown raw ID %x %x %x SPI Nand ID %x %x %x SPI NANDs with more than one die must implement ->select_target() Failed to initialize the SPI NAND chip (err = %d) drivers/mtd/nand/spi/core.cmiscNo misc partition Magic is incorrect. No support for given major version. CRC32 does not match. Error validating A/B metadata from disk. Resetting and writing new A/B metadata to disk. A/B: no bootable slot A/B: slot boot fail, do reset Total: %ld.%ld/%ld.%ld ms fdtNo matching DT out of these options: description %s /fit-imagesentry-pointload-addrNo bootable slots found, use lastboot. _a_bSPL: A/B-slot: %s, successful: %d, tries-remain: %d # Reset the board to bootrom # Cannot get image data/size compression## Checking %s 0x%08lx (%s @0x%08lx) ... ## Checking %s 0x%08lx ... OK entryTrying fit image at 0x%lx sector IO error Not fit magic /imagesVerified-boot requires CONFIG_SPL_FIT_SIGNATURE enabled standalone%s: start standalone fail, ret=%d loadablesosspl: unsupported mmc boot device. spl: could not initialize mmc. error: %d spl: could not find mmc device. error: %d spl: mmc init failed with error: %d spl: mmc partition switch failed ubootspl: partition error spl: mmc: wrong boot mode spl: unsupported mtd boot device. spl-v1.06U-BootPTE %p (%llx) is not a block. Some driver code wants to modify dcache settings for an range not covered in mem_map.rk3528_sysconrockchip,rk3528-grfMMC2_2MMC2MMC1MTD2MTD1MTD0architectureoperating systemimage typenoneuncompressedbzip2bzip2 compressedgzipgzip compressedlzmalzma compressedlzolzo compressedlz4lz4 compressedaisimageDavinci AIS imagefilesystemFilesystem Imageflat_dtFlat Device TreegpimageTI Keystone SPL ImagekernelKernel Imagekernel_noloadKernel Image (no loading done)kwbimageKirkwood Boot ImageimximageFreescale i.MX Boot ImageinvalidInvalid ImagemultiMulti-File ImageomapimageTI OMAP SPL With GP CHpblimageFreescale PBL Boot ImageRAMDisk ImagescriptScriptsocfpgaimageAltera SOCFPGA preloaderStandalone ProgramublimageDavinci UBL imagemxsimageFreescale MXS Boot ImageatmelimageATMEL ROM-Boot Imagex86_setupx86 setup.binlpc32xximageLPC32XX Boot ImagerkimageRockchip Boot ImagerksdRockchip SD Boot ImagerkspiRockchip SPI Boot ImagevybridimageVybrid Boot ImagezynqimageXilinx Zynq Boot ImagezynqmpimageXilinx ZynqMP Boot ImagefpgaFPGA ImageTrusted Execution Environment Imagefirmware_ivtFirmware with HABv4 IVTpmmcTI Power Management Micro-Controller FirmwarerknandRockchip NAND Boot ImageInvalid OSop-teeOP-TEEarm-trusted-firmwareARM Trusted FirmwarelinuxLinuxnetbsdNetBSDoseEnea OSEplan9Plan 9rtemsRTEMSu-bootvxworksVxWorksInvalid ARCHalphaAlphaarmARMIntel x86ia64IA64m68kM68KmicroblazeMicroBlazemipsMIPSmips64MIPS 64 Bitnios2NIOS IIpowerpcPowerPCppcs390IBM S390SuperHsparcSPARCsparc64SPARC 64 BitblackfinBlackfinavr32AVR32nds32NDS32or1kOpenRISC 1000sandboxSandboxarm64AArch64AMD x86_64xtensaXtensariscvRISC-Vstdinstdoutstderrneed dictionarystream endfile errorstream errordata errorinsufficient memorybuffer errorincompatible versionFDT_ERR_NOTFOUNDFDT_ERR_EXISTSFDT_ERR_NOSPACEFDT_ERR_BADOFFSETFDT_ERR_BADPATHFDT_ERR_BADPHANDLEFDT_ERR_BADSTATEFDT_ERR_TRUNCATEDFDT_ERR_BADMAGICFDT_ERR_BADVERSIONFDT_ERR_BADSTRUCTUREFDT_ERR_BADLAYOUTFDT_ERR_INTERNALFDT_ERR_BADNCELLSFDT_ERR_BADVALUEFDT_ERR_BADOVERLAYFDT_ERR_NOPHANDLESnvidia,tegra20-emcnvidia,tegra20-emc-tablenvidia,tegra20-nandnvidia,tegra124-xusb-padctlnvidia,tegra210-xusb-padctlsmsc,lan9215samsung,exynos-sromcsamsung,s3c2440-i2csamsung,exynos-soundwolfson,wm8994-codecsamsung,exynos-usb-physamsung,exynos5250-usb3-physamsung,exynos-tmusamsung,exynos-mipi-dsisamsung,exynos-dwmmcsamsung,exynos-mmcmaxim,max77686spi-flashmaxim,max98095-codecsamsung,exynos5-hsi2csamsung,sysmmu-v3.3intel,microcodeams,as3722intel,quark-mrcaltr,socfpga-stmmacaltr,socfpga-dw-mshcsnps,dwc2intel,baytrail-fspintel,baytrail-fsp-mdpintel,ivybridge-fspallwinner,sun4i-a10-nandaltr,clk-mgrpinctrl-singlealtr,socfpga-hps2fpga-bridgealtr,socfpga-lwhps2fpga-bridgealtr,socfpga-fpga2hps-bridgealtr,socfpga-fpga2sdram0-bridgealtr,socfpga-fpga2sdram1-bridgealtr,socfpga-fpga2sdram2-bridgerockchip,rk-nandchdusbddocdmmcsdEFIfixed_rate_clockfixed-clockscmi_clkrockchip_rk3528_crurockchip,rk3528-crurockchip_rk3528_grf_crurockchip,rk3528-grf-crurootroot_drivernopgeneric_simple_bussimple-bussimple-mfdrsa_mod_expmod_exp_swrockchip_crypto_v2rockchip,px30-cryptorockchip,rk1808-cryptorockchip,rk3308-cryptorockchip,rv1126-cryptorockchip,rk3568-cryptorockchip,rk3588-cryptorockchip,crypto-v3rockchip,crypto-v4rockchip_otprockchip,px30-otprockchip,px30s-otprockchip,rk3308-otprockchip,rk3308bs-otprockchip,rk3506-otprockchip,rk3528-otprockchip,rk3562-otprockchip,rk3568-otprockchip,rk3576-otprockchip,rk3588-otprockchip,rv1106-otprockchip,rv1126-otprockchip_secure_otprockchip,rk3528-secure-otprockchip_sysresetarm,psciscmi_agentscmi-over-smcccarm,scmi-smcrockchip_rk3288_dw_mshcrockchip,rk3288-dw-mshcrockchip,rk2928-dw-mshcGeneral failureAuthentication failureCounter failureAddress failureWrite failureRead failureAuthentication key not yet programmedrockchip_sdhci_5_1arasan,sdhci-5.1snps,dwcmshc-sdhcirockchip,rk3528-dwcmshcrockchip,rk3562-dwcmshcrockchip,rk3576-dwcmshcrockchip,rk3588-dwcmshcrockchip_pinctrlrockchip,px30-pinctrlrockchip,rv1108-pinctrlrockchip,rv1126-pinctrl-legencyrockchip,rk1808-pinctrlrockchip,rk2928-pinctrlrockchip,rk3036-pinctrlrockchip,rk3066a-pinctrlrockchip,rk3066b-pinctrlrockchip,rk3128-pinctrlrockchip,rk3188-pinctrlrockchip,rk3228-pinctrlrockchip,rk3288-pinctrlrockchip,rk3308-pinctrlrockchip,rk3328-pinctrlrockchip,rk3368-pinctrlrockchip,rk3399-pinctrlRK3399-GPIOgpio0gpio1gpio2gpio3gpio4RK3368-GPIORK3328-GPIORK3308-GPIORK3288-GPIOgpio5gpio6gpio7gpio8RK3228-GPIORK3188-GPIORK3128-GPIORK3066b-GPIORK3066a-GPIORK3036-GPIORK2928-GPIORK1808-GPIORV1126-GPIORV1108-GPIOPX30-GPIObias-disablebias-bus-holdbias-pull-upbias-pull-downdrive-strengthinput-enableinput-disableinput-schmitt-disableinput-schmitt-enableslew-ratebias-pull-pin-defaultoutput-highoutput-lowrockchip_rk3528_pinctrlrockchip,rk3528-pinctrlns16550_serialns16550ns16550aingenic,jz4780-uartnvidia,tegra20-uartsnps,dw-apb-uartti,omap2-uartti,omap3-uartti,omap4-uartti,am3352-uartti,am4372-uartti,dra742-uartspi_flash_stdjedec,spi-noren25q32ben25q64en25qh64en25qh128en25s64en25qh256aen25qx256aen25qx128aen25qx64agd25q16gd25q32gd25lq32gd25q64gd25lq64cgd25q128gd25q512gd25lb512mgd55lb01gegd25b512mgd55b01gegd25b256gd25b512gd55b01ggd55b02ggd25f64gd25f128gd25f256gd55f512gd25t512gd55t01ggd55t02ggd25x512gd55x01ggd55x02ggd25lq128gd25lq256dgd25lb256gd25lb512gd55lb01ggd55lb02ggd25lf80gd25lf16gd25lf32gd25lf64gd25lf128gd25lf255gd25lf511gd25lt256gd25lt512gd55lt01ggd55lt02ggd25lx256egd25lx512gd55lx01ggd55lx02gis25lq040bis25lp008is25lp016is25lp032is25lp064is25lp128is25lp256is25lp512is25lp01gis25wp008is25wp016is25wp032is25wp064is25wp128is25wp256is25wp512is25wp01gis25wx256mx25l2005amx25l4005amx25l8005mx25l1606emx25l3205dmx25l6405dmx25u2033emx25u1635emx25u3235fmx25u6435fmx25l12805dmx25u12835fmx25u51245gmx25l12855emx25l25635emx25u25635fmx25v8035fmx25r1635fmx25l25655emx66l51235lmx66u51235fmx25u51245fmx66u1g45gmx66u2g45gmx66l1g45gmx66l2g45gmx25l1633emx25r6435fmx66uw2g345gx0mx66lm1g45gmx25lm51245gmx25lw51245gmx25lm25645gmx66uw2g345gmx66um1g45gmx66uw1g45gmx25uw51245gmx25uw51345gmx25um25645gmx25uw25645gmx25um25345gmx25uw25345gmx25uw12845gmx25uw12345gmx25uw6445gmx25uw6345gw25p80w25p16w25p32w25x05w25x40w25x16w25q16dww25x32w25q20clw25q20bww25q20eww25q32w25q32dww25q32jvw25q32jwmw25x64w25q64dww25q64jvw25q128fww25q128jvw25q256fww25q256jww25q512jvw25q512nwqw25q512nwmw25q512jvqw25q01jvw25q01jvfimw25q80w25q80blw25q16clw25q64cvw25q128w25q256w25m512jww25m512jvw25h02jvXM25QH32AXM25QH64AXM25QH64BXM25QH64CXM25QU64CXM25QH128AXM25QH128BXM25QH128CXM25QH256CXM25QU128Cxt25f64fxt25f128bxt25f256bxt25q64dxt25q128dxt25q256P25Q64HP25Q128HPY25Q64HAPY25Q128HAPY25Q256HBPY25Q128LAPY25Q256LCFM25Q128AFM25Q64FM25Q256I3FM25Q64AFM25M4AAFM25M64CBY25Q256FSEIGBY25Q64ESSIGspi_generic_drvspi_genericrockchip_sfcrockchip,fspirockchip,sfcmtdmtd_blkGigaDeviceGD5F1GQ4xAGD5F2GQ4xAGD5F4GQ4xAGD5F4GQ4RCGD5F4GQ4UCGD5F1GQ4UExxGGD5F1GQ4RExxGGD5F2GQ4UExxGGD5F2GQ4RExxGGD5F1GQ4UFxxGGD5F1GQ5UExxGGD5F1GQ5RExxGGD5F2GQ5UExxGGD5F2GQ5RExxGGD5F4GQ6UExxGGD5F4GQ6RExxGGD5F1GM7UExxGGD5F1GM7RExxGGD5F2GM7UExxGGD5F2GM7RExxGGD5F4GM8UExxGGD5F4GM8RExxGGD5F1GQ4UExxHMacronixMX35LF1GE4ABMX35LF2GE4ABMX35LF2GE4ADMX35LF4GE4ADMX35LF1G24ADMX35LF2G24ADMX35LF4G24ADMX31LF1GE4BCMX31UF1GE4BCMX35LF2G14ACMX35UF4G24ADMX35UF4GE4ADMX35UF2G14ACMX35UF2G24ADMX35UF2GE4ADMX35UF2GE4ACMX35UF1G14ACMX35UF1G24ADMX35UF1GE4ADMX35UF1GE4ACMicronMT29F2G01ABAGDMT29F1G01ABAGDToshibaTC58CVG0S3TC58CVG1S3TC58CVG2S0TC58CYG0S3TC58CYG1S3TC58CYG2S0TC58CVG0S3HRAIJTC58CVG1S3HRAIJTC58CVG2S0HRAIJWinbondW25M02GVW25N512GVW25N01GVW25N02KVW25N04KVW25N01GWW25N02KWW25N01KVW25N01JWZEIGW25N01KWZPIGdosiliconDS35X1GADS35Q2GADS35M1GADS35M2GADS35Q2GBDS35M1GBDS35Q1GBDS35Q4GMDS35Q12BDS35M12BDS35Q1GD-IBDS35M4GB-IBDS35Q4GB-IBDS35Q12C-IBDS35M12C-IBDS35Q2GBSesmtF50L1G41LBF50L2G41KAXINCUNXCSP2AAPKXCSP1AAPKxtxXT26G01AXT26G02AXT26G04AXT26G01BXT26G02BXT26G01CXT26G02CXT26G04CXT26G11CXT26Q02DWSIGAXT26Q01DWSIGAXT26Q04DWSIGAXT26G01DWSIGAXT26G02DWSIGAXT26G04DWSIGAXT26Q04DWSIGT-BhyfHYF1GQ4UPACAEHYF1GQ4UDACAEHYF2GQ4UAACAEHYF2GQ4UHCCAEHYF4GQ4UAACBEHYF2GQ4IAACAEHYF1GQ4IDACAEFMSHFM25S01AFM25S02AFM25S01FM25LS01FM25S01BI3FM25S02BI3-DND-A-G3FM25G02DforeseeFS35ND01G-S1Y2FS35ND02G-S3Y2FS35ND04G-S2Y2F35SQA001GF35SQA002GF35SQA512MF35UQA512MF35UQA002G-WWTF35UQA001G-WWTF35SQB004GF35SQB002GBIWINBWJX08KEtronEM73C044VCF-0HJSCJS28U1GQSCAHG-83silicongoSGM7000I-S24W1GHUNIMUNIM_ZLUM19A1HISWUM19A0HCSWUM19A0LCSWUM19A1LISWUM19A9LISWUM19A9HISWTX25G01skyhighS35ML01G3S35ML02G3S35ML04G3GSTOGSS01GSAK1GSS02GSAK1GSS02GSAX1GSS01GSAX1ZBITZB35Q01BYIGZB35Q04BYIGHIKSEMIHSESYHDSW2Gspi_nandspi-nandidescsiatapiusbdocsatahostacenvmespinandspinorramdiskrockchip_resetdrivers/mtd/nand/spi/toshiba.cGUID Partition Table Entry Array CRC is wrong%s: 0x%x != 0x%x GUID Partition Table Header%s signature is wrong: 0x%llX != 0x%llX %s CRC is wrong: 0x%x != 0x%x GPT: my_lba incorrect: %llX != %lx GPT: first_usable_lba incorrect: %llX > %lx GPT: SPL workaround factory last_usable_lba GPT: last_usable_lba incorrect: %llX > %lx 1.2.3Error: inflateInit2() returned %d Error: inflate() returned %d K`8CBD(s*K>; q Ik e "_ JZ rfT d?MGqFA<ʚ;];p89\6,0F#g#Q ظ\ O  O` O O@ OqOIkKeG"_CJZ?rfT;d?M6G2qFcA[<*ʚ;}];Sp89(\6L,0DF#2g#cQDN HظUU88   0  ^dt 47 :7 @7 F7  @ 47 :7 @7 F7 L7 47 :7 @7 F7 47 :7 @7 47 :7 @7 F7 L77 47 :7 @7 F7   DD DD D D@D@@ 47 :7 @7 F7 47 :7 @7 F7PPPPP PP PPP P P PPP P P P 47 :7 @7 F7dd47DDD :7 @7 F7 L7 7 7 77( ,000 444 h h     00 0 47 :7 @7 F7 L7 `oj7 Hn n (tĹ $(0PP PPPPP 0P@P@@PPP 47 :7 @7 F7 47 :7 @7 F7   @@@ 47 :7 @7 F7 L78ļ    47 :7 @7 F7 ``` ` ` ` ```ddd0d0d 0d@d@@dddd d d ddd d hhhhhhh@h@@hhh h h h0h0h 0hh@h   @@@  @@@  47 :7 ( @7 F7L7 47 :7 (08 @7@ F7`hp L7Bbt0k; k; k; k; k; k; k; k; k; k; k; k; k; k; k; k; k; k; k; k; k; 4k; 2222222222222222222k; 4444444444444422444k; 2[ZL[Z4%h<8 p&1iiA*%Ep/%  L{ȫ1&A 9@@\ 182XP(52pHy3_t^1Z%#@p(4%кГ$ (o2$>? SI:[xL1hHLt1ضN3$лpJ haAAPPhп1C1HP 4>1 @9CH @hEADI'8A`R%Ex3FU1"1@xȮ%4%4%4%6%6%6  H12ZA* $/%1&A'1(1(52,(7\I:14>_9@1 L xAA\ 0 UAD,C@%EF 58t(<$rockchip,rk3528-evbrockchip,rk3528 !&Rockchip RK3528 Evaluation Boardaliases,/pinctrl/gpio@ff6100002/pinctrl/gpio@ffaf00008/pinctrl/gpio@ffb00000>/serial@ffa00000F/spi@ffc00000K/mmc@ffbf0000P/mmc@ffc30000firmwareUscmi arm,scmi-smcci Uprotocol@14txUscmi-shmem@10f000arm,scmi-shmemtUsyscon@ff300000&rockchip,rk3528-grfsysconsimple-mfdt0 Uokay clock-controller@ff4a0000rockchip,rk3528-crutJ xUokaysyscon@ff540000rockchip,rk3528-ioc-grfsyscontTUokay\serial@ffa00000&rockchip,rk3528-uartsnps,dw-apb-uartt *+ + okayn6Ummc@ffbf0000rockchip,rk3528-dwcmshct ((corebusaxiblocktimer okay U&@spi@ffc00000 rockchip,sfct@  okayUflash@0U spi-nandtWhyxhflash@1Ujedec,spi-norsfc_nortWhymmc@ffc300000rockchip,rk3528-dw-mshcrockchip,rk3288-dw-mshct@ р VVresetdefaultWXYZokayUcrypto@ffc40000rockchip,crypto-v4t   : crypto-rstokayUpinctrlrockchip,rk3528-pinctrl\ Uokay]gpio@ff610000rockchip,gpio-bankta G] 4U)gpio@ffaf0000rockchip,gpio-bankt I] 4Ugpio@ffb00000rockchip,gpio-bankt K]@ 4Upcfg-pull-upEUapcfg-pull-noneRU^pcfg-pull-none-drv-level-1R_Upcfg-pull-none-drv-level-2R_Upcfg-pull-up-drv-level-1E_Upcfg-pull-up-drv-level-2E_U_sdmmc-pinsUsdmmc-bus4@n____UZsdmmc-clkn_UWsdmmc-cmdn_UXsdmmc-detnaUYchosen|/serial@ffa00000H/mmc@ffc30000/mmc@ffbf0000/spi@ffc00000/flash@0/spi@ffc00000/flash@1secure-otp@ffcd0000rockchip,rk3528-secure-otpt@EJUokay compatible#address-cells#size-cellsmodelgpio0gpio1gpio2serial2spi2mmc0mmc1u-boot,dm-splshmemarm,smc-idreg#clock-cellsphandlestatusrockchip,grf#reset-cellsinterruptsclocksreg-shiftreg-io-widthdmasclock-frequencyresetsreset-namesmax-frequencybus-widthmmc-hs400-1_8vmmc-hs400-enhanced-strobefixed-emmc-driver-typespi-tx-bus-widthspi-rx-bus-widthspi-max-frequencylabelfifo-depthrockchip,use-v2-tuningpinctrl-namespinctrl-0assigned-clocksassigned-clock-ratesrangesgpio-controller#gpio-cellsgpio-rangesinterrupt-controller#interrupt-cellsbias-pull-upbias-disabledrive-strengthrockchip,pinsstdout-pathu-boot,spl-boot-ordersecure_confmask_addrcru_rst_addr