/* * Copyright (c) 2023-2024, STMicroelectronics - All Rights Reserved * * SPDX-License-Identifier: BSD-3-Clause */ #include #include #include #define BKPR_BOOT_MODE 96U #define MAP_SYSRAM MAP_REGION_FLAT(STM32MP_SYSRAM_BASE, \ STM32MP_SYSRAM_SIZE, \ MT_MEMORY | \ MT_RW | \ MT_SECURE | \ MT_EXECUTE_NEVER) #define MAP_DEVICE MAP_REGION_FLAT(STM32MP_DEVICE_BASE, \ STM32MP_DEVICE_SIZE, \ MT_DEVICE | \ MT_RW | \ MT_SECURE | \ MT_EXECUTE_NEVER) #if defined(IMAGE_BL2) static const mmap_region_t stm32mp2_mmap[] = { MAP_SYSRAM, MAP_DEVICE, {0} }; #endif void configure_mmu(void) { mmap_add(stm32mp2_mmap); init_xlat_tables(); enable_mmu_el3(0); } uintptr_t stm32_get_gpio_bank_base(unsigned int bank) { if (bank == GPIO_BANK_Z) { return GPIOZ_BASE; } assert(bank <= GPIO_BANK_K); return GPIOA_BASE + (bank * GPIO_BANK_OFFSET); } uint32_t stm32_get_gpio_bank_offset(unsigned int bank) { if (bank == GPIO_BANK_Z) { return 0; } assert(bank <= GPIO_BANK_K); return bank * GPIO_BANK_OFFSET; } unsigned long stm32_get_gpio_bank_clock(unsigned int bank) { if (bank == GPIO_BANK_Z) { return CK_BUS_GPIOZ; } assert(bank <= GPIO_BANK_K); return CK_BUS_GPIOA + (bank - GPIO_BANK_A); } uintptr_t stm32_get_bkpr_boot_mode_addr(void) { return tamp_bkpr(BKPR_BOOT_MODE); }