/* * Copyright (c) 2025, Mediatek Inc. All rights reserved * SPDX-License-Identifier: BSD-3-Clause */ #ifndef MT6359P_LOWPOWER_REG_H #define MT6359P_LOWPOWER_REG_H #define MT6359P_RG_BUCK_VPU_VOSEL_SLEEP_ADDR 0x148e #define MT6359P_RG_BUCK_VPU_HW0_OP_EN_ADDR 0x1494 #define MT6359P_RG_BUCK_VPU_HW1_OP_EN_ADDR 0x1494 #define MT6359P_RG_BUCK_VPU_HW2_OP_EN_ADDR 0x1494 #define MT6359P_RG_BUCK_VPU_HW3_OP_EN_ADDR 0x1494 #define MT6359P_RG_BUCK_VPU_HW4_OP_EN_ADDR 0x1494 #define MT6359P_RG_BUCK_VPU_HW5_OP_EN_ADDR 0x1494 #define MT6359P_RG_BUCK_VPU_HW6_OP_EN_ADDR 0x1494 #define MT6359P_RG_BUCK_VPU_HW7_OP_EN_ADDR 0x1494 #define MT6359P_RG_BUCK_VPU_HW8_OP_EN_ADDR 0x1494 #define MT6359P_RG_BUCK_VPU_HW9_OP_EN_ADDR 0x1494 #define MT6359P_RG_BUCK_VPU_HW10_OP_EN_ADDR 0x1494 #define MT6359P_RG_BUCK_VPU_HW11_OP_EN_ADDR 0x1494 #define MT6359P_RG_BUCK_VPU_HW12_OP_EN_ADDR 0x1494 #define MT6359P_RG_BUCK_VPU_HW13_OP_EN_ADDR 0x1494 #define MT6359P_RG_BUCK_VPU_HW14_OP_EN_ADDR 0x1494 #define MT6359P_RG_BUCK_VPU_SW_OP_EN_ADDR 0x1494 #define MT6359P_RG_BUCK_VPU_HW0_OP_CFG_ADDR 0x149a #define MT6359P_RG_BUCK_VPU_HW1_OP_CFG_ADDR 0x149a #define MT6359P_RG_BUCK_VPU_HW2_OP_CFG_ADDR 0x149a #define MT6359P_RG_BUCK_VPU_HW3_OP_CFG_ADDR 0x149a #define MT6359P_RG_BUCK_VPU_HW4_OP_CFG_ADDR 0x149a #define MT6359P_RG_BUCK_VPU_HW5_OP_CFG_ADDR 0x149a #define MT6359P_RG_BUCK_VPU_HW6_OP_CFG_ADDR 0x149a #define MT6359P_RG_BUCK_VPU_HW7_OP_CFG_ADDR 0x149a #define MT6359P_RG_BUCK_VPU_HW8_OP_CFG_ADDR 0x149a #define MT6359P_RG_BUCK_VPU_HW9_OP_CFG_ADDR 0x149a #define MT6359P_RG_BUCK_VPU_HW10_OP_CFG_ADDR 0x149a #define MT6359P_RG_BUCK_VPU_HW11_OP_CFG_ADDR 0x149a #define MT6359P_RG_BUCK_VPU_HW12_OP_CFG_ADDR 0x149a #define MT6359P_RG_BUCK_VPU_HW13_OP_CFG_ADDR 0x149a #define MT6359P_RG_BUCK_VPU_HW14_OP_CFG_ADDR 0x149a #define MT6359P_RG_BUCK_VPU_HW0_OP_MODE_ADDR 0x14a0 #define MT6359P_RG_BUCK_VPU_HW0_OP_MODE_SHIFT 0 #define MT6359P_RG_BUCK_VPU_HW1_OP_MODE_ADDR 0x14a0 #define MT6359P_RG_BUCK_VPU_HW1_OP_MODE_SHIFT 1 #define MT6359P_RG_BUCK_VPU_HW2_OP_MODE_ADDR 0x14a0 #define MT6359P_RG_BUCK_VPU_HW2_OP_MODE_SHIFT 2 #define MT6359P_RG_BUCK_VPU_HW3_OP_MODE_ADDR 0x14a0 #define MT6359P_RG_BUCK_VPU_HW3_OP_MODE_SHIFT 3 #define MT6359P_RG_BUCK_VPU_HW4_OP_MODE_ADDR 0x14a0 #define MT6359P_RG_BUCK_VPU_HW4_OP_MODE_SHIFT 4 #define MT6359P_RG_BUCK_VPU_HW5_OP_MODE_ADDR 0x14a0 #define MT6359P_RG_BUCK_VPU_HW5_OP_MODE_SHIFT 5 #define MT6359P_RG_BUCK_VPU_HW6_OP_MODE_ADDR 0x14a0 #define MT6359P_RG_BUCK_VPU_HW6_OP_MODE_SHIFT 6 #define MT6359P_RG_BUCK_VPU_HW7_OP_MODE_ADDR 0x14a0 #define MT6359P_RG_BUCK_VPU_HW7_OP_MODE_SHIFT 7 #define MT6359P_RG_BUCK_VPU_HW8_OP_MODE_ADDR 0x14a0 #define MT6359P_RG_BUCK_VPU_HW8_OP_MODE_SHIFT 8 #define MT6359P_RG_BUCK_VPU_HW9_OP_MODE_ADDR 0x14a0 #define MT6359P_RG_BUCK_VPU_HW9_OP_MODE_SHIFT 9 #define MT6359P_RG_BUCK_VPU_HW10_OP_MODE_ADDR 0x14a0 #define MT6359P_RG_BUCK_VPU_HW10_OP_MODE_SHIFT 10 #define MT6359P_RG_BUCK_VPU_HW11_OP_MODE_ADDR 0x14a0 #define MT6359P_RG_BUCK_VPU_HW11_OP_MODE_SHIFT 11 #define MT6359P_RG_BUCK_VPU_HW12_OP_MODE_ADDR 0x14a0 #define MT6359P_RG_BUCK_VPU_HW12_OP_MODE_SHIFT 12 #define MT6359P_RG_BUCK_VPU_HW13_OP_MODE_ADDR 0x14a0 #define MT6359P_RG_BUCK_VPU_HW13_OP_MODE_SHIFT 13 #define MT6359P_RG_BUCK_VPU_HW14_OP_MODE_ADDR 0x14a0 #define MT6359P_RG_BUCK_VPU_HW14_OP_MODE_SHIFT 14 #define MT6359P_RG_BUCK_VCORE_VOSEL_SLEEP_ADDR 0x150e #define MT6359P_RG_BUCK_VCORE_HW0_OP_EN_ADDR 0x1514 #define MT6359P_RG_BUCK_VCORE_HW1_OP_EN_ADDR 0x1514 #define MT6359P_RG_BUCK_VCORE_HW2_OP_EN_ADDR 0x1514 #define MT6359P_RG_BUCK_VCORE_HW3_OP_EN_ADDR 0x1514 #define MT6359P_RG_BUCK_VCORE_HW4_OP_EN_ADDR 0x1514 #define MT6359P_RG_BUCK_VCORE_HW5_OP_EN_ADDR 0x1514 #define MT6359P_RG_BUCK_VCORE_HW6_OP_EN_ADDR 0x1514 #define MT6359P_RG_BUCK_VCORE_HW7_OP_EN_ADDR 0x1514 #define MT6359P_RG_BUCK_VCORE_HW8_OP_EN_ADDR 0x1514 #define MT6359P_RG_BUCK_VCORE_HW9_OP_EN_ADDR 0x1514 #define MT6359P_RG_BUCK_VCORE_HW10_OP_EN_ADDR 0x1514 #define MT6359P_RG_BUCK_VCORE_HW11_OP_EN_ADDR 0x1514 #define MT6359P_RG_BUCK_VCORE_HW12_OP_EN_ADDR 0x1514 #define MT6359P_RG_BUCK_VCORE_HW13_OP_EN_ADDR 0x1514 #define MT6359P_RG_BUCK_VCORE_HW14_OP_EN_ADDR 0x1514 #define MT6359P_RG_BUCK_VCORE_SW_OP_EN_ADDR 0x1514 #define MT6359P_RG_BUCK_VCORE_HW0_OP_CFG_ADDR 0x151a #define MT6359P_RG_BUCK_VCORE_HW1_OP_CFG_ADDR 0x151a #define MT6359P_RG_BUCK_VCORE_HW2_OP_CFG_ADDR 0x151a #define MT6359P_RG_BUCK_VCORE_HW3_OP_CFG_ADDR 0x151a #define MT6359P_RG_BUCK_VCORE_HW4_OP_CFG_ADDR 0x151a #define MT6359P_RG_BUCK_VCORE_HW5_OP_CFG_ADDR 0x151a #define MT6359P_RG_BUCK_VCORE_HW6_OP_CFG_ADDR 0x151a #define MT6359P_RG_BUCK_VCORE_HW7_OP_CFG_ADDR 0x151a #define MT6359P_RG_BUCK_VCORE_HW8_OP_CFG_ADDR 0x151a #define MT6359P_RG_BUCK_VCORE_HW9_OP_CFG_ADDR 0x151a #define MT6359P_RG_BUCK_VCORE_HW10_OP_CFG_ADDR 0x151a #define MT6359P_RG_BUCK_VCORE_HW11_OP_CFG_ADDR 0x151a #define MT6359P_RG_BUCK_VCORE_HW12_OP_CFG_ADDR 0x151a #define MT6359P_RG_BUCK_VCORE_HW13_OP_CFG_ADDR 0x151a #define MT6359P_RG_BUCK_VCORE_HW14_OP_CFG_ADDR 0x151a #define MT6359P_RG_BUCK_VCORE_HW0_OP_MODE_ADDR 0x1520 #define MT6359P_RG_BUCK_VCORE_HW0_OP_MODE_SHIFT 0 #define MT6359P_RG_BUCK_VCORE_HW1_OP_MODE_ADDR 0x1520 #define MT6359P_RG_BUCK_VCORE_HW1_OP_MODE_SHIFT 1 #define MT6359P_RG_BUCK_VCORE_HW2_OP_MODE_ADDR 0x1520 #define MT6359P_RG_BUCK_VCORE_HW2_OP_MODE_SHIFT 2 #define MT6359P_RG_BUCK_VCORE_HW3_OP_MODE_ADDR 0x1520 #define MT6359P_RG_BUCK_VCORE_HW3_OP_MODE_SHIFT 3 #define MT6359P_RG_BUCK_VCORE_HW4_OP_MODE_ADDR 0x1520 #define MT6359P_RG_BUCK_VCORE_HW4_OP_MODE_SHIFT 4 #define MT6359P_RG_BUCK_VCORE_HW5_OP_MODE_ADDR 0x1520 #define MT6359P_RG_BUCK_VCORE_HW5_OP_MODE_SHIFT 5 #define MT6359P_RG_BUCK_VCORE_HW6_OP_MODE_ADDR 0x1520 #define MT6359P_RG_BUCK_VCORE_HW6_OP_MODE_SHIFT 6 #define MT6359P_RG_BUCK_VCORE_HW7_OP_MODE_ADDR 0x1520 #define MT6359P_RG_BUCK_VCORE_HW7_OP_MODE_SHIFT 7 #define MT6359P_RG_BUCK_VCORE_HW8_OP_MODE_ADDR 0x1520 #define MT6359P_RG_BUCK_VCORE_HW8_OP_MODE_SHIFT 8 #define MT6359P_RG_BUCK_VCORE_HW9_OP_MODE_ADDR 0x1520 #define MT6359P_RG_BUCK_VCORE_HW9_OP_MODE_SHIFT 9 #define MT6359P_RG_BUCK_VCORE_HW10_OP_MODE_ADDR 0x1520 #define MT6359P_RG_BUCK_VCORE_HW10_OP_MODE_SHIFT 10 #define MT6359P_RG_BUCK_VCORE_HW11_OP_MODE_ADDR 0x1520 #define MT6359P_RG_BUCK_VCORE_HW11_OP_MODE_SHIFT 11 #define MT6359P_RG_BUCK_VCORE_HW12_OP_MODE_ADDR 0x1520 #define MT6359P_RG_BUCK_VCORE_HW12_OP_MODE_SHIFT 12 #define MT6359P_RG_BUCK_VCORE_HW13_OP_MODE_ADDR 0x1520 #define MT6359P_RG_BUCK_VCORE_HW13_OP_MODE_SHIFT 13 #define MT6359P_RG_BUCK_VCORE_HW14_OP_MODE_ADDR 0x1520 #define MT6359P_RG_BUCK_VCORE_HW14_OP_MODE_SHIFT 14 #define MT6359P_RG_BUCK_VGPU11_VOSEL_SLEEP_ADDR 0x158e #define MT6359P_RG_BUCK_VGPU11_HW0_OP_EN_ADDR 0x1594 #define MT6359P_RG_BUCK_VGPU11_HW1_OP_EN_ADDR 0x1594 #define MT6359P_RG_BUCK_VGPU11_HW2_OP_EN_ADDR 0x1594 #define MT6359P_RG_BUCK_VGPU11_HW3_OP_EN_ADDR 0x1594 #define MT6359P_RG_BUCK_VGPU11_HW4_OP_EN_ADDR 0x1594 #define MT6359P_RG_BUCK_VGPU11_HW5_OP_EN_ADDR 0x1594 #define MT6359P_RG_BUCK_VGPU11_HW6_OP_EN_ADDR 0x1594 #define MT6359P_RG_BUCK_VGPU11_HW7_OP_EN_ADDR 0x1594 #define MT6359P_RG_BUCK_VGPU11_HW8_OP_EN_ADDR 0x1594 #define MT6359P_RG_BUCK_VGPU11_HW9_OP_EN_ADDR 0x1594 #define MT6359P_RG_BUCK_VGPU11_HW10_OP_EN_ADDR 0x1594 #define MT6359P_RG_BUCK_VGPU11_HW11_OP_EN_ADDR 0x1594 #define MT6359P_RG_BUCK_VGPU11_HW12_OP_EN_ADDR 0x1594 #define MT6359P_RG_BUCK_VGPU11_HW13_OP_EN_ADDR 0x1594 #define MT6359P_RG_BUCK_VGPU11_HW14_OP_EN_ADDR 0x1594 #define MT6359P_RG_BUCK_VGPU11_SW_OP_EN_ADDR 0x1594 #define MT6359P_RG_BUCK_VGPU11_HW0_OP_CFG_ADDR 0x159a #define MT6359P_RG_BUCK_VGPU11_HW1_OP_CFG_ADDR 0x159a #define MT6359P_RG_BUCK_VGPU11_HW2_OP_CFG_ADDR 0x159a #define MT6359P_RG_BUCK_VGPU11_HW3_OP_CFG_ADDR 0x159a #define MT6359P_RG_BUCK_VGPU11_HW4_OP_CFG_ADDR 0x159a #define MT6359P_RG_BUCK_VGPU11_HW5_OP_CFG_ADDR 0x159a #define MT6359P_RG_BUCK_VGPU11_HW6_OP_CFG_ADDR 0x159a #define MT6359P_RG_BUCK_VGPU11_HW7_OP_CFG_ADDR 0x159a #define MT6359P_RG_BUCK_VGPU11_HW8_OP_CFG_ADDR 0x159a #define MT6359P_RG_BUCK_VGPU11_HW9_OP_CFG_ADDR 0x159a #define MT6359P_RG_BUCK_VGPU11_HW10_OP_CFG_ADDR 0x159a #define MT6359P_RG_BUCK_VGPU11_HW11_OP_CFG_ADDR 0x159a #define MT6359P_RG_BUCK_VGPU11_HW12_OP_CFG_ADDR 0x159a #define MT6359P_RG_BUCK_VGPU11_HW13_OP_CFG_ADDR 0x159a #define MT6359P_RG_BUCK_VGPU11_HW14_OP_CFG_ADDR 0x159a #define MT6359P_RG_BUCK_VGPU11_HW0_OP_MODE_ADDR 0x15a0 #define MT6359P_RG_BUCK_VGPU11_HW0_OP_MODE_SHIFT 0 #define MT6359P_RG_BUCK_VGPU11_HW1_OP_MODE_ADDR 0x15a0 #define MT6359P_RG_BUCK_VGPU11_HW1_OP_MODE_SHIFT 1 #define MT6359P_RG_BUCK_VGPU11_HW2_OP_MODE_ADDR 0x15a0 #define MT6359P_RG_BUCK_VGPU11_HW2_OP_MODE_SHIFT 2 #define MT6359P_RG_BUCK_VGPU11_HW3_OP_MODE_ADDR 0x15a0 #define MT6359P_RG_BUCK_VGPU11_HW3_OP_MODE_SHIFT 3 #define MT6359P_RG_BUCK_VGPU11_HW4_OP_MODE_ADDR 0x15a0 #define MT6359P_RG_BUCK_VGPU11_HW4_OP_MODE_SHIFT 4 #define MT6359P_RG_BUCK_VGPU11_HW5_OP_MODE_ADDR 0x15a0 #define MT6359P_RG_BUCK_VGPU11_HW5_OP_MODE_SHIFT 5 #define MT6359P_RG_BUCK_VGPU11_HW6_OP_MODE_ADDR 0x15a0 #define MT6359P_RG_BUCK_VGPU11_HW6_OP_MODE_SHIFT 6 #define MT6359P_RG_BUCK_VGPU11_HW7_OP_MODE_ADDR 0x15a0 #define MT6359P_RG_BUCK_VGPU11_HW7_OP_MODE_SHIFT 7 #define MT6359P_RG_BUCK_VGPU11_HW8_OP_MODE_ADDR 0x15a0 #define MT6359P_RG_BUCK_VGPU11_HW8_OP_MODE_SHIFT 8 #define MT6359P_RG_BUCK_VGPU11_HW9_OP_MODE_ADDR 0x15a0 #define MT6359P_RG_BUCK_VGPU11_HW9_OP_MODE_SHIFT 9 #define MT6359P_RG_BUCK_VGPU11_HW10_OP_MODE_ADDR 0x15a0 #define MT6359P_RG_BUCK_VGPU11_HW10_OP_MODE_SHIFT 10 #define MT6359P_RG_BUCK_VGPU11_HW11_OP_MODE_ADDR 0x15a0 #define MT6359P_RG_BUCK_VGPU11_HW11_OP_MODE_SHIFT 11 #define MT6359P_RG_BUCK_VGPU11_HW12_OP_MODE_ADDR 0x15a0 #define MT6359P_RG_BUCK_VGPU11_HW12_OP_MODE_SHIFT 12 #define MT6359P_RG_BUCK_VGPU11_HW13_OP_MODE_ADDR 0x15a0 #define MT6359P_RG_BUCK_VGPU11_HW13_OP_MODE_SHIFT 13 #define MT6359P_RG_BUCK_VGPU11_HW14_OP_MODE_ADDR 0x15a0 #define MT6359P_RG_BUCK_VGPU11_HW14_OP_MODE_SHIFT 14 #define MT6359P_RG_BUCK_VGPU12_VOSEL_SLEEP_ADDR 0x160e #define MT6359P_RG_BUCK_VGPU12_HW0_OP_EN_ADDR 0x1614 #define MT6359P_RG_BUCK_VGPU12_HW1_OP_EN_ADDR 0x1614 #define MT6359P_RG_BUCK_VGPU12_HW2_OP_EN_ADDR 0x1614 #define MT6359P_RG_BUCK_VGPU12_HW3_OP_EN_ADDR 0x1614 #define MT6359P_RG_BUCK_VGPU12_HW4_OP_EN_ADDR 0x1614 #define MT6359P_RG_BUCK_VGPU12_HW5_OP_EN_ADDR 0x1614 #define MT6359P_RG_BUCK_VGPU12_HW6_OP_EN_ADDR 0x1614 #define MT6359P_RG_BUCK_VGPU12_HW7_OP_EN_ADDR 0x1614 #define MT6359P_RG_BUCK_VGPU12_HW8_OP_EN_ADDR 0x1614 #define MT6359P_RG_BUCK_VGPU12_HW9_OP_EN_ADDR 0x1614 #define MT6359P_RG_BUCK_VGPU12_HW10_OP_EN_ADDR 0x1614 #define MT6359P_RG_BUCK_VGPU12_HW11_OP_EN_ADDR 0x1614 #define MT6359P_RG_BUCK_VGPU12_HW12_OP_EN_ADDR 0x1614 #define MT6359P_RG_BUCK_VGPU12_HW13_OP_EN_ADDR 0x1614 #define MT6359P_RG_BUCK_VGPU12_HW14_OP_EN_ADDR 0x1614 #define MT6359P_RG_BUCK_VGPU12_SW_OP_EN_ADDR 0x1614 #define MT6359P_RG_BUCK_VGPU12_HW0_OP_CFG_ADDR 0x161a #define MT6359P_RG_BUCK_VGPU12_HW1_OP_CFG_ADDR 0x161a #define MT6359P_RG_BUCK_VGPU12_HW2_OP_CFG_ADDR 0x161a #define MT6359P_RG_BUCK_VGPU12_HW3_OP_CFG_ADDR 0x161a #define MT6359P_RG_BUCK_VGPU12_HW4_OP_CFG_ADDR 0x161a #define MT6359P_RG_BUCK_VGPU12_HW5_OP_CFG_ADDR 0x161a #define MT6359P_RG_BUCK_VGPU12_HW6_OP_CFG_ADDR 0x161a #define MT6359P_RG_BUCK_VGPU12_HW7_OP_CFG_ADDR 0x161a #define MT6359P_RG_BUCK_VGPU12_HW8_OP_CFG_ADDR 0x161a #define MT6359P_RG_BUCK_VGPU12_HW9_OP_CFG_ADDR 0x161a #define MT6359P_RG_BUCK_VGPU12_HW10_OP_CFG_ADDR 0x161a #define MT6359P_RG_BUCK_VGPU12_HW11_OP_CFG_ADDR 0x161a #define MT6359P_RG_BUCK_VGPU12_HW12_OP_CFG_ADDR 0x161a #define MT6359P_RG_BUCK_VGPU12_HW13_OP_CFG_ADDR 0x161a #define MT6359P_RG_BUCK_VGPU12_HW14_OP_CFG_ADDR 0x161a #define MT6359P_RG_BUCK_VGPU12_HW0_OP_MODE_ADDR 0x1620 #define MT6359P_RG_BUCK_VGPU12_HW0_OP_MODE_SHIFT 0 #define MT6359P_RG_BUCK_VGPU12_HW1_OP_MODE_ADDR 0x1620 #define MT6359P_RG_BUCK_VGPU12_HW1_OP_MODE_SHIFT 1 #define MT6359P_RG_BUCK_VGPU12_HW2_OP_MODE_ADDR 0x1620 #define MT6359P_RG_BUCK_VGPU12_HW2_OP_MODE_SHIFT 2 #define MT6359P_RG_BUCK_VGPU12_HW3_OP_MODE_ADDR 0x1620 #define MT6359P_RG_BUCK_VGPU12_HW3_OP_MODE_SHIFT 3 #define MT6359P_RG_BUCK_VGPU12_HW4_OP_MODE_ADDR 0x1620 #define MT6359P_RG_BUCK_VGPU12_HW4_OP_MODE_SHIFT 4 #define MT6359P_RG_BUCK_VGPU12_HW5_OP_MODE_ADDR 0x1620 #define MT6359P_RG_BUCK_VGPU12_HW5_OP_MODE_SHIFT 5 #define MT6359P_RG_BUCK_VGPU12_HW6_OP_MODE_ADDR 0x1620 #define MT6359P_RG_BUCK_VGPU12_HW6_OP_MODE_SHIFT 6 #define MT6359P_RG_BUCK_VGPU12_HW7_OP_MODE_ADDR 0x1620 #define MT6359P_RG_BUCK_VGPU12_HW7_OP_MODE_SHIFT 7 #define MT6359P_RG_BUCK_VGPU12_HW8_OP_MODE_ADDR 0x1620 #define MT6359P_RG_BUCK_VGPU12_HW8_OP_MODE_SHIFT 8 #define MT6359P_RG_BUCK_VGPU12_HW9_OP_MODE_ADDR 0x1620 #define MT6359P_RG_BUCK_VGPU12_HW9_OP_MODE_SHIFT 9 #define MT6359P_RG_BUCK_VGPU12_HW10_OP_MODE_ADDR 0x1620 #define MT6359P_RG_BUCK_VGPU12_HW10_OP_MODE_SHIFT 10 #define MT6359P_RG_BUCK_VGPU12_HW11_OP_MODE_ADDR 0x1620 #define MT6359P_RG_BUCK_VGPU12_HW11_OP_MODE_SHIFT 11 #define MT6359P_RG_BUCK_VGPU12_HW12_OP_MODE_ADDR 0x1620 #define MT6359P_RG_BUCK_VGPU12_HW12_OP_MODE_SHIFT 12 #define MT6359P_RG_BUCK_VGPU12_HW13_OP_MODE_ADDR 0x1620 #define MT6359P_RG_BUCK_VGPU12_HW13_OP_MODE_SHIFT 13 #define MT6359P_RG_BUCK_VGPU12_HW14_OP_MODE_ADDR 0x1620 #define MT6359P_RG_BUCK_VGPU12_HW14_OP_MODE_SHIFT 14 #define MT6359P_RG_BUCK_VMODEM_VOSEL_SLEEP_ADDR 0x168e #define MT6359P_RG_BUCK_VMODEM_HW0_OP_EN_ADDR 0x1694 #define MT6359P_RG_BUCK_VMODEM_HW1_OP_EN_ADDR 0x1694 #define MT6359P_RG_BUCK_VMODEM_HW2_OP_EN_ADDR 0x1694 #define MT6359P_RG_BUCK_VMODEM_HW3_OP_EN_ADDR 0x1694 #define MT6359P_RG_BUCK_VMODEM_HW4_OP_EN_ADDR 0x1694 #define MT6359P_RG_BUCK_VMODEM_HW5_OP_EN_ADDR 0x1694 #define MT6359P_RG_BUCK_VMODEM_HW6_OP_EN_ADDR 0x1694 #define MT6359P_RG_BUCK_VMODEM_HW7_OP_EN_ADDR 0x1694 #define MT6359P_RG_BUCK_VMODEM_HW8_OP_EN_ADDR 0x1694 #define MT6359P_RG_BUCK_VMODEM_HW9_OP_EN_ADDR 0x1694 #define MT6359P_RG_BUCK_VMODEM_HW10_OP_EN_ADDR 0x1694 #define MT6359P_RG_BUCK_VMODEM_HW11_OP_EN_ADDR 0x1694 #define MT6359P_RG_BUCK_VMODEM_HW12_OP_EN_ADDR 0x1694 #define MT6359P_RG_BUCK_VMODEM_HW13_OP_EN_ADDR 0x1694 #define MT6359P_RG_BUCK_VMODEM_HW14_OP_EN_ADDR 0x1694 #define MT6359P_RG_BUCK_VMODEM_SW_OP_EN_ADDR 0x1694 #define MT6359P_RG_BUCK_VMODEM_HW0_OP_CFG_ADDR 0x169a #define MT6359P_RG_BUCK_VMODEM_HW1_OP_CFG_ADDR 0x169a #define MT6359P_RG_BUCK_VMODEM_HW2_OP_CFG_ADDR 0x169a #define MT6359P_RG_BUCK_VMODEM_HW3_OP_CFG_ADDR 0x169a #define MT6359P_RG_BUCK_VMODEM_HW4_OP_CFG_ADDR 0x169a #define MT6359P_RG_BUCK_VMODEM_HW5_OP_CFG_ADDR 0x169a #define MT6359P_RG_BUCK_VMODEM_HW6_OP_CFG_ADDR 0x169a #define MT6359P_RG_BUCK_VMODEM_HW7_OP_CFG_ADDR 0x169a #define MT6359P_RG_BUCK_VMODEM_HW8_OP_CFG_ADDR 0x169a #define MT6359P_RG_BUCK_VMODEM_HW9_OP_CFG_ADDR 0x169a #define MT6359P_RG_BUCK_VMODEM_HW10_OP_CFG_ADDR 0x169a #define MT6359P_RG_BUCK_VMODEM_HW11_OP_CFG_ADDR 0x169a #define MT6359P_RG_BUCK_VMODEM_HW12_OP_CFG_ADDR 0x169a #define MT6359P_RG_BUCK_VMODEM_HW13_OP_CFG_ADDR 0x169a #define MT6359P_RG_BUCK_VMODEM_HW14_OP_CFG_ADDR 0x169a #define MT6359P_RG_BUCK_VMODEM_HW0_OP_MODE_ADDR 0x16a0 #define MT6359P_RG_BUCK_VMODEM_HW0_OP_MODE_SHIFT 0 #define MT6359P_RG_BUCK_VMODEM_HW1_OP_MODE_ADDR 0x16a0 #define MT6359P_RG_BUCK_VMODEM_HW1_OP_MODE_SHIFT 1 #define MT6359P_RG_BUCK_VMODEM_HW2_OP_MODE_ADDR 0x16a0 #define MT6359P_RG_BUCK_VMODEM_HW2_OP_MODE_SHIFT 2 #define MT6359P_RG_BUCK_VMODEM_HW3_OP_MODE_ADDR 0x16a0 #define MT6359P_RG_BUCK_VMODEM_HW3_OP_MODE_SHIFT 3 #define MT6359P_RG_BUCK_VMODEM_HW4_OP_MODE_ADDR 0x16a0 #define MT6359P_RG_BUCK_VMODEM_HW4_OP_MODE_SHIFT 4 #define MT6359P_RG_BUCK_VMODEM_HW5_OP_MODE_ADDR 0x16a0 #define MT6359P_RG_BUCK_VMODEM_HW5_OP_MODE_SHIFT 5 #define MT6359P_RG_BUCK_VMODEM_HW6_OP_MODE_ADDR 0x16a0 #define MT6359P_RG_BUCK_VMODEM_HW6_OP_MODE_SHIFT 6 #define MT6359P_RG_BUCK_VMODEM_HW7_OP_MODE_ADDR 0x16a0 #define MT6359P_RG_BUCK_VMODEM_HW7_OP_MODE_SHIFT 7 #define MT6359P_RG_BUCK_VMODEM_HW8_OP_MODE_ADDR 0x16a0 #define MT6359P_RG_BUCK_VMODEM_HW8_OP_MODE_SHIFT 8 #define MT6359P_RG_BUCK_VMODEM_HW9_OP_MODE_ADDR 0x16a0 #define MT6359P_RG_BUCK_VMODEM_HW9_OP_MODE_SHIFT 9 #define MT6359P_RG_BUCK_VMODEM_HW10_OP_MODE_ADDR 0x16a0 #define MT6359P_RG_BUCK_VMODEM_HW10_OP_MODE_SHIFT 10 #define MT6359P_RG_BUCK_VMODEM_HW11_OP_MODE_ADDR 0x16a0 #define MT6359P_RG_BUCK_VMODEM_HW11_OP_MODE_SHIFT 11 #define MT6359P_RG_BUCK_VMODEM_HW12_OP_MODE_ADDR 0x16a0 #define MT6359P_RG_BUCK_VMODEM_HW12_OP_MODE_SHIFT 12 #define MT6359P_RG_BUCK_VMODEM_HW13_OP_MODE_ADDR 0x16a0 #define MT6359P_RG_BUCK_VMODEM_HW13_OP_MODE_SHIFT 13 #define MT6359P_RG_BUCK_VMODEM_HW14_OP_MODE_ADDR 0x16a0 #define MT6359P_RG_BUCK_VMODEM_HW14_OP_MODE_SHIFT 14 #define MT6359P_RG_BUCK_VPROC1_VOSEL_SLEEP_ADDR 0x170e #define MT6359P_RG_BUCK_VPROC1_HW0_OP_EN_ADDR 0x1714 #define MT6359P_RG_BUCK_VPROC1_HW1_OP_EN_ADDR 0x1714 #define MT6359P_RG_BUCK_VPROC1_HW2_OP_EN_ADDR 0x1714 #define MT6359P_RG_BUCK_VPROC1_HW3_OP_EN_ADDR 0x1714 #define MT6359P_RG_BUCK_VPROC1_HW4_OP_EN_ADDR 0x1714 #define MT6359P_RG_BUCK_VPROC1_HW5_OP_EN_ADDR 0x1714 #define MT6359P_RG_BUCK_VPROC1_HW6_OP_EN_ADDR 0x1714 #define MT6359P_RG_BUCK_VPROC1_HW7_OP_EN_ADDR 0x1714 #define MT6359P_RG_BUCK_VPROC1_HW8_OP_EN_ADDR 0x1714 #define MT6359P_RG_BUCK_VPROC1_HW9_OP_EN_ADDR 0x1714 #define MT6359P_RG_BUCK_VPROC1_HW10_OP_EN_ADDR 0x1714 #define MT6359P_RG_BUCK_VPROC1_HW11_OP_EN_ADDR 0x1714 #define MT6359P_RG_BUCK_VPROC1_HW12_OP_EN_ADDR 0x1714 #define MT6359P_RG_BUCK_VPROC1_HW13_OP_EN_ADDR 0x1714 #define MT6359P_RG_BUCK_VPROC1_HW14_OP_EN_ADDR 0x1714 #define MT6359P_RG_BUCK_VPROC1_SW_OP_EN_ADDR 0x1714 #define MT6359P_RG_BUCK_VPROC1_HW0_OP_CFG_ADDR 0x171a #define MT6359P_RG_BUCK_VPROC1_HW1_OP_CFG_ADDR 0x171a #define MT6359P_RG_BUCK_VPROC1_HW2_OP_CFG_ADDR 0x171a #define MT6359P_RG_BUCK_VPROC1_HW3_OP_CFG_ADDR 0x171a #define MT6359P_RG_BUCK_VPROC1_HW4_OP_CFG_ADDR 0x171a #define MT6359P_RG_BUCK_VPROC1_HW5_OP_CFG_ADDR 0x171a #define MT6359P_RG_BUCK_VPROC1_HW6_OP_CFG_ADDR 0x171a #define MT6359P_RG_BUCK_VPROC1_HW7_OP_CFG_ADDR 0x171a #define MT6359P_RG_BUCK_VPROC1_HW8_OP_CFG_ADDR 0x171a #define MT6359P_RG_BUCK_VPROC1_HW9_OP_CFG_ADDR 0x171a #define MT6359P_RG_BUCK_VPROC1_HW10_OP_CFG_ADDR 0x171a #define MT6359P_RG_BUCK_VPROC1_HW11_OP_CFG_ADDR 0x171a #define MT6359P_RG_BUCK_VPROC1_HW12_OP_CFG_ADDR 0x171a #define MT6359P_RG_BUCK_VPROC1_HW13_OP_CFG_ADDR 0x171a #define MT6359P_RG_BUCK_VPROC1_HW14_OP_CFG_ADDR 0x171a #define MT6359P_RG_BUCK_VPROC1_HW0_OP_MODE_ADDR 0x1720 #define MT6359P_RG_BUCK_VPROC1_HW0_OP_MODE_SHIFT 0 #define MT6359P_RG_BUCK_VPROC1_HW1_OP_MODE_ADDR 0x1720 #define MT6359P_RG_BUCK_VPROC1_HW1_OP_MODE_SHIFT 1 #define MT6359P_RG_BUCK_VPROC1_HW2_OP_MODE_ADDR 0x1720 #define MT6359P_RG_BUCK_VPROC1_HW2_OP_MODE_SHIFT 2 #define MT6359P_RG_BUCK_VPROC1_HW3_OP_MODE_ADDR 0x1720 #define MT6359P_RG_BUCK_VPROC1_HW3_OP_MODE_SHIFT 3 #define MT6359P_RG_BUCK_VPROC1_HW4_OP_MODE_ADDR 0x1720 #define MT6359P_RG_BUCK_VPROC1_HW4_OP_MODE_SHIFT 4 #define MT6359P_RG_BUCK_VPROC1_HW5_OP_MODE_ADDR 0x1720 #define MT6359P_RG_BUCK_VPROC1_HW5_OP_MODE_SHIFT 5 #define MT6359P_RG_BUCK_VPROC1_HW6_OP_MODE_ADDR 0x1720 #define MT6359P_RG_BUCK_VPROC1_HW6_OP_MODE_SHIFT 6 #define MT6359P_RG_BUCK_VPROC1_HW7_OP_MODE_ADDR 0x1720 #define MT6359P_RG_BUCK_VPROC1_HW7_OP_MODE_SHIFT 7 #define MT6359P_RG_BUCK_VPROC1_HW8_OP_MODE_ADDR 0x1720 #define MT6359P_RG_BUCK_VPROC1_HW8_OP_MODE_SHIFT 8 #define MT6359P_RG_BUCK_VPROC1_HW9_OP_MODE_ADDR 0x1720 #define MT6359P_RG_BUCK_VPROC1_HW9_OP_MODE_SHIFT 9 #define MT6359P_RG_BUCK_VPROC1_HW10_OP_MODE_ADDR 0x1720 #define MT6359P_RG_BUCK_VPROC1_HW10_OP_MODE_SHIFT 10 #define MT6359P_RG_BUCK_VPROC1_HW11_OP_MODE_ADDR 0x1720 #define MT6359P_RG_BUCK_VPROC1_HW11_OP_MODE_SHIFT 11 #define MT6359P_RG_BUCK_VPROC1_HW12_OP_MODE_ADDR 0x1720 #define MT6359P_RG_BUCK_VPROC1_HW12_OP_MODE_SHIFT 12 #define MT6359P_RG_BUCK_VPROC1_HW13_OP_MODE_ADDR 0x1720 #define MT6359P_RG_BUCK_VPROC1_HW13_OP_MODE_SHIFT 13 #define MT6359P_RG_BUCK_VPROC1_HW14_OP_MODE_ADDR 0x1720 #define MT6359P_RG_BUCK_VPROC1_HW14_OP_MODE_SHIFT 14 #define MT6359P_RG_BUCK_VPROC2_VOSEL_SLEEP_ADDR 0x178e #define MT6359P_RG_BUCK_VPROC2_HW0_OP_EN_ADDR 0x1794 #define MT6359P_RG_BUCK_VPROC2_HW1_OP_EN_ADDR 0x1794 #define MT6359P_RG_BUCK_VPROC2_HW2_OP_EN_ADDR 0x1794 #define MT6359P_RG_BUCK_VPROC2_HW3_OP_EN_ADDR 0x1794 #define MT6359P_RG_BUCK_VPROC2_HW4_OP_EN_ADDR 0x1794 #define MT6359P_RG_BUCK_VPROC2_HW5_OP_EN_ADDR 0x1794 #define MT6359P_RG_BUCK_VPROC2_HW6_OP_EN_ADDR 0x1794 #define MT6359P_RG_BUCK_VPROC2_HW7_OP_EN_ADDR 0x1794 #define MT6359P_RG_BUCK_VPROC2_HW8_OP_EN_ADDR 0x1794 #define MT6359P_RG_BUCK_VPROC2_HW9_OP_EN_ADDR 0x1794 #define MT6359P_RG_BUCK_VPROC2_HW10_OP_EN_ADDR 0x1794 #define MT6359P_RG_BUCK_VPROC2_HW11_OP_EN_ADDR 0x1794 #define MT6359P_RG_BUCK_VPROC2_HW12_OP_EN_ADDR 0x1794 #define MT6359P_RG_BUCK_VPROC2_HW13_OP_EN_ADDR 0x1794 #define MT6359P_RG_BUCK_VPROC2_HW14_OP_EN_ADDR 0x1794 #define MT6359P_RG_BUCK_VPROC2_SW_OP_EN_ADDR 0x1794 #define MT6359P_RG_BUCK_VPROC2_HW0_OP_CFG_ADDR 0x179a #define MT6359P_RG_BUCK_VPROC2_HW1_OP_CFG_ADDR 0x179a #define MT6359P_RG_BUCK_VPROC2_HW2_OP_CFG_ADDR 0x179a #define MT6359P_RG_BUCK_VPROC2_HW3_OP_CFG_ADDR 0x179a #define MT6359P_RG_BUCK_VPROC2_HW4_OP_CFG_ADDR 0x179a #define MT6359P_RG_BUCK_VPROC2_HW5_OP_CFG_ADDR 0x179a #define MT6359P_RG_BUCK_VPROC2_HW6_OP_CFG_ADDR 0x179a #define MT6359P_RG_BUCK_VPROC2_HW7_OP_CFG_ADDR 0x179a #define MT6359P_RG_BUCK_VPROC2_HW8_OP_CFG_ADDR 0x179a #define MT6359P_RG_BUCK_VPROC2_HW9_OP_CFG_ADDR 0x179a #define MT6359P_RG_BUCK_VPROC2_HW10_OP_CFG_ADDR 0x179a #define MT6359P_RG_BUCK_VPROC2_HW11_OP_CFG_ADDR 0x179a #define MT6359P_RG_BUCK_VPROC2_HW12_OP_CFG_ADDR 0x179a #define MT6359P_RG_BUCK_VPROC2_HW13_OP_CFG_ADDR 0x179a #define MT6359P_RG_BUCK_VPROC2_HW14_OP_CFG_ADDR 0x179a #define MT6359P_RG_BUCK_VPROC2_HW0_OP_MODE_ADDR 0x17a0 #define MT6359P_RG_BUCK_VPROC2_HW0_OP_MODE_SHIFT 0 #define MT6359P_RG_BUCK_VPROC2_HW1_OP_MODE_ADDR 0x17a0 #define MT6359P_RG_BUCK_VPROC2_HW1_OP_MODE_SHIFT 1 #define MT6359P_RG_BUCK_VPROC2_HW2_OP_MODE_ADDR 0x17a0 #define MT6359P_RG_BUCK_VPROC2_HW2_OP_MODE_SHIFT 2 #define MT6359P_RG_BUCK_VPROC2_HW3_OP_MODE_ADDR 0x17a0 #define MT6359P_RG_BUCK_VPROC2_HW3_OP_MODE_SHIFT 3 #define MT6359P_RG_BUCK_VPROC2_HW4_OP_MODE_ADDR 0x17a0 #define MT6359P_RG_BUCK_VPROC2_HW4_OP_MODE_SHIFT 4 #define MT6359P_RG_BUCK_VPROC2_HW5_OP_MODE_ADDR 0x17a0 #define MT6359P_RG_BUCK_VPROC2_HW5_OP_MODE_SHIFT 5 #define MT6359P_RG_BUCK_VPROC2_HW6_OP_MODE_ADDR 0x17a0 #define MT6359P_RG_BUCK_VPROC2_HW6_OP_MODE_SHIFT 6 #define MT6359P_RG_BUCK_VPROC2_HW7_OP_MODE_ADDR 0x17a0 #define MT6359P_RG_BUCK_VPROC2_HW7_OP_MODE_SHIFT 7 #define MT6359P_RG_BUCK_VPROC2_HW8_OP_MODE_ADDR 0x17a0 #define MT6359P_RG_BUCK_VPROC2_HW8_OP_MODE_SHIFT 8 #define MT6359P_RG_BUCK_VPROC2_HW9_OP_MODE_ADDR 0x17a0 #define MT6359P_RG_BUCK_VPROC2_HW9_OP_MODE_SHIFT 9 #define MT6359P_RG_BUCK_VPROC2_HW10_OP_MODE_ADDR 0x17a0 #define MT6359P_RG_BUCK_VPROC2_HW10_OP_MODE_SHIFT 10 #define MT6359P_RG_BUCK_VPROC2_HW11_OP_MODE_ADDR 0x17a0 #define MT6359P_RG_BUCK_VPROC2_HW11_OP_MODE_SHIFT 11 #define MT6359P_RG_BUCK_VPROC2_HW12_OP_MODE_ADDR 0x17a0 #define MT6359P_RG_BUCK_VPROC2_HW12_OP_MODE_SHIFT 12 #define MT6359P_RG_BUCK_VPROC2_HW13_OP_MODE_ADDR 0x17a0 #define MT6359P_RG_BUCK_VPROC2_HW13_OP_MODE_SHIFT 13 #define MT6359P_RG_BUCK_VPROC2_HW14_OP_MODE_ADDR 0x17a0 #define MT6359P_RG_BUCK_VPROC2_HW14_OP_MODE_SHIFT 14 #define MT6359P_RG_BUCK_VS1_VOSEL_SLEEP_ADDR 0x180e #define MT6359P_RG_BUCK_VS1_HW0_OP_EN_ADDR 0x1814 #define MT6359P_RG_BUCK_VS1_HW1_OP_EN_ADDR 0x1814 #define MT6359P_RG_BUCK_VS1_HW2_OP_EN_ADDR 0x1814 #define MT6359P_RG_BUCK_VS1_HW3_OP_EN_ADDR 0x1814 #define MT6359P_RG_BUCK_VS1_HW4_OP_EN_ADDR 0x1814 #define MT6359P_RG_BUCK_VS1_HW5_OP_EN_ADDR 0x1814 #define MT6359P_RG_BUCK_VS1_HW6_OP_EN_ADDR 0x1814 #define MT6359P_RG_BUCK_VS1_HW7_OP_EN_ADDR 0x1814 #define MT6359P_RG_BUCK_VS1_HW8_OP_EN_ADDR 0x1814 #define MT6359P_RG_BUCK_VS1_HW9_OP_EN_ADDR 0x1814 #define MT6359P_RG_BUCK_VS1_HW10_OP_EN_ADDR 0x1814 #define MT6359P_RG_BUCK_VS1_HW11_OP_EN_ADDR 0x1814 #define MT6359P_RG_BUCK_VS1_HW12_OP_EN_ADDR 0x1814 #define MT6359P_RG_BUCK_VS1_HW13_OP_EN_ADDR 0x1814 #define MT6359P_RG_BUCK_VS1_HW14_OP_EN_ADDR 0x1814 #define MT6359P_RG_BUCK_VS1_SW_OP_EN_ADDR 0x1814 #define MT6359P_RG_BUCK_VS1_HW0_OP_CFG_ADDR 0x181a #define MT6359P_RG_BUCK_VS1_HW1_OP_CFG_ADDR 0x181a #define MT6359P_RG_BUCK_VS1_HW2_OP_CFG_ADDR 0x181a #define MT6359P_RG_BUCK_VS1_HW3_OP_CFG_ADDR 0x181a #define MT6359P_RG_BUCK_VS1_HW4_OP_CFG_ADDR 0x181a #define MT6359P_RG_BUCK_VS1_HW5_OP_CFG_ADDR 0x181a #define MT6359P_RG_BUCK_VS1_HW6_OP_CFG_ADDR 0x181a #define MT6359P_RG_BUCK_VS1_HW7_OP_CFG_ADDR 0x181a #define MT6359P_RG_BUCK_VS1_HW8_OP_CFG_ADDR 0x181a #define MT6359P_RG_BUCK_VS1_HW9_OP_CFG_ADDR 0x181a #define MT6359P_RG_BUCK_VS1_HW10_OP_CFG_ADDR 0x181a #define MT6359P_RG_BUCK_VS1_HW11_OP_CFG_ADDR 0x181a #define MT6359P_RG_BUCK_VS1_HW12_OP_CFG_ADDR 0x181a #define MT6359P_RG_BUCK_VS1_HW13_OP_CFG_ADDR 0x181a #define MT6359P_RG_BUCK_VS1_HW14_OP_CFG_ADDR 0x181a #define MT6359P_RG_BUCK_VS1_HW0_OP_MODE_ADDR 0x1820 #define MT6359P_RG_BUCK_VS1_HW0_OP_MODE_SHIFT 0 #define MT6359P_RG_BUCK_VS1_HW1_OP_MODE_ADDR 0x1820 #define MT6359P_RG_BUCK_VS1_HW1_OP_MODE_SHIFT 1 #define MT6359P_RG_BUCK_VS1_HW2_OP_MODE_ADDR 0x1820 #define MT6359P_RG_BUCK_VS1_HW2_OP_MODE_SHIFT 2 #define MT6359P_RG_BUCK_VS1_HW3_OP_MODE_ADDR 0x1820 #define MT6359P_RG_BUCK_VS1_HW3_OP_MODE_SHIFT 3 #define MT6359P_RG_BUCK_VS1_HW4_OP_MODE_ADDR 0x1820 #define MT6359P_RG_BUCK_VS1_HW4_OP_MODE_SHIFT 4 #define MT6359P_RG_BUCK_VS1_HW5_OP_MODE_ADDR 0x1820 #define MT6359P_RG_BUCK_VS1_HW5_OP_MODE_SHIFT 5 #define MT6359P_RG_BUCK_VS1_HW6_OP_MODE_ADDR 0x1820 #define MT6359P_RG_BUCK_VS1_HW6_OP_MODE_SHIFT 6 #define MT6359P_RG_BUCK_VS1_HW7_OP_MODE_ADDR 0x1820 #define MT6359P_RG_BUCK_VS1_HW7_OP_MODE_SHIFT 7 #define MT6359P_RG_BUCK_VS1_HW8_OP_MODE_ADDR 0x1820 #define MT6359P_RG_BUCK_VS1_HW8_OP_MODE_SHIFT 8 #define MT6359P_RG_BUCK_VS1_HW9_OP_MODE_ADDR 0x1820 #define MT6359P_RG_BUCK_VS1_HW9_OP_MODE_SHIFT 9 #define MT6359P_RG_BUCK_VS1_HW10_OP_MODE_ADDR 0x1820 #define MT6359P_RG_BUCK_VS1_HW10_OP_MODE_SHIFT 10 #define MT6359P_RG_BUCK_VS1_HW11_OP_MODE_ADDR 0x1820 #define MT6359P_RG_BUCK_VS1_HW11_OP_MODE_SHIFT 11 #define MT6359P_RG_BUCK_VS1_HW12_OP_MODE_ADDR 0x1820 #define MT6359P_RG_BUCK_VS1_HW12_OP_MODE_SHIFT 12 #define MT6359P_RG_BUCK_VS1_HW13_OP_MODE_ADDR 0x1820 #define MT6359P_RG_BUCK_VS1_HW13_OP_MODE_SHIFT 13 #define MT6359P_RG_BUCK_VS1_HW14_OP_MODE_ADDR 0x1820 #define MT6359P_RG_BUCK_VS1_HW14_OP_MODE_SHIFT 14 #define MT6359P_RG_BUCK_VS2_VOSEL_SLEEP_ADDR 0x188e #define MT6359P_RG_BUCK_VS2_HW0_OP_EN_ADDR 0x1894 #define MT6359P_RG_BUCK_VS2_HW1_OP_EN_ADDR 0x1894 #define MT6359P_RG_BUCK_VS2_HW2_OP_EN_ADDR 0x1894 #define MT6359P_RG_BUCK_VS2_HW3_OP_EN_ADDR 0x1894 #define MT6359P_RG_BUCK_VS2_HW4_OP_EN_ADDR 0x1894 #define MT6359P_RG_BUCK_VS2_HW5_OP_EN_ADDR 0x1894 #define MT6359P_RG_BUCK_VS2_HW6_OP_EN_ADDR 0x1894 #define MT6359P_RG_BUCK_VS2_HW7_OP_EN_ADDR 0x1894 #define MT6359P_RG_BUCK_VS2_HW8_OP_EN_ADDR 0x1894 #define MT6359P_RG_BUCK_VS2_HW9_OP_EN_ADDR 0x1894 #define MT6359P_RG_BUCK_VS2_HW10_OP_EN_ADDR 0x1894 #define MT6359P_RG_BUCK_VS2_HW11_OP_EN_ADDR 0x1894 #define MT6359P_RG_BUCK_VS2_HW12_OP_EN_ADDR 0x1894 #define MT6359P_RG_BUCK_VS2_HW13_OP_EN_ADDR 0x1894 #define MT6359P_RG_BUCK_VS2_HW14_OP_EN_ADDR 0x1894 #define MT6359P_RG_BUCK_VS2_SW_OP_EN_ADDR 0x1894 #define MT6359P_RG_BUCK_VS2_HW0_OP_CFG_ADDR 0x189a #define MT6359P_RG_BUCK_VS2_HW1_OP_CFG_ADDR 0x189a #define MT6359P_RG_BUCK_VS2_HW2_OP_CFG_ADDR 0x189a #define MT6359P_RG_BUCK_VS2_HW3_OP_CFG_ADDR 0x189a #define MT6359P_RG_BUCK_VS2_HW4_OP_CFG_ADDR 0x189a #define MT6359P_RG_BUCK_VS2_HW5_OP_CFG_ADDR 0x189a #define MT6359P_RG_BUCK_VS2_HW6_OP_CFG_ADDR 0x189a #define MT6359P_RG_BUCK_VS2_HW7_OP_CFG_ADDR 0x189a #define MT6359P_RG_BUCK_VS2_HW8_OP_CFG_ADDR 0x189a #define MT6359P_RG_BUCK_VS2_HW9_OP_CFG_ADDR 0x189a #define MT6359P_RG_BUCK_VS2_HW10_OP_CFG_ADDR 0x189a #define MT6359P_RG_BUCK_VS2_HW11_OP_CFG_ADDR 0x189a #define MT6359P_RG_BUCK_VS2_HW12_OP_CFG_ADDR 0x189a #define MT6359P_RG_BUCK_VS2_HW13_OP_CFG_ADDR 0x189a #define MT6359P_RG_BUCK_VS2_HW14_OP_CFG_ADDR 0x189a #define MT6359P_RG_BUCK_VS2_HW0_OP_MODE_ADDR 0x18a0 #define MT6359P_RG_BUCK_VS2_HW0_OP_MODE_SHIFT 0 #define MT6359P_RG_BUCK_VS2_HW1_OP_MODE_ADDR 0x18a0 #define MT6359P_RG_BUCK_VS2_HW1_OP_MODE_SHIFT 1 #define MT6359P_RG_BUCK_VS2_HW2_OP_MODE_ADDR 0x18a0 #define MT6359P_RG_BUCK_VS2_HW2_OP_MODE_SHIFT 2 #define MT6359P_RG_BUCK_VS2_HW3_OP_MODE_ADDR 0x18a0 #define MT6359P_RG_BUCK_VS2_HW3_OP_MODE_SHIFT 3 #define MT6359P_RG_BUCK_VS2_HW4_OP_MODE_ADDR 0x18a0 #define MT6359P_RG_BUCK_VS2_HW4_OP_MODE_SHIFT 4 #define MT6359P_RG_BUCK_VS2_HW5_OP_MODE_ADDR 0x18a0 #define MT6359P_RG_BUCK_VS2_HW5_OP_MODE_SHIFT 5 #define MT6359P_RG_BUCK_VS2_HW6_OP_MODE_ADDR 0x18a0 #define MT6359P_RG_BUCK_VS2_HW6_OP_MODE_SHIFT 6 #define MT6359P_RG_BUCK_VS2_HW7_OP_MODE_ADDR 0x18a0 #define MT6359P_RG_BUCK_VS2_HW7_OP_MODE_SHIFT 7 #define MT6359P_RG_BUCK_VS2_HW8_OP_MODE_ADDR 0x18a0 #define MT6359P_RG_BUCK_VS2_HW8_OP_MODE_SHIFT 8 #define MT6359P_RG_BUCK_VS2_HW9_OP_MODE_ADDR 0x18a0 #define MT6359P_RG_BUCK_VS2_HW9_OP_MODE_SHIFT 9 #define MT6359P_RG_BUCK_VS2_HW10_OP_MODE_ADDR 0x18a0 #define MT6359P_RG_BUCK_VS2_HW10_OP_MODE_SHIFT 10 #define MT6359P_RG_BUCK_VS2_HW11_OP_MODE_ADDR 0x18a0 #define MT6359P_RG_BUCK_VS2_HW11_OP_MODE_SHIFT 11 #define MT6359P_RG_BUCK_VS2_HW12_OP_MODE_ADDR 0x18a0 #define MT6359P_RG_BUCK_VS2_HW12_OP_MODE_SHIFT 12 #define MT6359P_RG_BUCK_VS2_HW13_OP_MODE_ADDR 0x18a0 #define MT6359P_RG_BUCK_VS2_HW13_OP_MODE_SHIFT 13 #define MT6359P_RG_BUCK_VS2_HW14_OP_MODE_ADDR 0x18a0 #define MT6359P_RG_BUCK_VS2_HW14_OP_MODE_SHIFT 14 #define MT6359P_RG_LDO_VFE28_OP_MODE_ADDR 0x1b8a #define MT6359P_RG_LDO_VFE28_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VFE28_HW0_OP_EN_ADDR 0x1b8e #define MT6359P_RG_LDO_VFE28_HW1_OP_EN_ADDR 0x1b8e #define MT6359P_RG_LDO_VFE28_HW2_OP_EN_ADDR 0x1b8e #define MT6359P_RG_LDO_VFE28_HW3_OP_EN_ADDR 0x1b8e #define MT6359P_RG_LDO_VFE28_HW4_OP_EN_ADDR 0x1b8e #define MT6359P_RG_LDO_VFE28_HW5_OP_EN_ADDR 0x1b8e #define MT6359P_RG_LDO_VFE28_HW6_OP_EN_ADDR 0x1b8e #define MT6359P_RG_LDO_VFE28_HW7_OP_EN_ADDR 0x1b8e #define MT6359P_RG_LDO_VFE28_HW8_OP_EN_ADDR 0x1b8e #define MT6359P_RG_LDO_VFE28_HW9_OP_EN_ADDR 0x1b8e #define MT6359P_RG_LDO_VFE28_HW10_OP_EN_ADDR 0x1b8e #define MT6359P_RG_LDO_VFE28_HW11_OP_EN_ADDR 0x1b8e #define MT6359P_RG_LDO_VFE28_HW12_OP_EN_ADDR 0x1b8e #define MT6359P_RG_LDO_VFE28_HW13_OP_EN_ADDR 0x1b8e #define MT6359P_RG_LDO_VFE28_HW14_OP_EN_ADDR 0x1b8e #define MT6359P_RG_LDO_VFE28_SW_OP_EN_ADDR 0x1b8e #define MT6359P_RG_LDO_VFE28_HW0_OP_CFG_ADDR 0x1b94 #define MT6359P_RG_LDO_VFE28_HW1_OP_CFG_ADDR 0x1b94 #define MT6359P_RG_LDO_VFE28_HW2_OP_CFG_ADDR 0x1b94 #define MT6359P_RG_LDO_VFE28_HW3_OP_CFG_ADDR 0x1b94 #define MT6359P_RG_LDO_VFE28_HW4_OP_CFG_ADDR 0x1b94 #define MT6359P_RG_LDO_VFE28_HW5_OP_CFG_ADDR 0x1b94 #define MT6359P_RG_LDO_VFE28_HW6_OP_CFG_ADDR 0x1b94 #define MT6359P_RG_LDO_VFE28_HW7_OP_CFG_ADDR 0x1b94 #define MT6359P_RG_LDO_VFE28_HW8_OP_CFG_ADDR 0x1b94 #define MT6359P_RG_LDO_VFE28_HW9_OP_CFG_ADDR 0x1b94 #define MT6359P_RG_LDO_VFE28_HW10_OP_CFG_ADDR 0x1b94 #define MT6359P_RG_LDO_VFE28_HW11_OP_CFG_ADDR 0x1b94 #define MT6359P_RG_LDO_VFE28_HW12_OP_CFG_ADDR 0x1b94 #define MT6359P_RG_LDO_VFE28_HW13_OP_CFG_ADDR 0x1b94 #define MT6359P_RG_LDO_VFE28_HW14_OP_CFG_ADDR 0x1b94 #define MT6359P_RG_LDO_VFE28_SW_OP_CFG_ADDR 0x1b94 #define MT6359P_RG_LDO_VXO22_OP_MODE_ADDR 0x1b9c #define MT6359P_RG_LDO_VXO22_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VXO22_HW0_OP_EN_ADDR 0x1ba0 #define MT6359P_RG_LDO_VXO22_HW1_OP_EN_ADDR 0x1ba0 #define MT6359P_RG_LDO_VXO22_HW2_OP_EN_ADDR 0x1ba0 #define MT6359P_RG_LDO_VXO22_HW3_OP_EN_ADDR 0x1ba0 #define MT6359P_RG_LDO_VXO22_HW4_OP_EN_ADDR 0x1ba0 #define MT6359P_RG_LDO_VXO22_HW5_OP_EN_ADDR 0x1ba0 #define MT6359P_RG_LDO_VXO22_HW6_OP_EN_ADDR 0x1ba0 #define MT6359P_RG_LDO_VXO22_HW7_OP_EN_ADDR 0x1ba0 #define MT6359P_RG_LDO_VXO22_HW8_OP_EN_ADDR 0x1ba0 #define MT6359P_RG_LDO_VXO22_HW9_OP_EN_ADDR 0x1ba0 #define MT6359P_RG_LDO_VXO22_HW10_OP_EN_ADDR 0x1ba0 #define MT6359P_RG_LDO_VXO22_HW11_OP_EN_ADDR 0x1ba0 #define MT6359P_RG_LDO_VXO22_HW12_OP_EN_ADDR 0x1ba0 #define MT6359P_RG_LDO_VXO22_HW13_OP_EN_ADDR 0x1ba0 #define MT6359P_RG_LDO_VXO22_HW14_OP_EN_ADDR 0x1ba0 #define MT6359P_RG_LDO_VXO22_SW_OP_EN_ADDR 0x1ba0 #define MT6359P_RG_LDO_VXO22_HW0_OP_CFG_ADDR 0x1ba6 #define MT6359P_RG_LDO_VXO22_HW1_OP_CFG_ADDR 0x1ba6 #define MT6359P_RG_LDO_VXO22_HW2_OP_CFG_ADDR 0x1ba6 #define MT6359P_RG_LDO_VXO22_HW3_OP_CFG_ADDR 0x1ba6 #define MT6359P_RG_LDO_VXO22_HW4_OP_CFG_ADDR 0x1ba6 #define MT6359P_RG_LDO_VXO22_HW5_OP_CFG_ADDR 0x1ba6 #define MT6359P_RG_LDO_VXO22_HW6_OP_CFG_ADDR 0x1ba6 #define MT6359P_RG_LDO_VXO22_HW7_OP_CFG_ADDR 0x1ba6 #define MT6359P_RG_LDO_VXO22_HW8_OP_CFG_ADDR 0x1ba6 #define MT6359P_RG_LDO_VXO22_HW9_OP_CFG_ADDR 0x1ba6 #define MT6359P_RG_LDO_VXO22_HW10_OP_CFG_ADDR 0x1ba6 #define MT6359P_RG_LDO_VXO22_HW11_OP_CFG_ADDR 0x1ba6 #define MT6359P_RG_LDO_VXO22_HW12_OP_CFG_ADDR 0x1ba6 #define MT6359P_RG_LDO_VXO22_HW13_OP_CFG_ADDR 0x1ba6 #define MT6359P_RG_LDO_VXO22_HW14_OP_CFG_ADDR 0x1ba6 #define MT6359P_RG_LDO_VXO22_SW_OP_CFG_ADDR 0x1ba6 #define MT6359P_RG_LDO_VRF18_OP_MODE_ADDR 0x1bae #define MT6359P_RG_LDO_VRF18_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VRF18_HW0_OP_EN_ADDR 0x1bb2 #define MT6359P_RG_LDO_VRF18_HW1_OP_EN_ADDR 0x1bb2 #define MT6359P_RG_LDO_VRF18_HW2_OP_EN_ADDR 0x1bb2 #define MT6359P_RG_LDO_VRF18_HW3_OP_EN_ADDR 0x1bb2 #define MT6359P_RG_LDO_VRF18_HW4_OP_EN_ADDR 0x1bb2 #define MT6359P_RG_LDO_VRF18_HW5_OP_EN_ADDR 0x1bb2 #define MT6359P_RG_LDO_VRF18_HW6_OP_EN_ADDR 0x1bb2 #define MT6359P_RG_LDO_VRF18_HW7_OP_EN_ADDR 0x1bb2 #define MT6359P_RG_LDO_VRF18_HW8_OP_EN_ADDR 0x1bb2 #define MT6359P_RG_LDO_VRF18_HW9_OP_EN_ADDR 0x1bb2 #define MT6359P_RG_LDO_VRF18_HW10_OP_EN_ADDR 0x1bb2 #define MT6359P_RG_LDO_VRF18_HW11_OP_EN_ADDR 0x1bb2 #define MT6359P_RG_LDO_VRF18_HW12_OP_EN_ADDR 0x1bb2 #define MT6359P_RG_LDO_VRF18_HW13_OP_EN_ADDR 0x1bb2 #define MT6359P_RG_LDO_VRF18_HW14_OP_EN_ADDR 0x1bb2 #define MT6359P_RG_LDO_VRF18_SW_OP_EN_ADDR 0x1bb2 #define MT6359P_RG_LDO_VRF18_HW0_OP_CFG_ADDR 0x1bb8 #define MT6359P_RG_LDO_VRF18_HW1_OP_CFG_ADDR 0x1bb8 #define MT6359P_RG_LDO_VRF18_HW2_OP_CFG_ADDR 0x1bb8 #define MT6359P_RG_LDO_VRF18_HW3_OP_CFG_ADDR 0x1bb8 #define MT6359P_RG_LDO_VRF18_HW4_OP_CFG_ADDR 0x1bb8 #define MT6359P_RG_LDO_VRF18_HW5_OP_CFG_ADDR 0x1bb8 #define MT6359P_RG_LDO_VRF18_HW6_OP_CFG_ADDR 0x1bb8 #define MT6359P_RG_LDO_VRF18_HW7_OP_CFG_ADDR 0x1bb8 #define MT6359P_RG_LDO_VRF18_HW8_OP_CFG_ADDR 0x1bb8 #define MT6359P_RG_LDO_VRF18_HW9_OP_CFG_ADDR 0x1bb8 #define MT6359P_RG_LDO_VRF18_HW10_OP_CFG_ADDR 0x1bb8 #define MT6359P_RG_LDO_VRF18_HW11_OP_CFG_ADDR 0x1bb8 #define MT6359P_RG_LDO_VRF18_HW12_OP_CFG_ADDR 0x1bb8 #define MT6359P_RG_LDO_VRF18_HW13_OP_CFG_ADDR 0x1bb8 #define MT6359P_RG_LDO_VRF18_HW14_OP_CFG_ADDR 0x1bb8 #define MT6359P_RG_LDO_VRF18_SW_OP_CFG_ADDR 0x1bb8 #define MT6359P_RG_LDO_VRF12_OP_MODE_ADDR 0x1bc0 #define MT6359P_RG_LDO_VRF12_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VRF12_HW0_OP_EN_ADDR 0x1bc4 #define MT6359P_RG_LDO_VRF12_HW1_OP_EN_ADDR 0x1bc4 #define MT6359P_RG_LDO_VRF12_HW2_OP_EN_ADDR 0x1bc4 #define MT6359P_RG_LDO_VRF12_HW3_OP_EN_ADDR 0x1bc4 #define MT6359P_RG_LDO_VRF12_HW4_OP_EN_ADDR 0x1bc4 #define MT6359P_RG_LDO_VRF12_HW5_OP_EN_ADDR 0x1bc4 #define MT6359P_RG_LDO_VRF12_HW6_OP_EN_ADDR 0x1bc4 #define MT6359P_RG_LDO_VRF12_HW7_OP_EN_ADDR 0x1bc4 #define MT6359P_RG_LDO_VRF12_HW8_OP_EN_ADDR 0x1bc4 #define MT6359P_RG_LDO_VRF12_HW9_OP_EN_ADDR 0x1bc4 #define MT6359P_RG_LDO_VRF12_HW10_OP_EN_ADDR 0x1bc4 #define MT6359P_RG_LDO_VRF12_HW11_OP_EN_ADDR 0x1bc4 #define MT6359P_RG_LDO_VRF12_HW12_OP_EN_ADDR 0x1bc4 #define MT6359P_RG_LDO_VRF12_HW13_OP_EN_ADDR 0x1bc4 #define MT6359P_RG_LDO_VRF12_HW14_OP_EN_ADDR 0x1bc4 #define MT6359P_RG_LDO_VRF12_SW_OP_EN_ADDR 0x1bc4 #define MT6359P_RG_LDO_VRF12_HW0_OP_CFG_ADDR 0x1bca #define MT6359P_RG_LDO_VRF12_HW1_OP_CFG_ADDR 0x1bca #define MT6359P_RG_LDO_VRF12_HW2_OP_CFG_ADDR 0x1bca #define MT6359P_RG_LDO_VRF12_HW3_OP_CFG_ADDR 0x1bca #define MT6359P_RG_LDO_VRF12_HW4_OP_CFG_ADDR 0x1bca #define MT6359P_RG_LDO_VRF12_HW5_OP_CFG_ADDR 0x1bca #define MT6359P_RG_LDO_VRF12_HW6_OP_CFG_ADDR 0x1bca #define MT6359P_RG_LDO_VRF12_HW7_OP_CFG_ADDR 0x1bca #define MT6359P_RG_LDO_VRF12_HW8_OP_CFG_ADDR 0x1bca #define MT6359P_RG_LDO_VRF12_HW9_OP_CFG_ADDR 0x1bca #define MT6359P_RG_LDO_VRF12_HW10_OP_CFG_ADDR 0x1bca #define MT6359P_RG_LDO_VRF12_HW11_OP_CFG_ADDR 0x1bca #define MT6359P_RG_LDO_VRF12_HW12_OP_CFG_ADDR 0x1bca #define MT6359P_RG_LDO_VRF12_HW13_OP_CFG_ADDR 0x1bca #define MT6359P_RG_LDO_VRF12_HW14_OP_CFG_ADDR 0x1bca #define MT6359P_RG_LDO_VRF12_SW_OP_CFG_ADDR 0x1bca #define MT6359P_RG_LDO_VEFUSE_OP_MODE_ADDR 0x1bd2 #define MT6359P_RG_LDO_VEFUSE_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VEFUSE_HW0_OP_EN_ADDR 0x1bd6 #define MT6359P_RG_LDO_VEFUSE_HW1_OP_EN_ADDR 0x1bd6 #define MT6359P_RG_LDO_VEFUSE_HW2_OP_EN_ADDR 0x1bd6 #define MT6359P_RG_LDO_VEFUSE_HW3_OP_EN_ADDR 0x1bd6 #define MT6359P_RG_LDO_VEFUSE_HW4_OP_EN_ADDR 0x1bd6 #define MT6359P_RG_LDO_VEFUSE_HW5_OP_EN_ADDR 0x1bd6 #define MT6359P_RG_LDO_VEFUSE_HW6_OP_EN_ADDR 0x1bd6 #define MT6359P_RG_LDO_VEFUSE_HW7_OP_EN_ADDR 0x1bd6 #define MT6359P_RG_LDO_VEFUSE_HW8_OP_EN_ADDR 0x1bd6 #define MT6359P_RG_LDO_VEFUSE_HW9_OP_EN_ADDR 0x1bd6 #define MT6359P_RG_LDO_VEFUSE_HW10_OP_EN_ADDR 0x1bd6 #define MT6359P_RG_LDO_VEFUSE_HW11_OP_EN_ADDR 0x1bd6 #define MT6359P_RG_LDO_VEFUSE_HW12_OP_EN_ADDR 0x1bd6 #define MT6359P_RG_LDO_VEFUSE_HW13_OP_EN_ADDR 0x1bd6 #define MT6359P_RG_LDO_VEFUSE_HW14_OP_EN_ADDR 0x1bd6 #define MT6359P_RG_LDO_VEFUSE_SW_OP_EN_ADDR 0x1bd6 #define MT6359P_RG_LDO_VEFUSE_HW0_OP_CFG_ADDR 0x1bdc #define MT6359P_RG_LDO_VEFUSE_HW1_OP_CFG_ADDR 0x1bdc #define MT6359P_RG_LDO_VEFUSE_HW2_OP_CFG_ADDR 0x1bdc #define MT6359P_RG_LDO_VEFUSE_HW3_OP_CFG_ADDR 0x1bdc #define MT6359P_RG_LDO_VEFUSE_HW4_OP_CFG_ADDR 0x1bdc #define MT6359P_RG_LDO_VEFUSE_HW5_OP_CFG_ADDR 0x1bdc #define MT6359P_RG_LDO_VEFUSE_HW6_OP_CFG_ADDR 0x1bdc #define MT6359P_RG_LDO_VEFUSE_HW7_OP_CFG_ADDR 0x1bdc #define MT6359P_RG_LDO_VEFUSE_HW8_OP_CFG_ADDR 0x1bdc #define MT6359P_RG_LDO_VEFUSE_HW9_OP_CFG_ADDR 0x1bdc #define MT6359P_RG_LDO_VEFUSE_HW10_OP_CFG_ADDR 0x1bdc #define MT6359P_RG_LDO_VEFUSE_HW11_OP_CFG_ADDR 0x1bdc #define MT6359P_RG_LDO_VEFUSE_HW12_OP_CFG_ADDR 0x1bdc #define MT6359P_RG_LDO_VEFUSE_HW13_OP_CFG_ADDR 0x1bdc #define MT6359P_RG_LDO_VEFUSE_HW14_OP_CFG_ADDR 0x1bdc #define MT6359P_RG_LDO_VEFUSE_SW_OP_CFG_ADDR 0x1bdc #define MT6359P_RG_LDO_VCN33_1_OP_MODE_ADDR 0x1be4 #define MT6359P_RG_LDO_VCN33_1_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VCN33_1_HW0_OP_EN_ADDR 0x1be8 #define MT6359P_RG_LDO_VCN33_1_HW1_OP_EN_ADDR 0x1be8 #define MT6359P_RG_LDO_VCN33_1_HW2_OP_EN_ADDR 0x1be8 #define MT6359P_RG_LDO_VCN33_1_HW3_OP_EN_ADDR 0x1be8 #define MT6359P_RG_LDO_VCN33_1_HW4_OP_EN_ADDR 0x1be8 #define MT6359P_RG_LDO_VCN33_1_HW5_OP_EN_ADDR 0x1be8 #define MT6359P_RG_LDO_VCN33_1_HW6_OP_EN_ADDR 0x1be8 #define MT6359P_RG_LDO_VCN33_1_HW7_OP_EN_ADDR 0x1be8 #define MT6359P_RG_LDO_VCN33_1_HW8_OP_EN_ADDR 0x1be8 #define MT6359P_RG_LDO_VCN33_1_HW9_OP_EN_ADDR 0x1be8 #define MT6359P_RG_LDO_VCN33_1_HW10_OP_EN_ADDR 0x1be8 #define MT6359P_RG_LDO_VCN33_1_HW11_OP_EN_ADDR 0x1be8 #define MT6359P_RG_LDO_VCN33_1_HW12_OP_EN_ADDR 0x1be8 #define MT6359P_RG_LDO_VCN33_1_HW13_OP_EN_ADDR 0x1be8 #define MT6359P_RG_LDO_VCN33_1_HW14_OP_EN_ADDR 0x1be8 #define MT6359P_RG_LDO_VCN33_1_SW_OP_EN_ADDR 0x1be8 #define MT6359P_RG_LDO_VCN33_1_HW0_OP_CFG_ADDR 0x1bee #define MT6359P_RG_LDO_VCN33_1_HW1_OP_CFG_ADDR 0x1bee #define MT6359P_RG_LDO_VCN33_1_HW2_OP_CFG_ADDR 0x1bee #define MT6359P_RG_LDO_VCN33_1_HW3_OP_CFG_ADDR 0x1bee #define MT6359P_RG_LDO_VCN33_1_HW4_OP_CFG_ADDR 0x1bee #define MT6359P_RG_LDO_VCN33_1_HW5_OP_CFG_ADDR 0x1bee #define MT6359P_RG_LDO_VCN33_1_HW6_OP_CFG_ADDR 0x1bee #define MT6359P_RG_LDO_VCN33_1_HW7_OP_CFG_ADDR 0x1bee #define MT6359P_RG_LDO_VCN33_1_HW8_OP_CFG_ADDR 0x1bee #define MT6359P_RG_LDO_VCN33_1_HW9_OP_CFG_ADDR 0x1bee #define MT6359P_RG_LDO_VCN33_1_HW10_OP_CFG_ADDR 0x1bee #define MT6359P_RG_LDO_VCN33_1_HW11_OP_CFG_ADDR 0x1bee #define MT6359P_RG_LDO_VCN33_1_HW12_OP_CFG_ADDR 0x1bee #define MT6359P_RG_LDO_VCN33_1_HW13_OP_CFG_ADDR 0x1bee #define MT6359P_RG_LDO_VCN33_1_HW14_OP_CFG_ADDR 0x1bee #define MT6359P_RG_LDO_VCN33_1_SW_OP_CFG_ADDR 0x1bee #define MT6359P_RG_LDO_VCN33_2_OP_MODE_ADDR 0x1c0a #define MT6359P_RG_LDO_VCN33_2_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VCN33_2_HW0_OP_EN_ADDR 0x1c0e #define MT6359P_RG_LDO_VCN33_2_HW1_OP_EN_ADDR 0x1c0e #define MT6359P_RG_LDO_VCN33_2_HW2_OP_EN_ADDR 0x1c0e #define MT6359P_RG_LDO_VCN33_2_HW3_OP_EN_ADDR 0x1c0e #define MT6359P_RG_LDO_VCN33_2_HW4_OP_EN_ADDR 0x1c0e #define MT6359P_RG_LDO_VCN33_2_HW5_OP_EN_ADDR 0x1c0e #define MT6359P_RG_LDO_VCN33_2_HW6_OP_EN_ADDR 0x1c0e #define MT6359P_RG_LDO_VCN33_2_HW7_OP_EN_ADDR 0x1c0e #define MT6359P_RG_LDO_VCN33_2_HW8_OP_EN_ADDR 0x1c0e #define MT6359P_RG_LDO_VCN33_2_HW9_OP_EN_ADDR 0x1c0e #define MT6359P_RG_LDO_VCN33_2_HW10_OP_EN_ADDR 0x1c0e #define MT6359P_RG_LDO_VCN33_2_HW11_OP_EN_ADDR 0x1c0e #define MT6359P_RG_LDO_VCN33_2_HW12_OP_EN_ADDR 0x1c0e #define MT6359P_RG_LDO_VCN33_2_HW13_OP_EN_ADDR 0x1c0e #define MT6359P_RG_LDO_VCN33_2_HW14_OP_EN_ADDR 0x1c0e #define MT6359P_RG_LDO_VCN33_2_SW_OP_EN_ADDR 0x1c0e #define MT6359P_RG_LDO_VCN33_2_HW0_OP_CFG_ADDR 0x1c14 #define MT6359P_RG_LDO_VCN33_2_HW1_OP_CFG_ADDR 0x1c14 #define MT6359P_RG_LDO_VCN33_2_HW2_OP_CFG_ADDR 0x1c14 #define MT6359P_RG_LDO_VCN33_2_HW3_OP_CFG_ADDR 0x1c14 #define MT6359P_RG_LDO_VCN33_2_HW4_OP_CFG_ADDR 0x1c14 #define MT6359P_RG_LDO_VCN33_2_HW5_OP_CFG_ADDR 0x1c14 #define MT6359P_RG_LDO_VCN33_2_HW6_OP_CFG_ADDR 0x1c14 #define MT6359P_RG_LDO_VCN33_2_HW7_OP_CFG_ADDR 0x1c14 #define MT6359P_RG_LDO_VCN33_2_HW8_OP_CFG_ADDR 0x1c14 #define MT6359P_RG_LDO_VCN33_2_HW9_OP_CFG_ADDR 0x1c14 #define MT6359P_RG_LDO_VCN33_2_HW10_OP_CFG_ADDR 0x1c14 #define MT6359P_RG_LDO_VCN33_2_HW11_OP_CFG_ADDR 0x1c14 #define MT6359P_RG_LDO_VCN33_2_HW12_OP_CFG_ADDR 0x1c14 #define MT6359P_RG_LDO_VCN33_2_HW13_OP_CFG_ADDR 0x1c14 #define MT6359P_RG_LDO_VCN33_2_HW14_OP_CFG_ADDR 0x1c14 #define MT6359P_RG_LDO_VCN33_2_SW_OP_CFG_ADDR 0x1c14 #define MT6359P_RG_LDO_VCN13_OP_MODE_ADDR 0x1c1e #define MT6359P_RG_LDO_VCN13_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VCN13_HW0_OP_EN_ADDR 0x1c22 #define MT6359P_RG_LDO_VCN13_HW1_OP_EN_ADDR 0x1c22 #define MT6359P_RG_LDO_VCN13_HW2_OP_EN_ADDR 0x1c22 #define MT6359P_RG_LDO_VCN13_HW3_OP_EN_ADDR 0x1c22 #define MT6359P_RG_LDO_VCN13_HW4_OP_EN_ADDR 0x1c22 #define MT6359P_RG_LDO_VCN13_HW5_OP_EN_ADDR 0x1c22 #define MT6359P_RG_LDO_VCN13_HW6_OP_EN_ADDR 0x1c22 #define MT6359P_RG_LDO_VCN13_HW7_OP_EN_ADDR 0x1c22 #define MT6359P_RG_LDO_VCN13_HW8_OP_EN_ADDR 0x1c22 #define MT6359P_RG_LDO_VCN13_HW9_OP_EN_ADDR 0x1c22 #define MT6359P_RG_LDO_VCN13_HW10_OP_EN_ADDR 0x1c22 #define MT6359P_RG_LDO_VCN13_HW11_OP_EN_ADDR 0x1c22 #define MT6359P_RG_LDO_VCN13_HW12_OP_EN_ADDR 0x1c22 #define MT6359P_RG_LDO_VCN13_HW13_OP_EN_ADDR 0x1c22 #define MT6359P_RG_LDO_VCN13_HW14_OP_EN_ADDR 0x1c22 #define MT6359P_RG_LDO_VCN13_SW_OP_EN_ADDR 0x1c22 #define MT6359P_RG_LDO_VCN13_HW0_OP_CFG_ADDR 0x1c28 #define MT6359P_RG_LDO_VCN13_HW1_OP_CFG_ADDR 0x1c28 #define MT6359P_RG_LDO_VCN13_HW2_OP_CFG_ADDR 0x1c28 #define MT6359P_RG_LDO_VCN13_HW3_OP_CFG_ADDR 0x1c28 #define MT6359P_RG_LDO_VCN13_HW4_OP_CFG_ADDR 0x1c28 #define MT6359P_RG_LDO_VCN13_HW5_OP_CFG_ADDR 0x1c28 #define MT6359P_RG_LDO_VCN13_HW6_OP_CFG_ADDR 0x1c28 #define MT6359P_RG_LDO_VCN13_HW7_OP_CFG_ADDR 0x1c28 #define MT6359P_RG_LDO_VCN13_HW8_OP_CFG_ADDR 0x1c28 #define MT6359P_RG_LDO_VCN13_HW9_OP_CFG_ADDR 0x1c28 #define MT6359P_RG_LDO_VCN13_HW10_OP_CFG_ADDR 0x1c28 #define MT6359P_RG_LDO_VCN13_HW11_OP_CFG_ADDR 0x1c28 #define MT6359P_RG_LDO_VCN13_HW12_OP_CFG_ADDR 0x1c28 #define MT6359P_RG_LDO_VCN13_HW13_OP_CFG_ADDR 0x1c28 #define MT6359P_RG_LDO_VCN13_HW14_OP_CFG_ADDR 0x1c28 #define MT6359P_RG_LDO_VCN13_SW_OP_CFG_ADDR 0x1c28 #define MT6359P_RG_LDO_VCN18_OP_MODE_ADDR 0x1c30 #define MT6359P_RG_LDO_VCN18_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VCN18_HW0_OP_EN_ADDR 0x1c34 #define MT6359P_RG_LDO_VCN18_HW1_OP_EN_ADDR 0x1c34 #define MT6359P_RG_LDO_VCN18_HW2_OP_EN_ADDR 0x1c34 #define MT6359P_RG_LDO_VCN18_HW3_OP_EN_ADDR 0x1c34 #define MT6359P_RG_LDO_VCN18_HW4_OP_EN_ADDR 0x1c34 #define MT6359P_RG_LDO_VCN18_HW5_OP_EN_ADDR 0x1c34 #define MT6359P_RG_LDO_VCN18_HW6_OP_EN_ADDR 0x1c34 #define MT6359P_RG_LDO_VCN18_HW7_OP_EN_ADDR 0x1c34 #define MT6359P_RG_LDO_VCN18_HW8_OP_EN_ADDR 0x1c34 #define MT6359P_RG_LDO_VCN18_HW9_OP_EN_ADDR 0x1c34 #define MT6359P_RG_LDO_VCN18_HW10_OP_EN_ADDR 0x1c34 #define MT6359P_RG_LDO_VCN18_HW11_OP_EN_ADDR 0x1c34 #define MT6359P_RG_LDO_VCN18_HW12_OP_EN_ADDR 0x1c34 #define MT6359P_RG_LDO_VCN18_HW13_OP_EN_ADDR 0x1c34 #define MT6359P_RG_LDO_VCN18_HW14_OP_EN_ADDR 0x1c34 #define MT6359P_RG_LDO_VCN18_SW_OP_EN_ADDR 0x1c34 #define MT6359P_RG_LDO_VCN18_HW0_OP_CFG_ADDR 0x1c3a #define MT6359P_RG_LDO_VCN18_HW1_OP_CFG_ADDR 0x1c3a #define MT6359P_RG_LDO_VCN18_HW2_OP_CFG_ADDR 0x1c3a #define MT6359P_RG_LDO_VCN18_HW3_OP_CFG_ADDR 0x1c3a #define MT6359P_RG_LDO_VCN18_HW4_OP_CFG_ADDR 0x1c3a #define MT6359P_RG_LDO_VCN18_HW5_OP_CFG_ADDR 0x1c3a #define MT6359P_RG_LDO_VCN18_HW6_OP_CFG_ADDR 0x1c3a #define MT6359P_RG_LDO_VCN18_HW7_OP_CFG_ADDR 0x1c3a #define MT6359P_RG_LDO_VCN18_HW8_OP_CFG_ADDR 0x1c3a #define MT6359P_RG_LDO_VCN18_HW9_OP_CFG_ADDR 0x1c3a #define MT6359P_RG_LDO_VCN18_HW10_OP_CFG_ADDR 0x1c3a #define MT6359P_RG_LDO_VCN18_HW11_OP_CFG_ADDR 0x1c3a #define MT6359P_RG_LDO_VCN18_HW12_OP_CFG_ADDR 0x1c3a #define MT6359P_RG_LDO_VCN18_HW13_OP_CFG_ADDR 0x1c3a #define MT6359P_RG_LDO_VCN18_HW14_OP_CFG_ADDR 0x1c3a #define MT6359P_RG_LDO_VCN18_SW_OP_CFG_ADDR 0x1c3a #define MT6359P_RG_LDO_VA09_OP_MODE_ADDR 0x1c42 #define MT6359P_RG_LDO_VA09_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VA09_HW0_OP_EN_ADDR 0x1c46 #define MT6359P_RG_LDO_VA09_HW1_OP_EN_ADDR 0x1c46 #define MT6359P_RG_LDO_VA09_HW2_OP_EN_ADDR 0x1c46 #define MT6359P_RG_LDO_VA09_HW3_OP_EN_ADDR 0x1c46 #define MT6359P_RG_LDO_VA09_HW4_OP_EN_ADDR 0x1c46 #define MT6359P_RG_LDO_VA09_HW5_OP_EN_ADDR 0x1c46 #define MT6359P_RG_LDO_VA09_HW6_OP_EN_ADDR 0x1c46 #define MT6359P_RG_LDO_VA09_HW7_OP_EN_ADDR 0x1c46 #define MT6359P_RG_LDO_VA09_HW8_OP_EN_ADDR 0x1c46 #define MT6359P_RG_LDO_VA09_HW9_OP_EN_ADDR 0x1c46 #define MT6359P_RG_LDO_VA09_HW10_OP_EN_ADDR 0x1c46 #define MT6359P_RG_LDO_VA09_HW11_OP_EN_ADDR 0x1c46 #define MT6359P_RG_LDO_VA09_HW12_OP_EN_ADDR 0x1c46 #define MT6359P_RG_LDO_VA09_HW13_OP_EN_ADDR 0x1c46 #define MT6359P_RG_LDO_VA09_HW14_OP_EN_ADDR 0x1c46 #define MT6359P_RG_LDO_VA09_SW_OP_EN_ADDR 0x1c46 #define MT6359P_RG_LDO_VA09_HW0_OP_CFG_ADDR 0x1c4c #define MT6359P_RG_LDO_VA09_HW1_OP_CFG_ADDR 0x1c4c #define MT6359P_RG_LDO_VA09_HW2_OP_CFG_ADDR 0x1c4c #define MT6359P_RG_LDO_VA09_HW3_OP_CFG_ADDR 0x1c4c #define MT6359P_RG_LDO_VA09_HW4_OP_CFG_ADDR 0x1c4c #define MT6359P_RG_LDO_VA09_HW5_OP_CFG_ADDR 0x1c4c #define MT6359P_RG_LDO_VA09_HW6_OP_CFG_ADDR 0x1c4c #define MT6359P_RG_LDO_VA09_HW7_OP_CFG_ADDR 0x1c4c #define MT6359P_RG_LDO_VA09_HW8_OP_CFG_ADDR 0x1c4c #define MT6359P_RG_LDO_VA09_HW9_OP_CFG_ADDR 0x1c4c #define MT6359P_RG_LDO_VA09_HW10_OP_CFG_ADDR 0x1c4c #define MT6359P_RG_LDO_VA09_HW11_OP_CFG_ADDR 0x1c4c #define MT6359P_RG_LDO_VA09_HW12_OP_CFG_ADDR 0x1c4c #define MT6359P_RG_LDO_VA09_HW13_OP_CFG_ADDR 0x1c4c #define MT6359P_RG_LDO_VA09_HW14_OP_CFG_ADDR 0x1c4c #define MT6359P_RG_LDO_VA09_SW_OP_CFG_ADDR 0x1c4c #define MT6359P_RG_LDO_VCAMIO_OP_MODE_ADDR 0x1c54 #define MT6359P_RG_LDO_VCAMIO_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VCAMIO_HW0_OP_EN_ADDR 0x1c58 #define MT6359P_RG_LDO_VCAMIO_HW1_OP_EN_ADDR 0x1c58 #define MT6359P_RG_LDO_VCAMIO_HW2_OP_EN_ADDR 0x1c58 #define MT6359P_RG_LDO_VCAMIO_HW3_OP_EN_ADDR 0x1c58 #define MT6359P_RG_LDO_VCAMIO_HW4_OP_EN_ADDR 0x1c58 #define MT6359P_RG_LDO_VCAMIO_HW5_OP_EN_ADDR 0x1c58 #define MT6359P_RG_LDO_VCAMIO_HW6_OP_EN_ADDR 0x1c58 #define MT6359P_RG_LDO_VCAMIO_HW7_OP_EN_ADDR 0x1c58 #define MT6359P_RG_LDO_VCAMIO_HW8_OP_EN_ADDR 0x1c58 #define MT6359P_RG_LDO_VCAMIO_HW9_OP_EN_ADDR 0x1c58 #define MT6359P_RG_LDO_VCAMIO_HW10_OP_EN_ADDR 0x1c58 #define MT6359P_RG_LDO_VCAMIO_HW11_OP_EN_ADDR 0x1c58 #define MT6359P_RG_LDO_VCAMIO_HW12_OP_EN_ADDR 0x1c58 #define MT6359P_RG_LDO_VCAMIO_HW13_OP_EN_ADDR 0x1c58 #define MT6359P_RG_LDO_VCAMIO_HW14_OP_EN_ADDR 0x1c58 #define MT6359P_RG_LDO_VCAMIO_SW_OP_EN_ADDR 0x1c58 #define MT6359P_RG_LDO_VCAMIO_HW0_OP_CFG_ADDR 0x1c5e #define MT6359P_RG_LDO_VCAMIO_HW1_OP_CFG_ADDR 0x1c5e #define MT6359P_RG_LDO_VCAMIO_HW2_OP_CFG_ADDR 0x1c5e #define MT6359P_RG_LDO_VCAMIO_HW3_OP_CFG_ADDR 0x1c5e #define MT6359P_RG_LDO_VCAMIO_HW4_OP_CFG_ADDR 0x1c5e #define MT6359P_RG_LDO_VCAMIO_HW5_OP_CFG_ADDR 0x1c5e #define MT6359P_RG_LDO_VCAMIO_HW6_OP_CFG_ADDR 0x1c5e #define MT6359P_RG_LDO_VCAMIO_HW7_OP_CFG_ADDR 0x1c5e #define MT6359P_RG_LDO_VCAMIO_HW8_OP_CFG_ADDR 0x1c5e #define MT6359P_RG_LDO_VCAMIO_HW9_OP_CFG_ADDR 0x1c5e #define MT6359P_RG_LDO_VCAMIO_HW10_OP_CFG_ADDR 0x1c5e #define MT6359P_RG_LDO_VCAMIO_HW11_OP_CFG_ADDR 0x1c5e #define MT6359P_RG_LDO_VCAMIO_HW12_OP_CFG_ADDR 0x1c5e #define MT6359P_RG_LDO_VCAMIO_HW13_OP_CFG_ADDR 0x1c5e #define MT6359P_RG_LDO_VCAMIO_HW14_OP_CFG_ADDR 0x1c5e #define MT6359P_RG_LDO_VCAMIO_SW_OP_CFG_ADDR 0x1c5e #define MT6359P_RG_LDO_VA12_OP_MODE_ADDR 0x1c66 #define MT6359P_RG_LDO_VA12_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VA12_HW0_OP_EN_ADDR 0x1c6a #define MT6359P_RG_LDO_VA12_HW1_OP_EN_ADDR 0x1c6a #define MT6359P_RG_LDO_VA12_HW2_OP_EN_ADDR 0x1c6a #define MT6359P_RG_LDO_VA12_HW3_OP_EN_ADDR 0x1c6a #define MT6359P_RG_LDO_VA12_HW4_OP_EN_ADDR 0x1c6a #define MT6359P_RG_LDO_VA12_HW5_OP_EN_ADDR 0x1c6a #define MT6359P_RG_LDO_VA12_HW6_OP_EN_ADDR 0x1c6a #define MT6359P_RG_LDO_VA12_HW7_OP_EN_ADDR 0x1c6a #define MT6359P_RG_LDO_VA12_HW8_OP_EN_ADDR 0x1c6a #define MT6359P_RG_LDO_VA12_HW9_OP_EN_ADDR 0x1c6a #define MT6359P_RG_LDO_VA12_HW10_OP_EN_ADDR 0x1c6a #define MT6359P_RG_LDO_VA12_HW11_OP_EN_ADDR 0x1c6a #define MT6359P_RG_LDO_VA12_HW12_OP_EN_ADDR 0x1c6a #define MT6359P_RG_LDO_VA12_HW13_OP_EN_ADDR 0x1c6a #define MT6359P_RG_LDO_VA12_HW14_OP_EN_ADDR 0x1c6a #define MT6359P_RG_LDO_VA12_SW_OP_EN_ADDR 0x1c6a #define MT6359P_RG_LDO_VA12_HW0_OP_CFG_ADDR 0x1c70 #define MT6359P_RG_LDO_VA12_HW1_OP_CFG_ADDR 0x1c70 #define MT6359P_RG_LDO_VA12_HW2_OP_CFG_ADDR 0x1c70 #define MT6359P_RG_LDO_VA12_HW3_OP_CFG_ADDR 0x1c70 #define MT6359P_RG_LDO_VA12_HW4_OP_CFG_ADDR 0x1c70 #define MT6359P_RG_LDO_VA12_HW5_OP_CFG_ADDR 0x1c70 #define MT6359P_RG_LDO_VA12_HW6_OP_CFG_ADDR 0x1c70 #define MT6359P_RG_LDO_VA12_HW7_OP_CFG_ADDR 0x1c70 #define MT6359P_RG_LDO_VA12_HW8_OP_CFG_ADDR 0x1c70 #define MT6359P_RG_LDO_VA12_HW9_OP_CFG_ADDR 0x1c70 #define MT6359P_RG_LDO_VA12_HW10_OP_CFG_ADDR 0x1c70 #define MT6359P_RG_LDO_VA12_HW11_OP_CFG_ADDR 0x1c70 #define MT6359P_RG_LDO_VA12_HW12_OP_CFG_ADDR 0x1c70 #define MT6359P_RG_LDO_VA12_HW13_OP_CFG_ADDR 0x1c70 #define MT6359P_RG_LDO_VA12_HW14_OP_CFG_ADDR 0x1c70 #define MT6359P_RG_LDO_VA12_SW_OP_CFG_ADDR 0x1c70 #define MT6359P_RG_LDO_VAUX18_OP_MODE_ADDR 0x1c8a #define MT6359P_RG_LDO_VAUX18_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VAUX18_HW0_OP_EN_ADDR 0x1c8e #define MT6359P_RG_LDO_VAUX18_HW1_OP_EN_ADDR 0x1c8e #define MT6359P_RG_LDO_VAUX18_HW2_OP_EN_ADDR 0x1c8e #define MT6359P_RG_LDO_VAUX18_HW3_OP_EN_ADDR 0x1c8e #define MT6359P_RG_LDO_VAUX18_HW4_OP_EN_ADDR 0x1c8e #define MT6359P_RG_LDO_VAUX18_HW5_OP_EN_ADDR 0x1c8e #define MT6359P_RG_LDO_VAUX18_HW6_OP_EN_ADDR 0x1c8e #define MT6359P_RG_LDO_VAUX18_HW7_OP_EN_ADDR 0x1c8e #define MT6359P_RG_LDO_VAUX18_HW8_OP_EN_ADDR 0x1c8e #define MT6359P_RG_LDO_VAUX18_HW9_OP_EN_ADDR 0x1c8e #define MT6359P_RG_LDO_VAUX18_HW10_OP_EN_ADDR 0x1c8e #define MT6359P_RG_LDO_VAUX18_HW11_OP_EN_ADDR 0x1c8e #define MT6359P_RG_LDO_VAUX18_HW12_OP_EN_ADDR 0x1c8e #define MT6359P_RG_LDO_VAUX18_HW13_OP_EN_ADDR 0x1c8e #define MT6359P_RG_LDO_VAUX18_HW14_OP_EN_ADDR 0x1c8e #define MT6359P_RG_LDO_VAUX18_SW_OP_EN_ADDR 0x1c8e #define MT6359P_RG_LDO_VAUX18_HW0_OP_CFG_ADDR 0x1c94 #define MT6359P_RG_LDO_VAUX18_HW1_OP_CFG_ADDR 0x1c94 #define MT6359P_RG_LDO_VAUX18_HW2_OP_CFG_ADDR 0x1c94 #define MT6359P_RG_LDO_VAUX18_HW3_OP_CFG_ADDR 0x1c94 #define MT6359P_RG_LDO_VAUX18_HW4_OP_CFG_ADDR 0x1c94 #define MT6359P_RG_LDO_VAUX18_HW5_OP_CFG_ADDR 0x1c94 #define MT6359P_RG_LDO_VAUX18_HW6_OP_CFG_ADDR 0x1c94 #define MT6359P_RG_LDO_VAUX18_HW7_OP_CFG_ADDR 0x1c94 #define MT6359P_RG_LDO_VAUX18_HW8_OP_CFG_ADDR 0x1c94 #define MT6359P_RG_LDO_VAUX18_HW9_OP_CFG_ADDR 0x1c94 #define MT6359P_RG_LDO_VAUX18_HW10_OP_CFG_ADDR 0x1c94 #define MT6359P_RG_LDO_VAUX18_HW11_OP_CFG_ADDR 0x1c94 #define MT6359P_RG_LDO_VAUX18_HW12_OP_CFG_ADDR 0x1c94 #define MT6359P_RG_LDO_VAUX18_HW13_OP_CFG_ADDR 0x1c94 #define MT6359P_RG_LDO_VAUX18_HW14_OP_CFG_ADDR 0x1c94 #define MT6359P_RG_LDO_VAUX18_SW_OP_CFG_ADDR 0x1c94 #define MT6359P_RG_LDO_VAUD18_OP_MODE_ADDR 0x1c9c #define MT6359P_RG_LDO_VAUD18_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VAUD18_HW0_OP_EN_ADDR 0x1ca0 #define MT6359P_RG_LDO_VAUD18_HW1_OP_EN_ADDR 0x1ca0 #define MT6359P_RG_LDO_VAUD18_HW2_OP_EN_ADDR 0x1ca0 #define MT6359P_RG_LDO_VAUD18_HW3_OP_EN_ADDR 0x1ca0 #define MT6359P_RG_LDO_VAUD18_HW4_OP_EN_ADDR 0x1ca0 #define MT6359P_RG_LDO_VAUD18_HW5_OP_EN_ADDR 0x1ca0 #define MT6359P_RG_LDO_VAUD18_HW6_OP_EN_ADDR 0x1ca0 #define MT6359P_RG_LDO_VAUD18_HW7_OP_EN_ADDR 0x1ca0 #define MT6359P_RG_LDO_VAUD18_HW8_OP_EN_ADDR 0x1ca0 #define MT6359P_RG_LDO_VAUD18_HW9_OP_EN_ADDR 0x1ca0 #define MT6359P_RG_LDO_VAUD18_HW10_OP_EN_ADDR 0x1ca0 #define MT6359P_RG_LDO_VAUD18_HW11_OP_EN_ADDR 0x1ca0 #define MT6359P_RG_LDO_VAUD18_HW12_OP_EN_ADDR 0x1ca0 #define MT6359P_RG_LDO_VAUD18_HW13_OP_EN_ADDR 0x1ca0 #define MT6359P_RG_LDO_VAUD18_HW14_OP_EN_ADDR 0x1ca0 #define MT6359P_RG_LDO_VAUD18_SW_OP_EN_ADDR 0x1ca0 #define MT6359P_RG_LDO_VAUD18_HW0_OP_CFG_ADDR 0x1ca6 #define MT6359P_RG_LDO_VAUD18_HW1_OP_CFG_ADDR 0x1ca6 #define MT6359P_RG_LDO_VAUD18_HW2_OP_CFG_ADDR 0x1ca6 #define MT6359P_RG_LDO_VAUD18_HW3_OP_CFG_ADDR 0x1ca6 #define MT6359P_RG_LDO_VAUD18_HW4_OP_CFG_ADDR 0x1ca6 #define MT6359P_RG_LDO_VAUD18_HW5_OP_CFG_ADDR 0x1ca6 #define MT6359P_RG_LDO_VAUD18_HW6_OP_CFG_ADDR 0x1ca6 #define MT6359P_RG_LDO_VAUD18_HW7_OP_CFG_ADDR 0x1ca6 #define MT6359P_RG_LDO_VAUD18_HW8_OP_CFG_ADDR 0x1ca6 #define MT6359P_RG_LDO_VAUD18_HW9_OP_CFG_ADDR 0x1ca6 #define MT6359P_RG_LDO_VAUD18_HW10_OP_CFG_ADDR 0x1ca6 #define MT6359P_RG_LDO_VAUD18_HW11_OP_CFG_ADDR 0x1ca6 #define MT6359P_RG_LDO_VAUD18_HW12_OP_CFG_ADDR 0x1ca6 #define MT6359P_RG_LDO_VAUD18_HW13_OP_CFG_ADDR 0x1ca6 #define MT6359P_RG_LDO_VAUD18_HW14_OP_CFG_ADDR 0x1ca6 #define MT6359P_RG_LDO_VAUD18_SW_OP_CFG_ADDR 0x1ca6 #define MT6359P_RG_LDO_VIO18_OP_MODE_ADDR 0x1cae #define MT6359P_RG_LDO_VIO18_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VIO18_HW0_OP_EN_ADDR 0x1cb2 #define MT6359P_RG_LDO_VIO18_HW1_OP_EN_ADDR 0x1cb2 #define MT6359P_RG_LDO_VIO18_HW2_OP_EN_ADDR 0x1cb2 #define MT6359P_RG_LDO_VIO18_HW3_OP_EN_ADDR 0x1cb2 #define MT6359P_RG_LDO_VIO18_HW4_OP_EN_ADDR 0x1cb2 #define MT6359P_RG_LDO_VIO18_HW5_OP_EN_ADDR 0x1cb2 #define MT6359P_RG_LDO_VIO18_HW6_OP_EN_ADDR 0x1cb2 #define MT6359P_RG_LDO_VIO18_HW7_OP_EN_ADDR 0x1cb2 #define MT6359P_RG_LDO_VIO18_HW8_OP_EN_ADDR 0x1cb2 #define MT6359P_RG_LDO_VIO18_HW9_OP_EN_ADDR 0x1cb2 #define MT6359P_RG_LDO_VIO18_HW10_OP_EN_ADDR 0x1cb2 #define MT6359P_RG_LDO_VIO18_HW11_OP_EN_ADDR 0x1cb2 #define MT6359P_RG_LDO_VIO18_HW12_OP_EN_ADDR 0x1cb2 #define MT6359P_RG_LDO_VIO18_HW13_OP_EN_ADDR 0x1cb2 #define MT6359P_RG_LDO_VIO18_HW14_OP_EN_ADDR 0x1cb2 #define MT6359P_RG_LDO_VIO18_SW_OP_EN_ADDR 0x1cb2 #define MT6359P_RG_LDO_VIO18_HW0_OP_CFG_ADDR 0x1cb8 #define MT6359P_RG_LDO_VIO18_HW1_OP_CFG_ADDR 0x1cb8 #define MT6359P_RG_LDO_VIO18_HW2_OP_CFG_ADDR 0x1cb8 #define MT6359P_RG_LDO_VIO18_HW3_OP_CFG_ADDR 0x1cb8 #define MT6359P_RG_LDO_VIO18_HW4_OP_CFG_ADDR 0x1cb8 #define MT6359P_RG_LDO_VIO18_HW5_OP_CFG_ADDR 0x1cb8 #define MT6359P_RG_LDO_VIO18_HW6_OP_CFG_ADDR 0x1cb8 #define MT6359P_RG_LDO_VIO18_HW7_OP_CFG_ADDR 0x1cb8 #define MT6359P_RG_LDO_VIO18_HW8_OP_CFG_ADDR 0x1cb8 #define MT6359P_RG_LDO_VIO18_HW9_OP_CFG_ADDR 0x1cb8 #define MT6359P_RG_LDO_VIO18_HW10_OP_CFG_ADDR 0x1cb8 #define MT6359P_RG_LDO_VIO18_HW11_OP_CFG_ADDR 0x1cb8 #define MT6359P_RG_LDO_VIO18_HW12_OP_CFG_ADDR 0x1cb8 #define MT6359P_RG_LDO_VIO18_HW13_OP_CFG_ADDR 0x1cb8 #define MT6359P_RG_LDO_VIO18_HW14_OP_CFG_ADDR 0x1cb8 #define MT6359P_RG_LDO_VIO18_SW_OP_CFG_ADDR 0x1cb8 #define MT6359P_RG_LDO_VEMC_OP_MODE_ADDR 0x1cc0 #define MT6359P_RG_LDO_VEMC_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VEMC_HW0_OP_EN_ADDR 0x1cc4 #define MT6359P_RG_LDO_VEMC_HW1_OP_EN_ADDR 0x1cc4 #define MT6359P_RG_LDO_VEMC_HW2_OP_EN_ADDR 0x1cc4 #define MT6359P_RG_LDO_VEMC_HW3_OP_EN_ADDR 0x1cc4 #define MT6359P_RG_LDO_VEMC_HW4_OP_EN_ADDR 0x1cc4 #define MT6359P_RG_LDO_VEMC_HW5_OP_EN_ADDR 0x1cc4 #define MT6359P_RG_LDO_VEMC_HW6_OP_EN_ADDR 0x1cc4 #define MT6359P_RG_LDO_VEMC_HW7_OP_EN_ADDR 0x1cc4 #define MT6359P_RG_LDO_VEMC_HW8_OP_EN_ADDR 0x1cc4 #define MT6359P_RG_LDO_VEMC_HW9_OP_EN_ADDR 0x1cc4 #define MT6359P_RG_LDO_VEMC_HW10_OP_EN_ADDR 0x1cc4 #define MT6359P_RG_LDO_VEMC_HW11_OP_EN_ADDR 0x1cc4 #define MT6359P_RG_LDO_VEMC_HW12_OP_EN_ADDR 0x1cc4 #define MT6359P_RG_LDO_VEMC_HW13_OP_EN_ADDR 0x1cc4 #define MT6359P_RG_LDO_VEMC_HW14_OP_EN_ADDR 0x1cc4 #define MT6359P_RG_LDO_VEMC_SW_OP_EN_ADDR 0x1cc4 #define MT6359P_RG_LDO_VEMC_HW0_OP_CFG_ADDR 0x1cca #define MT6359P_RG_LDO_VEMC_HW1_OP_CFG_ADDR 0x1cca #define MT6359P_RG_LDO_VEMC_HW2_OP_CFG_ADDR 0x1cca #define MT6359P_RG_LDO_VEMC_HW3_OP_CFG_ADDR 0x1cca #define MT6359P_RG_LDO_VEMC_HW4_OP_CFG_ADDR 0x1cca #define MT6359P_RG_LDO_VEMC_HW5_OP_CFG_ADDR 0x1cca #define MT6359P_RG_LDO_VEMC_HW6_OP_CFG_ADDR 0x1cca #define MT6359P_RG_LDO_VEMC_HW7_OP_CFG_ADDR 0x1cca #define MT6359P_RG_LDO_VEMC_HW8_OP_CFG_ADDR 0x1cca #define MT6359P_RG_LDO_VEMC_HW9_OP_CFG_ADDR 0x1cca #define MT6359P_RG_LDO_VEMC_HW10_OP_CFG_ADDR 0x1cca #define MT6359P_RG_LDO_VEMC_HW11_OP_CFG_ADDR 0x1cca #define MT6359P_RG_LDO_VEMC_HW12_OP_CFG_ADDR 0x1cca #define MT6359P_RG_LDO_VEMC_HW13_OP_CFG_ADDR 0x1cca #define MT6359P_RG_LDO_VEMC_HW14_OP_CFG_ADDR 0x1cca #define MT6359P_RG_LDO_VEMC_SW_OP_CFG_ADDR 0x1cca #define MT6359P_RG_LDO_VSIM1_OP_MODE_ADDR 0x1cd2 #define MT6359P_RG_LDO_VSIM1_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VSIM1_HW0_OP_EN_ADDR 0x1cd6 #define MT6359P_RG_LDO_VSIM1_HW1_OP_EN_ADDR 0x1cd6 #define MT6359P_RG_LDO_VSIM1_HW2_OP_EN_ADDR 0x1cd6 #define MT6359P_RG_LDO_VSIM1_HW3_OP_EN_ADDR 0x1cd6 #define MT6359P_RG_LDO_VSIM1_HW4_OP_EN_ADDR 0x1cd6 #define MT6359P_RG_LDO_VSIM1_HW5_OP_EN_ADDR 0x1cd6 #define MT6359P_RG_LDO_VSIM1_HW6_OP_EN_ADDR 0x1cd6 #define MT6359P_RG_LDO_VSIM1_HW7_OP_EN_ADDR 0x1cd6 #define MT6359P_RG_LDO_VSIM1_HW8_OP_EN_ADDR 0x1cd6 #define MT6359P_RG_LDO_VSIM1_HW9_OP_EN_ADDR 0x1cd6 #define MT6359P_RG_LDO_VSIM1_HW10_OP_EN_ADDR 0x1cd6 #define MT6359P_RG_LDO_VSIM1_HW11_OP_EN_ADDR 0x1cd6 #define MT6359P_RG_LDO_VSIM1_HW12_OP_EN_ADDR 0x1cd6 #define MT6359P_RG_LDO_VSIM1_HW13_OP_EN_ADDR 0x1cd6 #define MT6359P_RG_LDO_VSIM1_HW14_OP_EN_ADDR 0x1cd6 #define MT6359P_RG_LDO_VSIM1_SW_OP_EN_ADDR 0x1cd6 #define MT6359P_RG_LDO_VSIM1_HW0_OP_CFG_ADDR 0x1cdc #define MT6359P_RG_LDO_VSIM1_HW1_OP_CFG_ADDR 0x1cdc #define MT6359P_RG_LDO_VSIM1_HW2_OP_CFG_ADDR 0x1cdc #define MT6359P_RG_LDO_VSIM1_HW3_OP_CFG_ADDR 0x1cdc #define MT6359P_RG_LDO_VSIM1_HW4_OP_CFG_ADDR 0x1cdc #define MT6359P_RG_LDO_VSIM1_HW5_OP_CFG_ADDR 0x1cdc #define MT6359P_RG_LDO_VSIM1_HW6_OP_CFG_ADDR 0x1cdc #define MT6359P_RG_LDO_VSIM1_HW7_OP_CFG_ADDR 0x1cdc #define MT6359P_RG_LDO_VSIM1_HW8_OP_CFG_ADDR 0x1cdc #define MT6359P_RG_LDO_VSIM1_HW9_OP_CFG_ADDR 0x1cdc #define MT6359P_RG_LDO_VSIM1_HW10_OP_CFG_ADDR 0x1cdc #define MT6359P_RG_LDO_VSIM1_HW11_OP_CFG_ADDR 0x1cdc #define MT6359P_RG_LDO_VSIM1_HW12_OP_CFG_ADDR 0x1cdc #define MT6359P_RG_LDO_VSIM1_HW13_OP_CFG_ADDR 0x1cdc #define MT6359P_RG_LDO_VSIM1_HW14_OP_CFG_ADDR 0x1cdc #define MT6359P_RG_LDO_VSIM1_SW_OP_CFG_ADDR 0x1cdc #define MT6359P_RG_LDO_VSIM2_OP_MODE_ADDR 0x1ce4 #define MT6359P_RG_LDO_VSIM2_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VSIM2_HW0_OP_EN_ADDR 0x1ce8 #define MT6359P_RG_LDO_VSIM2_HW1_OP_EN_ADDR 0x1ce8 #define MT6359P_RG_LDO_VSIM2_HW2_OP_EN_ADDR 0x1ce8 #define MT6359P_RG_LDO_VSIM2_HW3_OP_EN_ADDR 0x1ce8 #define MT6359P_RG_LDO_VSIM2_HW4_OP_EN_ADDR 0x1ce8 #define MT6359P_RG_LDO_VSIM2_HW5_OP_EN_ADDR 0x1ce8 #define MT6359P_RG_LDO_VSIM2_HW6_OP_EN_ADDR 0x1ce8 #define MT6359P_RG_LDO_VSIM2_HW7_OP_EN_ADDR 0x1ce8 #define MT6359P_RG_LDO_VSIM2_HW8_OP_EN_ADDR 0x1ce8 #define MT6359P_RG_LDO_VSIM2_HW9_OP_EN_ADDR 0x1ce8 #define MT6359P_RG_LDO_VSIM2_HW10_OP_EN_ADDR 0x1ce8 #define MT6359P_RG_LDO_VSIM2_HW11_OP_EN_ADDR 0x1ce8 #define MT6359P_RG_LDO_VSIM2_HW12_OP_EN_ADDR 0x1ce8 #define MT6359P_RG_LDO_VSIM2_HW13_OP_EN_ADDR 0x1ce8 #define MT6359P_RG_LDO_VSIM2_HW14_OP_EN_ADDR 0x1ce8 #define MT6359P_RG_LDO_VSIM2_SW_OP_EN_ADDR 0x1ce8 #define MT6359P_RG_LDO_VSIM2_HW0_OP_CFG_ADDR 0x1cee #define MT6359P_RG_LDO_VSIM2_HW1_OP_CFG_ADDR 0x1cee #define MT6359P_RG_LDO_VSIM2_HW2_OP_CFG_ADDR 0x1cee #define MT6359P_RG_LDO_VSIM2_HW3_OP_CFG_ADDR 0x1cee #define MT6359P_RG_LDO_VSIM2_HW4_OP_CFG_ADDR 0x1cee #define MT6359P_RG_LDO_VSIM2_HW5_OP_CFG_ADDR 0x1cee #define MT6359P_RG_LDO_VSIM2_HW6_OP_CFG_ADDR 0x1cee #define MT6359P_RG_LDO_VSIM2_HW7_OP_CFG_ADDR 0x1cee #define MT6359P_RG_LDO_VSIM2_HW8_OP_CFG_ADDR 0x1cee #define MT6359P_RG_LDO_VSIM2_HW9_OP_CFG_ADDR 0x1cee #define MT6359P_RG_LDO_VSIM2_HW10_OP_CFG_ADDR 0x1cee #define MT6359P_RG_LDO_VSIM2_HW11_OP_CFG_ADDR 0x1cee #define MT6359P_RG_LDO_VSIM2_HW12_OP_CFG_ADDR 0x1cee #define MT6359P_RG_LDO_VSIM2_HW13_OP_CFG_ADDR 0x1cee #define MT6359P_RG_LDO_VSIM2_HW14_OP_CFG_ADDR 0x1cee #define MT6359P_RG_LDO_VSIM2_SW_OP_CFG_ADDR 0x1cee #define MT6359P_RG_LDO_VUSB_OP_MODE_ADDR 0x1d0a #define MT6359P_RG_LDO_VUSB_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VUSB_HW0_OP_EN_ADDR 0x1d0e #define MT6359P_RG_LDO_VUSB_HW1_OP_EN_ADDR 0x1d0e #define MT6359P_RG_LDO_VUSB_HW2_OP_EN_ADDR 0x1d0e #define MT6359P_RG_LDO_VUSB_HW3_OP_EN_ADDR 0x1d0e #define MT6359P_RG_LDO_VUSB_HW4_OP_EN_ADDR 0x1d0e #define MT6359P_RG_LDO_VUSB_HW5_OP_EN_ADDR 0x1d0e #define MT6359P_RG_LDO_VUSB_HW6_OP_EN_ADDR 0x1d0e #define MT6359P_RG_LDO_VUSB_HW7_OP_EN_ADDR 0x1d0e #define MT6359P_RG_LDO_VUSB_HW8_OP_EN_ADDR 0x1d0e #define MT6359P_RG_LDO_VUSB_HW9_OP_EN_ADDR 0x1d0e #define MT6359P_RG_LDO_VUSB_HW10_OP_EN_ADDR 0x1d0e #define MT6359P_RG_LDO_VUSB_HW11_OP_EN_ADDR 0x1d0e #define MT6359P_RG_LDO_VUSB_HW12_OP_EN_ADDR 0x1d0e #define MT6359P_RG_LDO_VUSB_HW13_OP_EN_ADDR 0x1d0e #define MT6359P_RG_LDO_VUSB_HW14_OP_EN_ADDR 0x1d0e #define MT6359P_RG_LDO_VUSB_SW_OP_EN_ADDR 0x1d0e #define MT6359P_RG_LDO_VUSB_HW0_OP_CFG_ADDR 0x1d14 #define MT6359P_RG_LDO_VUSB_HW1_OP_CFG_ADDR 0x1d14 #define MT6359P_RG_LDO_VUSB_HW2_OP_CFG_ADDR 0x1d14 #define MT6359P_RG_LDO_VUSB_HW3_OP_CFG_ADDR 0x1d14 #define MT6359P_RG_LDO_VUSB_HW4_OP_CFG_ADDR 0x1d14 #define MT6359P_RG_LDO_VUSB_HW5_OP_CFG_ADDR 0x1d14 #define MT6359P_RG_LDO_VUSB_HW6_OP_CFG_ADDR 0x1d14 #define MT6359P_RG_LDO_VUSB_HW7_OP_CFG_ADDR 0x1d14 #define MT6359P_RG_LDO_VUSB_HW8_OP_CFG_ADDR 0x1d14 #define MT6359P_RG_LDO_VUSB_HW9_OP_CFG_ADDR 0x1d14 #define MT6359P_RG_LDO_VUSB_HW10_OP_CFG_ADDR 0x1d14 #define MT6359P_RG_LDO_VUSB_HW11_OP_CFG_ADDR 0x1d14 #define MT6359P_RG_LDO_VUSB_HW12_OP_CFG_ADDR 0x1d14 #define MT6359P_RG_LDO_VUSB_HW13_OP_CFG_ADDR 0x1d14 #define MT6359P_RG_LDO_VUSB_HW14_OP_CFG_ADDR 0x1d14 #define MT6359P_RG_LDO_VUSB_SW_OP_CFG_ADDR 0x1d14 #define MT6359P_RG_LDO_VRFCK_OP_MODE_ADDR 0x1d1e #define MT6359P_RG_LDO_VRFCK_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VRFCK_HW0_OP_EN_ADDR 0x1d22 #define MT6359P_RG_LDO_VRFCK_HW1_OP_EN_ADDR 0x1d22 #define MT6359P_RG_LDO_VRFCK_HW2_OP_EN_ADDR 0x1d22 #define MT6359P_RG_LDO_VRFCK_HW3_OP_EN_ADDR 0x1d22 #define MT6359P_RG_LDO_VRFCK_HW4_OP_EN_ADDR 0x1d22 #define MT6359P_RG_LDO_VRFCK_HW5_OP_EN_ADDR 0x1d22 #define MT6359P_RG_LDO_VRFCK_HW6_OP_EN_ADDR 0x1d22 #define MT6359P_RG_LDO_VRFCK_HW7_OP_EN_ADDR 0x1d22 #define MT6359P_RG_LDO_VRFCK_HW8_OP_EN_ADDR 0x1d22 #define MT6359P_RG_LDO_VRFCK_HW9_OP_EN_ADDR 0x1d22 #define MT6359P_RG_LDO_VRFCK_HW10_OP_EN_ADDR 0x1d22 #define MT6359P_RG_LDO_VRFCK_HW11_OP_EN_ADDR 0x1d22 #define MT6359P_RG_LDO_VRFCK_HW12_OP_EN_ADDR 0x1d22 #define MT6359P_RG_LDO_VRFCK_HW13_OP_EN_ADDR 0x1d22 #define MT6359P_RG_LDO_VRFCK_HW14_OP_EN_ADDR 0x1d22 #define MT6359P_RG_LDO_VRFCK_SW_OP_EN_ADDR 0x1d22 #define MT6359P_RG_LDO_VRFCK_HW0_OP_CFG_ADDR 0x1d28 #define MT6359P_RG_LDO_VRFCK_HW1_OP_CFG_ADDR 0x1d28 #define MT6359P_RG_LDO_VRFCK_HW2_OP_CFG_ADDR 0x1d28 #define MT6359P_RG_LDO_VRFCK_HW3_OP_CFG_ADDR 0x1d28 #define MT6359P_RG_LDO_VRFCK_HW4_OP_CFG_ADDR 0x1d28 #define MT6359P_RG_LDO_VRFCK_HW5_OP_CFG_ADDR 0x1d28 #define MT6359P_RG_LDO_VRFCK_HW6_OP_CFG_ADDR 0x1d28 #define MT6359P_RG_LDO_VRFCK_HW7_OP_CFG_ADDR 0x1d28 #define MT6359P_RG_LDO_VRFCK_HW8_OP_CFG_ADDR 0x1d28 #define MT6359P_RG_LDO_VRFCK_HW9_OP_CFG_ADDR 0x1d28 #define MT6359P_RG_LDO_VRFCK_HW10_OP_CFG_ADDR 0x1d28 #define MT6359P_RG_LDO_VRFCK_HW11_OP_CFG_ADDR 0x1d28 #define MT6359P_RG_LDO_VRFCK_HW12_OP_CFG_ADDR 0x1d28 #define MT6359P_RG_LDO_VRFCK_HW13_OP_CFG_ADDR 0x1d28 #define MT6359P_RG_LDO_VRFCK_HW14_OP_CFG_ADDR 0x1d28 #define MT6359P_RG_LDO_VRFCK_SW_OP_CFG_ADDR 0x1d28 #define MT6359P_RG_LDO_VBBCK_OP_MODE_ADDR 0x1d30 #define MT6359P_RG_LDO_VBBCK_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VBBCK_HW0_OP_EN_ADDR 0x1d34 #define MT6359P_RG_LDO_VBBCK_HW1_OP_EN_ADDR 0x1d34 #define MT6359P_RG_LDO_VBBCK_HW2_OP_EN_ADDR 0x1d34 #define MT6359P_RG_LDO_VBBCK_HW3_OP_EN_ADDR 0x1d34 #define MT6359P_RG_LDO_VBBCK_HW4_OP_EN_ADDR 0x1d34 #define MT6359P_RG_LDO_VBBCK_HW5_OP_EN_ADDR 0x1d34 #define MT6359P_RG_LDO_VBBCK_HW6_OP_EN_ADDR 0x1d34 #define MT6359P_RG_LDO_VBBCK_HW7_OP_EN_ADDR 0x1d34 #define MT6359P_RG_LDO_VBBCK_HW8_OP_EN_ADDR 0x1d34 #define MT6359P_RG_LDO_VBBCK_HW9_OP_EN_ADDR 0x1d34 #define MT6359P_RG_LDO_VBBCK_HW10_OP_EN_ADDR 0x1d34 #define MT6359P_RG_LDO_VBBCK_HW11_OP_EN_ADDR 0x1d34 #define MT6359P_RG_LDO_VBBCK_HW12_OP_EN_ADDR 0x1d34 #define MT6359P_RG_LDO_VBBCK_HW13_OP_EN_ADDR 0x1d34 #define MT6359P_RG_LDO_VBBCK_HW14_OP_EN_ADDR 0x1d34 #define MT6359P_RG_LDO_VBBCK_SW_OP_EN_ADDR 0x1d34 #define MT6359P_RG_LDO_VBBCK_HW0_OP_CFG_ADDR 0x1d3a #define MT6359P_RG_LDO_VBBCK_HW1_OP_CFG_ADDR 0x1d3a #define MT6359P_RG_LDO_VBBCK_HW2_OP_CFG_ADDR 0x1d3a #define MT6359P_RG_LDO_VBBCK_HW3_OP_CFG_ADDR 0x1d3a #define MT6359P_RG_LDO_VBBCK_HW4_OP_CFG_ADDR 0x1d3a #define MT6359P_RG_LDO_VBBCK_HW5_OP_CFG_ADDR 0x1d3a #define MT6359P_RG_LDO_VBBCK_HW6_OP_CFG_ADDR 0x1d3a #define MT6359P_RG_LDO_VBBCK_HW7_OP_CFG_ADDR 0x1d3a #define MT6359P_RG_LDO_VBBCK_HW8_OP_CFG_ADDR 0x1d3a #define MT6359P_RG_LDO_VBBCK_HW9_OP_CFG_ADDR 0x1d3a #define MT6359P_RG_LDO_VBBCK_HW10_OP_CFG_ADDR 0x1d3a #define MT6359P_RG_LDO_VBBCK_HW11_OP_CFG_ADDR 0x1d3a #define MT6359P_RG_LDO_VBBCK_HW12_OP_CFG_ADDR 0x1d3a #define MT6359P_RG_LDO_VBBCK_HW13_OP_CFG_ADDR 0x1d3a #define MT6359P_RG_LDO_VBBCK_HW14_OP_CFG_ADDR 0x1d3a #define MT6359P_RG_LDO_VBBCK_SW_OP_CFG_ADDR 0x1d3a #define MT6359P_RG_LDO_VBIF28_OP_MODE_ADDR 0x1d42 #define MT6359P_RG_LDO_VBIF28_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VBIF28_HW0_OP_EN_ADDR 0x1d46 #define MT6359P_RG_LDO_VBIF28_HW1_OP_EN_ADDR 0x1d46 #define MT6359P_RG_LDO_VBIF28_HW2_OP_EN_ADDR 0x1d46 #define MT6359P_RG_LDO_VBIF28_HW3_OP_EN_ADDR 0x1d46 #define MT6359P_RG_LDO_VBIF28_HW4_OP_EN_ADDR 0x1d46 #define MT6359P_RG_LDO_VBIF28_HW5_OP_EN_ADDR 0x1d46 #define MT6359P_RG_LDO_VBIF28_HW6_OP_EN_ADDR 0x1d46 #define MT6359P_RG_LDO_VBIF28_HW7_OP_EN_ADDR 0x1d46 #define MT6359P_RG_LDO_VBIF28_HW8_OP_EN_ADDR 0x1d46 #define MT6359P_RG_LDO_VBIF28_HW9_OP_EN_ADDR 0x1d46 #define MT6359P_RG_LDO_VBIF28_HW10_OP_EN_ADDR 0x1d46 #define MT6359P_RG_LDO_VBIF28_HW11_OP_EN_ADDR 0x1d46 #define MT6359P_RG_LDO_VBIF28_HW12_OP_EN_ADDR 0x1d46 #define MT6359P_RG_LDO_VBIF28_HW13_OP_EN_ADDR 0x1d46 #define MT6359P_RG_LDO_VBIF28_HW14_OP_EN_ADDR 0x1d46 #define MT6359P_RG_LDO_VBIF28_SW_OP_EN_ADDR 0x1d46 #define MT6359P_RG_LDO_VBIF28_HW0_OP_CFG_ADDR 0x1d4c #define MT6359P_RG_LDO_VBIF28_HW1_OP_CFG_ADDR 0x1d4c #define MT6359P_RG_LDO_VBIF28_HW2_OP_CFG_ADDR 0x1d4c #define MT6359P_RG_LDO_VBIF28_HW3_OP_CFG_ADDR 0x1d4c #define MT6359P_RG_LDO_VBIF28_HW4_OP_CFG_ADDR 0x1d4c #define MT6359P_RG_LDO_VBIF28_HW5_OP_CFG_ADDR 0x1d4c #define MT6359P_RG_LDO_VBIF28_HW6_OP_CFG_ADDR 0x1d4c #define MT6359P_RG_LDO_VBIF28_HW7_OP_CFG_ADDR 0x1d4c #define MT6359P_RG_LDO_VBIF28_HW8_OP_CFG_ADDR 0x1d4c #define MT6359P_RG_LDO_VBIF28_HW9_OP_CFG_ADDR 0x1d4c #define MT6359P_RG_LDO_VBIF28_HW10_OP_CFG_ADDR 0x1d4c #define MT6359P_RG_LDO_VBIF28_HW11_OP_CFG_ADDR 0x1d4c #define MT6359P_RG_LDO_VBIF28_HW12_OP_CFG_ADDR 0x1d4c #define MT6359P_RG_LDO_VBIF28_HW13_OP_CFG_ADDR 0x1d4c #define MT6359P_RG_LDO_VBIF28_HW14_OP_CFG_ADDR 0x1d4c #define MT6359P_RG_LDO_VBIF28_SW_OP_CFG_ADDR 0x1d4c #define MT6359P_RG_LDO_VIBR_OP_MODE_ADDR 0x1d54 #define MT6359P_RG_LDO_VIBR_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VIBR_HW0_OP_EN_ADDR 0x1d58 #define MT6359P_RG_LDO_VIBR_HW1_OP_EN_ADDR 0x1d58 #define MT6359P_RG_LDO_VIBR_HW2_OP_EN_ADDR 0x1d58 #define MT6359P_RG_LDO_VIBR_HW3_OP_EN_ADDR 0x1d58 #define MT6359P_RG_LDO_VIBR_HW4_OP_EN_ADDR 0x1d58 #define MT6359P_RG_LDO_VIBR_HW5_OP_EN_ADDR 0x1d58 #define MT6359P_RG_LDO_VIBR_HW6_OP_EN_ADDR 0x1d58 #define MT6359P_RG_LDO_VIBR_HW7_OP_EN_ADDR 0x1d58 #define MT6359P_RG_LDO_VIBR_HW8_OP_EN_ADDR 0x1d58 #define MT6359P_RG_LDO_VIBR_HW9_OP_EN_ADDR 0x1d58 #define MT6359P_RG_LDO_VIBR_HW10_OP_EN_ADDR 0x1d58 #define MT6359P_RG_LDO_VIBR_HW11_OP_EN_ADDR 0x1d58 #define MT6359P_RG_LDO_VIBR_HW12_OP_EN_ADDR 0x1d58 #define MT6359P_RG_LDO_VIBR_HW13_OP_EN_ADDR 0x1d58 #define MT6359P_RG_LDO_VIBR_HW14_OP_EN_ADDR 0x1d58 #define MT6359P_RG_LDO_VIBR_SW_OP_EN_ADDR 0x1d58 #define MT6359P_RG_LDO_VIBR_HW0_OP_CFG_ADDR 0x1d5e #define MT6359P_RG_LDO_VIBR_HW1_OP_CFG_ADDR 0x1d5e #define MT6359P_RG_LDO_VIBR_HW2_OP_CFG_ADDR 0x1d5e #define MT6359P_RG_LDO_VIBR_HW3_OP_CFG_ADDR 0x1d5e #define MT6359P_RG_LDO_VIBR_HW4_OP_CFG_ADDR 0x1d5e #define MT6359P_RG_LDO_VIBR_HW5_OP_CFG_ADDR 0x1d5e #define MT6359P_RG_LDO_VIBR_HW6_OP_CFG_ADDR 0x1d5e #define MT6359P_RG_LDO_VIBR_HW7_OP_CFG_ADDR 0x1d5e #define MT6359P_RG_LDO_VIBR_HW8_OP_CFG_ADDR 0x1d5e #define MT6359P_RG_LDO_VIBR_HW9_OP_CFG_ADDR 0x1d5e #define MT6359P_RG_LDO_VIBR_HW10_OP_CFG_ADDR 0x1d5e #define MT6359P_RG_LDO_VIBR_HW11_OP_CFG_ADDR 0x1d5e #define MT6359P_RG_LDO_VIBR_HW12_OP_CFG_ADDR 0x1d5e #define MT6359P_RG_LDO_VIBR_HW13_OP_CFG_ADDR 0x1d5e #define MT6359P_RG_LDO_VIBR_HW14_OP_CFG_ADDR 0x1d5e #define MT6359P_RG_LDO_VIBR_SW_OP_CFG_ADDR 0x1d5e #define MT6359P_RG_LDO_VIO28_OP_MODE_ADDR 0x1d66 #define MT6359P_RG_LDO_VIO28_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VIO28_HW0_OP_EN_ADDR 0x1d6a #define MT6359P_RG_LDO_VIO28_HW1_OP_EN_ADDR 0x1d6a #define MT6359P_RG_LDO_VIO28_HW2_OP_EN_ADDR 0x1d6a #define MT6359P_RG_LDO_VIO28_HW3_OP_EN_ADDR 0x1d6a #define MT6359P_RG_LDO_VIO28_HW4_OP_EN_ADDR 0x1d6a #define MT6359P_RG_LDO_VIO28_HW5_OP_EN_ADDR 0x1d6a #define MT6359P_RG_LDO_VIO28_HW6_OP_EN_ADDR 0x1d6a #define MT6359P_RG_LDO_VIO28_HW7_OP_EN_ADDR 0x1d6a #define MT6359P_RG_LDO_VIO28_HW8_OP_EN_ADDR 0x1d6a #define MT6359P_RG_LDO_VIO28_HW9_OP_EN_ADDR 0x1d6a #define MT6359P_RG_LDO_VIO28_HW10_OP_EN_ADDR 0x1d6a #define MT6359P_RG_LDO_VIO28_HW11_OP_EN_ADDR 0x1d6a #define MT6359P_RG_LDO_VIO28_HW12_OP_EN_ADDR 0x1d6a #define MT6359P_RG_LDO_VIO28_HW13_OP_EN_ADDR 0x1d6a #define MT6359P_RG_LDO_VIO28_HW14_OP_EN_ADDR 0x1d6a #define MT6359P_RG_LDO_VIO28_SW_OP_EN_ADDR 0x1d6a #define MT6359P_RG_LDO_VIO28_HW0_OP_CFG_ADDR 0x1d70 #define MT6359P_RG_LDO_VIO28_HW1_OP_CFG_ADDR 0x1d70 #define MT6359P_RG_LDO_VIO28_HW2_OP_CFG_ADDR 0x1d70 #define MT6359P_RG_LDO_VIO28_HW3_OP_CFG_ADDR 0x1d70 #define MT6359P_RG_LDO_VIO28_HW4_OP_CFG_ADDR 0x1d70 #define MT6359P_RG_LDO_VIO28_HW5_OP_CFG_ADDR 0x1d70 #define MT6359P_RG_LDO_VIO28_HW6_OP_CFG_ADDR 0x1d70 #define MT6359P_RG_LDO_VIO28_HW7_OP_CFG_ADDR 0x1d70 #define MT6359P_RG_LDO_VIO28_HW8_OP_CFG_ADDR 0x1d70 #define MT6359P_RG_LDO_VIO28_HW9_OP_CFG_ADDR 0x1d70 #define MT6359P_RG_LDO_VIO28_HW10_OP_CFG_ADDR 0x1d70 #define MT6359P_RG_LDO_VIO28_HW11_OP_CFG_ADDR 0x1d70 #define MT6359P_RG_LDO_VIO28_HW12_OP_CFG_ADDR 0x1d70 #define MT6359P_RG_LDO_VIO28_HW13_OP_CFG_ADDR 0x1d70 #define MT6359P_RG_LDO_VIO28_HW14_OP_CFG_ADDR 0x1d70 #define MT6359P_RG_LDO_VIO28_SW_OP_CFG_ADDR 0x1d70 #define MT6359P_RG_LDO_VM18_OP_MODE_ADDR 0x1d8a #define MT6359P_RG_LDO_VM18_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VM18_HW0_OP_EN_ADDR 0x1d8e #define MT6359P_RG_LDO_VM18_HW1_OP_EN_ADDR 0x1d8e #define MT6359P_RG_LDO_VM18_HW2_OP_EN_ADDR 0x1d8e #define MT6359P_RG_LDO_VM18_HW3_OP_EN_ADDR 0x1d8e #define MT6359P_RG_LDO_VM18_HW4_OP_EN_ADDR 0x1d8e #define MT6359P_RG_LDO_VM18_HW5_OP_EN_ADDR 0x1d8e #define MT6359P_RG_LDO_VM18_HW6_OP_EN_ADDR 0x1d8e #define MT6359P_RG_LDO_VM18_HW7_OP_EN_ADDR 0x1d8e #define MT6359P_RG_LDO_VM18_HW8_OP_EN_ADDR 0x1d8e #define MT6359P_RG_LDO_VM18_HW9_OP_EN_ADDR 0x1d8e #define MT6359P_RG_LDO_VM18_HW10_OP_EN_ADDR 0x1d8e #define MT6359P_RG_LDO_VM18_HW11_OP_EN_ADDR 0x1d8e #define MT6359P_RG_LDO_VM18_HW12_OP_EN_ADDR 0x1d8e #define MT6359P_RG_LDO_VM18_HW13_OP_EN_ADDR 0x1d8e #define MT6359P_RG_LDO_VM18_HW14_OP_EN_ADDR 0x1d8e #define MT6359P_RG_LDO_VM18_SW_OP_EN_ADDR 0x1d8e #define MT6359P_RG_LDO_VM18_HW0_OP_CFG_ADDR 0x1d94 #define MT6359P_RG_LDO_VM18_HW1_OP_CFG_ADDR 0x1d94 #define MT6359P_RG_LDO_VM18_HW2_OP_CFG_ADDR 0x1d94 #define MT6359P_RG_LDO_VM18_HW3_OP_CFG_ADDR 0x1d94 #define MT6359P_RG_LDO_VM18_HW4_OP_CFG_ADDR 0x1d94 #define MT6359P_RG_LDO_VM18_HW5_OP_CFG_ADDR 0x1d94 #define MT6359P_RG_LDO_VM18_HW6_OP_CFG_ADDR 0x1d94 #define MT6359P_RG_LDO_VM18_HW7_OP_CFG_ADDR 0x1d94 #define MT6359P_RG_LDO_VM18_HW8_OP_CFG_ADDR 0x1d94 #define MT6359P_RG_LDO_VM18_HW9_OP_CFG_ADDR 0x1d94 #define MT6359P_RG_LDO_VM18_HW10_OP_CFG_ADDR 0x1d94 #define MT6359P_RG_LDO_VM18_HW11_OP_CFG_ADDR 0x1d94 #define MT6359P_RG_LDO_VM18_HW12_OP_CFG_ADDR 0x1d94 #define MT6359P_RG_LDO_VM18_HW13_OP_CFG_ADDR 0x1d94 #define MT6359P_RG_LDO_VM18_HW14_OP_CFG_ADDR 0x1d94 #define MT6359P_RG_LDO_VM18_SW_OP_CFG_ADDR 0x1d94 #define MT6359P_RG_LDO_VUFS_OP_MODE_ADDR 0x1d9c #define MT6359P_RG_LDO_VUFS_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VUFS_HW0_OP_EN_ADDR 0x1da0 #define MT6359P_RG_LDO_VUFS_HW1_OP_EN_ADDR 0x1da0 #define MT6359P_RG_LDO_VUFS_HW2_OP_EN_ADDR 0x1da0 #define MT6359P_RG_LDO_VUFS_HW3_OP_EN_ADDR 0x1da0 #define MT6359P_RG_LDO_VUFS_HW4_OP_EN_ADDR 0x1da0 #define MT6359P_RG_LDO_VUFS_HW5_OP_EN_ADDR 0x1da0 #define MT6359P_RG_LDO_VUFS_HW6_OP_EN_ADDR 0x1da0 #define MT6359P_RG_LDO_VUFS_HW7_OP_EN_ADDR 0x1da0 #define MT6359P_RG_LDO_VUFS_HW8_OP_EN_ADDR 0x1da0 #define MT6359P_RG_LDO_VUFS_HW9_OP_EN_ADDR 0x1da0 #define MT6359P_RG_LDO_VUFS_HW10_OP_EN_ADDR 0x1da0 #define MT6359P_RG_LDO_VUFS_HW11_OP_EN_ADDR 0x1da0 #define MT6359P_RG_LDO_VUFS_HW12_OP_EN_ADDR 0x1da0 #define MT6359P_RG_LDO_VUFS_HW13_OP_EN_ADDR 0x1da0 #define MT6359P_RG_LDO_VUFS_HW14_OP_EN_ADDR 0x1da0 #define MT6359P_RG_LDO_VUFS_SW_OP_EN_ADDR 0x1da0 #define MT6359P_RG_LDO_VUFS_HW0_OP_CFG_ADDR 0x1da6 #define MT6359P_RG_LDO_VUFS_HW1_OP_CFG_ADDR 0x1da6 #define MT6359P_RG_LDO_VUFS_HW2_OP_CFG_ADDR 0x1da6 #define MT6359P_RG_LDO_VUFS_HW3_OP_CFG_ADDR 0x1da6 #define MT6359P_RG_LDO_VUFS_HW4_OP_CFG_ADDR 0x1da6 #define MT6359P_RG_LDO_VUFS_HW5_OP_CFG_ADDR 0x1da6 #define MT6359P_RG_LDO_VUFS_HW6_OP_CFG_ADDR 0x1da6 #define MT6359P_RG_LDO_VUFS_HW7_OP_CFG_ADDR 0x1da6 #define MT6359P_RG_LDO_VUFS_HW8_OP_CFG_ADDR 0x1da6 #define MT6359P_RG_LDO_VUFS_HW9_OP_CFG_ADDR 0x1da6 #define MT6359P_RG_LDO_VUFS_HW10_OP_CFG_ADDR 0x1da6 #define MT6359P_RG_LDO_VUFS_HW11_OP_CFG_ADDR 0x1da6 #define MT6359P_RG_LDO_VUFS_HW12_OP_CFG_ADDR 0x1da6 #define MT6359P_RG_LDO_VUFS_HW13_OP_CFG_ADDR 0x1da6 #define MT6359P_RG_LDO_VUFS_HW14_OP_CFG_ADDR 0x1da6 #define MT6359P_RG_LDO_VUFS_SW_OP_CFG_ADDR 0x1da6 #define MT6359P_RG_LDO_VSRAM_PROC1_OP_MODE_ADDR 0x1e8a #define MT6359P_RG_LDO_VSRAM_PROC1_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VSRAM_PROC1_VOSEL_SLEEP_ADDR 0x1e8e #define MT6359P_RG_LDO_VSRAM_PROC1_HW0_OP_EN_ADDR 0x1e96 #define MT6359P_RG_LDO_VSRAM_PROC1_HW1_OP_EN_ADDR 0x1e96 #define MT6359P_RG_LDO_VSRAM_PROC1_HW2_OP_EN_ADDR 0x1e96 #define MT6359P_RG_LDO_VSRAM_PROC1_HW3_OP_EN_ADDR 0x1e96 #define MT6359P_RG_LDO_VSRAM_PROC1_HW4_OP_EN_ADDR 0x1e96 #define MT6359P_RG_LDO_VSRAM_PROC1_HW5_OP_EN_ADDR 0x1e96 #define MT6359P_RG_LDO_VSRAM_PROC1_HW6_OP_EN_ADDR 0x1e96 #define MT6359P_RG_LDO_VSRAM_PROC1_HW7_OP_EN_ADDR 0x1e96 #define MT6359P_RG_LDO_VSRAM_PROC1_HW8_OP_EN_ADDR 0x1e96 #define MT6359P_RG_LDO_VSRAM_PROC1_HW9_OP_EN_ADDR 0x1e96 #define MT6359P_RG_LDO_VSRAM_PROC1_HW10_OP_EN_ADDR 0x1e96 #define MT6359P_RG_LDO_VSRAM_PROC1_HW11_OP_EN_ADDR 0x1e96 #define MT6359P_RG_LDO_VSRAM_PROC1_HW12_OP_EN_ADDR 0x1e96 #define MT6359P_RG_LDO_VSRAM_PROC1_HW13_OP_EN_ADDR 0x1e96 #define MT6359P_RG_LDO_VSRAM_PROC1_HW14_OP_EN_ADDR 0x1e96 #define MT6359P_RG_LDO_VSRAM_PROC1_SW_OP_EN_ADDR 0x1e96 #define MT6359P_RG_LDO_VSRAM_PROC1_HW0_OP_CFG_ADDR 0x1e9c #define MT6359P_RG_LDO_VSRAM_PROC1_HW1_OP_CFG_ADDR 0x1e9c #define MT6359P_RG_LDO_VSRAM_PROC1_HW2_OP_CFG_ADDR 0x1e9c #define MT6359P_RG_LDO_VSRAM_PROC1_HW3_OP_CFG_ADDR 0x1e9c #define MT6359P_RG_LDO_VSRAM_PROC1_HW4_OP_CFG_ADDR 0x1e9c #define MT6359P_RG_LDO_VSRAM_PROC1_HW5_OP_CFG_ADDR 0x1e9c #define MT6359P_RG_LDO_VSRAM_PROC1_HW6_OP_CFG_ADDR 0x1e9c #define MT6359P_RG_LDO_VSRAM_PROC1_HW7_OP_CFG_ADDR 0x1e9c #define MT6359P_RG_LDO_VSRAM_PROC1_HW8_OP_CFG_ADDR 0x1e9c #define MT6359P_RG_LDO_VSRAM_PROC1_HW9_OP_CFG_ADDR 0x1e9c #define MT6359P_RG_LDO_VSRAM_PROC1_HW10_OP_CFG_ADDR 0x1e9c #define MT6359P_RG_LDO_VSRAM_PROC1_HW11_OP_CFG_ADDR 0x1e9c #define MT6359P_RG_LDO_VSRAM_PROC1_HW12_OP_CFG_ADDR 0x1e9c #define MT6359P_RG_LDO_VSRAM_PROC1_HW13_OP_CFG_ADDR 0x1e9c #define MT6359P_RG_LDO_VSRAM_PROC1_HW14_OP_CFG_ADDR 0x1e9c #define MT6359P_RG_LDO_VSRAM_PROC1_SW_OP_CFG_ADDR 0x1e9c #define MT6359P_RG_LDO_VSRAM_PROC2_OP_MODE_ADDR 0x1eaa #define MT6359P_RG_LDO_VSRAM_PROC2_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VSRAM_PROC2_VOSEL_SLEEP_ADDR 0x1eae #define MT6359P_RG_LDO_VSRAM_PROC2_HW0_OP_EN_ADDR 0x1eb6 #define MT6359P_RG_LDO_VSRAM_PROC2_HW1_OP_EN_ADDR 0x1eb6 #define MT6359P_RG_LDO_VSRAM_PROC2_HW2_OP_EN_ADDR 0x1eb6 #define MT6359P_RG_LDO_VSRAM_PROC2_HW3_OP_EN_ADDR 0x1eb6 #define MT6359P_RG_LDO_VSRAM_PROC2_HW4_OP_EN_ADDR 0x1eb6 #define MT6359P_RG_LDO_VSRAM_PROC2_HW5_OP_EN_ADDR 0x1eb6 #define MT6359P_RG_LDO_VSRAM_PROC2_HW6_OP_EN_ADDR 0x1eb6 #define MT6359P_RG_LDO_VSRAM_PROC2_HW7_OP_EN_ADDR 0x1eb6 #define MT6359P_RG_LDO_VSRAM_PROC2_HW8_OP_EN_ADDR 0x1eb6 #define MT6359P_RG_LDO_VSRAM_PROC2_HW9_OP_EN_ADDR 0x1eb6 #define MT6359P_RG_LDO_VSRAM_PROC2_HW10_OP_EN_ADDR 0x1eb6 #define MT6359P_RG_LDO_VSRAM_PROC2_HW11_OP_EN_ADDR 0x1eb6 #define MT6359P_RG_LDO_VSRAM_PROC2_HW12_OP_EN_ADDR 0x1eb6 #define MT6359P_RG_LDO_VSRAM_PROC2_HW13_OP_EN_ADDR 0x1eb6 #define MT6359P_RG_LDO_VSRAM_PROC2_HW14_OP_EN_ADDR 0x1eb6 #define MT6359P_RG_LDO_VSRAM_PROC2_SW_OP_EN_ADDR 0x1eb6 #define MT6359P_RG_LDO_VSRAM_PROC2_HW0_OP_CFG_ADDR 0x1ebc #define MT6359P_RG_LDO_VSRAM_PROC2_HW1_OP_CFG_ADDR 0x1ebc #define MT6359P_RG_LDO_VSRAM_PROC2_HW2_OP_CFG_ADDR 0x1ebc #define MT6359P_RG_LDO_VSRAM_PROC2_HW3_OP_CFG_ADDR 0x1ebc #define MT6359P_RG_LDO_VSRAM_PROC2_HW4_OP_CFG_ADDR 0x1ebc #define MT6359P_RG_LDO_VSRAM_PROC2_HW5_OP_CFG_ADDR 0x1ebc #define MT6359P_RG_LDO_VSRAM_PROC2_HW6_OP_CFG_ADDR 0x1ebc #define MT6359P_RG_LDO_VSRAM_PROC2_HW7_OP_CFG_ADDR 0x1ebc #define MT6359P_RG_LDO_VSRAM_PROC2_HW8_OP_CFG_ADDR 0x1ebc #define MT6359P_RG_LDO_VSRAM_PROC2_HW9_OP_CFG_ADDR 0x1ebc #define MT6359P_RG_LDO_VSRAM_PROC2_HW10_OP_CFG_ADDR 0x1ebc #define MT6359P_RG_LDO_VSRAM_PROC2_HW11_OP_CFG_ADDR 0x1ebc #define MT6359P_RG_LDO_VSRAM_PROC2_HW12_OP_CFG_ADDR 0x1ebc #define MT6359P_RG_LDO_VSRAM_PROC2_HW13_OP_CFG_ADDR 0x1ebc #define MT6359P_RG_LDO_VSRAM_PROC2_HW14_OP_CFG_ADDR 0x1ebc #define MT6359P_RG_LDO_VSRAM_PROC2_SW_OP_CFG_ADDR 0x1ebc #define MT6359P_RG_LDO_VSRAM_OTHERS_OP_MODE_ADDR 0x1f0a #define MT6359P_RG_LDO_VSRAM_OTHERS_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VSRAM_OTHERS_VOSEL_SLEEP_ADDR 0x1f0e #define MT6359P_RG_LDO_VSRAM_OTHERS_HW0_OP_EN_ADDR 0x1f16 #define MT6359P_RG_LDO_VSRAM_OTHERS_HW1_OP_EN_ADDR 0x1f16 #define MT6359P_RG_LDO_VSRAM_OTHERS_HW2_OP_EN_ADDR 0x1f16 #define MT6359P_RG_LDO_VSRAM_OTHERS_HW3_OP_EN_ADDR 0x1f16 #define MT6359P_RG_LDO_VSRAM_OTHERS_HW4_OP_EN_ADDR 0x1f16 #define MT6359P_RG_LDO_VSRAM_OTHERS_HW5_OP_EN_ADDR 0x1f16 #define MT6359P_RG_LDO_VSRAM_OTHERS_HW6_OP_EN_ADDR 0x1f16 #define MT6359P_RG_LDO_VSRAM_OTHERS_HW7_OP_EN_ADDR 0x1f16 #define MT6359P_RG_LDO_VSRAM_OTHERS_HW8_OP_EN_ADDR 0x1f16 #define MT6359P_RG_LDO_VSRAM_OTHERS_HW9_OP_EN_ADDR 0x1f16 #define MT6359P_RG_LDO_VSRAM_OTHERS_HW10_OP_EN_ADDR 0x1f16 #define MT6359P_RG_LDO_VSRAM_OTHERS_HW11_OP_EN_ADDR 0x1f16 #define MT6359P_RG_LDO_VSRAM_OTHERS_HW12_OP_EN_ADDR 0x1f16 #define MT6359P_RG_LDO_VSRAM_OTHERS_HW13_OP_EN_ADDR 0x1f16 #define MT6359P_RG_LDO_VSRAM_OTHERS_HW14_OP_EN_ADDR 0x1f16 #define MT6359P_RG_LDO_VSRAM_OTHERS_SW_OP_EN_ADDR 0x1f16 #define MT6359P_RG_LDO_VSRAM_OTHERS_HW0_OP_CFG_ADDR 0x1f1c #define MT6359P_RG_LDO_VSRAM_OTHERS_HW1_OP_CFG_ADDR 0x1f1c #define MT6359P_RG_LDO_VSRAM_OTHERS_HW2_OP_CFG_ADDR 0x1f1c #define MT6359P_RG_LDO_VSRAM_OTHERS_HW3_OP_CFG_ADDR 0x1f1c #define MT6359P_RG_LDO_VSRAM_OTHERS_HW4_OP_CFG_ADDR 0x1f1c #define MT6359P_RG_LDO_VSRAM_OTHERS_HW5_OP_CFG_ADDR 0x1f1c #define MT6359P_RG_LDO_VSRAM_OTHERS_HW6_OP_CFG_ADDR 0x1f1c #define MT6359P_RG_LDO_VSRAM_OTHERS_HW7_OP_CFG_ADDR 0x1f1c #define MT6359P_RG_LDO_VSRAM_OTHERS_HW8_OP_CFG_ADDR 0x1f1c #define MT6359P_RG_LDO_VSRAM_OTHERS_HW9_OP_CFG_ADDR 0x1f1c #define MT6359P_RG_LDO_VSRAM_OTHERS_HW10_OP_CFG_ADDR 0x1f1c #define MT6359P_RG_LDO_VSRAM_OTHERS_HW11_OP_CFG_ADDR 0x1f1c #define MT6359P_RG_LDO_VSRAM_OTHERS_HW12_OP_CFG_ADDR 0x1f1c #define MT6359P_RG_LDO_VSRAM_OTHERS_HW13_OP_CFG_ADDR 0x1f1c #define MT6359P_RG_LDO_VSRAM_OTHERS_HW14_OP_CFG_ADDR 0x1f1c #define MT6359P_RG_LDO_VSRAM_OTHERS_SW_OP_CFG_ADDR 0x1f1c #define MT6359P_RG_LDO_VSRAM_OTHERS_SSHUB_VOSEL_SLEEP_ADDR 0x1f28 #define MT6359P_RG_LDO_VSRAM_MD_OP_MODE_ADDR 0x1f30 #define MT6359P_RG_LDO_VSRAM_MD_OP_MODE_SHIFT 10 #define MT6359P_RG_LDO_VSRAM_MD_VOSEL_SLEEP_ADDR 0x1f34 #define MT6359P_RG_LDO_VSRAM_MD_HW0_OP_EN_ADDR 0x1f3c #define MT6359P_RG_LDO_VSRAM_MD_HW1_OP_EN_ADDR 0x1f3c #define MT6359P_RG_LDO_VSRAM_MD_HW2_OP_EN_ADDR 0x1f3c #define MT6359P_RG_LDO_VSRAM_MD_HW3_OP_EN_ADDR 0x1f3c #define MT6359P_RG_LDO_VSRAM_MD_HW4_OP_EN_ADDR 0x1f3c #define MT6359P_RG_LDO_VSRAM_MD_HW5_OP_EN_ADDR 0x1f3c #define MT6359P_RG_LDO_VSRAM_MD_HW6_OP_EN_ADDR 0x1f3c #define MT6359P_RG_LDO_VSRAM_MD_HW7_OP_EN_ADDR 0x1f3c #define MT6359P_RG_LDO_VSRAM_MD_HW8_OP_EN_ADDR 0x1f3c #define MT6359P_RG_LDO_VSRAM_MD_HW9_OP_EN_ADDR 0x1f3c #define MT6359P_RG_LDO_VSRAM_MD_HW10_OP_EN_ADDR 0x1f3c #define MT6359P_RG_LDO_VSRAM_MD_HW11_OP_EN_ADDR 0x1f3c #define MT6359P_RG_LDO_VSRAM_MD_HW12_OP_EN_ADDR 0x1f3c #define MT6359P_RG_LDO_VSRAM_MD_HW13_OP_EN_ADDR 0x1f3c #define MT6359P_RG_LDO_VSRAM_MD_HW14_OP_EN_ADDR 0x1f3c #define MT6359P_RG_LDO_VSRAM_MD_SW_OP_EN_ADDR 0x1f3c #define MT6359P_RG_LDO_VSRAM_MD_HW0_OP_CFG_ADDR 0x1f42 #define MT6359P_RG_LDO_VSRAM_MD_HW1_OP_CFG_ADDR 0x1f42 #define MT6359P_RG_LDO_VSRAM_MD_HW2_OP_CFG_ADDR 0x1f42 #define MT6359P_RG_LDO_VSRAM_MD_HW3_OP_CFG_ADDR 0x1f42 #define MT6359P_RG_LDO_VSRAM_MD_HW4_OP_CFG_ADDR 0x1f42 #define MT6359P_RG_LDO_VSRAM_MD_HW5_OP_CFG_ADDR 0x1f42 #define MT6359P_RG_LDO_VSRAM_MD_HW6_OP_CFG_ADDR 0x1f42 #define MT6359P_RG_LDO_VSRAM_MD_HW7_OP_CFG_ADDR 0x1f42 #define MT6359P_RG_LDO_VSRAM_MD_HW8_OP_CFG_ADDR 0x1f42 #define MT6359P_RG_LDO_VSRAM_MD_HW9_OP_CFG_ADDR 0x1f42 #define MT6359P_RG_LDO_VSRAM_MD_HW10_OP_CFG_ADDR 0x1f42 #define MT6359P_RG_LDO_VSRAM_MD_HW11_OP_CFG_ADDR 0x1f42 #define MT6359P_RG_LDO_VSRAM_MD_HW12_OP_CFG_ADDR 0x1f42 #define MT6359P_RG_LDO_VSRAM_MD_HW13_OP_CFG_ADDR 0x1f42 #define MT6359P_RG_LDO_VSRAM_MD_HW14_OP_CFG_ADDR 0x1f42 #define MT6359P_RG_LDO_VSRAM_MD_SW_OP_CFG_ADDR 0x1f42 #endif /* MT6359P_LOWPOWER_REG_H */