// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) /* * Copyright (C) 2025, STMicroelectronics - All Rights Reserved * Author: Alexandre Torgue for STMicroelectronics. */ #include #include #include #include #include #include / { #address-cells = <2>; #size-cells = <2>; cpus { #address-cells = <1>; #size-cells = <0>; cpu0: cpu@0 { compatible = "arm,cortex-a35"; device_type = "cpu"; reg = <0>; enable-method = "psci"; }; }; psci { compatible = "arm,psci-1.0"; method = "smc"; }; intc: interrupt-controller@4ac00000 { compatible = "arm,cortex-a7-gic"; #interrupt-cells = <3>; interrupt-controller; reg = <0x0 0x4ac10000 0x0 0x1000>, <0x0 0x4ac20000 0x0 0x2000>, <0x0 0x4ac40000 0x0 0x2000>, <0x0 0x4ac60000 0x0 0x2000>; #address-cells = <1>; }; clocks { clk_hse: clk-hse { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <48000000>; }; clk_hsi: clk-hsi { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <64000000>; }; clk_lse: clk-lse { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32768>; }; clk_lsi: clk-lsi { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <32000>; }; clk_msi: clk-msi { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <16000000>; }; clk_i2sin: clk-i2sin { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <0>; }; clk_rcbsec: clk-rcbsec { #clock-cells = <0>; compatible = "fixed-clock"; clock-frequency = <64000000>; }; }; soc@0 { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <1>; interrupt-parent = <&intc>; ranges = <0x0 0x0 0x0 0x80000000>; rifsc: bus@42080000 { compatible = "st,stm32mp25-rifsc", "simple-bus"; reg = <0x42080000 0x1000>; #address-cells = <1>; #size-cells = <1>; #access-controller-cells = <1>; }; iac: iac@42090000 { compatible = "st,stm32mp25-iac"; reg = <0x42090000 0x400>; interrupts = ; }; syscfg: syscon@44230000 { reg = <0x44230000 0x10000>; status = "disabled"; }; }; };