Lines Matching refs:HAL_UpdateIrqTable
344 static void HAL_UpdateIrqTable(MS_U16 byHardwareIndex, MS_U16 bySoftwareIndex) in HAL_UpdateIrqTable() function
373 HAL_UpdateIrqTable(E_IRQ_00, E_INT_RESERVED); //RESERVED in HAL_InitIrqTable()
374 HAL_UpdateIrqTable(E_IRQ_01, E_INT_IRQ_PMSLEEP); //pm_sleep_int in HAL_InitIrqTable()
375 HAL_UpdateIrqTable(E_IRQ_02, E_INT_IRQ_AEON2HI); //aeon2hi in HAL_InitIrqTable()
376 HAL_UpdateIrqTable(E_IRQ_03, E_INT_IRQ_MVD); //mvd_int in HAL_InitIrqTable()
377 HAL_UpdateIrqTable(E_IRQ_04, E_INT_IRQ_PS); //ps_int in HAL_InitIrqTable()
378 HAL_UpdateIrqTable(E_IRQ_05, E_INT_IRQ_NFIE); //nfie_int in HAL_InitIrqTable()
379 HAL_UpdateIrqTable(E_IRQ_06, E_INT_IRQ_MIIC_INT5); //miic5_int in HAL_InitIrqTable()
380 HAL_UpdateIrqTable(E_IRQ_07, E_INT_IRQ_MIIC_INT4); //miic4_int in HAL_InitIrqTable()
381 HAL_UpdateIrqTable(E_IRQ_08, E_INT_IRQ_SMART); //smart_int in HAL_InitIrqTable()
382 HAL_UpdateIrqTable(E_IRQ_09, E_INT_IRQ_EMAC); //emac_int in HAL_InitIrqTable()
383 HAL_UpdateIrqTable(E_IRQ_10, E_INT_IRQ_DISP); //disp_int in HAL_InitIrqTable()
384 HAL_UpdateIrqTable(E_IRQ_11, E_INT_IRQ_MVD2MIPS); //mvd2mips_int in HAL_InitIrqTable()
385 HAL_UpdateIrqTable(E_IRQ_12, E_INT_IRQ_SVD_HVD); //hvd_int in HAL_InitIrqTable()
386 HAL_UpdateIrqTable(E_IRQ_13, E_INT_IRQ_EVD); //evd_int in HAL_InitIrqTable()
387 HAL_UpdateIrqTable(E_IRQ_14, E_INT_IRQ_COMB); //comb_int in HAL_InitIrqTable()
388 HAL_UpdateIrqTable(E_IRQ_15, E_INT_IRQ_ADCDVI2RIU); //adcdvi2riu_int in HAL_InitIrqTable()
390 HAL_UpdateIrqTable(E_IRQ_16, E_INT_IRQ_TSP2HK); //tsp2hk_int in HAL_InitIrqTable()
391 HAL_UpdateIrqTable(E_IRQ_17, E_INT_IRQ_VE); //ve_int in HAL_InitIrqTable()
392 HAL_UpdateIrqTable(E_IRQ_18, E_INT_IRQ_G3D2MCU); //g3d2mcu_int in HAL_InitIrqTable()
393 HAL_UpdateIrqTable(E_IRQ_19, E_INT_IRQ_DC); //dc_int in HAL_InitIrqTable()
394 HAL_UpdateIrqTable(E_IRQ_20, E_INT_IRQ_GOP); //gop_int in HAL_InitIrqTable()
395 HAL_UpdateIrqTable(E_IRQ_21, E_INT_IRQ_PCM); //pcm2mcu_int in HAL_InitIrqTable()
396 HAL_UpdateIrqTable(E_IRQ_22, E_INT_IRQ_AU_DMA); //miic0_int in HAL_InitIrqTable()
397 HAL_UpdateIrqTable(E_IRQ_23, E_INT_IRQ_MFE); //mfe_int in HAL_InitIrqTable()
398 HAL_UpdateIrqTable(E_IRQ_24, E_INT_IRQ_ERROR_RESP); //error_resp_int in HAL_InitIrqTable()
399 HAL_UpdateIrqTable(E_IRQ_25, E_INT_IRQEXPL_TSO); //tso_int in HAL_InitIrqTable()
400 HAL_UpdateIrqTable(E_IRQ_26, E_INT_IRQ_DDC2BI); //d2b_int in HAL_InitIrqTable()
401 HAL_UpdateIrqTable(E_IRQ_27, E_INT_IRQ_SCM); //scm_int in HAL_InitIrqTable()
402 HAL_UpdateIrqTable(E_IRQ_28, E_INT_IRQ_VBI); //vbi_int in HAL_InitIrqTable()
403 HAL_UpdateIrqTable(E_IRQ_29, E_INT_IRQ_USB); //usb_int in HAL_InitIrqTable()
404 HAL_UpdateIrqTable(E_IRQ_30, E_INT_IRQ_UHC); //uhc_int in HAL_InitIrqTable()
405 HAL_UpdateIrqTable(E_IRQ_31, E_INT_IRQ_USB1); //usb_int1 in HAL_InitIrqTable()
407 HAL_UpdateIrqTable(E_IRQ_32, E_INT_IRQ_UHC1); //uhc_int1 in HAL_InitIrqTable()
408 HAL_UpdateIrqTable(E_IRQ_33, E_INT_IRQ_USB2); //usb_int2 in HAL_InitIrqTable()
409 HAL_UpdateIrqTable(E_IRQ_34, E_INT_IRQ_UHC2); //uhc_int2 in HAL_InitIrqTable()
410 HAL_UpdateIrqTable(E_IRQ_35, E_INT_IRQ_USB3); //usb_int3 in HAL_InitIrqTable()
411 HAL_UpdateIrqTable(E_IRQ_36, E_INT_IRQ_UHC3); //uhc_int3 in HAL_InitIrqTable()
412 HAL_UpdateIrqTable(E_IRQ_37, E_INT_IRQ_MIU); //miu_int in HAL_InitIrqTable()
413 HAL_UpdateIrqTable(E_IRQ_38, E_INT_IRQ_UART0); //int_uart0 in HAL_InitIrqTable()
414 HAL_UpdateIrqTable(E_IRQ_39, E_INT_IRQ_UART1); //int_uart1 in HAL_InitIrqTable()
415 HAL_UpdateIrqTable(E_IRQ_40, E_INT_IRQ_UART2); //int_uart2 in HAL_InitIrqTable()
416 HAL_UpdateIrqTable(E_IRQ_41, E_INT_IRQ_UART3); //int_uart3 in HAL_InitIrqTable()
417 HAL_UpdateIrqTable(E_IRQ_42, E_INT_IRQ_UART4); //int_uart4 in HAL_InitIrqTable()
418 HAL_UpdateIrqTable(E_IRQ_43, E_INT_IRQ_UART5); //int_uart5 in HAL_InitIrqTable()
419 HAL_UpdateIrqTable(E_IRQ_44, E_INT_IRQ_GE); //int_ge in HAL_InitIrqTable()
420 HAL_UpdateIrqTable(E_IRQ_45, E_INT_IRQ_MIU_SECURITY); //security_int in HAL_InitIrqTable()
421 HAL_UpdateIrqTable(E_IRQ_46, E_INT_IRQ_MSPI1); //mspi1_int in HAL_InitIrqTable()
422 HAL_UpdateIrqTable(E_IRQ_47, E_INT_IRQ_MSPI0); //mspi0_int in HAL_InitIrqTable()
424 HAL_UpdateIrqTable(E_IRQ_48, E_INT_IRQ_BDMA0); //int_bdma[0] in HAL_InitIrqTable()
425 HAL_UpdateIrqTable(E_IRQ_49, E_INT_IRQ_BDMA1); //int_bdma[1] in HAL_InitIrqTable()
426 HAL_UpdateIrqTable(E_IRQ_50, E_INT_IRQ_UART2MCU); //uart2mcu_intr in HAL_InitIrqTable()
427 HAL_UpdateIrqTable(E_IRQ_51, E_INT_IRQ_URDMA2MCU); //urdma2mcu_intr in HAL_InitIrqTable()
428 HAL_UpdateIrqTable(E_IRQ_52, E_INT_IRQ_DVI_HDMI_HDCP); //dvi_hdmi_hdcp_int in HAL_InitIrqTable()
429 HAL_UpdateIrqTable(E_IRQ_53, E_INT_IRQ_MHL_CBUS_PM); //mhl_cbus_pm_int in HAL_InitIrqTable()
430 HAL_UpdateIrqTable(E_IRQ_54, E_INT_IRQ_CEC); //cec_int_pm in HAL_InitIrqTable()
431 HAL_UpdateIrqTable(E_IRQ_55, E_INT_IRQ_HDCP_IIC); //hdcp_iic_int in HAL_InitIrqTable()
432 HAL_UpdateIrqTable(E_IRQ_56, E_INT_IRQ_HDCP_X74); //hdcp_x74_int in HAL_InitIrqTable()
433 HAL_UpdateIrqTable(E_IRQ_57, E_INT_IRQ_WADR_ERR); //wadr_err_int in HAL_InitIrqTable()
434 HAL_UpdateIrqTable(E_IRQ_58, E_INT_IRQ_MIIC_DMA_INT0); //miic_dma_int0 in HAL_InitIrqTable()
435 HAL_UpdateIrqTable(E_IRQ_59, E_INT_IRQ_MIIC_DMA_INT1); //miic_dma_int1 in HAL_InitIrqTable()
436 HAL_UpdateIrqTable(E_IRQ_60, E_INT_IRQ_MIIC_DMA_INT2); //miic_dma_int2 in HAL_InitIrqTable()
437 HAL_UpdateIrqTable(E_IRQ_61, E_INT_IRQ_MIIC_DMA_INT3); //miic_dma_int3 in HAL_InitIrqTable()
438 HAL_UpdateIrqTable(E_IRQ_62, E_INT_IRQ_JPD); //jpd_int in HAL_InitIrqTable()
439 HAL_UpdateIrqTable(E_IRQ_63, E_INT_IRQ_EXT_GPIO_MERGE); //ext_gpio_int[7] in HAL_InitIrqTable()
441 HAL_UpdateIrqTable(E_IRQ_64, E_INT_IRQ_DIMOND_L3_BRIDGE_INT); //miic_dma_int3 in HAL_InitIrqTable()
442 HAL_UpdateIrqTable(E_IRQ_65,E_INT_IRQ_PAS_PTS_INTRL_COMBINE); //jpd_int in HAL_InitIrqTable()
443 HAL_UpdateIrqTable(E_IRQ_90, E_INT_IRQ_AESDMA_S_INT); //ext_gpio_int[7] in HAL_InitIrqTable()
445 HAL_UpdateIrqTable(E_FIQ_00, E_INT_FIQ_EXTIMER0); //int_timer0 in HAL_InitIrqTable()
446 HAL_UpdateIrqTable(E_FIQ_01, E_INT_FIQ_EXTIMER1); //int_timer1 in HAL_InitIrqTable()
447 HAL_UpdateIrqTable(E_FIQ_02, E_INT_FIQ_WDT); //int_wdt in HAL_InitIrqTable()
448 HAL_UpdateIrqTable(E_FIQ_03, E_INT_RESERVED); //Reserved in HAL_InitIrqTable()
449 HAL_UpdateIrqTable(E_FIQ_04, E_INT_FIQ_R2TOMCU_INT0); //MB_auR2toMCU_INT[0] in HAL_InitIrqTable()
450 HAL_UpdateIrqTable(E_FIQ_05, E_INT_FIQ_R2TOMCU_INT1); //MB_auR2toMCU_INT[1] in HAL_InitIrqTable()
451 HAL_UpdateIrqTable(E_FIQ_06, E_INT_FIQ_DSPTOMCU_INT0); //MB_DSP2toMCU_INT[0] in HAL_InitIrqTable()
452 HAL_UpdateIrqTable(E_FIQ_07, E_INT_FIQ_DSPTOMCU_INT1); //MB_DSP2toMCU_INT[1] in HAL_InitIrqTable()
453 HAL_UpdateIrqTable(E_FIQ_08, E_INT_FIQ_USB); //usb_int in HAL_InitIrqTable()
454 HAL_UpdateIrqTable(E_FIQ_09, E_INT_FIQ_UHC); //uhc_int in HAL_InitIrqTable()
455 HAL_UpdateIrqTable(E_FIQ_10, E_INT_RESERVED); //gpio_pm_[7] in HAL_InitIrqTable()
456 HAL_UpdateIrqTable(E_FIQ_11, E_INT_FIQ_HDMI_NON_PCM); //HDMI_NON_PCM_MODE_INT_OUT in HAL_InitIrqTable()
457 HAL_UpdateIrqTable(E_FIQ_12, E_INT_FIQ_SPDIF_IN_NON_PCM);//SPDIF_IN_NON_PCM_INT_OUT in HAL_InitIrqTable()
458 HAL_UpdateIrqTable(E_FIQ_13, E_INT_FIQ_EMAC); //emac_int in HAL_InitIrqTable()
459 HAL_UpdateIrqTable(E_FIQ_14, E_INT_FIQ_SE_DSP2UP); //SE_DSP2UP_intr in HAL_InitIrqTable()
460 HAL_UpdateIrqTable(E_FIQ_15, E_INT_FIQ_TSP2AEON); //tsp2aeon_int in HAL_InitIrqTable()
462 HAL_UpdateIrqTable(E_FIQ_16, E_INT_FIQ_VIVALDI_STR); //vivaldi_str_intr in HAL_InitIrqTable()
463 HAL_UpdateIrqTable(E_FIQ_17, E_INT_FIQ_VIVALDI_PTS); //vivaldi_pts_intr in HAL_InitIrqTable()
464 HAL_UpdateIrqTable(E_FIQ_18, E_INT_FIQ_DSP_MIU_PROT); //DSP_MIU_PROT_intr in HAL_InitIrqTable()
465 HAL_UpdateIrqTable(E_FIQ_19, E_INT_FIQ_XIU_TIMEOUT); //xiu_timeout_int in HAL_InitIrqTable()
466 HAL_UpdateIrqTable(E_FIQ_20, E_INT_FIQ_DMDMCU2HK); //dmdmcu2hk_int in HAL_InitIrqTable()
467 HAL_UpdateIrqTable(E_FIQ_21, E_INT_FIQ_VSYNC_VE4VBI); //ve_vbi_f0_int in HAL_InitIrqTable()
468 HAL_UpdateIrqTable(E_FIQ_22, E_INT_FIQ_FIELD_VE4VBI); //ve_vbi_f1_int in HAL_InitIrqTable()
469 HAL_UpdateIrqTable(E_FIQ_23, E_INT_FIQ_VDMCU2HK); //vdmcu2hk_int in HAL_InitIrqTable()
470 HAL_UpdateIrqTable(E_FIQ_24, E_INT_FIQ_VE_DONE_TT); //ve_done_TT_irq in HAL_InitIrqTable()
471 HAL_UpdateIrqTable(E_FIQ_25, E_INT_RESERVED); //Reserved in HAL_InitIrqTable()
472 HAL_UpdateIrqTable(E_FIQ_26, E_INT_RESERVED); //Reserved in HAL_InitIrqTable()
473 HAL_UpdateIrqTable(E_FIQ_27, E_INT_FIQ_IR); //ir_int in HAL_InitIrqTable()
474 HAL_UpdateIrqTable(E_FIQ_28, E_INT_FIQ_AFEC_VSYNC); //AFEC_VSYNC in HAL_InitIrqTable()
475 HAL_UpdateIrqTable(E_FIQ_29, E_INT_FIQ_USB2); //usb_int2 in HAL_InitIrqTable()
476 HAL_UpdateIrqTable(E_FIQ_30, E_INT_FIQ_UHC2); //uhc_int2 in HAL_InitIrqTable()
477 HAL_UpdateIrqTable(E_FIQ_31, E_INT_FIQ_DEC_DSP2MIPS); //DSP2MIPS_INT in HAL_InitIrqTable()
479 HAL_UpdateIrqTable(E_FIQ_32, E_INT_FIQ_IR_INT_RC); //ir_int_rc in HAL_InitIrqTable()
480 HAL_UpdateIrqTable(E_FIQ_33, E_INT_FIQ_AU_DMA_BUF_INT); //AU_DMA_BUFFER_INT_EDGE in HAL_InitIrqTable()
481 HAL_UpdateIrqTable(E_FIQ_34, E_INT_FIQ_IR_IN); //ir_in in HAL_InitIrqTable()
482 HAL_UpdateIrqTable(E_FIQ_35, E_INT_FIQ_EXTIMER2); //gpio_pm_[11] in HAL_InitIrqTable()
483 HAL_UpdateIrqTable(E_FIQ_36, E_INT_FIQ_8051_TO_MIPS_VPE1); //reg_hst0to3_int in HAL_InitIrqTable()
484 HAL_UpdateIrqTable(E_FIQ_37, E_INT_FIQ_8051_TO_MIPS_VPE0 ); //reg_hst0to2_int in HAL_InitIrqTable()
485 HAL_UpdateIrqTable(E_FIQ_38, E_INT_FIQ_8051_TO_AEON); //reg_hst0to1_int in HAL_InitIrqTable()
486 HAL_UpdateIrqTable(E_FIQ_39, E_INT_RESERVED); //Reserved in HAL_InitIrqTable()
487 HAL_UpdateIrqTable(E_FIQ_40, E_INT_FIQ_AEON_TO_MIPS_VPE1 ); //reg_hst1to3_int in HAL_InitIrqTable()
488 HAL_UpdateIrqTable(E_FIQ_41, E_INT_FIQ_AEON_TO_BEON ); //reg_hst1to2_int in HAL_InitIrqTable()
489 HAL_UpdateIrqTable(E_FIQ_42, E_INT_FIQ_AEON_TO_8051 ); //reg_hst1to0_int in HAL_InitIrqTable()
490 HAL_UpdateIrqTable(E_FIQ_43, E_INT_RESERVED); //Reserved in HAL_InitIrqTable()
491 HAL_UpdateIrqTable(E_FIQ_44, E_INT_FIQ_MIPS_VPE0_TO_MIPS_VPE1); //reg_hst2to3_int in HAL_InitIrqTable()
492 HAL_UpdateIrqTable(E_FIQ_45, E_INT_FIQ_BEON_TO_AEON); //reg_hst2to1_int in HAL_InitIrqTable()
493 HAL_UpdateIrqTable(E_FIQ_46, E_INT_FIQ_MIPS_VPE0_TO_8051); //reg_hst2to0_int in HAL_InitIrqTable()
494 HAL_UpdateIrqTable(E_FIQ_47, E_INT_RESERVED); //Reserved in HAL_InitIrqTable()
496 HAL_UpdateIrqTable(E_FIQ_48, E_INT_FIQ_MIPS_VPE1_TO_MIPS_VPE0 ); //reg_hst3to2_int in HAL_InitIrqTable()
497 HAL_UpdateIrqTable(E_FIQ_49, E_INT_FIQ_MIPS_VPE1_TO_AEON); //reg_hst3to1_int in HAL_InitIrqTable()
498 HAL_UpdateIrqTable(E_FIQ_50, E_INT_FIQ_MIPS_VPE1_TO_8051); //reg_hst3to0_int in HAL_InitIrqTable()
499 HAL_UpdateIrqTable(E_FIQ_51, E_INT_FIQ_USB1); //usb_int1 in HAL_InitIrqTable()
500 HAL_UpdateIrqTable(E_FIQ_52, E_INT_FIQ_UHC1); //uhc_int1 in HAL_InitIrqTable()
501 HAL_UpdateIrqTable(E_FIQ_53, E_INT_FIQ_LDM_DMA1); //ldm_dma_done_int1 in HAL_InitIrqTable()
502 HAL_UpdateIrqTable(E_FIQ_54, E_INT_FIQ_LDM_DMA0); //ldm_dma_done_int0 in HAL_InitIrqTable()
503 HAL_UpdateIrqTable(E_FIQ_55, E_INT_FIQ_AU_SPDIF_TX_CS0);//AU_SPDIF_TX_CS_INT[0] in HAL_InitIrqTable()
504 HAL_UpdateIrqTable(E_FIQ_56, E_INT_FIQ_AU_SPDIF_TX_CS1);//AU_SPDIF_TX_CS_INT[1] in HAL_InitIrqTable()
505 HAL_UpdateIrqTable(E_FIQ_57, E_INT_FIQ_USB3); //usb_int3 in HAL_InitIrqTable()
506 HAL_UpdateIrqTable(E_FIQ_58, E_INT_FIQ_UHC3); //uhc_int3 in HAL_InitIrqTable()
507 HAL_UpdateIrqTable(E_FIQ_59, E_INT_IRQ_PWM_RP_L); //pwm_rp_l_int in HAL_InitIrqTable()
508 HAL_UpdateIrqTable(E_FIQ_60, E_INT_IRQ_PWM_FP_L); //pwm_fp_l_int in HAL_InitIrqTable()
509 HAL_UpdateIrqTable(E_FIQ_61, E_INT_IRQ_PWM_RP_R); //pwm_rp_r_int in HAL_InitIrqTable()
510 HAL_UpdateIrqTable(E_FIQ_62, E_INT_IRQ_PWM_FP_R); //pwm_fp_r_int in HAL_InitIrqTable()
511 HAL_UpdateIrqTable(E_FIQ_63, E_INT_FIQ_SPI2FCIE); //spi2fcie_int in HAL_InitIrqTable()