166     u32Reg = IRQ_REG(REG_IRQ_PENDING_H);  in _CHIP_LISR0()
168     u32Reg |= IRQ_REG(REG_IRQ_PENDING_L);  in _CHIP_LISR0()
191     u32Reg = IRQ_REG(REG_IRQEXP_PENDING_H);  in _CHIP_LISR0()
193     u32Reg |= IRQ_REG(REG_IRQEXP_PENDING_L);  in _CHIP_LISR0()
245     u32Reg = IRQ_REG(REG_FIQ_PENDING_H);  in _CHIP_LISR1()
247     u32Reg |= IRQ_REG(REG_FIQ_PENDING_L);  in _CHIP_LISR1()
269     u32Reg = IRQ_REG(REG_FIQEXP_PENDING_H);  in _CHIP_LISR1()
271     u32Reg |= IRQ_REG(REG_FIQEXP_PENDING_L);  in _CHIP_LISR1()
422             IRQ_REG(REG_IRQ_MASK_L) &= ~0xFFFF;  in CHIP_EnableIRQ()
423             IRQ_REG(REG_IRQ_MASK_H) &= ~0xFFFF;  in CHIP_EnableIRQ()
424             IRQ_REG(REG_IRQEXP_MASK_L) &= ~0xFFFF;  in CHIP_EnableIRQ()
425             IRQ_REG(REG_IRQEXP_MASK_H) &= ~0xFFFF;  in CHIP_EnableIRQ()
426             IRQ_REG(REG_FIQ_MASK_L) &= ~0xFFFF;  in CHIP_EnableIRQ()
427             IRQ_REG(REG_FIQ_MASK_H) &= ~0xFFFF;  in CHIP_EnableIRQ()
428             IRQ_REG(REG_FIQEXP_MASK_L) &= ~0xFFFF;  in CHIP_EnableIRQ()
429             IRQ_REG(REG_FIQEXP_MASK_H) &= ~0xFFFF;  in CHIP_EnableIRQ()
433             IRQ_REG(REG_IRQ_MASK_L) &= ~(0x01 << (u8VectorIndex - E_IRQL_START));  in CHIP_EnableIRQ()
437             IRQ_REG(REG_IRQ_MASK_H) &= ~(0x01 << (u8VectorIndex - E_IRQH_START));  in CHIP_EnableIRQ()
441             IRQ_REG(REG_IRQEXP_MASK_L) &= ~(0x01 << (u8VectorIndex - E_IRQEXPL_START));  in CHIP_EnableIRQ()
445             IRQ_REG(REG_IRQEXP_MASK_H) &= ~(0x01 << (u8VectorIndex - E_IRQEXPH_START));  in CHIP_EnableIRQ()
449             IRQ_REG(REG_FIQ_MASK_L) &= ~(0x01 << (u8VectorIndex - E_FIQL_START));  in CHIP_EnableIRQ()
453             IRQ_REG(REG_FIQ_MASK_H) &= ~(0x01 << (u8VectorIndex - E_FIQH_START));  in CHIP_EnableIRQ()
457             IRQ_REG(REG_FIQEXP_MASK_L) &= ~(0x01 << (u8VectorIndex - E_FIQEXPL_START));  in CHIP_EnableIRQ()
461             IRQ_REG(REG_FIQEXP_MASK_H) &= ~(0x01 << (u8VectorIndex - E_FIQEXPH_START));  in CHIP_EnableIRQ()
480         IRQ_REG(REG_IRQ_MASK_L) |= 0xFFFF;  in CHIP_DisableIRQ()
481         IRQ_REG(REG_IRQ_MASK_H) |= 0xFFFF;  in CHIP_DisableIRQ()
482         IRQ_REG(REG_IRQEXP_MASK_L) |= 0xFFFF;  in CHIP_DisableIRQ()
483         IRQ_REG(REG_IRQEXP_MASK_H) |= 0xFFFF;  in CHIP_DisableIRQ()
484         IRQ_REG(REG_FIQ_MASK_L) |= 0xFFFF;  in CHIP_DisableIRQ()
485         IRQ_REG(REG_FIQ_MASK_H) |= 0xFFFF;  in CHIP_DisableIRQ()
486         IRQ_REG(REG_FIQEXP_MASK_L) |= 0xFFFF;  in CHIP_DisableIRQ()
487         IRQ_REG(REG_FIQEXP_MASK_H) |= 0xFFFF;  in CHIP_DisableIRQ()
491         IRQ_REG(REG_IRQ_MASK_L) |= (0x01 << (u8VectorIndex - E_IRQL_START));  in CHIP_DisableIRQ()
495         IRQ_REG(REG_IRQ_MASK_H) |= (0x01 << (u8VectorIndex - E_IRQH_START));  in CHIP_DisableIRQ()
499         IRQ_REG(REG_IRQEXP_MASK_L) |= (0x01 << (u8VectorIndex - E_IRQEXPL_START));  in CHIP_DisableIRQ()
503         IRQ_REG(REG_IRQEXP_MASK_H) |= (0x01 << (u8VectorIndex - E_IRQEXPH_START));  in CHIP_DisableIRQ()
507         IRQ_REG(REG_FIQ_MASK_L) |= (0x01 << (u8VectorIndex - E_FIQL_START));  in CHIP_DisableIRQ()
508         IRQ_REG(REG_FIQ_CLEAR_L) = (0x01 << (u8VectorIndex - E_FIQL_START));  in CHIP_DisableIRQ()
512         IRQ_REG(REG_FIQ_MASK_H) |= (0x01 << (u8VectorIndex - E_FIQH_START));  in CHIP_DisableIRQ()
513         IRQ_REG(REG_FIQ_CLEAR_H) = (0x01 << (u8VectorIndex - E_FIQH_START));  in CHIP_DisableIRQ()
517         IRQ_REG(REG_FIQEXP_MASK_L) |= (0x01 << (u8VectorIndex - E_FIQEXPL_START));  in CHIP_DisableIRQ()
518         IRQ_REG(REG_FIQEXP_CLEAR_L) = (0x01 << (u8VectorIndex - E_FIQEXPL_START));  in CHIP_DisableIRQ()
522         IRQ_REG(REG_FIQEXP_MASK_H) |= (0x01 << (u8VectorIndex - E_FIQEXPH_START));  in CHIP_DisableIRQ()
523         IRQ_REG(REG_FIQEXP_CLEAR_H) = (0x01 << (u8VectorIndex - E_FIQEXPH_START));  in CHIP_DisableIRQ()