197     u32Reg = IRQ_REG(REG_IRQ_PENDING_H);  in _CHIP_LISR0()
199     u32Reg |= IRQ_REG(REG_IRQ_PENDING_L);  in _CHIP_LISR0()
217     u32Reg = IRQ_REG(REG_IRQEXP_PENDING_H);  in _CHIP_LISR0()
219     u32Reg |= IRQ_REG(REG_IRQEXP_PENDING_L);  in _CHIP_LISR0()
267     u32Reg = IRQ_REG(REG_FIQ_PENDING_H);  in _CHIP_LISR1()
269     u32Reg |= IRQ_REG(REG_FIQ_PENDING_L);  in _CHIP_LISR1()
287     u32Reg = IRQ_REG(REG_FIQEXP_PENDING_H);  in _CHIP_LISR1()
289     u32Reg |= IRQ_REG(REG_FIQEXP_PENDING_L);  in _CHIP_LISR1()
439             IRQ_REG(REG_IRQ_MASK_L) &= ~0xFFFF;  in CHIP_EnableIRQ()
440             IRQ_REG(REG_IRQ_MASK_H) &= ~0xFFFF;  in CHIP_EnableIRQ()
441             IRQ_REG(REG_IRQEXP_MASK_L) &= ~0xFFFF;  in CHIP_EnableIRQ()
442             IRQ_REG(REG_IRQEXP_MASK_H) &= ~0xFFFF;  in CHIP_EnableIRQ()
443             IRQ_REG(REG_FIQ_MASK_L) &= ~0xFFFF;  in CHIP_EnableIRQ()
444             IRQ_REG(REG_FIQ_MASK_H) &= ~0xFFFF;  in CHIP_EnableIRQ()
445             IRQ_REG(REG_FIQEXP_MASK_L) &= ~0xFFFF;  in CHIP_EnableIRQ()
446             IRQ_REG(REG_FIQEXP_MASK_H) &= ~0xFFFF;  in CHIP_EnableIRQ()
450             IRQ_REG(REG_IRQ_MASK_L) &= ~(0x1 << (u8VectorIndex-E_IRQL_START) );  in CHIP_EnableIRQ()
454             IRQ_REG(REG_IRQ_MASK_H) &= ~(0x1 << (u8VectorIndex-E_IRQH_START) );  in CHIP_EnableIRQ()
458             IRQ_REG(REG_IRQEXP_MASK_L) &= ~(0x1 << (u8VectorIndex-E_IRQEXPL_START) );  in CHIP_EnableIRQ()
462             IRQ_REG(REG_IRQEXP_MASK_H) &= ~(0x1 << (u8VectorIndex-E_IRQEXPH_START) );  in CHIP_EnableIRQ()
466             IRQ_REG(REG_FIQ_MASK_L) &= ~(0x1 << (u8VectorIndex-E_FIQL_START) );  in CHIP_EnableIRQ()
470             IRQ_REG(REG_FIQ_MASK_H) &= ~(0x1 << (u8VectorIndex-E_FIQH_START) );  in CHIP_EnableIRQ()
474             IRQ_REG(REG_FIQEXP_MASK_L) &= ~(0x1 << (u8VectorIndex-E_FIQEXPL_START) );  in CHIP_EnableIRQ()
478             IRQ_REG(REG_FIQEXP_MASK_H) &= ~(0x1 << (u8VectorIndex-E_FIQEXPH_START) );  in CHIP_EnableIRQ()
498         IRQ_REG(REG_IRQ_MASK_L) |= 0xFFFF;  in CHIP_DisableIRQ()
499         IRQ_REG(REG_IRQ_MASK_H) |= 0xFFFF;  in CHIP_DisableIRQ()
500         IRQ_REG(REG_IRQEXP_MASK_L) |= 0xFFFF;  in CHIP_DisableIRQ()
501         IRQ_REG(REG_IRQEXP_MASK_H) |= 0xFFFF;  in CHIP_DisableIRQ()
502         IRQ_REG(REG_FIQ_MASK_L) |= 0xFFFF;  in CHIP_DisableIRQ()
503         IRQ_REG(REG_FIQ_MASK_H) |= 0xFFFF;  in CHIP_DisableIRQ()
504         IRQ_REG(REG_FIQEXP_MASK_L) |= 0xFFFF;  in CHIP_DisableIRQ()
505         IRQ_REG(REG_FIQEXP_MASK_H) |= 0xFFFF;  in CHIP_DisableIRQ()
509         IRQ_REG(REG_IRQ_MASK_L) |= (0x1 << (u8VectorIndex-E_IRQL_START) );  in CHIP_DisableIRQ()
513         IRQ_REG(REG_IRQ_MASK_H) |= (0x1 << (u8VectorIndex-E_IRQH_START) );  in CHIP_DisableIRQ()
517         IRQ_REG(REG_IRQEXP_MASK_L) |= (0x1 << (u8VectorIndex-E_IRQEXPL_START) );  in CHIP_DisableIRQ()
521         IRQ_REG(REG_IRQEXP_MASK_H) |= (0x1 << (u8VectorIndex-E_IRQEXPH_START) );  in CHIP_DisableIRQ()
525         IRQ_REG(REG_FIQ_MASK_L) |= (0x1 << (u8VectorIndex-E_FIQL_START) );  in CHIP_DisableIRQ()
526         IRQ_REG(REG_FIQ_CLEAR_L) = (0x1 << (u8VectorIndex-E_FIQL_START) );  in CHIP_DisableIRQ()
530         IRQ_REG(REG_FIQ_MASK_H) |= (0x1 << (u8VectorIndex-E_FIQH_START) );  in CHIP_DisableIRQ()
531         IRQ_REG(REG_FIQ_CLEAR_H) = (0x1 << (u8VectorIndex-E_FIQH_START) );  in CHIP_DisableIRQ()
535         IRQ_REG(REG_FIQEXP_MASK_L) |= (0x1 << (u8VectorIndex-E_FIQEXPL_START) );  in CHIP_DisableIRQ()
536         IRQ_REG(REG_FIQEXP_CLEAR_L) = (0x1 << (u8VectorIndex-E_FIQEXPL_START) );  in CHIP_DisableIRQ()
540         IRQ_REG(REG_FIQEXP_MASK_H) |= (0x1 << (u8VectorIndex-E_FIQEXPH_START) );  in CHIP_DisableIRQ()
541         IRQ_REG(REG_FIQEXP_CLEAR_H) = (0x1 << (u8VectorIndex-E_FIQEXPH_START) );  in CHIP_DisableIRQ()