Lines Matching refs:IRQ_REG
166 u32Reg = IRQ_REG(REG_IRQ_PENDING_H); in _CHIP_LISR0()
168 u32Reg |= IRQ_REG(REG_IRQ_PENDING_L); in _CHIP_LISR0()
191 u32Reg = IRQ_REG(REG_IRQEXP_PENDING_H); in _CHIP_LISR0()
193 u32Reg |= IRQ_REG(REG_IRQEXP_PENDING_L); in _CHIP_LISR0()
270 u32Reg = IRQ_REG(REG_FIQ_PENDING_H); in _CHIP_LISR1()
272 u32Reg |= IRQ_REG(REG_FIQ_PENDING_L); in _CHIP_LISR1()
294 u32Reg = IRQ_REG(REG_FIQEXP_PENDING_H); in _CHIP_LISR1()
296 u32Reg |= IRQ_REG(REG_FIQEXP_PENDING_L); in _CHIP_LISR1()
507 IRQ_REG(REG_IRQ_MASK_L) &= ~0xFFFF; in CHIP_EnableIRQ()
508 IRQ_REG(REG_IRQ_MASK_H) &= ~0xFFFF; in CHIP_EnableIRQ()
509 IRQ_REG(REG_IRQEXP_MASK_L) &= ~0xFFFF; in CHIP_EnableIRQ()
510 IRQ_REG(REG_IRQEXP_MASK_H) &= ~0xFFFF; in CHIP_EnableIRQ()
511 IRQ_REG(REG_FIQ_MASK_L) &= ~0xFFFF; in CHIP_EnableIRQ()
512 IRQ_REG(REG_FIQ_MASK_H) &= ~0xFFFF; in CHIP_EnableIRQ()
513 IRQ_REG(REG_FIQEXP_MASK_L) &= ~0xFFFF; in CHIP_EnableIRQ()
514 IRQ_REG(REG_FIQEXP_MASK_H) &= ~0xFFFF; in CHIP_EnableIRQ()
523 IRQ_REG(REG_IRQ_MASK_L) &= ~(0x01 << (u8VectorIndex - E_IRQL_START)); in CHIP_EnableIRQ()
527 IRQ_REG(REG_IRQ_MASK_H) &= ~(0x01 << (u8VectorIndex - E_IRQH_START)); in CHIP_EnableIRQ()
531 IRQ_REG(REG_IRQEXP_MASK_L) &= ~(0x01 << (u8VectorIndex - E_IRQEXPL_START)); in CHIP_EnableIRQ()
535 IRQ_REG(REG_IRQEXP_MASK_H) &= ~(0x01 << (u8VectorIndex - E_IRQEXPH_START)); in CHIP_EnableIRQ()
547 IRQ_REG(REG_FIQ_MASK_L) &= ~(0x01 << (u8VectorIndex - E_FIQL_START)); in CHIP_EnableIRQ()
551 IRQ_REG(REG_FIQ_MASK_H) &= ~(0x01 << (u8VectorIndex - E_FIQH_START)); in CHIP_EnableIRQ()
555 IRQ_REG(REG_FIQEXP_MASK_L) &= ~(0x01 << (u8VectorIndex - E_FIQEXPL_START)); in CHIP_EnableIRQ()
559 IRQ_REG(REG_FIQEXP_MASK_H) &= ~(0x01 << (u8VectorIndex - E_FIQEXPH_START)); in CHIP_EnableIRQ()
586 IRQ_REG(REG_IRQ_MASK_L) |= 0xFFFF; in CHIP_DisableIRQ()
587 IRQ_REG(REG_IRQ_MASK_H) |= 0xFFFF; in CHIP_DisableIRQ()
588 IRQ_REG(REG_IRQEXP_MASK_L) |= 0xFFFF; in CHIP_DisableIRQ()
589 IRQ_REG(REG_IRQEXP_MASK_H) |= 0xFFFF; in CHIP_DisableIRQ()
590 IRQ_REG(REG_FIQ_MASK_L) |= 0xFFFF; in CHIP_DisableIRQ()
591 IRQ_REG(REG_FIQ_MASK_H) |= 0xFFFF; in CHIP_DisableIRQ()
592 IRQ_REG(REG_FIQEXP_MASK_L) |= 0xFFFF; in CHIP_DisableIRQ()
593 IRQ_REG(REG_FIQEXP_MASK_H) |= 0xFFFF; in CHIP_DisableIRQ()
602 IRQ_REG(REG_IRQ_MASK_L) |= (0x01 << (u8VectorIndex - E_IRQL_START)); in CHIP_DisableIRQ()
606 IRQ_REG(REG_IRQ_MASK_H) |= (0x01 << (u8VectorIndex - E_IRQH_START)); in CHIP_DisableIRQ()
610 IRQ_REG(REG_IRQEXP_MASK_L) |= (0x01 << (u8VectorIndex - E_IRQEXPL_START)); in CHIP_DisableIRQ()
614 IRQ_REG(REG_IRQEXP_MASK_H) |= (0x01 << (u8VectorIndex - E_IRQEXPH_START)); in CHIP_DisableIRQ()
626 IRQ_REG(REG_FIQ_MASK_L) |= (0x01 << (u8VectorIndex - E_FIQL_START)); in CHIP_DisableIRQ()
627 IRQ_REG(REG_FIQ_CLEAR_L) = (0x01 << (u8VectorIndex - E_FIQL_START)); in CHIP_DisableIRQ()
631 IRQ_REG(REG_FIQ_MASK_H) |= (0x01 << (u8VectorIndex - E_FIQH_START)); in CHIP_DisableIRQ()
632 IRQ_REG(REG_FIQ_CLEAR_H) = (0x01 << (u8VectorIndex - E_FIQH_START)); in CHIP_DisableIRQ()
636 IRQ_REG(REG_FIQEXP_MASK_L) |= (0x01 << (u8VectorIndex - E_FIQEXPL_START)); in CHIP_DisableIRQ()
637 IRQ_REG(REG_FIQEXP_CLEAR_L) = (0x01 << (u8VectorIndex - E_FIQEXPL_START)); in CHIP_DisableIRQ()
641 IRQ_REG(REG_FIQEXP_MASK_H) |= (0x01 << (u8VectorIndex - E_FIQEXPH_START)); in CHIP_DisableIRQ()
642 IRQ_REG(REG_FIQEXP_CLEAR_H) = (0x01 << (u8VectorIndex - E_FIQEXPH_START)); in CHIP_DisableIRQ()
728 u32Reg = IRQ_REG(REG_FIQ_PENDING_H); in CHIP_DetectIRQSource()
730 u32Reg |= IRQ_REG(REG_FIQ_PENDING_L); in CHIP_DetectIRQSource()
740 u32Reg = IRQ_REG(REG_FIQEXP_PENDING_H); in CHIP_DetectIRQSource()
742 u32Reg |= IRQ_REG(REG_FIQEXP_PENDING_L); in CHIP_DetectIRQSource()
767 u32Reg = IRQ_REG(REG_IRQ_PENDING_H); in CHIP_DetectIRQSource()
769 u32Reg |= IRQ_REG(REG_IRQ_PENDING_L); in CHIP_DetectIRQSource()
778 u32Reg = IRQ_REG(REG_IRQEXP_PENDING_H); in CHIP_DetectIRQSource()
780 u32Reg |= IRQ_REG(REG_IRQEXP_PENDING_L); in CHIP_DetectIRQSource()
1338 u32Reg = IRQ_REG(REG_FIQ_PENDING_H); in _CHIP_DetectIRQSource()
1340 u32Reg |= IRQ_REG(REG_FIQ_PENDING_L); in _CHIP_DetectIRQSource()
1350 u32Reg = IRQ_REG(REG_FIQEXP_PENDING_H); in _CHIP_DetectIRQSource()
1352 u32Reg |= IRQ_REG(REG_FIQEXP_PENDING_L); in _CHIP_DetectIRQSource()
1377 u32Reg = IRQ_REG(REG_IRQ_PENDING_H); in _CHIP_DetectIRQSource()
1379 u32Reg |= IRQ_REG(REG_IRQ_PENDING_L); in _CHIP_DetectIRQSource()
1388 u32Reg = IRQ_REG(REG_IRQEXP_PENDING_H); in _CHIP_DetectIRQSource()
1390 u32Reg |= IRQ_REG(REG_IRQEXP_PENDING_L); in _CHIP_DetectIRQSource()
1426 u32Reg = IRQ_REG(REG_FIQ_PENDING_H); in __CHIP_HISR1()
1428 u32Reg |= IRQ_REG(REG_FIQ_PENDING_L); in __CHIP_HISR1()
1451 u32Reg = IRQ_REG(REG_FIQEXP_PENDING_H); in __CHIP_HISR1()
1453 u32Reg |= IRQ_REG(REG_FIQEXP_PENDING_L); in __CHIP_HISR1()
1530 u32Reg = IRQ_REG(REG_IRQ_PENDING_H); in _CHIP_HISR0()
1532 u32Reg |= IRQ_REG(REG_IRQ_PENDING_L); in _CHIP_HISR0()
1556 u32Reg = IRQ_REG(REG_IRQEXP_PENDING_H); in _CHIP_HISR0()
1558 u32Reg |= IRQ_REG(REG_IRQEXP_PENDING_L); in _CHIP_HISR0()
1643 IRQ_REG(REG_IRQ_MASK_L) &= ~0xFFFF; in CHIP_EnableIRQ()
1644 IRQ_REG(REG_IRQ_MASK_H) &= ~0xFFFF; in CHIP_EnableIRQ()
1645 IRQ_REG(REG_IRQEXP_MASK_L) &= ~0xFFFF; in CHIP_EnableIRQ()
1646 IRQ_REG(REG_IRQEXP_MASK_H) &= ~0xFFFF; in CHIP_EnableIRQ()
1647 IRQ_REG(REG_FIQ_MASK_L) &= ~0xFFFF; in CHIP_EnableIRQ()
1648 IRQ_REG(REG_FIQ_MASK_H) &= ~0xFFFF; in CHIP_EnableIRQ()
1649 IRQ_REG(REG_FIQEXP_MASK_L) &= ~0xFFFF; in CHIP_EnableIRQ()
1650 IRQ_REG(REG_FIQEXP_MASK_H) &= ~0xFFFF; in CHIP_EnableIRQ()
1659 IRQ_REG(REG_IRQ_MASK_L) &= ~(0x01 << (u8VectorIndex - E_IRQL_START)); in CHIP_EnableIRQ()
1663 IRQ_REG(REG_IRQ_MASK_H) &= ~(0x01 << (u8VectorIndex - E_IRQH_START)); in CHIP_EnableIRQ()
1667 IRQ_REG(REG_IRQEXP_MASK_L) &= ~(0x01 << (u8VectorIndex - E_IRQEXPL_START)); in CHIP_EnableIRQ()
1671 IRQ_REG(REG_IRQEXP_MASK_H) &= ~(0x01 << (u8VectorIndex - E_IRQEXPH_START)); in CHIP_EnableIRQ()
1683 IRQ_REG(REG_FIQ_MASK_L) &= ~(0x01 << (u8VectorIndex - E_FIQL_START)); in CHIP_EnableIRQ()
1687 IRQ_REG(REG_FIQ_MASK_H) &= ~(0x01 << (u8VectorIndex - E_FIQH_START)); in CHIP_EnableIRQ()
1691 IRQ_REG(REG_FIQEXP_MASK_L) &= ~(0x01 << (u8VectorIndex - E_FIQEXPL_START)); in CHIP_EnableIRQ()
1695 IRQ_REG(REG_FIQEXP_MASK_H) &= ~(0x01 << (u8VectorIndex - E_FIQEXPH_START)); in CHIP_EnableIRQ()
1722 IRQ_REG(REG_IRQ_MASK_L) |= 0xFFFF; in CHIP_DisableIRQ()
1723 IRQ_REG(REG_IRQ_MASK_H) |= 0xFFFF; in CHIP_DisableIRQ()
1724 IRQ_REG(REG_IRQEXP_MASK_L) |= 0xFFFF; in CHIP_DisableIRQ()
1725 IRQ_REG(REG_IRQEXP_MASK_H) |= 0xFFFF; in CHIP_DisableIRQ()
1726 IRQ_REG(REG_FIQ_MASK_L) |= 0xFFFF; in CHIP_DisableIRQ()
1727 IRQ_REG(REG_FIQ_MASK_H) |= 0xFFFF; in CHIP_DisableIRQ()
1728 IRQ_REG(REG_FIQEXP_MASK_L) |= 0xFFFF; in CHIP_DisableIRQ()
1729 IRQ_REG(REG_FIQEXP_MASK_H) |= 0xFFFF; in CHIP_DisableIRQ()
1738 IRQ_REG(REG_IRQ_MASK_L) |= (0x01 << (u8VectorIndex - E_IRQL_START)); in CHIP_DisableIRQ()
1742 IRQ_REG(REG_IRQ_MASK_H) |= (0x01 << (u8VectorIndex - E_IRQH_START)); in CHIP_DisableIRQ()
1746 IRQ_REG(REG_IRQEXP_MASK_L) |= (0x01 << (u8VectorIndex - E_IRQEXPL_START)); in CHIP_DisableIRQ()
1750 IRQ_REG(REG_IRQEXP_MASK_H) |= (0x01 << (u8VectorIndex - E_IRQEXPH_START)); in CHIP_DisableIRQ()
1762 IRQ_REG(REG_FIQ_MASK_L) |= (0x01 << (u8VectorIndex - E_FIQL_START)); in CHIP_DisableIRQ()
1763 IRQ_REG(REG_FIQ_CLEAR_L) = (0x01 << (u8VectorIndex - E_FIQL_START)); in CHIP_DisableIRQ()
1767 IRQ_REG(REG_FIQ_MASK_H) |= (0x01 << (u8VectorIndex - E_FIQH_START)); in CHIP_DisableIRQ()
1768 IRQ_REG(REG_FIQ_CLEAR_H) = (0x01 << (u8VectorIndex - E_FIQH_START)); in CHIP_DisableIRQ()
1772 IRQ_REG(REG_FIQEXP_MASK_L) |= (0x01 << (u8VectorIndex - E_FIQEXPL_START)); in CHIP_DisableIRQ()
1773 IRQ_REG(REG_FIQEXP_CLEAR_L) = (0x01 << (u8VectorIndex - E_FIQEXPL_START)); in CHIP_DisableIRQ()
1777 IRQ_REG(REG_FIQEXP_MASK_H) |= (0x01 << (u8VectorIndex - E_FIQEXPH_START)); in CHIP_DisableIRQ()
1778 IRQ_REG(REG_FIQEXP_CLEAR_H) = (0x01 << (u8VectorIndex - E_FIQEXPH_START)); in CHIP_DisableIRQ()