Lines Matching refs:REG_INT_BASE_ADDR
139 #define REG_INT_BASE_ADDR 0x0040 macro
142 #define REG_FIQ_MASK_L (REG_INT_BASE_ADDR + 0x0004)
143 #define REG_FIQ_MASK_H (REG_INT_BASE_ADDR + 0x0005)
144 #define REG_FIQEXP_MASK_L (REG_INT_BASE_ADDR + 0x0006)
145 #define REG_FIQEXP_MASK_H (REG_INT_BASE_ADDR + 0x0007)
147 #define REG_FIQHYP_MASK_L (REG_INT_BASE_ADDR + 0x0004)
148 #define REG_FIQHYP_MASK_H (REG_INT_BASE_ADDR + 0x0005)
149 #define REG_FIQSUP_MASK_L (REG_INT_BASE_ADDR + 0x0006)
150 #define REG_FIQSUP_MASK_H (REG_INT_BASE_ADDR + 0x0007)
152 #define REG_FIQ_CLEAR_L (REG_INT_BASE_ADDR + 0x000c)
153 #define REG_FIQ_CLEAR_H (REG_INT_BASE_ADDR + 0x000d)
154 #define REG_FIQEXP_CLEAR_L (REG_INT_BASE_ADDR + 0x000e)
155 #define REG_FIQEXP_CLEAR_H (REG_INT_BASE_ADDR + 0x000f)
157 #define REG_FIQHYP_CLEAR_L (REG_INT_BASE_ADDR + 0x000c)
158 #define REG_FIQHYP_CLEAR_H (REG_INT_BASE_ADDR + 0x000d)
159 #define REG_FIQSUP_CLEAR_L (REG_INT_BASE_ADDR + 0x000e)
160 #define REG_FIQSUP_CLEAR_H (REG_INT_BASE_ADDR + 0x000f)
162 #define REG_FIQ_PENDING_L (REG_INT_BASE_ADDR + 0x000c)
163 #define REG_FIQ_PENDING_H (REG_INT_BASE_ADDR + 0x000d)
164 #define REG_FIQEXP_PENDING_L (REG_INT_BASE_ADDR + 0x000e)
165 #define REG_FIQEXP_PENDING_H (REG_INT_BASE_ADDR + 0x000f)
167 #define REG_FIQHYP_PENDING_L (REG_INT_BASE_ADDR + 0x000c)
168 #define REG_FIQHYP_PENDING_H (REG_INT_BASE_ADDR + 0x000d)
169 #define REG_FIQSUP_PENDING_L (REG_INT_BASE_ADDR + 0x000e)
170 #define REG_FIQSUP_PENDING_H (REG_INT_BASE_ADDR + 0x000f)
172 #define REG_IRQ_MASK_L (REG_INT_BASE_ADDR + 0x0014)
173 #define REG_IRQ_MASK_H (REG_INT_BASE_ADDR + 0x0015)
174 #define REG_IRQEXP_MASK_L (REG_INT_BASE_ADDR + 0x0016)
175 #define REG_IRQEXP_MASK_H (REG_INT_BASE_ADDR + 0x0017)
177 #define REG_IRQHYP_MASK_L (REG_INT_BASE_ADDR + 0x0014)
178 #define REG_IRQHYP_MASK_H (REG_INT_BASE_ADDR + 0x0015)
179 #define REG_IRQSUP_MASK_L (REG_INT_BASE_ADDR + 0x0016)
180 #define REG_IRQSUP_MASK_H (REG_INT_BASE_ADDR + 0x0017)
182 #define REG_IRQ_PENDING_L (REG_INT_BASE_ADDR + 0x001c)
183 #define REG_IRQ_PENDING_H (REG_INT_BASE_ADDR + 0x001d)
184 #define REG_IRQEXP_PENDING_L (REG_INT_BASE_ADDR + 0x001e)
185 #define REG_IRQEXP_PENDING_H (REG_INT_BASE_ADDR + 0x001f)
187 #define REG_IRQHYP_PENDING_L (REG_INT_BASE_ADDR + 0x001c)
188 #define REG_IRQHYP_PENDING_H (REG_INT_BASE_ADDR + 0x001d)
189 #define REG_IRQSUP_PENDING_L (REG_INT_BASE_ADDR + 0x001e)
190 #define REG_IRQSUP_PENDING_H (REG_INT_BASE_ADDR + 0x001f)