Lines Matching refs:MOD_W2BYTEMSK
163 MOD_W2BYTEMSK(REG_MOD_BK00_37_L, 0x00, BIT(8)); in MHal_MOD_PowerOn()
170 MOD_W2BYTEMSK(REG_MOD_BK00_78_L, 0x00 , BIT(0) | BIT(7) ); in MHal_MOD_PowerOn()
173 MOD_W2BYTEMSK(REG_MOD_BK00_77_L, (BIT(1) | BIT(0)), (BIT(1) | BIT(0))); in MHal_MOD_PowerOn()
191 MOD_W2BYTEMSK(REG_MOD_BK00_37_L, BIT(8), BIT(8)); in MHal_MOD_PowerOn()
194 …MOD_W2BYTEMSK(REG_MOD_BK00_78_L, 0x00, BIT(0)); //analog MOD power do… in MHal_MOD_PowerOn()
197 …MOD_W2BYTEMSK(REG_MOD_BK00_77_L, 0, (BIT(1) | BIT(0) )); //enable ib, en… in MHal_MOD_PowerOn()
211 MOD_W2BYTEMSK(REG_MOD_BK00_37_L, ((bIs2p5)? BIT(6):0), BIT(6)); //MOD PVDD=1: 2.5,PVDD=0: 3.3 in MHal_MOD_PVDD_Power_Setting()
222 …MOD_W2BYTEMSK(REG_MOD_BK00_42_L, (BIT(7) | BIT(6)), (BIT(7) | BIT(6))); // shift_lvds_pair, set LV… in MHal_Shift_LVDS_Pair()
224 MOD_W2BYTEMSK(REG_MOD_BK00_42_L, 0x0000, (BIT(7) | BIT(6))); in MHal_Shift_LVDS_Pair()
231 MOD_W2BYTEMSK(REG_MOD_BK00_78_L, BIT(1) , BIT(1) ); in MHal_Output_LVDS_Pair_Setting()
236 MOD_W2BYTEMSK(REG_MOD_BK00_34_L, 0x1000, 0xFF00); in MHal_Output_LVDS_Pair_Setting()
243 MOD_W2BYTEMSK(REG_MOD_BK00_6D_L, 0x0000, 0xF000); in MHal_Output_LVDS_Pair_Setting()
245 MOD_W2BYTEMSK(REG_MOD_BK00_6F_L, 0x0005, 0x000F); in MHal_Output_LVDS_Pair_Setting()
249 MOD_W2BYTEMSK(REG_MOD_BK00_6D_L, 0x5000, 0xF000); in MHal_Output_LVDS_Pair_Setting()
251 MOD_W2BYTEMSK(REG_MOD_BK00_6F_L, 0x0000, 0x000F); in MHal_Output_LVDS_Pair_Setting()
257 MOD_W2BYTEMSK(REG_MOD_BK00_6F_L, u16OutputCFG16_21, 0x000F); in MHal_Output_LVDS_Pair_Setting()
269 MOD_W2BYTEMSK(REG_MOD_BK00_78_L, 0x00 , BIT(1) ); in MHal_Output_LVDS_Pair_Setting()
948 MOD_W2BYTEMSK(REG_MOD_BK00_5A_L, BIT(15), BIT(15)); in MHal_PNL_HWLVDSReservedtoLRFlag()
952 MOD_W2BYTEMSK(REG_MOD_BK00_5A_L, BIT(14), BIT(14)); in MHal_PNL_HWLVDSReservedtoLRFlag()
959 MOD_W2BYTEMSK(REG_MOD_BK00_5A_L, BIT(13), BIT(13)); in MHal_PNL_HWLVDSReservedtoLRFlag()
963 MOD_W2BYTEMSK(REG_MOD_BK00_5A_L, BIT(12), BIT(12)); in MHal_PNL_HWLVDSReservedtoLRFlag()
969 MOD_W2BYTEMSK(REG_MOD_BK00_5A_L, 0x0000, (BIT(15) | BIT(14) | BIT(13) | BIT(12))); in MHal_PNL_HWLVDSReservedtoLRFlag()
1154 MOD_W2BYTEMSK(REG_MOD_BK00_29_L, in MHal_PNL_MOD_Control_Out_Swing()
1194 MOD_W2BYTEMSK(REG_MOD_BK00_23_L, in MHal_PNL_MOD_Control_Out_PE_Current()
1198 MOD_W2BYTEMSK(REG_MOD_BK00_24_L, in MHal_PNL_MOD_Control_Out_PE_Current()
1202 MOD_W2BYTEMSK(REG_MOD_BK00_25_L, in MHal_PNL_MOD_Control_Out_PE_Current()
1206 MOD_W2BYTEMSK(REG_MOD_BK00_26_L, in MHal_PNL_MOD_Control_Out_PE_Current()
1210 MOD_W2BYTEMSK(REG_MOD_BK00_29_L, u16ValidCurrent ,0x0007); in MHal_PNL_MOD_Control_Out_PE_Current()
1228 MOD_W2BYTEMSK(REG_MOD_BK00_36_L, 0xFFFF, 0xFFFF); //Enable TTL low-power mode in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1229 MOD_W2BYTEMSK(REG_MOD_BK00_37_L, 0x001E, 0x001E); in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1231 MOD_W2BYTEMSK(REG_MOD_BK00_75_L, 0xFFFF, 0xFFFF); //GCR_EN_RINT (internal termination open) in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1232 MOD_W2BYTEMSK(REG_MOD_BK00_76_L, 0x003F, 0x003F); in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1234 MOD_W2BYTEMSK(REG_MOD_BK00_79_L, 0xFFFF, 0xFFFF); //Disable DRIVER BIAS OP in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1235 MOD_W2BYTEMSK(REG_MOD_BK00_7A_L, 0x003F, 0x003F); in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1239 MOD_W2BYTEMSK(REG_MOD_BK00_36_L, 0x0000, 0xFFFF); //Disable TTL low-power mode in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1240 MOD_W2BYTEMSK(REG_MOD_BK00_37_L, 0x0000, 0x001E); in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1242 MOD_W2BYTEMSK(REG_MOD_BK00_75_L, 0x0000, 0xFFFF); //GCR_EN_RINT (internal termination close) in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1243 MOD_W2BYTEMSK(REG_MOD_BK00_76_L, 0x0000, 0x003F); in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1245 MOD_W2BYTEMSK(REG_MOD_BK00_79_L, 0x0000, 0xFFFF); //Enable DRIVER BIAS OP in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1246 MOD_W2BYTEMSK(REG_MOD_BK00_7A_L, 0x0000, 0x003F); in MHal_PNL_MOD_Control_Out_TTL_Resistor_OP()
1278 MOD_W2BYTEMSK(REG_MOD_BK00_6F_L, 0x0000, 0xEFFF);//0x6F in MHal_PNL_SetOutputType()
1280 MOD_W2BYTEMSK(REG_MOD_BK00_42_L, 0x0000, (BIT(7) | BIT(6))); // shift_lvds_pair in MHal_PNL_SetOutputType()
1287 MOD_W2BYTEMSK(REG_MOD_BK00_7E_L, 0x0000, 0xE000); in MHal_PNL_SetOutputType()
1289 MOD_W2BYTEMSK(REG_MOD_BK00_44_L, 0x3FF, 0x3FF); // TTL skew in MHal_PNL_SetOutputType()
1292 MOD_W2BYTEMSK(REG_MOD_BK00_4A_L, BIT(8), BIT(8)); // GPO gating in MHal_PNL_SetOutputType()
1303 MOD_W2BYTEMSK(REG_MOD_BK00_6F_L, 0x0000, 0x000F); in MHal_PNL_SetOutputType()
1314 MOD_W2BYTEMSK(REG_MOD_BK00_46_L, 0x0FFF, 0x0FFF); in MHal_PNL_SetOutputType()
1316 MOD_W2BYTEMSK(REG_MOD_BK00_4D_L, 0x0FFF, 0x0FFF); in MHal_PNL_SetOutputType()
1318 MOD_W2BYTEMSK(REG_MOD_BK00_4F_L, 0x0000, 0x0FFF); in MHal_PNL_SetOutputType()
1320 MOD_W2BYTEMSK(REG_MOD_BK00_51_L, 0x0000, 0x0FFF); in MHal_PNL_SetOutputType()
1323 MOD_W2BYTEMSK(REG_MOD_BK00_46_L, 0xF000, 0xF000); in MHal_PNL_SetOutputType()
1326 MOD_W2BYTEMSK(REG_MOD_BK00_4D_L, 0xF000, 0xF000); in MHal_PNL_SetOutputType()
1329 MOD_W2BYTEMSK(REG_MOD_BK00_4F_L, 0x0000, 0xF000); in MHal_PNL_SetOutputType()
1332 MOD_W2BYTEMSK(REG_MOD_BK00_51_L, 0x0000, 0xF000); in MHal_PNL_SetOutputType()
1339 MOD_W2BYTEMSK(REG_MOD_BK00_7C_L, 0x3F3F, 0x3F3F); in MHal_PNL_SetOutputType()
1341 MOD_W2BYTEMSK(REG_MOD_BK00_7A_L, 0x0000, 0x3F00); in MHal_PNL_SetOutputType()
1343 MOD_W2BYTEMSK(REG_MOD_BK00_7F_L, 0x0000, 0xFC00); in MHal_PNL_SetOutputType()
1347 MOD_W2BYTEMSK(REG_MOD_BK00_6D_L, 0, 0xF000); in MHal_PNL_SetOutputType()
1349 MOD_W2BYTEMSK(REG_MOD_BK00_6F_L, 0, 0x000F); in MHal_PNL_SetOutputType()
1356 MOD_W2BYTEMSK(REG_MOD_BK00_4D_L, 0x0000, 0xF000); in MHal_PNL_SetOutputType()
1359 MOD_W2BYTEMSK(REG_MOD_BK00_37_L, 0x00, BIT(6)); in MHal_PNL_SetOutputType()
1361 MOD_W2BYTEMSK(REG_MOD_BK00_78_L, 0x00, BIT(0)); in MHal_PNL_SetOutputType()
1392 MOD_W2BYTEMSK(REG_MOD_BK00_46_L, 0x0000, 0xF000); in MHal_PNL_SetOutputType()
1394 MOD_W2BYTEMSK(REG_MOD_BK00_7E_L, 0x0000, 0x000F); in MHal_PNL_SetOutputType()
1396 MOD_W2BYTEMSK(REG_MOD_BK00_44_L, 0x000, 0x3FF); // TTL skew in MHal_PNL_SetOutputType()
1399 MOD_W2BYTEMSK(REG_MOD_BK00_4A_L, 0x0, BIT(8)); // GPO gating in MHal_PNL_SetOutputType()
1416 MOD_W2BYTEMSK(REG_MOD_BK00_42_L, BIT(7), BIT(7)); // shift LVDS pair in MHal_PNL_MISC_Control()
1446 MOD_W2BYTEMSK(REG_MOD_BK00_40_L, pstPanelInitData->u16MOD_CTRL0, LBMASK); in MHal_PNL_Init_MOD()
1449 MOD_W2BYTEMSK(REG_MOD_BK00_40_L, (pstPanelInitData->u16OSTRL)<<4, 0xF00); in MHal_PNL_Init_MOD()
1461 MOD_W2BYTEMSK(REG_MOD_BK00_44_L, (pstPanelInitData->eLPLL_Mode << 12) , BIT(12)); in MHal_PNL_Init_MOD()
1467 …MOD_W2BYTEMSK(REG_MOD_BK00_77_L, 0x1C, 0xFC); // original is MDrv_WriteByteMask(L_BK_MOD(0x7… in MHal_PNL_Init_MOD()
1476 MOD_W2BYTEMSK(REG_MOD_BK00_78_L, 0x0100,0x0100); in MHal_PNL_Init_MOD()
1478 MOD_W2BYTEMSK(REG_MOD_BK00_53_L, BIT(0), BIT(0)); in MHal_PNL_Init_MOD()
1483 MOD_W2BYTEMSK(REG_MOD_BK00_7B_L, 0x03, 0xFF); // for internal LDO in MHal_PNL_Init_MOD()
1526 MOD_W2BYTEMSK(u32Addr, (u16Value << 8), (u16Mask << 8)); in MHal_PNL_DumpMODReg()
1530 MOD_W2BYTEMSK(u32Addr, u16Value, u16Mask); in MHal_PNL_DumpMODReg()
1628 MOD_W2BYTEMSK(REG_MOD_BK00_32_L, BIT(15), BIT(15)); // Enable test enable of digi seri in msModCurrentCalibration()
1629 MOD_W2BYTEMSK(REG_MOD_BK00_41_L, 0x00, 0xFF); // Set analog testpix output to low in msModCurrentCalibration()
1631 MOD_W2BYTEMSK(REG_MOD_BK00_3C_L, BIT(15), BIT(15)); in msModCurrentCalibration()
1635 MOD_W2BYTEMSK(REG_MOD_BK00_3C_L, 0x0000, 0x00FF); in msModCurrentCalibration()
1638 MOD_W2BYTEMSK(REG_MOD_BK00_3C_L, 0x0500, 0x0F00); in msModCurrentCalibration()
1640 …MOD_W2BYTEMSK(REG_MOD_BK00_7D_L, BIT(2), BIT(3)|BIT(2)); // Select calibration source pair, 01: c… in msModCurrentCalibration()
1641 …MOD_W2BYTEMSK(REG_MOD_BK00_7D_L, _u8MOD_CALI_TARGET, BIT(1)|BIT(0)); // Select calibration targ… in msModCurrentCalibration()
1642 MOD_W2BYTEMSK(REG_MOD_BK00_7D_L, BIT(7), BIT(7)); // Enable calibration function in msModCurrentCalibration()
1649 MOD_W2BYTEMSK(REG_MOD_BK00_3D_L, BIT(15), BIT(15)); in msModCurrentCalibration()
1655 MOD_W2BYTEMSK(REG_MOD_BK00_3D_L, 0x00, BIT(15)); in msModCurrentCalibration()
1697 MOD_W2BYTEMSK(REG_MOD_BK00_3C_L, 0x00, BIT(15)); in msModCurrentCalibration()
1699 MOD_W2BYTEMSK(REG_MOD_BK00_7D_L, 0x00, BIT(7)); // Disable calibration function in msModCurrentCalibration()
1700 MOD_W2BYTEMSK(REG_MOD_BK00_32_L, 0x00, BIT(15)); // Disable test enable of digi seri in msModCurrentCalibration()
1702 MOD_W2BYTEMSK(REG_MOD_BK00_40_L, u16reg_3280, LBMASK); in msModCurrentCalibration()
1703 MOD_W2BYTEMSK(REG_MOD_BK00_41_L, u16reg_3282, LBMASK); in msModCurrentCalibration()
1704 MOD_W2BYTEMSK(REG_MOD_BK00_45_L, u16reg_328a, LBMASK); in msModCurrentCalibration()
1740 MOD_W2BYTEMSK(REG_MOD_BK00_29_L,((MS_U16)(u16cur_ibcal[0]&0x3F))<<4, 0x3F0); // ch0 in msModCurrentCalibration()
1741 MOD_W2BYTEMSK(REG_MOD_BK00_29_L,((MS_U16)(u16cur_ibcal[1]&0x3F))<<10, 0xFC00); // ch1 in msModCurrentCalibration()
1743 MOD_W2BYTEMSK(REG_MOD_BK00_2A_L,((MS_U16)(u16cur_ibcal[2]&0x3F)), 0x3F); // ch2 in msModCurrentCalibration()
1744 MOD_W2BYTEMSK(REG_MOD_BK00_2A_L,((MS_U16)(u16cur_ibcal[3]&0x3F))<<6, 0xFC0); // ch3 in msModCurrentCalibration()
1745 MOD_W2BYTEMSK(REG_MOD_BK00_2A_L,((MS_U16)(u16cur_ibcal[4]&0x3F))<<12, 0xF000); // ch4 in msModCurrentCalibration()
1746 MOD_W2BYTEMSK(REG_MOD_BK00_2B_L,((MS_U16)(u16cur_ibcal[4]&0x3F))>>4, 0x03); in msModCurrentCalibration()
1747 MOD_W2BYTEMSK(REG_MOD_BK00_2B_L,((MS_U16)(u16cur_ibcal[5]&0x3F))<<2, 0xFC); // ch5 in msModCurrentCalibration()
1748 MOD_W2BYTEMSK(REG_MOD_BK00_2B_L,((MS_U16)(u16cur_ibcal[6]&0x3F))<<8, 0x3F00); // ch6 in msModCurrentCalibration()
1749 MOD_W2BYTEMSK(REG_MOD_BK00_2B_L,((MS_U16)(u16cur_ibcal[7]&0x3F))<<14, 0xC000); // ch7 in msModCurrentCalibration()
1750 MOD_W2BYTEMSK(REG_MOD_BK00_2C_L,((MS_U16)(u16cur_ibcal[7]&0x3F))>>2, 0x0F); in msModCurrentCalibration()
1751 MOD_W2BYTEMSK(REG_MOD_BK00_2C_L,((MS_U16)(u16cur_ibcal[8]&0x3F))<<4, 0x3F0); // ch8 in msModCurrentCalibration()
1752 MOD_W2BYTEMSK(REG_MOD_BK00_2C_L,((MS_U16)(u16cur_ibcal[9]&0x3F))<<10, 0xFC00); // ch9 in msModCurrentCalibration()
1754 MOD_W2BYTEMSK(REG_MOD_BK00_2D_L,((MS_U16)(u16cur_ibcal[10]&0x3F)), 0x3F); // ch10 in msModCurrentCalibration()
1755 MOD_W2BYTEMSK(REG_MOD_BK00_2D_L,((MS_U16)(u16cur_ibcal[11]&0x3F))<<6, 0xFC0); // ch11 in msModCurrentCalibration()
1756 MOD_W2BYTEMSK(REG_MOD_BK00_2D_L,((MS_U16)(u16cur_ibcal[12]&0x3F))<<12, 0xF000); // ch12 in msModCurrentCalibration()
1757 MOD_W2BYTEMSK(REG_MOD_BK00_2E_L,((MS_U16)(u16cur_ibcal[12]&0x3F))>>4, 0x03); in msModCurrentCalibration()
1758 MOD_W2BYTEMSK(REG_MOD_BK00_2E_L,((MS_U16)(u16cur_ibcal[13]&0x3F))<<2, 0xFC); // ch13 in msModCurrentCalibration()
1759 MOD_W2BYTEMSK(REG_MOD_BK00_2F_L,0x0000, 0x1FFF); // MSB in msModCurrentCalibration()
1852 MOD_W2BYTEMSK(REG_MOD_BK00_33_L, BIT(8), BIT(8)); in MHal_PNL_En()
1853 MOD_W2BYTEMSK(REG_MOD_BK00_33_L, BIT(9), BIT(9)); in MHal_PNL_En()
1901 MOD_W2BYTEMSK(REG_MOD_BK00_02_L, u16Red , 0x03FF); in MHal_PNL_SetOutputPattern()
1902 MOD_W2BYTEMSK(REG_MOD_BK00_03_L, u16Green , 0x03FF); in MHal_PNL_SetOutputPattern()
1903 MOD_W2BYTEMSK(REG_MOD_BK00_04_L, u16Blue , 0x03FF); in MHal_PNL_SetOutputPattern()
1905 MOD_W2BYTEMSK(REG_MOD_BK00_01_L, BIT(15) , BIT(15)); in MHal_PNL_SetOutputPattern()
1909 MOD_W2BYTEMSK(REG_MOD_BK00_01_L, DISABLE , BIT(15)); in MHal_PNL_SetOutputPattern()
1965 MOD_W2BYTEMSK(REG_MOD_BK00_40_L, BIT(4) | BIT(7), BIT(4) | BIT(7)); in MHal_PNL_SetOutputInterlaceTiming()
1967 MOD_W2BYTEMSK(REG_MOD_BK00_42_L, BIT(10)|BIT(11), BIT(10)|BIT(11)); in MHal_PNL_SetOutputInterlaceTiming()
1972 MOD_W2BYTEMSK(REG_MOD_BK00_40_L, 0x00, BIT(4) | BIT(7)); in MHal_PNL_SetOutputInterlaceTiming()
1973 MOD_W2BYTEMSK(REG_MOD_BK00_42_L, 0x00, BIT(10)|BIT(11)); in MHal_PNL_SetOutputInterlaceTiming()