Lines Matching refs:R2BYTE
210 MS_U8 ucDVIMuxSelect = R2BYTE(REG_PM_SLEEP_4D_L) &BMASK(3:0); in _Hal_tmds_CheckPortSelectMux0()
277 MS_U16 usPacketInfoPortSelect0 = R2BYTE(REG_HDMI_DUAL_0_01_L); in _Hal_tmds_GetPacketReceiveStatus0()
301 if(R2BYTE(REG_PM_SLEEP_04_L) &BIT(1)) // Get clock status in _Hal_tmds_GetClockValidFlag()
326 bStatusFlag = ((R2BYTE(REG_PM_SLEEP_3F_L) &BIT(14)) ?FALSE: TRUE); in _Hal_tmds_GetClockStableFlag()
377 bStatusFlag = ((R2BYTE(REG_PM_SCDC0_07_L) &ucStatusMask) ?TRUE: FALSE); in _Hal_tmds_GetSCDCStatusFlag()
456 MS_BOOL bHDMI20Flag = ((R2BYTE(REG_COMBO_PHY1_P0_30_L) &BIT(3)) ?TRUE: FALSE); in _Hal_tmds_GetHDMI20VersionFlag()
528 usClockRate = R2BYTE(REG_COMBO_PHY0_P0_3C_L) * 12 / 128; in _Hal_tmds_GetClockRatePort()
619 if((R2BYTE(REG_DVI_DTOP_DUAL_P0_31_L) &BIT(6)) != BIT(6)) in _Hal_tmds_GetDEStableFlag()
727 if(R2BYTE(REG_COMBO_PHY1_P0_40_L) &BIT(7)) in _Hal_tmds_GetAutoEQDoneFlag()
738 if(R2BYTE(REG_COMBO_PHY0_P0_41_L) &BIT(8)) in _Hal_tmds_GetAutoEQDoneFlag()
742 if(R2BYTE(REG_COMBO_PHY0_P0_41_L) &BIT(8)) in _Hal_tmds_GetAutoEQDoneFlag()
746 if(R2BYTE(REG_COMBO_PHY0_P0_41_L) &BIT(8)) in _Hal_tmds_GetAutoEQDoneFlag()
795 if((R2BYTE(REG_DVI_DTOP_DUAL_P0_07_L) &BMASK(3:0)) > 0) in _Hal_tmds_GetErrorCountStatus14()
799 else if((R2BYTE(REG_DVI_DTOP_DUAL_P0_08_L) &BMASK(3:0)) > 0) in _Hal_tmds_GetErrorCountStatus14()
803 else if((R2BYTE(REG_DVI_DTOP_DUAL_P0_09_L) &BMASK(3:0)) > 0) in _Hal_tmds_GetErrorCountStatus14()
811 if(R2BYTE(REG_DVI_DTOP_DUAL_P0_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
819 if(R2BYTE(REG_DVI_DTOP_DUAL_P0_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
827 if(R2BYTE(REG_DVI_DTOP_DUAL_P0_59_L) > HDMI_DECORD_ERROR_THRESHOLD) in _Hal_tmds_GetErrorCountStatus14()
853 usSteerErrorStatus = R2BYTE(REG_DVI_DTOP_DUAL_P0_18_L) &BMASK(11:0); in _Hal_tmds_GetErrorCountStatus20()
947 bHDMIModeFlag = ((R2BYTE(REG_HDCP_DUAL_P0_01_L) &BIT(0)) ?TRUE: FALSE); in _Hal_tmds_GetHDMIModeFlag()
966 bEncryptionFlag = ((R2BYTE(REG_HDCP_DUAL_P0_1B_L) &BIT(9)) ?TRUE: FALSE); in _Hal_tmds_GetEncryptionFlag()
985 bHDCP22Flag = ((R2BYTE(REG_HDCP_DUAL_P0_4F_L) &BIT(0)) ?TRUE: FALSE); in _Hal_tmds_GetHDCP22Flag()
1004 ulHDCP22Status = R2BYTE(REG_HDCP_DUAL_P0_66_L); in _Hal_tmds_GetHDCP22IntStatus()
1043 if((R2BYTE(REG_DVI_DTOP_DUAL_P0_18_L) &BMASK(2:0)) > 0) in _Hal_tmds_CheckTMDSDataInFlag()
1045 if(R2BYTE(REG_PM_SCDC0_05_L) &BIT(4)) in _Hal_tmds_CheckTMDSDataInFlag()
1071 bScrambleFlag = ((R2BYTE(REG_PM_SCDC0_04_L) &BIT(0)) ?TRUE: FALSE); in _Hal_tmds_CheckScrambleStatus()
1713 while(R2BYTE(REG_PM_EFUSE_28_L) &BIT(13)) in _Hal_tmds_ReadEfuseData()
1821 if((R2BYTE(REG_COMBO_PHY1_P0_05_L) &BMASK(6:4)) == BMASK(6:4)) in _Hal_tmds_EQCalibrationProc()
1857 if(((R2BYTE(REG_COMBO_PHY0_P0_76_L) &BMASK(9:5)) >> 5) == ucEQCalCodeLane0) in _Hal_tmds_EQCalibrationProc()
1859 … if(((R2BYTE(REG_COMBO_PHY0_P0_76_L) &BMASK(14:10)) >> 10) == ucEQCalCodeLane1) in _Hal_tmds_EQCalibrationProc()
1861 if((R2BYTE(REG_COMBO_PHY0_P0_78_L) &BMASK(4:0)) == ucEQCalCodeLane2) in _Hal_tmds_EQCalibrationProc()
1915 usPacketStatus = R2BYTE(REG_HDMI_DUAL_0_02_L) &BMASK(15:14); in _Hal_tmds_GetPacketReceiveFlag()
1933 usPacketStatus = R2BYTE(REG_HDMI2_DUAL_0_26_L) &BIT(3); in _Hal_tmds_GetPacketReceiveFlag()
2013 while(R2BYTE(REG_HDCP_DUAL_P0_19_L +u16bank_offset) & BIT(7)); // wait write ready in _Hal_tmds_HDCPWriteX74()
2112 if(R2BYTE(REG_HDCP_DUAL_P0_66_L) & BIT(2)) //check write done in Hal_HDCP22_PollingWriteDone()
2133 if(R2BYTE(REG_HDCP_DUAL_P0_66_L) & BIT(3)) //check read done in Hal_HDCP22_PollingReadDone()
2230 *(pucData + ultemp) = (R2BYTE(REG_HDCPKEY_0E_L) &BMASK(7:0)); in Hal_HDCP22_FetchMsg()
2252 dwMsgLen = R2BYTE(REG_HDCP_DUAL_P0_64_L) & BMASK(9:0); in Hal_HDCP22_RecvMsg()
2295 while((R2BYTE(REG_HDCPKEY_0E_L + ucPortIdx * 0x02) &BMASK(7:0)) != *(pucData + ultemp)) in Hal_HDCP22_SendMsg()
2311 while((R2BYTE(REG_HDCP_DUAL_P0_19_L) & BIT(10))); //polling DDC free in Hal_HDCP22_SendMsg()
2352 if(R2BYTE(REG_HDCP_DUAL_P0_1B_L) &BIT(9)) in Hal_HDCP_GetEncryptionFlag()
2503 while(R2BYTE(REG_HDCP_DUAL_P0_19_L) & BIT(7)); // wait write ready in Hal_HDCP_initproductionkey()
2513 while(R2BYTE(REG_HDCP_DUAL_P0_19_L) & BIT(7)); // wait write ready in Hal_HDCP_initproductionkey()
2889 u16regvalue = R2BYTE(REG_HDMI_DUAL_0_15_L); in Hal_HDMI_gcontrol_info()
2930 u16regvalue = R2BYTE(REG_HDMI_5C_H); in Hal_HDMI_pll_ctrl1()
3027 u16regvalue = R2BYTE(REG_HDMI_5D_H); in Hal_HDMI_pll_ctrl2()
3152 u16Reg = R2BYTE(REG_HDMI_DUAL_0_40_L + ((u8byte - 1)/2)*2); in Hal_HDMI_avi_infoframe_info()
3364 return R2BYTE(REG_DVI_DTOP_DUAL_P0_01_L); in Hal_DVI_ChannelPhaseStatus()
3367 return R2BYTE(REG_DVI_DTOP_DUAL_P0_02_L); in Hal_DVI_ChannelPhaseStatus()
3370 return R2BYTE(REG_DVI_DTOP_DUAL_P0_03_L); in Hal_DVI_ChannelPhaseStatus()
3398 if(R2BYTE(REG_COMBO_PHY0_P0_32_L) & BIT(3)& BIT(7)& BIT(11)& BIT(15)) // clk stable in Hal_DVI_HF_adjust()
3400 temp = (R2BYTE(REG_DVI_ATOP_61_L) & 0x0300)>>8; in Hal_DVI_HF_adjust()
3421 if(R2BYTE(REG_DVI_DTOP_31_L) & BIT(6)) in Hal_DVI_HF_adjust()
3439 if(R2BYTE(REG_COMBO_PHY0_P1_32_L) & BIT(3)& BIT(7)& BIT(11)& BIT(15)) // clk stable in Hal_DVI_HF_adjust()
3441 temp = (R2BYTE(REG_DVI_ATOP1_61_L) & 0x0300)>>8; in Hal_DVI_HF_adjust()
3462 if(R2BYTE(REG_DVI_DTOP1_31_L) & BIT(6)) in Hal_DVI_HF_adjust()
3480 if(R2BYTE(REG_COMBO_PHY0_P2_32_L) & BIT(3)& BIT(7)& BIT(11)& BIT(15)) // clk stable in Hal_DVI_HF_adjust()
3482 temp = (R2BYTE(REG_DVI_ATOP_6A_L) & 0x0300)>>8; in Hal_DVI_HF_adjust()
3503 if(R2BYTE(REG_DVI_DTOP3_31_L) & BIT(6)) in Hal_DVI_HF_adjust()
3521 if(R2BYTE(REG_COMBO_PHY0_P3_32_L) & BIT(3)& BIT(7)& BIT(11)& BIT(15)) // clk stable in Hal_DVI_HF_adjust()
3523 temp = (R2BYTE(REG_DVI_ATOP2_61_L) & 0x0300)>>8; in Hal_DVI_HF_adjust()
3544 if(R2BYTE(REG_DVI_DTOP2_31_L) & BIT(6)) in Hal_DVI_HF_adjust()
3611 …if( (R2BYTE(REG_DVI_DTOP_16_L+u16bank_offset) & BIT(10)) && (R2BYTE(REG_DVI_DTOP_31_L+u16bank_offs… in Hal_DVI_IMMESWITCH_PS_SW_Path()
3619 …if( !(R2BYTE(REG_DVI_PS_00_L+u8reg_offset) & BIT(0)) && (R2BYTE(REG_DVI_DTOP_31_L+u16bank_offset) … in Hal_DVI_IMMESWITCH_PS_SW_Path()
4337 usPacketContent = R2BYTE(REG_HDMI2_DUAL_0_61_L +uctemp *2); in Hal_HDMI_Get_InfoFrame()
4383 while(R2BYTE(REG_HDCP_DUAL_P0_19_L) & BIT(7)); // wait write ready in Hal_HDCP_WriteX74()
4419 while(R2BYTE(REG_HDCP_DUAL_P0_19_L) & BIT(6)); // wait read ready in Hal_HDCP_ReadX74()