Lines Matching refs:MOD_W2BYTEMSK
163 MOD_W2BYTEMSK(REG_MOD_BK00_78_L, 0x0 , BIT(0) ); in MHal_MOD_PowerOn()
166 MOD_W2BYTEMSK(REG_MOD_BK00_77_L, (BIT(1) | BIT(0)), (BIT(1) | BIT(0))); in MHal_MOD_PowerOn()
170 MOD_W2BYTEMSK(REG_MOD_BK00_78_L, BIT(0), BIT(0)); in MHal_MOD_PowerOn()
172 MOD_W2BYTEMSK(REG_MOD_BK00_77_L, 0x00, (BIT(1) | BIT(0))); in MHal_MOD_PowerOn()
196 MOD_W2BYTEMSK(REG_MOD_BK00_42_L, 0x0000, (BIT(7) | BIT(6))); // shift_lvds_pair, set LVDS Mode3 in MHal_Shift_LVDS_Pair()
207 MOD_W2BYTEMSK(REG_MOD_BK00_6D_L, 0x5000, 0xF000); in MHal_Output_LVDS_Pair_Setting()
209 MOD_W2BYTEMSK(REG_MOD_BK00_6F_L, 0x0005, 0x000F); in MHal_Output_LVDS_Pair_Setting()
612 MOD_W2BYTEMSK(REG_MOD_BK00_6F_L, 0x0000, 0xEFFF);//0x6F in MHal_PNL_SetOutputType()
614 MOD_W2BYTEMSK(REG_MOD_BK00_42_L, 0x0000, (BIT(7) | BIT(6))); // shift_lvds_pair in MHal_PNL_SetOutputType()
621 MOD_W2BYTEMSK(REG_MOD_BK00_7E_L, 0x0000, 0xE000); in MHal_PNL_SetOutputType()
623 MOD_W2BYTEMSK(REG_MOD_BK00_44_L, 0x3FF, 0x3FF); // TTL skew in MHal_PNL_SetOutputType()
626 MOD_W2BYTEMSK(REG_MOD_BK00_4A_L, BIT(8), BIT(8)); // GPO gating in MHal_PNL_SetOutputType()
637 MOD_W2BYTEMSK(REG_MOD_BK00_6F_L, 0x0000, 0x000F); in MHal_PNL_SetOutputType()
639 MOD_W2BYTEMSK(REG_MOD_BK00_46_L, 0xF000, 0xF000); in MHal_PNL_SetOutputType()
641 MOD_W2BYTEMSK(REG_MOD_BK00_7E_L, 0x0000, 0x000F); in MHal_PNL_SetOutputType()
644 MOD_W2BYTEMSK(REG_MOD_BK00_4D_L, 0xF000, 0xF000); in MHal_PNL_SetOutputType()
646 MOD_W2BYTEMSK(REG_MOD_BK00_4F_L, 0xF000, 0xF000); in MHal_PNL_SetOutputType()
648 MOD_W2BYTEMSK(REG_MOD_BK00_51_L, 0x0000, 0xF000); in MHal_PNL_SetOutputType()
661 MOD_W2BYTEMSK(REG_MOD_BK00_4D_L, 0x0000, 0xF000); in MHal_PNL_SetOutputType()
673 MOD_W2BYTEMSK(REG_MOD_BK00_46_L, 0x0000, 0xF000); in MHal_PNL_SetOutputType()
675 MOD_W2BYTEMSK(REG_MOD_BK00_7E_L, 0x0000, 0x000F); in MHal_PNL_SetOutputType()
677 MOD_W2BYTEMSK(REG_MOD_BK00_44_L, 0x000, 0x3FF); // TTL skew in MHal_PNL_SetOutputType()
680 MOD_W2BYTEMSK(REG_MOD_BK00_4A_L, 0x0, BIT(8)); // GPO gating in MHal_PNL_SetOutputType()
695 MOD_W2BYTEMSK(REG_MOD_BK00_42_L, BIT(7), BIT(7)); // shift LVDS pair in MHal_PNL_MISC_Control()
737 MOD_W2BYTEMSK(REG_MOD_BK00_40_L, pstPanelInitData->u16MOD_CTRL0, LBMASK); in MHal_PNL_Init_MOD()
749 MOD_W2BYTEMSK(REG_MOD_BK00_44_L, (pstPanelInitData->eLPLL_Mode << 12) , BIT(12)); in MHal_PNL_Init_MOD()
755 …MOD_W2BYTEMSK(REG_MOD_BK00_77_L, 0x0C, 0xFC); // original is MDrv_WriteByteMask(L_BK_MOD(0x7… in MHal_PNL_Init_MOD()
763 …MOD_W2BYTEMSK(REG_MOD_BK00_7D_L, 0x1F, LBMASK); //[6]disable power down bit and [5:0]enable … in MHal_PNL_Init_MOD()
769 MOD_W2BYTEMSK(REG_MOD_BK00_53_L, BIT(0), BIT(0)); in MHal_PNL_Init_MOD()
812 MOD_W2BYTEMSK(u32Addr, (u16Value << 8), (u16Mask << 8)); in MHal_PNL_DumpMODReg()
816 MOD_W2BYTEMSK(u32Addr, u16Value, u16Mask); in MHal_PNL_DumpMODReg()
938 MOD_W2BYTEMSK(REG_MOD_BK00_33_L, BIT(8), BIT(8)); in MHal_PNL_En()
939 MOD_W2BYTEMSK(REG_MOD_BK00_33_L, BIT(9), BIT(9)); in MHal_PNL_En()
986 MOD_W2BYTEMSK(REG_MOD_BK00_02_L, u16Red , 0x03FF); in MHal_PNL_SetOutputPattern()
987 MOD_W2BYTEMSK(REG_MOD_BK00_03_L, u16Green , 0x03FF); in MHal_PNL_SetOutputPattern()
988 MOD_W2BYTEMSK(REG_MOD_BK00_04_L, u16Blue , 0x03FF); in MHal_PNL_SetOutputPattern()
990 MOD_W2BYTEMSK(REG_MOD_BK00_01_L, BIT(15) , BIT(15)); in MHal_PNL_SetOutputPattern()
994 MOD_W2BYTEMSK(REG_MOD_BK00_01_L, DISABLE , BIT(15)); in MHal_PNL_SetOutputPattern()