Lines Matching refs:_BIT0
1808 RIU_WriteRegBit(RFAGC_ENABLE, 0, _BIT0); // RFAGC disable in msVifAdcInitial()
1810 RIU_WriteRegBit(RFAGC_ENABLE, 1, _BIT0); // RFAGC enable in msVifAdcInitial()
1827 msWriteBit(OREN_PGA2_S, 0, _BIT0); // Audio PGA2 0: BB control; 1: I2C control in msVifAdcInitial()
1842 msWriteBit(BYPASS_EQFIR, 1, _BIT0); in msVifAdcInitial()
2355 …msWriteBit(CR_RATE_INV, VIFInitialIn_inst.VifCrInvert_B, _BIT0); … in msVifSetSoundSystem()
2402 …msWriteBit(CR_RATE_INV, VIFInitialIn_inst.VifCrInvert_B, _BIT0); … in msVifSetSoundSystem()
2447 …msWriteBit(CR_RATE_INV, VIFInitialIn_inst.VifCrInvert_GH, _BIT0); … in msVifSetSoundSystem()
2492 …msWriteBit(CR_RATE_INV, VIFInitialIn_inst.VifCrInvert_GH, _BIT0); … in msVifSetSoundSystem()
2537 …msWriteBit(CR_RATE_INV, VIFInitialIn_inst.VifCrInvert_I, _BIT0); … in msVifSetSoundSystem()
2582 …msWriteBit(CR_RATE_INV, VIFInitialIn_inst.VifCrInvert_DK, _BIT0); … in msVifSetSoundSystem()
2627 …msWriteBit(CR_RATE_INV, VIFInitialIn_inst.VifCrInvert_DK, _BIT0); … in msVifSetSoundSystem()
2672 …msWriteBit(CR_RATE_INV, VIFInitialIn_inst.VifCrInvert_DK, _BIT0); … in msVifSetSoundSystem()
2718 …msWriteBit(CR_RATE_INV, VIFInitialIn_inst.VifCrInvert_DK, _BIT0); … in msVifSetSoundSystem()
2763 …msWriteBit(CR_RATE_INV, VIFInitialIn_inst.VifCrInvert_L, _BIT0); … in msVifSetSoundSystem()
2808 …msWriteBit(CR_RATE_INV, VIFInitialIn_inst.VifCrInvert_LL, _BIT0); … in msVifSetSoundSystem()
2853 …msWriteBit(CR_RATE_INV, VIFInitialIn_inst.VifCrInvert_MN, _BIT0); … in msVifSetSoundSystem()
2934 RIU_WriteRegBit(RF_LOAD , 1 , _BIT0); in msVifLoad()
2935 RIU_WriteRegBit(DBB1_LOAD , 1 , _BIT0); in msVifLoad()
2936 RIU_WriteRegBit(DBB2_LOAD , 1 , _BIT0); in msVifLoad()
2937 RIU_WriteRegBit(DBB2_LOAD , 0, _BIT0); in msVifLoad()
2951 msWriteBit(CLAMPGAIN_RSTZ, 0, _BIT0); // clampgain software reset in msVifInitial()
2952 msWriteBit(VSYNC_RSTZ, 0, _BIT0); // vsync software reset in msVifInitial()
2998 msWriteByteMask(AGC_K, u8UsrNonSteadyAgcK, _BIT0|_BIT1|_BIT2); // k in msVifInitial()
3002 msWriteByteMask(AGC_K, 0x03, _BIT0|_BIT1|_BIT2); // k in msVifInitial()
3004 msWriteByteMask(AGC_K, 0x02, _BIT0|_BIT1|_BIT2); // k in msVifInitial()
3023 msWriteBit(VAGC_VGA_OUT_SEL, 1, _BIT0); // VGA1 -> IFAGC in msVifInitial()
3027 msWriteBit(LEVEL_SENSE_BYPASS, 0, _BIT0); // Level_Sense not bypass in msVifInitial()
3029 …msWriteBit(BYPASS_V_ACI_BPF4AGC, 0, _BIT0); // bypass ACI_BPF before AGC input: 0:not by… in msVifInitial()
3033 msWriteBit(LEVEL_SENSE_BYPASS, 1, _BIT0); // Level_Sense bypass in msVifInitial()
3035 …msWriteBit(BYPASS_V_ACI_BPF4AGC, 1, _BIT0); // bypass ACI_BPF before AGC input: 0:not by… in msVifInitial()
3049 msWriteBit(AGC_ENABLE, 1, _BIT0); // AGC enable in msVifInitial()
3061 msWriteBit(CR_ANCO_SEL, 1, _BIT0); // audio nco select in msVifInitial()
3088 msWriteBit(CR_FD_IN_SEL, 0 , _BIT0); //0:IIR LPF2; 1:FIR in msVifInitial()
3098 msWriteBit(LOCK_LEAKY_SEL, VIFInitialIn_inst.VifCrLockLeakySel, _BIT0); in msVifInitial()
3118 msWriteBit(CR_RATE_INV, 0, _BIT0); // cr_rate not invert in msVifInitial()
3125 msWriteBit(CR_RATE_INV, 0, _BIT0); // cr_rate not invert in msVifInitial()
3132 msWriteBit(CR_RATE_INV, 0, _BIT0); // cr_rate not invert in msVifInitial()
3171 …msWriteByteMask(IMAGE_REJ1_SEL, _BIT0, _BIT0|_BIT1); // 0: aci_rej_out; 1: nyq_slp_out1; 2: n… in msVifInitial()
3193 msWriteBit(BYPASS_SOS11, 1, _BIT0); // SOS11 bypass in msVifInitial()
3232 msWriteBit(DAGC1_ENABLE, 1, _BIT0); // DAGC1 enable in msVifInitial()
3266 msWriteBit(DAGC2_ENABLE, 1, _BIT0); // DAGC2 enable in msVifInitial()
3295 …msWriteBit(CLAMPGAIN_CLAMP_OREN, VIFInitialIn_inst.VifClampgainClampOren, _BIT0); // cla… in msVifInitial()
3307 msWriteBit(ADAGC_ENABLE, 0, _BIT0); // ADAGC disable in msVifInitial()
3313 msWriteBit(ADAGC_ENABLE, 1, _BIT0); // ADAGC enable in msVifInitial()
3328 msWriteBit(ZERO_ENABLE, 0 , _BIT0); // zero detector disable in msVifInitial()
3337 msWriteBit(LEVEL_SENSE_EN, 1, _BIT0); in msVifInitial()
3339 msWriteBit(LEVEL_SENSE_MODE, 0, _BIT0); // 0: porch; 1: sync height in msVifInitial()
3372 …msWriteBit(CR_KPKI_SPEEDUP_EN , 0 , _BIT0); //0:disable , 1:en… in msVifInitial()
3374 msWriteByteMask(CR_KP_SPEED, _BIT2 , _BIT0|_BIT1|_BIT2|_BIT3); in msVifInitial()
3399 msWriteByteMask(VIF_ADC_LSB_MASK, 0x00, _BIT0|_BIT1); // Un-mask ADC_LSB bits in msVifInitial()
3443 msWriteBit(KPKI_ADJ_EN, 0, _BIT0); in msVifInitial()
3445 msWriteBit(HALVIFDBG2_BIT, g_VifHWKpKiFlag, _BIT0); in msVifInitial()
3454 msWriteBit(BYPASS_SOS11, 1, _BIT0); in msVifInitial()
3457 msWriteBit(VNCO_INV_SEL, 0, _BIT0); in msVifInitial()
3468 msWriteBit(CLAMPGAIN_RSTZ, 1, _BIT0); // clampgain software reset in msVifInitial()
3469 msWriteBit(VSYNC_RSTZ, 1, _BIT0); // vsync software reset in msVifInitial()
3488 RIU_WriteRegBit(RFAGC_ENABLE, 0, _BIT0); in msVifExit()
3563 msWriteBit(CR_K_SEL2, 0, _BIT0); in msVifHandler()
3628 msWriteByteMask(AGC_K, u8UsrSteadyAgcK, _BIT0|_BIT1|_BIT2);// k in msVifHandler()
3630 msWriteByteMask(AGC_K, 0x04, _BIT0|_BIT1|_BIT2);// k in msVifHandler()
3639 msWriteBit(LOCK_LEAKY_SEL, 0, _BIT0); in msVifHandler()
3640 msWriteBit(VNCO_INV_SEL, 1, _BIT0); in msVifHandler()
3655 … msWriteBit(KPKI_ADJ_EN, 1, _BIT0); // real HW_KPKI_enable in msVifHandler()
3720 msWriteByteMask(AGC_K, u8UsrSteadyAgcK, _BIT0|_BIT1|_BIT2);// k in msVifHandler()
3722 msWriteByteMask(AGC_K, 0x04, _BIT0|_BIT1|_BIT2); // k in msVifHandler()
3727 … msWriteByteMask(AGC_K, u8UsrNonSteadyAgcK, _BIT0|_BIT1|_BIT2); // k in msVifHandler()
3731 msWriteByteMask(AGC_K, 0x03, _BIT0|_BIT1|_BIT2); // k in msVifHandler()
3733 msWriteByteMask(AGC_K, 0x02, _BIT0|_BIT1|_BIT2); // k in msVifHandler()
3757 msWriteBit(KPKI_ADJ_EN, 1, _BIT0); // real HW_KPKI_enable in msVifHandler()
3774 msWriteBit(KPKI_ADJ_EN, 0, _BIT0); // real HW_KPKI_disable in msVifHandler()
3945 msWriteByteMask(CR_JTR_SEL, 0, _BIT3|_BIT2|_BIT1|_BIT0); // 0: max in msVifCrKpKiAutoAdjust()
3948 msWriteByteMask(CR_JTR_SEL, _BIT0, _BIT3|_BIT2|_BIT1|_BIT0); // 1: min in msVifCrKpKiAutoAdjust()
4043 msWriteBit(BYPASS_EQFIR, 1, _BIT0); // EQ BYPASS in msVifLoadEQCoeff()
4155 msWriteBit(BYPASS_EQFIR , 0 , _BIT0); // EQ not BYPASS in msVifLoadEQCoeff()
4175 msWriteBit(CR_RATE_INV, 0, _BIT0); // cr_rate not invert in msVifShiftClk()
4196 msWriteBit(CR_RATE_INV, 0, _BIT0); // cr_rate not invert in msVifShiftClk()
4217 msWriteBit(CR_RATE_INV, 0, _BIT0); // cr_rate not invert in msVifShiftClk()